Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
[linux-2.6-block.git] / drivers / gpu / drm / drm_modes.c
CommitLineData
f453ba04 1/*
f453ba04
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2 * Copyright © 1997-2003 by The XFree86 Project, Inc.
3 * Copyright © 2007 Dave Airlie
4 * Copyright © 2007-2008 Intel Corporation
5 * Jesse Barnes <jesse.barnes@intel.com>
d782c3f9 6 * Copyright 2005-2006 Luc Verhaegen
26bbdada 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com
f453ba04
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8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25 * OTHER DEALINGS IN THE SOFTWARE.
26 *
27 * Except as contained in this notice, the name of the copyright holder(s)
28 * and author(s) shall not be used in advertising or otherwise to promote
29 * the sale, use or other dealings in this Software without prior written
30 * authorization from the copyright holder(s) and author(s).
31 */
32
33#include <linux/list.h>
2c761270 34#include <linux/list_sort.h>
2d1a8a48 35#include <linux/export.h>
760285e7
DH
36#include <drm/drmP.h>
37#include <drm/drm_crtc.h>
edb37a95 38#include <video/of_videomode.h>
ebc64e45 39#include <video/videomode.h>
55310008 40#include <drm/drm_modes.h>
f453ba04 41
8bd441b2
DV
42#include "drm_crtc_internal.h"
43
f453ba04 44/**
3ec0db81 45 * drm_mode_debug_printmodeline - print a mode to dmesg
f453ba04
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46 * @mode: mode to print
47 *
f453ba04
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48 * Describe @mode using DRM_DEBUG.
49 */
0b3904ab 50void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
f453ba04 51{
f940f37f 52 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
8a4c47f3 53 "0x%x 0x%x\n",
f0531859 54 mode->base.id, mode->name, mode->vrefresh, mode->clock,
55 mode->hdisplay, mode->hsync_start,
56 mode->hsync_end, mode->htotal,
57 mode->vdisplay, mode->vsync_start,
58 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
f453ba04
DA
59}
60EXPORT_SYMBOL(drm_mode_debug_printmodeline);
61
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DV
62/**
63 * drm_mode_create - create a new display mode
64 * @dev: DRM device
65 *
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66 * Create a new, cleared drm_display_mode with kzalloc, allocate an ID for it
67 * and return it.
8bd441b2 68 *
f5aabb97 69 * Returns:
8bd441b2
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70 * Pointer to new mode on success, NULL on error.
71 */
72struct drm_display_mode *drm_mode_create(struct drm_device *dev)
73{
74 struct drm_display_mode *nmode;
75
76 nmode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL);
77 if (!nmode)
78 return NULL;
79
80 if (drm_mode_object_get(dev, &nmode->base, DRM_MODE_OBJECT_MODE)) {
81 kfree(nmode);
82 return NULL;
83 }
84
85 return nmode;
86}
87EXPORT_SYMBOL(drm_mode_create);
88
89/**
90 * drm_mode_destroy - remove a mode
91 * @dev: DRM device
92 * @mode: mode to remove
93 *
f5aabb97 94 * Release @mode's unique ID, then free it @mode structure itself using kfree.
8bd441b2
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95 */
96void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode)
97{
98 if (!mode)
99 return;
100
101 drm_mode_object_put(dev, &mode->base);
102
103 kfree(mode);
104}
105EXPORT_SYMBOL(drm_mode_destroy);
106
107/**
f5aabb97 108 * drm_mode_probed_add - add a mode to a connector's probed_mode list
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109 * @connector: connector the new mode
110 * @mode: mode data
111 *
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112 * Add @mode to @connector's probed_mode list for later use. This list should
113 * then in a second step get filtered and all the modes actually supported by
114 * the hardware moved to the @connector's modes list.
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115 */
116void drm_mode_probed_add(struct drm_connector *connector,
117 struct drm_display_mode *mode)
118{
119 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
120
121 list_add_tail(&mode->head, &connector->probed_modes);
122}
123EXPORT_SYMBOL(drm_mode_probed_add);
124
d782c3f9 125/**
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126 * drm_cvt_mode -create a modeline based on the CVT algorithm
127 * @dev: drm device
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128 * @hdisplay: hdisplay size
129 * @vdisplay: vdisplay size
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130 * @vrefresh: vrefresh rate
131 * @reduced: whether to use reduced blanking
132 * @interlaced: whether to compute an interlaced mode
133 * @margins: whether to add margins (borders)
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134 *
135 * This function is called to generate the modeline based on CVT algorithm
136 * according to the hdisplay, vdisplay, vrefresh.
137 * It is based from the VESA(TM) Coordinated Video Timing Generator by
138 * Graham Loveridge April 9, 2003 available at
631dd1a8 139 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
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140 *
141 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
142 * What I have done is to translate it by using integer calculation.
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143 *
144 * Returns:
145 * The modeline based on the CVT algorithm stored in a drm_display_mode object.
146 * The display mode object is allocated with drm_mode_create(). Returns NULL
147 * when no mode could be allocated.
d782c3f9 148 */
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149struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
150 int vdisplay, int vrefresh,
d50ba256 151 bool reduced, bool interlaced, bool margins)
d782c3f9 152{
3ec0db81 153#define HV_FACTOR 1000
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154 /* 1) top/bottom margin size (% of height) - default: 1.8, */
155#define CVT_MARGIN_PERCENTAGE 18
156 /* 2) character cell horizontal granularity (pixels) - default 8 */
157#define CVT_H_GRANULARITY 8
158 /* 3) Minimum vertical porch (lines) - default 3 */
159#define CVT_MIN_V_PORCH 3
160 /* 4) Minimum number of vertical back porch lines - default 6 */
161#define CVT_MIN_V_BPORCH 6
162 /* Pixel Clock step (kHz) */
163#define CVT_CLOCK_STEP 250
164 struct drm_display_mode *drm_mode;
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165 unsigned int vfieldrate, hperiod;
166 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
167 int interlace;
168
169 /* allocate the drm_display_mode structure. If failure, we will
170 * return directly
171 */
172 drm_mode = drm_mode_create(dev);
173 if (!drm_mode)
174 return NULL;
175
176 /* the CVT default refresh rate is 60Hz */
177 if (!vrefresh)
178 vrefresh = 60;
179
180 /* the required field fresh rate */
181 if (interlaced)
182 vfieldrate = vrefresh * 2;
183 else
184 vfieldrate = vrefresh;
185
186 /* horizontal pixels */
187 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
188
189 /* determine the left&right borders */
190 hmargin = 0;
191 if (margins) {
192 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
193 hmargin -= hmargin % CVT_H_GRANULARITY;
194 }
195 /* find the total active pixels */
196 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
197
198 /* find the number of lines per field */
199 if (interlaced)
200 vdisplay_rnd = vdisplay / 2;
201 else
202 vdisplay_rnd = vdisplay;
203
204 /* find the top & bottom borders */
205 vmargin = 0;
206 if (margins)
207 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
208
841b4117 209 drm_mode->vdisplay = vdisplay + 2 * vmargin;
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210
211 /* Interlaced */
212 if (interlaced)
213 interlace = 1;
214 else
215 interlace = 0;
216
217 /* Determine VSync Width from aspect ratio */
218 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
219 vsync = 4;
220 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
221 vsync = 5;
222 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
223 vsync = 6;
224 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
225 vsync = 7;
226 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
227 vsync = 7;
228 else /* custom */
229 vsync = 10;
230
231 if (!reduced) {
232 /* simplify the GTF calculation */
233 /* 4) Minimum time of vertical sync + back porch interval (µs)
234 * default 550.0
235 */
236 int tmp1, tmp2;
237#define CVT_MIN_VSYNC_BP 550
238 /* 3) Nominal HSync width (% of line period) - default 8 */
239#define CVT_HSYNC_PERCENTAGE 8
240 unsigned int hblank_percentage;
241 int vsyncandback_porch, vback_porch, hblank;
242
243 /* estimated the horizontal period */
244 tmp1 = HV_FACTOR * 1000000 -
245 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
246 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
247 interlace;
248 hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
249
250 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
251 /* 9. Find number of lines in sync + backporch */
252 if (tmp1 < (vsync + CVT_MIN_V_PORCH))
253 vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
254 else
255 vsyncandback_porch = tmp1;
256 /* 10. Find number of lines in back porch */
257 vback_porch = vsyncandback_porch - vsync;
258 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
259 vsyncandback_porch + CVT_MIN_V_PORCH;
260 /* 5) Definition of Horizontal blanking time limitation */
261 /* Gradient (%/kHz) - default 600 */
262#define CVT_M_FACTOR 600
263 /* Offset (%) - default 40 */
264#define CVT_C_FACTOR 40
265 /* Blanking time scaling factor - default 128 */
266#define CVT_K_FACTOR 128
267 /* Scaling factor weighting - default 20 */
268#define CVT_J_FACTOR 20
269#define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256)
270#define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
271 CVT_J_FACTOR)
272 /* 12. Find ideal blanking duty cycle from formula */
273 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
274 hperiod / 1000;
275 /* 13. Blanking time */
276 if (hblank_percentage < 20 * HV_FACTOR)
277 hblank_percentage = 20 * HV_FACTOR;
278 hblank = drm_mode->hdisplay * hblank_percentage /
279 (100 * HV_FACTOR - hblank_percentage);
280 hblank -= hblank % (2 * CVT_H_GRANULARITY);
2a97acd6 281 /* 14. find the total pixels per line */
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282 drm_mode->htotal = drm_mode->hdisplay + hblank;
283 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
284 drm_mode->hsync_start = drm_mode->hsync_end -
285 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
286 drm_mode->hsync_start += CVT_H_GRANULARITY -
287 drm_mode->hsync_start % CVT_H_GRANULARITY;
288 /* fill the Vsync values */
289 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
290 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
291 } else {
292 /* Reduced blanking */
293 /* Minimum vertical blanking interval time (µs)- default 460 */
294#define CVT_RB_MIN_VBLANK 460
295 /* Fixed number of clocks for horizontal sync */
296#define CVT_RB_H_SYNC 32
297 /* Fixed number of clocks for horizontal blanking */
298#define CVT_RB_H_BLANK 160
299 /* Fixed number of lines for vertical front porch - default 3*/
300#define CVT_RB_VFPORCH 3
301 int vbilines;
302 int tmp1, tmp2;
303 /* 8. Estimate Horizontal period. */
304 tmp1 = HV_FACTOR * 1000000 -
305 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
306 tmp2 = vdisplay_rnd + 2 * vmargin;
307 hperiod = tmp1 / (tmp2 * vfieldrate);
308 /* 9. Find number of lines in vertical blanking */
309 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
310 /* 10. Check if vertical blanking is sufficient */
311 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
312 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
313 /* 11. Find total number of lines in vertical field */
314 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
315 /* 12. Find total number of pixels in a line */
316 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
317 /* Fill in HSync values */
318 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
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319 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
320 /* Fill in VSync values */
321 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
322 drm_mode->vsync_end = drm_mode->vsync_start + vsync;
d782c3f9
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323 }
324 /* 15/13. Find pixel clock frequency (kHz for xf86) */
325 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
326 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
327 /* 18/16. Find actual vertical frame frequency */
328 /* ignore - just set the mode flag for interlaced */
171fdd89 329 if (interlaced) {
d782c3f9 330 drm_mode->vtotal *= 2;
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331 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
332 }
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333 /* Fill the mode line name */
334 drm_mode_set_name(drm_mode);
335 if (reduced)
336 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
337 DRM_MODE_FLAG_NVSYNC);
338 else
339 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
340 DRM_MODE_FLAG_NHSYNC);
d782c3f9 341
171fdd89 342 return drm_mode;
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343}
344EXPORT_SYMBOL(drm_cvt_mode);
345
26bbdada 346/**
f5aabb97
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347 * drm_gtf_mode_complex - create the modeline based on the full GTF algorithm
348 * @dev: drm device
349 * @hdisplay: hdisplay size
350 * @vdisplay: vdisplay size
351 * @vrefresh: vrefresh rate.
352 * @interlaced: whether to compute an interlaced mode
353 * @margins: desired margin (borders) size
3ec0db81
DV
354 * @GTF_M: extended GTF formula parameters
355 * @GTF_2C: extended GTF formula parameters
356 * @GTF_K: extended GTF formula parameters
357 * @GTF_2J: extended GTF formula parameters
26bbdada 358 *
7a374350
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359 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
360 * in here multiplied by two. For a C of 40, pass in 80.
f5aabb97
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361 *
362 * Returns:
363 * The modeline based on the full GTF algorithm stored in a drm_display_mode object.
364 * The display mode object is allocated with drm_mode_create(). Returns NULL
365 * when no mode could be allocated.
26bbdada 366 */
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367struct drm_display_mode *
368drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
369 int vrefresh, bool interlaced, int margins,
370 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
371{ /* 1) top/bottom margin size (% of height) - default: 1.8, */
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372#define GTF_MARGIN_PERCENTAGE 18
373 /* 2) character cell horizontal granularity (pixels) - default 8 */
374#define GTF_CELL_GRAN 8
375 /* 3) Minimum vertical porch (lines) - default 3 */
376#define GTF_MIN_V_PORCH 1
377 /* width of vsync in lines */
378#define V_SYNC_RQD 3
379 /* width of hsync as % of total line */
380#define H_SYNC_PERCENT 8
381 /* min time of vsync + back porch (microsec) */
382#define MIN_VSYNC_PLUS_BP 550
26bbdada 383 /* C' and M' are part of the Blanking Duty Cycle computation */
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384#define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
385#define GTF_M_PRIME (GTF_K * GTF_M / 256)
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386 struct drm_display_mode *drm_mode;
387 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
388 int top_margin, bottom_margin;
389 int interlace;
390 unsigned int hfreq_est;
391 int vsync_plus_bp, vback_porch;
392 unsigned int vtotal_lines, vfieldrate_est, hperiod;
393 unsigned int vfield_rate, vframe_rate;
394 int left_margin, right_margin;
395 unsigned int total_active_pixels, ideal_duty_cycle;
396 unsigned int hblank, total_pixels, pixel_freq;
397 int hsync, hfront_porch, vodd_front_porch_lines;
398 unsigned int tmp1, tmp2;
399
400 drm_mode = drm_mode_create(dev);
401 if (!drm_mode)
402 return NULL;
403
404 /* 1. In order to give correct results, the number of horizontal
405 * pixels requested is first processed to ensure that it is divisible
406 * by the character size, by rounding it to the nearest character
407 * cell boundary:
408 */
409 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
410 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
411
412 /* 2. If interlace is requested, the number of vertical lines assumed
413 * by the calculation must be halved, as the computation calculates
414 * the number of vertical lines per field.
415 */
416 if (interlaced)
417 vdisplay_rnd = vdisplay / 2;
418 else
419 vdisplay_rnd = vdisplay;
420
421 /* 3. Find the frame rate required: */
422 if (interlaced)
423 vfieldrate_rqd = vrefresh * 2;
424 else
425 vfieldrate_rqd = vrefresh;
426
427 /* 4. Find number of lines in Top margin: */
428 top_margin = 0;
429 if (margins)
430 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
431 1000;
432 /* 5. Find number of lines in bottom margin: */
433 bottom_margin = top_margin;
434
435 /* 6. If interlace is required, then set variable interlace: */
436 if (interlaced)
437 interlace = 1;
438 else
439 interlace = 0;
440
441 /* 7. Estimate the Horizontal frequency */
442 {
443 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
444 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
445 2 + interlace;
446 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
447 }
448
449 /* 8. Find the number of lines in V sync + back porch */
450 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
451 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
452 vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
453 /* 9. Find the number of lines in V back porch alone: */
454 vback_porch = vsync_plus_bp - V_SYNC_RQD;
455 /* 10. Find the total number of lines in Vertical field period: */
456 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
457 vsync_plus_bp + GTF_MIN_V_PORCH;
458 /* 11. Estimate the Vertical field frequency: */
459 vfieldrate_est = hfreq_est / vtotal_lines;
460 /* 12. Find the actual horizontal period: */
461 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
462
463 /* 13. Find the actual Vertical field frequency: */
464 vfield_rate = hfreq_est / vtotal_lines;
465 /* 14. Find the Vertical frame frequency: */
466 if (interlaced)
467 vframe_rate = vfield_rate / 2;
468 else
469 vframe_rate = vfield_rate;
470 /* 15. Find number of pixels in left margin: */
471 if (margins)
472 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
473 1000;
474 else
475 left_margin = 0;
476
477 /* 16.Find number of pixels in right margin: */
478 right_margin = left_margin;
479 /* 17.Find total number of active pixels in image and left and right */
480 total_active_pixels = hdisplay_rnd + left_margin + right_margin;
481 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */
482 ideal_duty_cycle = GTF_C_PRIME * 1000 -
483 (GTF_M_PRIME * 1000000 / hfreq_est);
484 /* 19.Find the number of pixels in the blanking time to the nearest
485 * double character cell: */
486 hblank = total_active_pixels * ideal_duty_cycle /
487 (100000 - ideal_duty_cycle);
488 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
489 hblank = hblank * 2 * GTF_CELL_GRAN;
490 /* 20.Find total number of pixels: */
491 total_pixels = total_active_pixels + hblank;
492 /* 21.Find pixel clock frequency: */
493 pixel_freq = total_pixels * hfreq_est / 1000;
494 /* Stage 1 computations are now complete; I should really pass
495 * the results to another function and do the Stage 2 computations,
496 * but I only need a few more values so I'll just append the
497 * computations here for now */
498 /* 17. Find the number of pixels in the horizontal sync period: */
499 hsync = H_SYNC_PERCENT * total_pixels / 100;
500 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
501 hsync = hsync * GTF_CELL_GRAN;
502 /* 18. Find the number of pixels in horizontal front porch period */
503 hfront_porch = hblank / 2 - hsync;
504 /* 36. Find the number of lines in the odd front porch period: */
505 vodd_front_porch_lines = GTF_MIN_V_PORCH ;
506
507 /* finally, pack the results in the mode struct */
508 drm_mode->hdisplay = hdisplay_rnd;
509 drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
510 drm_mode->hsync_end = drm_mode->hsync_start + hsync;
511 drm_mode->htotal = total_pixels;
512 drm_mode->vdisplay = vdisplay_rnd;
513 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
514 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
515 drm_mode->vtotal = vtotal_lines;
516
517 drm_mode->clock = pixel_freq;
518
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519 if (interlaced) {
520 drm_mode->vtotal *= 2;
521 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
522 }
523
171fdd89 524 drm_mode_set_name(drm_mode);
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525 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
526 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
527 else
528 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
171fdd89 529
26bbdada
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530 return drm_mode;
531}
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532EXPORT_SYMBOL(drm_gtf_mode_complex);
533
534/**
f5aabb97
DV
535 * drm_gtf_mode - create the modeline based on the GTF algorithm
536 * @dev: drm device
537 * @hdisplay: hdisplay size
538 * @vdisplay: vdisplay size
539 * @vrefresh: vrefresh rate.
540 * @interlaced: whether to compute an interlaced mode
541 * @margins: desired margin (borders) size
7a374350 542 *
7a374350
AJ
543 * return the modeline based on GTF algorithm
544 *
545 * This function is to create the modeline based on the GTF algorithm.
546 * Generalized Timing Formula is derived from:
547 * GTF Spreadsheet by Andy Morrish (1/5/97)
548 * available at http://www.vesa.org
549 *
550 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
551 * What I have done is to translate it by using integer calculation.
552 * I also refer to the function of fb_get_mode in the file of
553 * drivers/video/fbmon.c
554 *
555 * Standard GTF parameters:
f03d8ede
DCLP
556 * M = 600
557 * C = 40
558 * K = 128
559 * J = 20
f5aabb97
DV
560 *
561 * Returns:
562 * The modeline based on the GTF algorithm stored in a drm_display_mode object.
563 * The display mode object is allocated with drm_mode_create(). Returns NULL
564 * when no mode could be allocated.
7a374350
AJ
565 */
566struct drm_display_mode *
567drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
3ec0db81 568 bool interlaced, int margins)
7a374350 569{
3ec0db81
DV
570 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh,
571 interlaced, margins,
572 600, 40 * 2, 128, 20 * 2);
7a374350 573}
26bbdada 574EXPORT_SYMBOL(drm_gtf_mode);
7a374350 575
a38884f6 576#ifdef CONFIG_VIDEOMODE_HELPERS
f5aabb97
DV
577/**
578 * drm_display_mode_from_videomode - fill in @dmode using @vm,
579 * @vm: videomode structure to use as source
580 * @dmode: drm_display_mode structure to use as destination
581 *
582 * Fills out @dmode using the display mode specified in @vm.
583 */
ba0c2422
DV
584void drm_display_mode_from_videomode(const struct videomode *vm,
585 struct drm_display_mode *dmode)
ebc64e45
ST
586{
587 dmode->hdisplay = vm->hactive;
588 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch;
589 dmode->hsync_end = dmode->hsync_start + vm->hsync_len;
590 dmode->htotal = dmode->hsync_end + vm->hback_porch;
591
592 dmode->vdisplay = vm->vactive;
593 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch;
594 dmode->vsync_end = dmode->vsync_start + vm->vsync_len;
595 dmode->vtotal = dmode->vsync_end + vm->vback_porch;
596
597 dmode->clock = vm->pixelclock / 1000;
598
599 dmode->flags = 0;
06a33079 600 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH)
ebc64e45 601 dmode->flags |= DRM_MODE_FLAG_PHSYNC;
06a33079 602 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
ebc64e45 603 dmode->flags |= DRM_MODE_FLAG_NHSYNC;
06a33079 604 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH)
ebc64e45 605 dmode->flags |= DRM_MODE_FLAG_PVSYNC;
06a33079 606 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
ebc64e45 607 dmode->flags |= DRM_MODE_FLAG_NVSYNC;
06a33079 608 if (vm->flags & DISPLAY_FLAGS_INTERLACED)
ebc64e45 609 dmode->flags |= DRM_MODE_FLAG_INTERLACE;
06a33079 610 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN)
ebc64e45 611 dmode->flags |= DRM_MODE_FLAG_DBLSCAN;
328a4719
ST
612 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
613 dmode->flags |= DRM_MODE_FLAG_DBLCLK;
ebc64e45 614 drm_mode_set_name(dmode);
ebc64e45
ST
615}
616EXPORT_SYMBOL_GPL(drm_display_mode_from_videomode);
ebc64e45 617
d490f455
SL
618/**
619 * drm_display_mode_to_videomode - fill in @vm using @dmode,
620 * @dmode: drm_display_mode structure to use as source
621 * @vm: videomode structure to use as destination
622 *
623 * Fills out @vm using the display mode specified in @dmode.
624 */
625void drm_display_mode_to_videomode(const struct drm_display_mode *dmode,
626 struct videomode *vm)
627{
628 vm->hactive = dmode->hdisplay;
629 vm->hfront_porch = dmode->hsync_start - dmode->hdisplay;
630 vm->hsync_len = dmode->hsync_end - dmode->hsync_start;
631 vm->hback_porch = dmode->htotal - dmode->hsync_end;
632
633 vm->vactive = dmode->vdisplay;
634 vm->vfront_porch = dmode->vsync_start - dmode->vdisplay;
635 vm->vsync_len = dmode->vsync_end - dmode->vsync_start;
636 vm->vback_porch = dmode->vtotal - dmode->vsync_end;
637
638 vm->pixelclock = dmode->clock * 1000;
639
640 vm->flags = 0;
641 if (dmode->flags & DRM_MODE_FLAG_PHSYNC)
642 vm->flags |= DISPLAY_FLAGS_HSYNC_HIGH;
643 else if (dmode->flags & DRM_MODE_FLAG_NHSYNC)
644 vm->flags |= DISPLAY_FLAGS_HSYNC_LOW;
645 if (dmode->flags & DRM_MODE_FLAG_PVSYNC)
646 vm->flags |= DISPLAY_FLAGS_VSYNC_HIGH;
647 else if (dmode->flags & DRM_MODE_FLAG_NVSYNC)
648 vm->flags |= DISPLAY_FLAGS_VSYNC_LOW;
649 if (dmode->flags & DRM_MODE_FLAG_INTERLACE)
650 vm->flags |= DISPLAY_FLAGS_INTERLACED;
651 if (dmode->flags & DRM_MODE_FLAG_DBLSCAN)
652 vm->flags |= DISPLAY_FLAGS_DOUBLESCAN;
653 if (dmode->flags & DRM_MODE_FLAG_DBLCLK)
654 vm->flags |= DISPLAY_FLAGS_DOUBLECLK;
655}
656EXPORT_SYMBOL_GPL(drm_display_mode_to_videomode);
657
a38884f6 658#ifdef CONFIG_OF
edb37a95
ST
659/**
660 * of_get_drm_display_mode - get a drm_display_mode from devicetree
661 * @np: device_node with the timing specification
662 * @dmode: will be set to the return value
663 * @index: index into the list of display timings in devicetree
664 *
665 * This function is expensive and should only be used, if only one mode is to be
666 * read from DT. To get multiple modes start with of_get_display_timings and
667 * work with that instead.
f5aabb97
DV
668 *
669 * Returns:
670 * 0 on success, a negative errno code when no of videomode node was found.
edb37a95
ST
671 */
672int of_get_drm_display_mode(struct device_node *np,
673 struct drm_display_mode *dmode, int index)
674{
675 struct videomode vm;
676 int ret;
677
678 ret = of_get_videomode(np, &vm, index);
679 if (ret)
680 return ret;
681
682 drm_display_mode_from_videomode(&vm, dmode);
683
684 pr_debug("%s: got %dx%d display mode from %s\n",
685 of_node_full_name(np), vm.hactive, vm.vactive, np->name);
686 drm_mode_debug_printmodeline(dmode);
687
688 return 0;
689}
690EXPORT_SYMBOL_GPL(of_get_drm_display_mode);
a38884f6
TV
691#endif /* CONFIG_OF */
692#endif /* CONFIG_VIDEOMODE_HELPERS */
edb37a95 693
f453ba04
DA
694/**
695 * drm_mode_set_name - set the name on a mode
696 * @mode: name will be set in this mode
697 *
f5aabb97
DV
698 * Set the name of @mode to a standard format which is <hdisplay>x<vdisplay>
699 * with an optional 'i' suffix for interlaced modes.
f453ba04
DA
700 */
701void drm_mode_set_name(struct drm_display_mode *mode)
702{
171fdd89
AJ
703 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
704
705 snprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
706 mode->hdisplay, mode->vdisplay,
707 interlaced ? "i" : "");
f453ba04
DA
708}
709EXPORT_SYMBOL(drm_mode_set_name);
710
30ecad77
DV
711/**
712 * drm_mode_hsync - get the hsync of a mode
7ac96a9c
AJ
713 * @mode: mode
714 *
f5aabb97
DV
715 * Returns:
716 * @modes's hsync rate in kHz, rounded to the nearest integer. Calculates the
717 * value first if it is not yet set.
7ac96a9c 718 */
b1f559ec 719int drm_mode_hsync(const struct drm_display_mode *mode)
7ac96a9c
AJ
720{
721 unsigned int calc_val;
722
723 if (mode->hsync)
724 return mode->hsync;
725
726 if (mode->htotal < 0)
727 return 0;
728
729 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
730 calc_val += 500; /* round to 1000Hz */
731 calc_val /= 1000; /* truncate to kHz */
732
733 return calc_val;
734}
735EXPORT_SYMBOL(drm_mode_hsync);
736
f453ba04
DA
737/**
738 * drm_mode_vrefresh - get the vrefresh of a mode
739 * @mode: mode
740 *
f5aabb97
DV
741 * Returns:
742 * @modes's vrefresh rate in Hz, rounded to the nearest integer. Calculates the
743 * value first if it is not yet set.
f453ba04 744 */
b1f559ec 745int drm_mode_vrefresh(const struct drm_display_mode *mode)
f453ba04
DA
746{
747 int refresh = 0;
748 unsigned int calc_val;
749
750 if (mode->vrefresh > 0)
751 refresh = mode->vrefresh;
752 else if (mode->htotal > 0 && mode->vtotal > 0) {
559ee21d
ZY
753 int vtotal;
754 vtotal = mode->vtotal;
f453ba04
DA
755 /* work out vrefresh the value will be x1000 */
756 calc_val = (mode->clock * 1000);
f453ba04 757 calc_val /= mode->htotal;
559ee21d 758 refresh = (calc_val + vtotal / 2) / vtotal;
f453ba04 759
f453ba04
DA
760 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
761 refresh *= 2;
762 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
763 refresh /= 2;
764 if (mode->vscan > 1)
765 refresh /= mode->vscan;
766 }
767 return refresh;
768}
769EXPORT_SYMBOL(drm_mode_vrefresh);
770
771/**
f5aabb97 772 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters
f453ba04 773 * @p: mode
448cce25 774 * @adjust_flags: a combination of adjustment flags
f453ba04 775 *
f5aabb97 776 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary.
448cce25
DL
777 *
778 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of
779 * interlaced modes.
780 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for
781 * buffers containing two eyes (only adjust the timings when needed, eg. for
782 * "frame packing" or "side by side full").
ecb7e16b
GP
783 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not*
784 * be performed for doublescan and vscan > 1 modes respectively.
f453ba04
DA
785 */
786void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
787{
788 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
789 return;
790
bde2dcf7 791 p->crtc_clock = p->clock;
f453ba04
DA
792 p->crtc_hdisplay = p->hdisplay;
793 p->crtc_hsync_start = p->hsync_start;
794 p->crtc_hsync_end = p->hsync_end;
795 p->crtc_htotal = p->htotal;
796 p->crtc_hskew = p->hskew;
797 p->crtc_vdisplay = p->vdisplay;
798 p->crtc_vsync_start = p->vsync_start;
799 p->crtc_vsync_end = p->vsync_end;
800 p->crtc_vtotal = p->vtotal;
801
802 if (p->flags & DRM_MODE_FLAG_INTERLACE) {
803 if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
804 p->crtc_vdisplay /= 2;
805 p->crtc_vsync_start /= 2;
806 p->crtc_vsync_end /= 2;
807 p->crtc_vtotal /= 2;
808 }
f453ba04
DA
809 }
810
ecb7e16b
GP
811 if (!(adjust_flags & CRTC_NO_DBLSCAN)) {
812 if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
813 p->crtc_vdisplay *= 2;
814 p->crtc_vsync_start *= 2;
815 p->crtc_vsync_end *= 2;
816 p->crtc_vtotal *= 2;
817 }
f453ba04
DA
818 }
819
ecb7e16b
GP
820 if (!(adjust_flags & CRTC_NO_VSCAN)) {
821 if (p->vscan > 1) {
822 p->crtc_vdisplay *= p->vscan;
823 p->crtc_vsync_start *= p->vscan;
824 p->crtc_vsync_end *= p->vscan;
825 p->crtc_vtotal *= p->vscan;
826 }
f453ba04
DA
827 }
828
448cce25
DL
829 if (adjust_flags & CRTC_STEREO_DOUBLE) {
830 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK;
831
832 switch (layout) {
833 case DRM_MODE_FLAG_3D_FRAME_PACKING:
834 p->crtc_clock *= 2;
835 p->crtc_vdisplay += p->crtc_vtotal;
836 p->crtc_vsync_start += p->crtc_vtotal;
837 p->crtc_vsync_end += p->crtc_vtotal;
838 p->crtc_vtotal += p->crtc_vtotal;
839 break;
840 }
841 }
842
f453ba04
DA
843 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
844 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
845 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
846 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
f453ba04
DA
847}
848EXPORT_SYMBOL(drm_mode_set_crtcinfo);
849
c3c50e8b
VS
850/**
851 * drm_mode_copy - copy the mode
852 * @dst: mode to overwrite
853 * @src: mode to copy
854 *
72e45e92
VS
855 * Copy an existing mode into another mode, preserving the object id and
856 * list head of the destination mode.
c3c50e8b
VS
857 */
858void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
859{
860 int id = dst->base.id;
72e45e92 861 struct list_head head = dst->head;
c3c50e8b
VS
862
863 *dst = *src;
864 dst->base.id = id;
72e45e92 865 dst->head = head;
c3c50e8b
VS
866}
867EXPORT_SYMBOL(drm_mode_copy);
868
f453ba04
DA
869/**
870 * drm_mode_duplicate - allocate and duplicate an existing mode
3ec0db81
DV
871 * @dev: drm_device to allocate the duplicated mode for
872 * @mode: mode to duplicate
f453ba04 873 *
f453ba04
DA
874 * Just allocate a new mode, copy the existing mode into it, and return
875 * a pointer to it. Used to create new instances of established modes.
f5aabb97
DV
876 *
877 * Returns:
878 * Pointer to duplicated mode on success, NULL on error.
f453ba04
DA
879 */
880struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
b1f559ec 881 const struct drm_display_mode *mode)
f453ba04
DA
882{
883 struct drm_display_mode *nmode;
f453ba04
DA
884
885 nmode = drm_mode_create(dev);
886 if (!nmode)
887 return NULL;
888
c3c50e8b
VS
889 drm_mode_copy(nmode, mode);
890
f453ba04
DA
891 return nmode;
892}
893EXPORT_SYMBOL(drm_mode_duplicate);
894
895/**
896 * drm_mode_equal - test modes for equality
897 * @mode1: first mode
898 * @mode2: second mode
899 *
f453ba04
DA
900 * Check to see if @mode1 and @mode2 are equivalent.
901 *
f5aabb97 902 * Returns:
f453ba04
DA
903 * True if the modes are equal, false otherwise.
904 */
0b3904ab 905bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
f453ba04 906{
54270952
DS
907 if (!mode1 && !mode2)
908 return true;
909
910 if (!mode1 || !mode2)
911 return false;
912
f453ba04
DA
913 /* do clock check convert to PICOS so fb modes get matched
914 * the same */
915 if (mode1->clock && mode2->clock) {
916 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
917 return false;
918 } else if (mode1->clock != mode2->clock)
919 return false;
920
4c6bcf44
VS
921 return drm_mode_equal_no_clocks(mode1, mode2);
922}
923EXPORT_SYMBOL(drm_mode_equal);
924
925/**
926 * drm_mode_equal_no_clocks - test modes for equality
927 * @mode1: first mode
928 * @mode2: second mode
929 *
930 * Check to see if @mode1 and @mode2 are equivalent, but
931 * don't check the pixel clocks.
932 *
933 * Returns:
934 * True if the modes are equal, false otherwise.
935 */
936bool drm_mode_equal_no_clocks(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
937{
f2ecf2e3
DL
938 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) !=
939 (mode2->flags & DRM_MODE_FLAG_3D_MASK))
940 return false;
941
942 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2);
8cc3f23c 943}
4c6bcf44 944EXPORT_SYMBOL(drm_mode_equal_no_clocks);
8cc3f23c
VS
945
946/**
f2ecf2e3 947 * drm_mode_equal_no_clocks_no_stereo - test modes for equality
8cc3f23c
VS
948 * @mode1: first mode
949 * @mode2: second mode
950 *
8cc3f23c 951 * Check to see if @mode1 and @mode2 are equivalent, but
f2ecf2e3 952 * don't check the pixel clocks nor the stereo layout.
8cc3f23c 953 *
f5aabb97 954 * Returns:
8cc3f23c
VS
955 * True if the modes are equal, false otherwise.
956 */
f2ecf2e3
DL
957bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1,
958 const struct drm_display_mode *mode2)
8cc3f23c 959{
f453ba04
DA
960 if (mode1->hdisplay == mode2->hdisplay &&
961 mode1->hsync_start == mode2->hsync_start &&
962 mode1->hsync_end == mode2->hsync_end &&
963 mode1->htotal == mode2->htotal &&
964 mode1->hskew == mode2->hskew &&
965 mode1->vdisplay == mode2->vdisplay &&
966 mode1->vsync_start == mode2->vsync_start &&
967 mode1->vsync_end == mode2->vsync_end &&
968 mode1->vtotal == mode2->vtotal &&
969 mode1->vscan == mode2->vscan &&
f2ecf2e3
DL
970 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) ==
971 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK))
f453ba04
DA
972 return true;
973
974 return false;
975}
f2ecf2e3 976EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo);
f453ba04 977
abc0b144
VS
978/**
979 * drm_mode_validate_basic - make sure the mode is somewhat sane
980 * @mode: mode to check
981 *
982 * Check that the mode timings are at least somewhat reasonable.
983 * Any hardware specific limits are left up for each driver to check.
984 *
985 * Returns:
986 * The mode status
987 */
988enum drm_mode_status
989drm_mode_validate_basic(const struct drm_display_mode *mode)
990{
991 if (mode->clock == 0)
992 return MODE_CLOCK_LOW;
993
994 if (mode->hdisplay == 0 ||
995 mode->hsync_start < mode->hdisplay ||
996 mode->hsync_end < mode->hsync_start ||
997 mode->htotal < mode->hsync_end)
998 return MODE_H_ILLEGAL;
999
1000 if (mode->vdisplay == 0 ||
1001 mode->vsync_start < mode->vdisplay ||
1002 mode->vsync_end < mode->vsync_start ||
1003 mode->vtotal < mode->vsync_end)
1004 return MODE_V_ILLEGAL;
1005
1006 return MODE_OK;
1007}
1008EXPORT_SYMBOL(drm_mode_validate_basic);
1009
f453ba04
DA
1010/**
1011 * drm_mode_validate_size - make sure modes adhere to size constraints
05acaec3 1012 * @mode: mode to check
f453ba04
DA
1013 * @maxX: maximum width
1014 * @maxY: maximum height
f453ba04 1015 *
f5aabb97
DV
1016 * This function is a helper which can be used to validate modes against size
1017 * limitations of the DRM device/connector. If a mode is too big its status
32197aab 1018 * member is updated with the appropriate validation failure code. The list
f5aabb97 1019 * itself is not changed.
05acaec3
VS
1020 *
1021 * Returns:
1022 * The mode status
f453ba04 1023 */
05acaec3
VS
1024enum drm_mode_status
1025drm_mode_validate_size(const struct drm_display_mode *mode,
1026 int maxX, int maxY)
f453ba04 1027{
05acaec3
VS
1028 if (maxX > 0 && mode->hdisplay > maxX)
1029 return MODE_VIRTUAL_X;
f453ba04 1030
05acaec3
VS
1031 if (maxY > 0 && mode->vdisplay > maxY)
1032 return MODE_VIRTUAL_Y;
f453ba04 1033
05acaec3 1034 return MODE_OK;
f453ba04
DA
1035}
1036EXPORT_SYMBOL(drm_mode_validate_size);
1037
e4bf44b3
VS
1038#define MODE_STATUS(status) [MODE_ ## status + 3] = #status
1039
1040static const char * const drm_mode_status_names[] = {
1041 MODE_STATUS(OK),
1042 MODE_STATUS(HSYNC),
1043 MODE_STATUS(VSYNC),
1044 MODE_STATUS(H_ILLEGAL),
1045 MODE_STATUS(V_ILLEGAL),
1046 MODE_STATUS(BAD_WIDTH),
1047 MODE_STATUS(NOMODE),
1048 MODE_STATUS(NO_INTERLACE),
1049 MODE_STATUS(NO_DBLESCAN),
1050 MODE_STATUS(NO_VSCAN),
1051 MODE_STATUS(MEM),
1052 MODE_STATUS(VIRTUAL_X),
1053 MODE_STATUS(VIRTUAL_Y),
1054 MODE_STATUS(MEM_VIRT),
1055 MODE_STATUS(NOCLOCK),
1056 MODE_STATUS(CLOCK_HIGH),
1057 MODE_STATUS(CLOCK_LOW),
1058 MODE_STATUS(CLOCK_RANGE),
1059 MODE_STATUS(BAD_HVALUE),
1060 MODE_STATUS(BAD_VVALUE),
1061 MODE_STATUS(BAD_VSCAN),
1062 MODE_STATUS(HSYNC_NARROW),
1063 MODE_STATUS(HSYNC_WIDE),
1064 MODE_STATUS(HBLANK_NARROW),
1065 MODE_STATUS(HBLANK_WIDE),
1066 MODE_STATUS(VSYNC_NARROW),
1067 MODE_STATUS(VSYNC_WIDE),
1068 MODE_STATUS(VBLANK_NARROW),
1069 MODE_STATUS(VBLANK_WIDE),
1070 MODE_STATUS(PANEL),
1071 MODE_STATUS(INTERLACE_WIDTH),
1072 MODE_STATUS(ONE_WIDTH),
1073 MODE_STATUS(ONE_HEIGHT),
1074 MODE_STATUS(ONE_SIZE),
1075 MODE_STATUS(NO_REDUCED),
1076 MODE_STATUS(NO_STEREO),
5ba89406 1077 MODE_STATUS(STALE),
e4bf44b3
VS
1078 MODE_STATUS(BAD),
1079 MODE_STATUS(ERROR),
1080};
1081
1082#undef MODE_STATUS
1083
1084static const char *drm_get_mode_status_name(enum drm_mode_status status)
1085{
1086 int index = status + 3;
1087
1088 if (WARN_ON(index < 0 || index >= ARRAY_SIZE(drm_mode_status_names)))
1089 return "";
1090
1091 return drm_mode_status_names[index];
1092}
1093
f453ba04
DA
1094/**
1095 * drm_mode_prune_invalid - remove invalid modes from mode list
1096 * @dev: DRM device
1097 * @mode_list: list of modes to check
1098 * @verbose: be verbose about it
1099 *
f5aabb97
DV
1100 * This helper function can be used to prune a display mode list after
1101 * validation has been completed. All modes who's status is not MODE_OK will be
1102 * removed from the list, and if @verbose the status code and mode name is also
1103 * printed to dmesg.
f453ba04
DA
1104 */
1105void drm_mode_prune_invalid(struct drm_device *dev,
1106 struct list_head *mode_list, bool verbose)
1107{
1108 struct drm_display_mode *mode, *t;
1109
1110 list_for_each_entry_safe(mode, t, mode_list, head) {
1111 if (mode->status != MODE_OK) {
1112 list_del(&mode->head);
1113 if (verbose) {
1114 drm_mode_debug_printmodeline(mode);
e4bf44b3
VS
1115 DRM_DEBUG_KMS("Not using %s mode: %s\n",
1116 mode->name,
1117 drm_get_mode_status_name(mode->status));
f453ba04
DA
1118 }
1119 drm_mode_destroy(dev, mode);
1120 }
1121 }
1122}
1123EXPORT_SYMBOL(drm_mode_prune_invalid);
1124
1125/**
1126 * drm_mode_compare - compare modes for favorability
2c761270 1127 * @priv: unused
f453ba04
DA
1128 * @lh_a: list_head for first mode
1129 * @lh_b: list_head for second mode
1130 *
f453ba04
DA
1131 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
1132 * which is better.
1133 *
f5aabb97 1134 * Returns:
f453ba04
DA
1135 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
1136 * positive if @lh_b is better than @lh_a.
1137 */
2c761270 1138static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
f453ba04
DA
1139{
1140 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
1141 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
1142 int diff;
1143
1144 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
1145 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
1146 if (diff)
1147 return diff;
1148 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
1149 if (diff)
1150 return diff;
9bc3cd56
VS
1151
1152 diff = b->vrefresh - a->vrefresh;
1153 if (diff)
1154 return diff;
1155
f453ba04
DA
1156 diff = b->clock - a->clock;
1157 return diff;
1158}
1159
f453ba04
DA
1160/**
1161 * drm_mode_sort - sort mode list
f5aabb97 1162 * @mode_list: list of drm_display_mode structures to sort
f453ba04 1163 *
f5aabb97 1164 * Sort @mode_list by favorability, moving good modes to the head of the list.
f453ba04
DA
1165 */
1166void drm_mode_sort(struct list_head *mode_list)
1167{
2c761270 1168 list_sort(NULL, mode_list, drm_mode_compare);
f453ba04
DA
1169}
1170EXPORT_SYMBOL(drm_mode_sort);
1171
1172/**
1173 * drm_mode_connector_list_update - update the mode list for the connector
1174 * @connector: the connector to update
1175 *
f453ba04
DA
1176 * This moves the modes from the @connector probed_modes list
1177 * to the actual mode list. It compares the probed mode against the current
f5aabb97
DV
1178 * list and only adds different/new modes.
1179 *
1180 * This is just a helper functions doesn't validate any modes itself and also
1181 * doesn't prune any invalid modes. Callers need to do that themselves.
f453ba04 1182 */
6af3e656 1183void drm_mode_connector_list_update(struct drm_connector *connector)
f453ba04 1184{
f453ba04 1185 struct drm_display_mode *pmode, *pt;
f453ba04 1186
63951385
DV
1187 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex));
1188
2f8c19e7
VS
1189 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, head) {
1190 struct drm_display_mode *mode;
1191 bool found_it = false;
1192
f453ba04
DA
1193 /* go through current modes checking for the new probed mode */
1194 list_for_each_entry(mode, &connector->modes, head) {
2f8c19e7
VS
1195 if (!drm_mode_equal(pmode, mode))
1196 continue;
1197
1198 found_it = true;
fc245f88
VS
1199
1200 /*
1201 * If the old matching mode is stale (ie. left over
1202 * from a previous probe) just replace it outright.
1203 * Otherwise just merge the type bits between all
1204 * equal probed modes.
1205 *
1206 * If two probed modes are considered equal, pick the
1207 * actual timings from the one that's marked as
1208 * preferred (in case the match isn't 100%). If
1209 * multiple or zero preferred modes are present, favor
1210 * the mode added to the probed_modes list first.
1211 */
1212 if (mode->status == MODE_STALE) {
1213 drm_mode_copy(mode, pmode);
1214 } else if ((mode->type & DRM_MODE_TYPE_PREFERRED) == 0 &&
1215 (pmode->type & DRM_MODE_TYPE_PREFERRED) != 0) {
6af3e656 1216 pmode->type |= mode->type;
fc245f88
VS
1217 drm_mode_copy(mode, pmode);
1218 } else {
6af3e656 1219 mode->type |= pmode->type;
fc245f88
VS
1220 }
1221
2f8c19e7
VS
1222 list_del(&pmode->head);
1223 drm_mode_destroy(connector->dev, pmode);
1224 break;
f453ba04
DA
1225 }
1226
1227 if (!found_it) {
1228 list_move_tail(&pmode->head, &connector->modes);
1229 }
1230 }
1231}
1232EXPORT_SYMBOL(drm_mode_connector_list_update);
1794d257
CW
1233
1234/**
f5aabb97
DV
1235 * drm_mode_parse_command_line_for_connector - parse command line modeline for connector
1236 * @mode_option: optional per connector mode option
1237 * @connector: connector to parse modeline for
1238 * @mode: preallocated drm_cmdline_mode structure to fill out
1239 *
1240 * This parses @mode_option command line modeline for modes and options to
1241 * configure the connector. If @mode_option is NULL the default command line
1242 * modeline in fb_mode_option will be parsed instead.
1794d257 1243 *
f5aabb97
DV
1244 * This uses the same parameters as the fb modedb.c, except for an extra
1245 * force-enable, force-enable-digital and force-disable bit at the end:
1794d257 1246 *
f03d8ede 1247 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
1794d257 1248 *
f5aabb97 1249 * The intermediate drm_cmdline_mode structure is required to store additional
2a97acd6 1250 * options from the command line modline like the force-enable/disable flag.
f5aabb97
DV
1251 *
1252 * Returns:
1253 * True if a valid modeline has been parsed, false otherwise.
1794d257
CW
1254 */
1255bool drm_mode_parse_command_line_for_connector(const char *mode_option,
1256 struct drm_connector *connector,
1257 struct drm_cmdline_mode *mode)
1258{
1259 const char *name;
1260 unsigned int namelen;
04fee895 1261 bool res_specified = false, bpp_specified = false, refresh_specified = false;
1794d257 1262 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
04fee895
REB
1263 bool yres_specified = false, cvt = false, rb = false;
1264 bool interlace = false, margins = false, was_digit = false;
d6e6e14f 1265 int i;
1794d257
CW
1266 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
1267
cb3c438e 1268#ifdef CONFIG_FB
1794d257
CW
1269 if (!mode_option)
1270 mode_option = fb_mode_option;
cb3c438e 1271#endif
1794d257
CW
1272
1273 if (!mode_option) {
1274 mode->specified = false;
1275 return false;
1276 }
1277
1278 name = mode_option;
1279 namelen = strlen(name);
1280 for (i = namelen-1; i >= 0; i--) {
1281 switch (name[i]) {
1282 case '@':
1794d257 1283 if (!refresh_specified && !bpp_specified &&
04fee895 1284 !yres_specified && !cvt && !rb && was_digit) {
d6e6e14f 1285 refresh = simple_strtol(&name[i+1], NULL, 10);
04fee895
REB
1286 refresh_specified = true;
1287 was_digit = false;
1794d257
CW
1288 } else
1289 goto done;
1290 break;
1291 case '-':
04fee895
REB
1292 if (!bpp_specified && !yres_specified && !cvt &&
1293 !rb && was_digit) {
d6e6e14f 1294 bpp = simple_strtol(&name[i+1], NULL, 10);
04fee895
REB
1295 bpp_specified = true;
1296 was_digit = false;
1794d257
CW
1297 } else
1298 goto done;
1299 break;
1300 case 'x':
04fee895 1301 if (!yres_specified && was_digit) {
d6e6e14f 1302 yres = simple_strtol(&name[i+1], NULL, 10);
04fee895
REB
1303 yres_specified = true;
1304 was_digit = false;
1794d257
CW
1305 } else
1306 goto done;
97fbfbf4 1307 break;
1794d257 1308 case '0' ... '9':
04fee895 1309 was_digit = true;
1794d257
CW
1310 break;
1311 case 'M':
04fee895
REB
1312 if (yres_specified || cvt || was_digit)
1313 goto done;
1314 cvt = true;
1794d257
CW
1315 break;
1316 case 'R':
04fee895
REB
1317 if (yres_specified || cvt || rb || was_digit)
1318 goto done;
1319 rb = true;
1794d257
CW
1320 break;
1321 case 'm':
04fee895
REB
1322 if (cvt || yres_specified || was_digit)
1323 goto done;
1324 margins = true;
1794d257
CW
1325 break;
1326 case 'i':
04fee895
REB
1327 if (cvt || yres_specified || was_digit)
1328 goto done;
1329 interlace = true;
1794d257
CW
1330 break;
1331 case 'e':
04fee895
REB
1332 if (yres_specified || bpp_specified || refresh_specified ||
1333 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1334 goto done;
1335
1794d257
CW
1336 force = DRM_FORCE_ON;
1337 break;
1338 case 'D':
04fee895
REB
1339 if (yres_specified || bpp_specified || refresh_specified ||
1340 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1341 goto done;
1342
1794d257
CW
1343 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1344 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1345 force = DRM_FORCE_ON;
1346 else
1347 force = DRM_FORCE_ON_DIGITAL;
1348 break;
1349 case 'd':
04fee895
REB
1350 if (yres_specified || bpp_specified || refresh_specified ||
1351 was_digit || (force != DRM_FORCE_UNSPECIFIED))
1352 goto done;
1353
1794d257
CW
1354 force = DRM_FORCE_OFF;
1355 break;
1356 default:
1357 goto done;
1358 }
1359 }
04fee895 1360
1794d257 1361 if (i < 0 && yres_specified) {
04fee895
REB
1362 char *ch;
1363 xres = simple_strtol(name, &ch, 10);
1364 if ((ch != NULL) && (*ch == 'x'))
1365 res_specified = true;
1366 else
1367 i = ch - name;
1368 } else if (!yres_specified && was_digit) {
1369 /* catch mode that begins with digits but has no 'x' */
1370 i = 0;
1794d257
CW
1371 }
1372done:
04fee895 1373 if (i >= 0) {
67fe85dd 1374 pr_warn("[drm] parse error at position %i in video mode '%s'\n",
04fee895
REB
1375 i, name);
1376 mode->specified = false;
1377 return false;
1378 }
1379
1794d257
CW
1380 if (res_specified) {
1381 mode->specified = true;
1382 mode->xres = xres;
1383 mode->yres = yres;
1384 }
1385
1386 if (refresh_specified) {
1387 mode->refresh_specified = true;
1388 mode->refresh = refresh;
1389 }
1390
1391 if (bpp_specified) {
1392 mode->bpp_specified = true;
1393 mode->bpp = bpp;
1394 }
04fee895
REB
1395 mode->rb = rb;
1396 mode->cvt = cvt;
1397 mode->interlace = interlace;
1398 mode->margins = margins;
1794d257
CW
1399 mode->force = force;
1400
1401 return true;
1402}
1403EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1404
f5aabb97
DV
1405/**
1406 * drm_mode_create_from_cmdline_mode - convert a command line modeline into a DRM display mode
1407 * @dev: DRM device to create the new mode for
1408 * @cmd: input command line modeline
1409 *
1410 * Returns:
1411 * Pointer to converted mode on success, NULL on error.
1412 */
1794d257
CW
1413struct drm_display_mode *
1414drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1415 struct drm_cmdline_mode *cmd)
1416{
1417 struct drm_display_mode *mode;
1418
1419 if (cmd->cvt)
1420 mode = drm_cvt_mode(dev,
1421 cmd->xres, cmd->yres,
1422 cmd->refresh_specified ? cmd->refresh : 60,
1423 cmd->rb, cmd->interlace,
1424 cmd->margins);
1425 else
1426 mode = drm_gtf_mode(dev,
1427 cmd->xres, cmd->yres,
1428 cmd->refresh_specified ? cmd->refresh : 60,
1429 cmd->interlace,
1430 cmd->margins);
1431 if (!mode)
1432 return NULL;
1433
eaf99c74 1434 mode->type |= DRM_MODE_TYPE_USERDEF;
1794d257
CW
1435 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1436 return mode;
1437}
1438EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
934a8a89
DS
1439
1440/**
1441 * drm_crtc_convert_to_umode - convert a drm_display_mode into a modeinfo
1442 * @out: drm_mode_modeinfo struct to return to the user
1443 * @in: drm_display_mode to use
1444 *
1445 * Convert a drm_display_mode into a drm_mode_modeinfo structure to return to
1446 * the user.
1447 */
1448void drm_mode_convert_to_umode(struct drm_mode_modeinfo *out,
1449 const struct drm_display_mode *in)
1450{
1451 WARN(in->hdisplay > USHRT_MAX || in->hsync_start > USHRT_MAX ||
1452 in->hsync_end > USHRT_MAX || in->htotal > USHRT_MAX ||
1453 in->hskew > USHRT_MAX || in->vdisplay > USHRT_MAX ||
1454 in->vsync_start > USHRT_MAX || in->vsync_end > USHRT_MAX ||
1455 in->vtotal > USHRT_MAX || in->vscan > USHRT_MAX,
1456 "timing values too large for mode info\n");
1457
1458 out->clock = in->clock;
1459 out->hdisplay = in->hdisplay;
1460 out->hsync_start = in->hsync_start;
1461 out->hsync_end = in->hsync_end;
1462 out->htotal = in->htotal;
1463 out->hskew = in->hskew;
1464 out->vdisplay = in->vdisplay;
1465 out->vsync_start = in->vsync_start;
1466 out->vsync_end = in->vsync_end;
1467 out->vtotal = in->vtotal;
1468 out->vscan = in->vscan;
1469 out->vrefresh = in->vrefresh;
1470 out->flags = in->flags;
1471 out->type = in->type;
1472 strncpy(out->name, in->name, DRM_DISPLAY_MODE_LEN);
1473 out->name[DRM_DISPLAY_MODE_LEN-1] = 0;
1474}
1475
1476/**
1477 * drm_crtc_convert_umode - convert a modeinfo into a drm_display_mode
1478 * @out: drm_display_mode to return to the user
1479 * @in: drm_mode_modeinfo to use
1480 *
1481 * Convert a drm_mode_modeinfo into a drm_display_mode structure to return to
1482 * the caller.
1483 *
1484 * Returns:
1485 * Zero on success, negative errno on failure.
1486 */
1487int drm_mode_convert_umode(struct drm_display_mode *out,
1488 const struct drm_mode_modeinfo *in)
1489{
1490 int ret = -EINVAL;
1491
1492 if (in->clock > INT_MAX || in->vrefresh > INT_MAX) {
1493 ret = -ERANGE;
1494 goto out;
1495 }
1496
1497 if ((in->flags & DRM_MODE_FLAG_3D_MASK) > DRM_MODE_FLAG_3D_MAX)
1498 goto out;
1499
1500 out->clock = in->clock;
1501 out->hdisplay = in->hdisplay;
1502 out->hsync_start = in->hsync_start;
1503 out->hsync_end = in->hsync_end;
1504 out->htotal = in->htotal;
1505 out->hskew = in->hskew;
1506 out->vdisplay = in->vdisplay;
1507 out->vsync_start = in->vsync_start;
1508 out->vsync_end = in->vsync_end;
1509 out->vtotal = in->vtotal;
1510 out->vscan = in->vscan;
1511 out->vrefresh = in->vrefresh;
1512 out->flags = in->flags;
1513 out->type = in->type;
1514 strncpy(out->name, in->name, DRM_DISPLAY_MODE_LEN);
1515 out->name[DRM_DISPLAY_MODE_LEN-1] = 0;
1516
1517 out->status = drm_mode_validate_basic(out);
1518 if (out->status != MODE_OK)
1519 goto out;
1520
1521 ret = 0;
1522
1523out:
1524 return ret;
f03d8ede 1525}