[linux-2.6-block.git] / drivers / gpio / gpio-mb86s7x.c

/*
 *  linux/drivers/gpio/gpio-mb86s7x.c
 *
 *  Copyright (C) 2015 Fujitsu Semiconductor Limited
 *  Copyright (C) 2015 Linaro Ltd.
 *
 *  This program is free software: you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation, version 2 of the License.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 */

#include <linux/io.h>
#include <linux/init.h>
#include <linux/clk.h>
#include <linux/module.h>
#include <linux/err.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/of_device.h>
#include <linux/gpio/driver.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/slab.h>

/*
 * Only first 8bits of a register correspond to each pin,
 * so there are 4 registers for 32 pins.
 */
#define PDR(x)	(0x0 + x / 8 * 4)
#define DDR(x)	(0x10 + x / 8 * 4)
#define PFR(x)	(0x20 + x / 8 * 4)

#define OFFSET(x)	BIT((x) % 8)

struct mb86s70_gpio_chip {
	struct gpio_chip gc;
	void __iomem *base;
	struct clk *clk;
	spinlock_t lock;
};

static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio)
{
	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
	unsigned long flags;
	u32 val;

	spin_lock_irqsave(&gchip->lock, flags);

	val = readl(gchip->base + PFR(gpio));
	if (!(val & OFFSET(gpio))) {
		spin_unlock_irqrestore(&gchip->lock, flags);
		return -EINVAL;
	}

	val &= ~OFFSET(gpio);
	writel(val, gchip->base + PFR(gpio));

	spin_unlock_irqrestore(&gchip->lock, flags);

	return 0;
}

static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio)
{
	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
	unsigned long flags;
	u32 val;

	spin_lock_irqsave(&gchip->lock, flags);

	val = readl(gchip->base + PFR(gpio));
	val |= OFFSET(gpio);
	writel(val, gchip->base + PFR(gpio));

	spin_unlock_irqrestore(&gchip->lock, flags);
}

static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
{
	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
	unsigned long flags;
	unsigned char val;

	spin_lock_irqsave(&gchip->lock, flags);

	val = readl(gchip->base + DDR(gpio));
	val &= ~OFFSET(gpio);
	writel(val, gchip->base + DDR(gpio));

	spin_unlock_irqrestore(&gchip->lock, flags);

	return 0;
}

static int mb86s70_gpio_direction_output(struct gpio_chip *gc,
					 unsigned gpio, int value)
{
	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
	unsigned long flags;
	unsigned char val;

	spin_lock_irqsave(&gchip->lock, flags);

	val = readl(gchip->base + PDR(gpio));
	if (value)
		val |= OFFSET(gpio);
	else
		val &= ~OFFSET(gpio);
	writel(val, gchip->base + PDR(gpio));

	val = readl(gchip->base + DDR(gpio));
	val |= OFFSET(gpio);
	writel(val, gchip->base + DDR(gpio));

	spin_unlock_irqrestore(&gchip->lock, flags);

	return 0;
}

static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio)
{
	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);

	return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio));
}

static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value)
{
	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
	unsigned long flags;
	unsigned char val;

	spin_lock_irqsave(&gchip->lock, flags);

	val = readl(gchip->base + PDR(gpio));
	if (value)
		val |= OFFSET(gpio);
	else
		val &= ~OFFSET(gpio);
	writel(val, gchip->base + PDR(gpio));

	spin_unlock_irqrestore(&gchip->lock, flags);
}

static int mb86s70_gpio_probe(struct platform_device *pdev)
{
	struct mb86s70_gpio_chip *gchip;
	struct resource *res;
	int ret;

	gchip = devm_kzalloc(&pdev->dev, sizeof(*gchip), GFP_KERNEL);
	if (gchip == NULL)
		return -ENOMEM;

	platform_set_drvdata(pdev, gchip);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	gchip->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(gchip->base))
		return PTR_ERR(gchip->base);

	gchip->clk = devm_clk_get(&pdev->dev, NULL);
	if (IS_ERR(gchip->clk))
		return PTR_ERR(gchip->clk);

	clk_prepare_enable(gchip->clk);

	spin_lock_init(&gchip->lock);

	gchip->gc.direction_output = mb86s70_gpio_direction_output;
	gchip->gc.direction_input = mb86s70_gpio_direction_input;
	gchip->gc.request = mb86s70_gpio_request;
	gchip->gc.free = mb86s70_gpio_free;
	gchip->gc.get = mb86s70_gpio_get;
	gchip->gc.set = mb86s70_gpio_set;
	gchip->gc.label = dev_name(&pdev->dev);
	gchip->gc.ngpio = 32;
	gchip->gc.owner = THIS_MODULE;
	gchip->gc.parent = &pdev->dev;
	gchip->gc.base = -1;

	platform_set_drvdata(pdev, gchip);

	ret = gpiochip_add_data(&gchip->gc, gchip);
	if (ret) {
		dev_err(&pdev->dev, "couldn't register gpio driver\n");
		clk_disable_unprepare(gchip->clk);
	}

	return ret;
}

static int mb86s70_gpio_remove(struct platform_device *pdev)
{
	struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev);

	gpiochip_remove(&gchip->gc);
	clk_disable_unprepare(gchip->clk);

	return 0;
}

static const struct of_device_id mb86s70_gpio_dt_ids[] = {
	{ .compatible = "fujitsu,mb86s70-gpio" },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids);

static struct platform_driver mb86s70_gpio_driver = {
	.driver = {
		.name = "mb86s70-gpio",
		.of_match_table = mb86s70_gpio_dt_ids,
	},
	.probe = mb86s70_gpio_probe,
	.remove = mb86s70_gpio_remove,
};

static int __init mb86s70_gpio_init(void)
{
	return platform_driver_register(&mb86s70_gpio_driver);
}
module_init(mb86s70_gpio_init);

MODULE_DESCRIPTION("MB86S7x GPIO Driver");
MODULE_ALIAS("platform:mb86s70-gpio");
MODULE_LICENSE("GPL");
Commit	Line	Data
0da094d8 JB	1	/*
	2	* linux/drivers/gpio/gpio-mb86s7x.c
	3	*
	4	* Copyright (C) 2015 Fujitsu Semiconductor Limited
	5	* Copyright (C) 2015 Linaro Ltd.
	6	*
	7	* This program is free software: you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation, version 2 of the License.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*/
	16
	17	#include <linux/io.h>
	18	#include <linux/init.h>
	19	#include <linux/clk.h>
	20	#include <linux/module.h>
	21	#include <linux/err.h>
	22	#include <linux/errno.h>
	23	#include <linux/ioport.h>
	24	#include <linux/of_device.h>
	25	#include <linux/gpio/driver.h>
	26	#include <linux/platform_device.h>
	27	#include <linux/spinlock.h>
	28	#include <linux/slab.h>
	29
	30	/*
	31	* Only first 8bits of a register correspond to each pin,
	32	* so there are 4 registers for 32 pins.
	33	*/
	34	#define PDR(x) (0x0 + x / 8 * 4)
	35	#define DDR(x) (0x10 + x / 8 * 4)
	36	#define PFR(x) (0x20 + x / 8 * 4)
	37
	38	#define OFFSET(x) BIT((x) % 8)
	39
	40	struct mb86s70_gpio_chip {
	41	struct gpio_chip gc;
	42	void __iomem *base;
	43	struct clk *clk;
	44	spinlock_t lock;
	45	};
	46
0da094d8 JB	47	static int mb86s70_gpio_request(struct gpio_chip *gc, unsigned gpio)
0da094d8 JB	48	{
01f76b26	49	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
0da094d8 JB	50	unsigned long flags;
	51	u32 val;
	52
	53	spin_lock_irqsave(&gchip->lock, flags);
	54
	55	val = readl(gchip->base + PFR(gpio));
fd9c963c AL	56	if (!(val & OFFSET(gpio))) {
	57	spin_unlock_irqrestore(&gchip->lock, flags);
	58	return -EINVAL;
	59	}
	60
0da094d8 JB	61	val &= ~OFFSET(gpio);
	62	writel(val, gchip->base + PFR(gpio));
	63
	64	spin_unlock_irqrestore(&gchip->lock, flags);
	65
	66	return 0;
	67	}
	68
	69	static void mb86s70_gpio_free(struct gpio_chip *gc, unsigned gpio)
	70	{
01f76b26	71	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
0da094d8 JB	72	unsigned long flags;
	73	u32 val;
	74
	75	spin_lock_irqsave(&gchip->lock, flags);
	76
	77	val = readl(gchip->base + PFR(gpio));
	78	val \|= OFFSET(gpio);
	79	writel(val, gchip->base + PFR(gpio));
	80
	81	spin_unlock_irqrestore(&gchip->lock, flags);
	82	}
	83
	84	static int mb86s70_gpio_direction_input(struct gpio_chip *gc, unsigned gpio)
	85	{
01f76b26	86	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
0da094d8 JB	87	unsigned long flags;
	88	unsigned char val;
	89
	90	spin_lock_irqsave(&gchip->lock, flags);
	91
	92	val = readl(gchip->base + DDR(gpio));
	93	val &= ~OFFSET(gpio);
	94	writel(val, gchip->base + DDR(gpio));
	95
	96	spin_unlock_irqrestore(&gchip->lock, flags);
	97
	98	return 0;
	99	}
	100
	101	static int mb86s70_gpio_direction_output(struct gpio_chip *gc,
	102	unsigned gpio, int value)
	103	{
01f76b26	104	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
0da094d8 JB	105	unsigned long flags;
	106	unsigned char val;
	107
	108	spin_lock_irqsave(&gchip->lock, flags);
	109
	110	val = readl(gchip->base + PDR(gpio));
	111	if (value)
	112	val \|= OFFSET(gpio);
	113	else
	114	val &= ~OFFSET(gpio);
	115	writel(val, gchip->base + PDR(gpio));
	116
	117	val = readl(gchip->base + DDR(gpio));
	118	val \|= OFFSET(gpio);
	119	writel(val, gchip->base + DDR(gpio));
	120
	121	spin_unlock_irqrestore(&gchip->lock, flags);
	122
	123	return 0;
	124	}
	125
	126	static int mb86s70_gpio_get(struct gpio_chip *gc, unsigned gpio)
	127	{
01f76b26	128	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
0da094d8 JB	129
	130	return !!(readl(gchip->base + PDR(gpio)) & OFFSET(gpio));
	131	}
	132
	133	static void mb86s70_gpio_set(struct gpio_chip *gc, unsigned gpio, int value)
	134	{
01f76b26	135	struct mb86s70_gpio_chip *gchip = gpiochip_get_data(gc);
0da094d8 JB	136	unsigned long flags;
	137	unsigned char val;
	138
	139	spin_lock_irqsave(&gchip->lock, flags);
	140
	141	val = readl(gchip->base + PDR(gpio));
	142	if (value)
	143	val \|= OFFSET(gpio);
	144	else
	145	val &= ~OFFSET(gpio);
	146	writel(val, gchip->base + PDR(gpio));
	147
	148	spin_unlock_irqrestore(&gchip->lock, flags);
	149	}
	150
	151	static int mb86s70_gpio_probe(struct platform_device *pdev)
	152	{
	153	struct mb86s70_gpio_chip *gchip;
	154	struct resource *res;
	155	int ret;
	156
	157	gchip = devm_kzalloc(&pdev->dev, sizeof(*gchip), GFP_KERNEL);
	158	if (gchip == NULL)
	159	return -ENOMEM;
	160
	161	platform_set_drvdata(pdev, gchip);
	162
	163	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	164	gchip->base = devm_ioremap_resource(&pdev->dev, res);
	165	if (IS_ERR(gchip->base))
	166	return PTR_ERR(gchip->base);
	167
	168	gchip->clk = devm_clk_get(&pdev->dev, NULL);
	169	if (IS_ERR(gchip->clk))
	170	return PTR_ERR(gchip->clk);
	171
	172	clk_prepare_enable(gchip->clk);
	173
	174	spin_lock_init(&gchip->lock);
	175
	176	gchip->gc.direction_output = mb86s70_gpio_direction_output;
	177	gchip->gc.direction_input = mb86s70_gpio_direction_input;
	178	gchip->gc.request = mb86s70_gpio_request;
	179	gchip->gc.free = mb86s70_gpio_free;
	180	gchip->gc.get = mb86s70_gpio_get;
	181	gchip->gc.set = mb86s70_gpio_set;
	182	gchip->gc.label = dev_name(&pdev->dev);
	183	gchip->gc.ngpio = 32;
	184	gchip->gc.owner = THIS_MODULE;
58383c78	185	gchip->gc.parent = &pdev->dev;
0da094d8 JB	186	gchip->gc.base = -1;
	187
	188	platform_set_drvdata(pdev, gchip);
	189
01f76b26	190	ret = gpiochip_add_data(&gchip->gc, gchip);
0da094d8 JB	191	if (ret) {
	192	dev_err(&pdev->dev, "couldn't register gpio driver\n");
	193	clk_disable_unprepare(gchip->clk);
	194	}
	195
	196	return ret;
	197	}
	198
	199	static int mb86s70_gpio_remove(struct platform_device *pdev)
	200	{
	201	struct mb86s70_gpio_chip *gchip = platform_get_drvdata(pdev);
	202
	203	gpiochip_remove(&gchip->gc);
	204	clk_disable_unprepare(gchip->clk);
	205
	206	return 0;
	207	}
	208
	209	static const struct of_device_id mb86s70_gpio_dt_ids[] = {
	210	{ .compatible = "fujitsu,mb86s70-gpio" },
	211	{ /* sentinel */ }
	212	};
	213	MODULE_DEVICE_TABLE(of, mb86s70_gpio_dt_ids);
	214
	215	static struct platform_driver mb86s70_gpio_driver = {
	216	.driver = {
	217	.name = "mb86s70-gpio",
	218	.of_match_table = mb86s70_gpio_dt_ids,
	219	},
	220	.probe = mb86s70_gpio_probe,
	221	.remove = mb86s70_gpio_remove,
	222	};
	223
	224	static int __init mb86s70_gpio_init(void)
	225	{
	226	return platform_driver_register(&mb86s70_gpio_driver);
	227	}
	228	module_init(mb86s70_gpio_init);
	229
	230	MODULE_DESCRIPTION("MB86S7x GPIO Driver");
	231	MODULE_ALIAS("platform:mb86s70-gpio");
	232	MODULE_LICENSE("GPL");