Merge tag 'pm+acpi-4.6-rc1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[linux-2.6-block.git] / drivers / gpio / gpio-max732x.c
CommitLineData
bbcd6d54 1/*
c103de24 2 * MAX732x I2C Port Expander with 8/16 I/O
bbcd6d54
EM
3 *
4 * Copyright (C) 2007 Marvell International Ltd.
5 * Copyright (C) 2008 Jack Ren <jack.ren@marvell.com>
6 * Copyright (C) 2008 Eric Miao <eric.miao@marvell.com>
984f6643 7 * Copyright (C) 2015 Linus Walleij <linus.walleij@linaro.org>
bbcd6d54
EM
8 *
9 * Derived from drivers/gpio/pca953x.c
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; version 2 of the License.
14 */
15
16#include <linux/module.h>
17#include <linux/init.h>
18#include <linux/slab.h>
19#include <linux/string.h>
984f6643 20#include <linux/gpio/driver.h>
a80a0bbe 21#include <linux/interrupt.h>
bbcd6d54
EM
22#include <linux/i2c.h>
23#include <linux/i2c/max732x.h>
43c4bcf9 24#include <linux/of.h>
bbcd6d54
EM
25
26
27/*
28 * Each port of MAX732x (including MAX7319) falls into one of the
29 * following three types:
30 *
31 * - Push Pull Output
32 * - Input
33 * - Open Drain I/O
34 *
35 * designated by 'O', 'I' and 'P' individually according to MAXIM's
a80a0bbe
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36 * datasheets. 'I' and 'P' ports are interrupt capables, some with
37 * a dedicated interrupt mask.
bbcd6d54
EM
38 *
39 * There are two groups of I/O ports, each group usually includes
40 * up to 8 I/O ports, and is accessed by a specific I2C address:
41 *
42 * - Group A : by I2C address 0b'110xxxx
43 * - Group B : by I2C address 0b'101xxxx
44 *
45 * where 'xxxx' is decided by the connections of pin AD2/AD0. The
46 * address used also affects the initial state of output signals.
47 *
48 * Within each group of ports, there are five known combinations of
49 * I/O ports: 4I4O, 4P4O, 8I, 8P, 8O, see the definitions below for
a80a0bbe
MZ
50 * the detailed organization of these ports. Only Goup A is interrupt
51 * capable.
bbcd6d54
EM
52 *
53 * GPIO numbers start from 'gpio_base + 0' to 'gpio_base + 8/16',
54 * and GPIOs from GROUP_A are numbered before those from GROUP_B
55 * (if there are two groups).
56 *
57 * NOTE: MAX7328/MAX7329 are drop-in replacements for PCF8574/a, so
58 * they are not supported by this driver.
59 */
60
61#define PORT_NONE 0x0 /* '/' No Port */
62#define PORT_OUTPUT 0x1 /* 'O' Push-Pull, Output Only */
63#define PORT_INPUT 0x2 /* 'I' Input Only */
64#define PORT_OPENDRAIN 0x3 /* 'P' Open-Drain, I/O */
65
66#define IO_4I4O 0x5AA5 /* O7 O6 I5 I4 I3 I2 O1 O0 */
67#define IO_4P4O 0x5FF5 /* O7 O6 P5 P4 P3 P2 O1 O0 */
68#define IO_8I 0xAAAA /* I7 I6 I5 I4 I3 I2 I1 I0 */
69#define IO_8P 0xFFFF /* P7 P6 P5 P4 P3 P2 P1 P0 */
70#define IO_8O 0x5555 /* O7 O6 O5 O4 O3 O2 O1 O0 */
71
72#define GROUP_A(x) ((x) & 0xffff) /* I2C Addr: 0b'110xxxx */
73#define GROUP_B(x) ((x) << 16) /* I2C Addr: 0b'101xxxx */
74
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75#define INT_NONE 0x0 /* No interrupt capability */
76#define INT_NO_MASK 0x1 /* Has interrupts, no mask */
77#define INT_INDEP_MASK 0x2 /* Has interrupts, independent mask */
78#define INT_MERGED_MASK 0x3 /* Has interrupts, merged mask */
79
80#define INT_CAPS(x) (((uint64_t)(x)) << 32)
81
82enum {
83 MAX7319,
84 MAX7320,
85 MAX7321,
86 MAX7322,
87 MAX7323,
88 MAX7324,
89 MAX7325,
90 MAX7326,
91 MAX7327,
92};
93
94static uint64_t max732x_features[] = {
95 [MAX7319] = GROUP_A(IO_8I) | INT_CAPS(INT_MERGED_MASK),
96 [MAX7320] = GROUP_B(IO_8O),
97 [MAX7321] = GROUP_A(IO_8P) | INT_CAPS(INT_NO_MASK),
98 [MAX7322] = GROUP_A(IO_4I4O) | INT_CAPS(INT_MERGED_MASK),
99 [MAX7323] = GROUP_A(IO_4P4O) | INT_CAPS(INT_INDEP_MASK),
100 [MAX7324] = GROUP_A(IO_8I) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK),
101 [MAX7325] = GROUP_A(IO_8P) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK),
102 [MAX7326] = GROUP_A(IO_4I4O) | GROUP_B(IO_8O) | INT_CAPS(INT_MERGED_MASK),
103 [MAX7327] = GROUP_A(IO_4P4O) | GROUP_B(IO_8O) | INT_CAPS(INT_NO_MASK),
104};
105
bbcd6d54 106static const struct i2c_device_id max732x_id[] = {
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107 { "max7319", MAX7319 },
108 { "max7320", MAX7320 },
109 { "max7321", MAX7321 },
110 { "max7322", MAX7322 },
111 { "max7323", MAX7323 },
112 { "max7324", MAX7324 },
113 { "max7325", MAX7325 },
114 { "max7326", MAX7326 },
115 { "max7327", MAX7327 },
bbcd6d54
EM
116 { },
117};
118MODULE_DEVICE_TABLE(i2c, max732x_id);
119
43c4bcf9
SP
120#ifdef CONFIG_OF
121static const struct of_device_id max732x_of_table[] = {
122 { .compatible = "maxim,max7319" },
123 { .compatible = "maxim,max7320" },
124 { .compatible = "maxim,max7321" },
125 { .compatible = "maxim,max7322" },
126 { .compatible = "maxim,max7323" },
127 { .compatible = "maxim,max7324" },
128 { .compatible = "maxim,max7325" },
129 { .compatible = "maxim,max7326" },
130 { .compatible = "maxim,max7327" },
131 { }
132};
133MODULE_DEVICE_TABLE(of, max732x_of_table);
134#endif
135
bbcd6d54
EM
136struct max732x_chip {
137 struct gpio_chip gpio_chip;
138
139 struct i2c_client *client; /* "main" client */
140 struct i2c_client *client_dummy;
141 struct i2c_client *client_group_a;
142 struct i2c_client *client_group_b;
143
144 unsigned int mask_group_a;
145 unsigned int dir_input;
146 unsigned int dir_output;
147
148 struct mutex lock;
149 uint8_t reg_out[2];
a80a0bbe
MZ
150
151#ifdef CONFIG_GPIO_MAX732X_IRQ
479f8a57 152 struct mutex irq_lock;
479f8a57
SP
153 uint8_t irq_mask;
154 uint8_t irq_mask_cur;
155 uint8_t irq_trig_raise;
156 uint8_t irq_trig_fall;
157 uint8_t irq_features;
a80a0bbe 158#endif
bbcd6d54
EM
159};
160
a80a0bbe 161static int max732x_writeb(struct max732x_chip *chip, int group_a, uint8_t val)
bbcd6d54
EM
162{
163 struct i2c_client *client;
164 int ret;
165
166 client = group_a ? chip->client_group_a : chip->client_group_b;
167 ret = i2c_smbus_write_byte(client, val);
168 if (ret < 0) {
169 dev_err(&client->dev, "failed writing\n");
170 return ret;
171 }
172
173 return 0;
174}
175
a80a0bbe 176static int max732x_readb(struct max732x_chip *chip, int group_a, uint8_t *val)
bbcd6d54
EM
177{
178 struct i2c_client *client;
179 int ret;
180
181 client = group_a ? chip->client_group_a : chip->client_group_b;
182 ret = i2c_smbus_read_byte(client);
183 if (ret < 0) {
184 dev_err(&client->dev, "failed reading\n");
185 return ret;
186 }
187
188 *val = (uint8_t)ret;
189 return 0;
190}
191
192static inline int is_group_a(struct max732x_chip *chip, unsigned off)
193{
194 return (1u << off) & chip->mask_group_a;
195}
196
197static int max732x_gpio_get_value(struct gpio_chip *gc, unsigned off)
198{
0788b644 199 struct max732x_chip *chip = gpiochip_get_data(gc);
bbcd6d54
EM
200 uint8_t reg_val;
201 int ret;
202
a80a0bbe 203 ret = max732x_readb(chip, is_group_a(chip, off), &reg_val);
bbcd6d54 204 if (ret < 0)
f9660087 205 return ret;
bbcd6d54 206
f9660087 207 return !!(reg_val & (1u << (off & 0x7)));
bbcd6d54
EM
208}
209
161af6cd
MR
210static void max732x_gpio_set_mask(struct gpio_chip *gc, unsigned off, int mask,
211 int val)
bbcd6d54 212{
0788b644 213 struct max732x_chip *chip = gpiochip_get_data(gc);
161af6cd 214 uint8_t reg_out;
bbcd6d54
EM
215 int ret;
216
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EM
217 mutex_lock(&chip->lock);
218
219 reg_out = (off > 7) ? chip->reg_out[1] : chip->reg_out[0];
161af6cd 220 reg_out = (reg_out & ~mask) | (val & mask);
bbcd6d54 221
a80a0bbe 222 ret = max732x_writeb(chip, is_group_a(chip, off), reg_out);
bbcd6d54
EM
223 if (ret < 0)
224 goto out;
225
226 /* update the shadow register then */
227 if (off > 7)
228 chip->reg_out[1] = reg_out;
229 else
230 chip->reg_out[0] = reg_out;
231out:
232 mutex_unlock(&chip->lock);
233}
234
161af6cd
MR
235static void max732x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
236{
237 unsigned base = off & ~0x7;
238 uint8_t mask = 1u << (off & 0x7);
239
240 max732x_gpio_set_mask(gc, base, mask, val << (off & 0x7));
241}
242
243static void max732x_gpio_set_multiple(struct gpio_chip *gc,
244 unsigned long *mask, unsigned long *bits)
245{
246 unsigned mask_lo = mask[0] & 0xff;
247 unsigned mask_hi = (mask[0] >> 8) & 0xff;
248
249 if (mask_lo)
250 max732x_gpio_set_mask(gc, 0, mask_lo, bits[0] & 0xff);
251 if (mask_hi)
252 max732x_gpio_set_mask(gc, 8, mask_hi, (bits[0] >> 8) & 0xff);
253}
254
bbcd6d54
EM
255static int max732x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
256{
0788b644 257 struct max732x_chip *chip = gpiochip_get_data(gc);
bbcd6d54
EM
258 unsigned int mask = 1u << off;
259
bbcd6d54
EM
260 if ((mask & chip->dir_input) == 0) {
261 dev_dbg(&chip->client->dev, "%s port %d is output only\n",
262 chip->client->name, off);
263 return -EACCES;
264 }
265
a13c1868
MZ
266 /*
267 * Open-drain pins must be set to high impedance (which is
268 * equivalent to output-high) to be turned into an input.
269 */
270 if ((mask & chip->dir_output))
271 max732x_gpio_set_value(gc, off, 1);
272
bbcd6d54
EM
273 return 0;
274}
275
276static int max732x_gpio_direction_output(struct gpio_chip *gc,
277 unsigned off, int val)
278{
0788b644 279 struct max732x_chip *chip = gpiochip_get_data(gc);
bbcd6d54
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280 unsigned int mask = 1u << off;
281
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EM
282 if ((mask & chip->dir_output) == 0) {
283 dev_dbg(&chip->client->dev, "%s port %d is input only\n",
284 chip->client->name, off);
285 return -EACCES;
286 }
287
288 max732x_gpio_set_value(gc, off, val);
289 return 0;
290}
291
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MZ
292#ifdef CONFIG_GPIO_MAX732X_IRQ
293static int max732x_writew(struct max732x_chip *chip, uint16_t val)
294{
295 int ret;
296
297 val = cpu_to_le16(val);
298
299 ret = i2c_master_send(chip->client_group_a, (char *)&val, 2);
300 if (ret < 0) {
301 dev_err(&chip->client_group_a->dev, "failed writing\n");
302 return ret;
303 }
304
305 return 0;
306}
307
308static int max732x_readw(struct max732x_chip *chip, uint16_t *val)
309{
310 int ret;
311
312 ret = i2c_master_recv(chip->client_group_a, (char *)val, 2);
313 if (ret < 0) {
314 dev_err(&chip->client_group_a->dev, "failed reading\n");
315 return ret;
316 }
317
318 *val = le16_to_cpu(*val);
319 return 0;
320}
321
322static void max732x_irq_update_mask(struct max732x_chip *chip)
323{
324 uint16_t msg;
325
326 if (chip->irq_mask == chip->irq_mask_cur)
327 return;
328
329 chip->irq_mask = chip->irq_mask_cur;
330
331 if (chip->irq_features == INT_NO_MASK)
332 return;
333
334 mutex_lock(&chip->lock);
335
336 switch (chip->irq_features) {
337 case INT_INDEP_MASK:
338 msg = (chip->irq_mask << 8) | chip->reg_out[0];
339 max732x_writew(chip, msg);
340 break;
341
342 case INT_MERGED_MASK:
343 msg = chip->irq_mask | chip->reg_out[0];
344 max732x_writeb(chip, 1, (uint8_t)msg);
345 break;
346 }
347
348 mutex_unlock(&chip->lock);
349}
350
fbc4667a 351static void max732x_irq_mask(struct irq_data *d)
a80a0bbe 352{
984f6643 353 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
0788b644 354 struct max732x_chip *chip = gpiochip_get_data(gc);
a80a0bbe 355
479f8a57 356 chip->irq_mask_cur &= ~(1 << d->hwirq);
a80a0bbe
MZ
357}
358
fbc4667a 359static void max732x_irq_unmask(struct irq_data *d)
a80a0bbe 360{
984f6643 361 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
0788b644 362 struct max732x_chip *chip = gpiochip_get_data(gc);
a80a0bbe 363
479f8a57 364 chip->irq_mask_cur |= 1 << d->hwirq;
a80a0bbe
MZ
365}
366
fbc4667a 367static void max732x_irq_bus_lock(struct irq_data *d)
a80a0bbe 368{
984f6643 369 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
0788b644 370 struct max732x_chip *chip = gpiochip_get_data(gc);
a80a0bbe
MZ
371
372 mutex_lock(&chip->irq_lock);
373 chip->irq_mask_cur = chip->irq_mask;
374}
375
fbc4667a 376static void max732x_irq_bus_sync_unlock(struct irq_data *d)
a80a0bbe 377{
984f6643 378 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
0788b644 379 struct max732x_chip *chip = gpiochip_get_data(gc);
09afa276
SP
380 uint16_t new_irqs;
381 uint16_t level;
a80a0bbe
MZ
382
383 max732x_irq_update_mask(chip);
09afa276
SP
384
385 new_irqs = chip->irq_trig_fall | chip->irq_trig_raise;
386 while (new_irqs) {
387 level = __ffs(new_irqs);
388 max732x_gpio_direction_input(&chip->gpio_chip, level);
389 new_irqs &= ~(1 << level);
390 }
391
a80a0bbe
MZ
392 mutex_unlock(&chip->irq_lock);
393}
394
fbc4667a 395static int max732x_irq_set_type(struct irq_data *d, unsigned int type)
a80a0bbe 396{
984f6643 397 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
0788b644 398 struct max732x_chip *chip = gpiochip_get_data(gc);
479f8a57 399 uint16_t off = d->hwirq;
a80a0bbe
MZ
400 uint16_t mask = 1 << off;
401
402 if (!(mask & chip->dir_input)) {
403 dev_dbg(&chip->client->dev, "%s port %d is output only\n",
404 chip->client->name, off);
405 return -EACCES;
406 }
407
408 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
409 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
fbc4667a 410 d->irq, type);
a80a0bbe
MZ
411 return -EINVAL;
412 }
413
414 if (type & IRQ_TYPE_EDGE_FALLING)
415 chip->irq_trig_fall |= mask;
416 else
417 chip->irq_trig_fall &= ~mask;
418
419 if (type & IRQ_TYPE_EDGE_RISING)
420 chip->irq_trig_raise |= mask;
421 else
422 chip->irq_trig_raise &= ~mask;
423
09afa276 424 return 0;
a80a0bbe
MZ
425}
426
67ddd32b
SP
427static int max732x_irq_set_wake(struct irq_data *data, unsigned int on)
428{
429 struct max732x_chip *chip = irq_data_get_irq_chip_data(data);
430
431 irq_set_irq_wake(chip->client->irq, on);
432 return 0;
433}
434
a80a0bbe
MZ
435static struct irq_chip max732x_irq_chip = {
436 .name = "max732x",
fbc4667a
LB
437 .irq_mask = max732x_irq_mask,
438 .irq_unmask = max732x_irq_unmask,
439 .irq_bus_lock = max732x_irq_bus_lock,
440 .irq_bus_sync_unlock = max732x_irq_bus_sync_unlock,
441 .irq_set_type = max732x_irq_set_type,
67ddd32b 442 .irq_set_wake = max732x_irq_set_wake,
a80a0bbe
MZ
443};
444
445static uint8_t max732x_irq_pending(struct max732x_chip *chip)
446{
447 uint8_t cur_stat;
448 uint8_t old_stat;
449 uint8_t trigger;
450 uint8_t pending;
451 uint16_t status;
452 int ret;
453
454 ret = max732x_readw(chip, &status);
455 if (ret)
456 return 0;
457
458 trigger = status >> 8;
459 trigger &= chip->irq_mask;
460
461 if (!trigger)
462 return 0;
463
464 cur_stat = status & 0xFF;
465 cur_stat &= chip->irq_mask;
466
467 old_stat = cur_stat ^ trigger;
468
469 pending = (old_stat & chip->irq_trig_fall) |
470 (cur_stat & chip->irq_trig_raise);
471 pending &= trigger;
472
473 return pending;
474}
475
476static irqreturn_t max732x_irq_handler(int irq, void *devid)
477{
478 struct max732x_chip *chip = devid;
479 uint8_t pending;
480 uint8_t level;
481
482 pending = max732x_irq_pending(chip);
483
484 if (!pending)
485 return IRQ_HANDLED;
486
487 do {
488 level = __ffs(pending);
984f6643
LW
489 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irqdomain,
490 level));
a80a0bbe
MZ
491
492 pending &= ~(1 << level);
493 } while (pending);
494
495 return IRQ_HANDLED;
496}
497
498static int max732x_irq_setup(struct max732x_chip *chip,
499 const struct i2c_device_id *id)
500{
501 struct i2c_client *client = chip->client;
e56aee18 502 struct max732x_platform_data *pdata = dev_get_platdata(&client->dev);
a80a0bbe 503 int has_irq = max732x_features[id->driver_data] >> 32;
984f6643 504 int irq_base = 0;
a80a0bbe
MZ
505 int ret;
506
43c4bcf9
SP
507 if (((pdata && pdata->irq_base) || client->irq)
508 && has_irq != INT_NONE) {
43c4bcf9 509 if (pdata)
984f6643 510 irq_base = pdata->irq_base;
a80a0bbe
MZ
511 chip->irq_features = has_irq;
512 mutex_init(&chip->irq_lock);
513
68689dbf
SP
514 ret = devm_request_threaded_irq(&client->dev, client->irq,
515 NULL, max732x_irq_handler, IRQF_ONESHOT |
516 IRQF_TRIGGER_FALLING | IRQF_SHARED,
517 dev_name(&client->dev), chip);
a80a0bbe
MZ
518 if (ret) {
519 dev_err(&client->dev, "failed to request irq %d\n",
520 client->irq);
984f6643 521 return ret;
a80a0bbe 522 }
984f6643
LW
523 ret = gpiochip_irqchip_add(&chip->gpio_chip,
524 &max732x_irq_chip,
525 irq_base,
606f13e9 526 handle_simple_irq,
984f6643
LW
527 IRQ_TYPE_NONE);
528 if (ret) {
529 dev_err(&client->dev,
530 "could not connect irqchip to gpiochip\n");
531 return ret;
532 }
533 gpiochip_set_chained_irqchip(&chip->gpio_chip,
534 &max732x_irq_chip,
535 client->irq,
536 NULL);
a80a0bbe
MZ
537 }
538
539 return 0;
a80a0bbe
MZ
540}
541
a80a0bbe
MZ
542#else /* CONFIG_GPIO_MAX732X_IRQ */
543static int max732x_irq_setup(struct max732x_chip *chip,
544 const struct i2c_device_id *id)
545{
546 struct i2c_client *client = chip->client;
e56aee18 547 struct max732x_platform_data *pdata = dev_get_platdata(&client->dev);
a80a0bbe
MZ
548 int has_irq = max732x_features[id->driver_data] >> 32;
549
43c4bcf9 550 if (((pdata && pdata->irq_base) || client->irq) && has_irq != INT_NONE)
a80a0bbe
MZ
551 dev_warn(&client->dev, "interrupt support not compiled in\n");
552
553 return 0;
554}
a80a0bbe
MZ
555#endif
556
3836309d 557static int max732x_setup_gpio(struct max732x_chip *chip,
bbcd6d54
EM
558 const struct i2c_device_id *id,
559 unsigned gpio_start)
560{
561 struct gpio_chip *gc = &chip->gpio_chip;
a80a0bbe 562 uint32_t id_data = (uint32_t)max732x_features[id->driver_data];
bbcd6d54
EM
563 int i, port = 0;
564
565 for (i = 0; i < 16; i++, id_data >>= 2) {
566 unsigned int mask = 1 << port;
567
568 switch (id_data & 0x3) {
569 case PORT_OUTPUT:
570 chip->dir_output |= mask;
571 break;
572 case PORT_INPUT:
573 chip->dir_input |= mask;
574 break;
575 case PORT_OPENDRAIN:
576 chip->dir_output |= mask;
577 chip->dir_input |= mask;
578 break;
579 default:
580 continue;
581 }
582
583 if (i < 8)
584 chip->mask_group_a |= mask;
585 port++;
586 }
587
588 if (chip->dir_input)
589 gc->direction_input = max732x_gpio_direction_input;
590 if (chip->dir_output) {
591 gc->direction_output = max732x_gpio_direction_output;
592 gc->set = max732x_gpio_set_value;
161af6cd 593 gc->set_multiple = max732x_gpio_set_multiple;
bbcd6d54
EM
594 }
595 gc->get = max732x_gpio_get_value;
9fb1f39e 596 gc->can_sleep = true;
bbcd6d54
EM
597
598 gc->base = gpio_start;
599 gc->ngpio = port;
600 gc->label = chip->client->name;
58383c78 601 gc->parent = &chip->client->dev;
bbcd6d54
EM
602 gc->owner = THIS_MODULE;
603
604 return port;
605}
606
43c4bcf9
SP
607static struct max732x_platform_data *of_gpio_max732x(struct device *dev)
608{
609 struct max732x_platform_data *pdata;
610
611 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
612 if (!pdata)
613 return NULL;
614
615 pdata->gpio_base = -1;
616
617 return pdata;
618}
619
3836309d 620static int max732x_probe(struct i2c_client *client,
bbcd6d54
EM
621 const struct i2c_device_id *id)
622{
623 struct max732x_platform_data *pdata;
43c4bcf9 624 struct device_node *node;
bbcd6d54
EM
625 struct max732x_chip *chip;
626 struct i2c_client *c;
627 uint16_t addr_a, addr_b;
628 int ret, nr_port;
629
e56aee18 630 pdata = dev_get_platdata(&client->dev);
43c4bcf9
SP
631 node = client->dev.of_node;
632
633 if (!pdata && node)
634 pdata = of_gpio_max732x(&client->dev);
635
636 if (!pdata) {
a342d215
BD
637 dev_dbg(&client->dev, "no platform data\n");
638 return -EINVAL;
639 }
bbcd6d54 640
43c4bcf9 641 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
bbcd6d54
EM
642 if (chip == NULL)
643 return -ENOMEM;
644 chip->client = client;
645
646 nr_port = max732x_setup_gpio(chip, id, pdata->gpio_base);
58383c78 647 chip->gpio_chip.parent = &client->dev;
bbcd6d54
EM
648
649 addr_a = (client->addr & 0x0f) | 0x60;
650 addr_b = (client->addr & 0x0f) | 0x50;
651
652 switch (client->addr & 0x70) {
653 case 0x60:
654 chip->client_group_a = client;
5535cb68 655 if (nr_port > 8) {
bbcd6d54
EM
656 c = i2c_new_dummy(client->adapter, addr_b);
657 chip->client_group_b = chip->client_dummy = c;
658 }
659 break;
660 case 0x50:
661 chip->client_group_b = client;
5535cb68 662 if (nr_port > 8) {
bbcd6d54
EM
663 c = i2c_new_dummy(client->adapter, addr_a);
664 chip->client_group_a = chip->client_dummy = c;
665 }
666 break;
667 default:
668 dev_err(&client->dev, "invalid I2C address specified %02x\n",
669 client->addr);
670 ret = -EINVAL;
671 goto out_failed;
f561b423
KK
672 }
673
674 if (nr_port > 8 && !chip->client_dummy) {
675 dev_err(&client->dev,
676 "Failed to allocate second group I2C device\n");
677 ret = -ENODEV;
678 goto out_failed;
bbcd6d54
EM
679 }
680
681 mutex_init(&chip->lock);
682
78de5d52
NK
683 ret = max732x_readb(chip, is_group_a(chip, 0), &chip->reg_out[0]);
684 if (ret)
685 goto out_failed;
686 if (nr_port > 8) {
687 ret = max732x_readb(chip, is_group_a(chip, 8), &chip->reg_out[1]);
688 if (ret)
689 goto out_failed;
690 }
a80a0bbe 691
0788b644 692 ret = gpiochip_add_data(&chip->gpio_chip, chip);
a80a0bbe
MZ
693 if (ret)
694 goto out_failed;
bbcd6d54 695
984f6643
LW
696 ret = max732x_irq_setup(chip, id);
697 if (ret) {
698 gpiochip_remove(&chip->gpio_chip);
bbcd6d54 699 goto out_failed;
984f6643 700 }
bbcd6d54 701
43c4bcf9 702 if (pdata && pdata->setup) {
bbcd6d54
EM
703 ret = pdata->setup(client, chip->gpio_chip.base,
704 chip->gpio_chip.ngpio, pdata->context);
705 if (ret < 0)
706 dev_warn(&client->dev, "setup failed, %d\n", ret);
707 }
708
709 i2c_set_clientdata(client, chip);
710 return 0;
711
712out_failed:
c75793d8
KK
713 if (chip->client_dummy)
714 i2c_unregister_device(chip->client_dummy);
bbcd6d54
EM
715 return ret;
716}
717
206210ce 718static int max732x_remove(struct i2c_client *client)
bbcd6d54 719{
e56aee18 720 struct max732x_platform_data *pdata = dev_get_platdata(&client->dev);
bbcd6d54 721 struct max732x_chip *chip = i2c_get_clientdata(client);
bbcd6d54 722
43c4bcf9
SP
723 if (pdata && pdata->teardown) {
724 int ret;
725
bbcd6d54
EM
726 ret = pdata->teardown(client, chip->gpio_chip.base,
727 chip->gpio_chip.ngpio, pdata->context);
728 if (ret < 0) {
729 dev_err(&client->dev, "%s failed, %d\n",
730 "teardown", ret);
731 return ret;
732 }
733 }
734
9f5132ae 735 gpiochip_remove(&chip->gpio_chip);
bbcd6d54
EM
736
737 /* unregister any dummy i2c_client */
738 if (chip->client_dummy)
739 i2c_unregister_device(chip->client_dummy);
740
bbcd6d54
EM
741 return 0;
742}
743
744static struct i2c_driver max732x_driver = {
745 .driver = {
43c4bcf9 746 .name = "max732x",
43c4bcf9 747 .of_match_table = of_match_ptr(max732x_of_table),
bbcd6d54
EM
748 },
749 .probe = max732x_probe,
8283c4ff 750 .remove = max732x_remove,
bbcd6d54
EM
751 .id_table = max732x_id,
752};
753
754static int __init max732x_init(void)
755{
756 return i2c_add_driver(&max732x_driver);
757}
2f8d1197
DB
758/* register after i2c postcore initcall and before
759 * subsys initcalls that may rely on these GPIOs
760 */
761subsys_initcall(max732x_init);
bbcd6d54
EM
762
763static void __exit max732x_exit(void)
764{
765 i2c_del_driver(&max732x_driver);
766}
767module_exit(max732x_exit);
768
769MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
770MODULE_DESCRIPTION("GPIO expander driver for MAX732X");
771MODULE_LICENSE("GPL");