Merge tag 'nfsd-4.7' of git://linux-nfs.org/~bfields/linux
[linux-2.6-block.git] / drivers / edac / edac_mc_sysfs.c
CommitLineData
7c9281d7
DT
1/*
2 * edac_mc kernel module
42a8e397
DT
3 * (C) 2005-2007 Linux Networx (http://lnxi.com)
4 *
7c9281d7
DT
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
7 *
42a8e397 8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
7c9281d7 9 *
37e59f87 10 * (c) 2012-2013 - Mauro Carvalho Chehab
7a623c03
MCC
11 * The entire API were re-written, and ported to use struct device
12 *
7c9281d7
DT
13 */
14
7c9281d7 15#include <linux/ctype.h>
5a0e3ad6 16#include <linux/slab.h>
30e1f7a8 17#include <linux/edac.h>
8096cfaf 18#include <linux/bug.h>
7a623c03 19#include <linux/pm_runtime.h>
452a6bf9 20#include <linux/uaccess.h>
7c9281d7 21
20bcb7a8 22#include "edac_core.h"
7c9281d7
DT
23#include "edac_module.h"
24
25/* MC EDAC Controls, setable by module parameter, and sysfs */
4de78c68
DJ
26static int edac_mc_log_ue = 1;
27static int edac_mc_log_ce = 1;
f044091c 28static int edac_mc_panic_on_ue;
4de78c68 29static int edac_mc_poll_msec = 1000;
7c9281d7
DT
30
31/* Getter functions for above */
4de78c68 32int edac_mc_get_log_ue(void)
7c9281d7 33{
4de78c68 34 return edac_mc_log_ue;
7c9281d7
DT
35}
36
4de78c68 37int edac_mc_get_log_ce(void)
7c9281d7 38{
4de78c68 39 return edac_mc_log_ce;
7c9281d7
DT
40}
41
4de78c68 42int edac_mc_get_panic_on_ue(void)
7c9281d7 43{
4de78c68 44 return edac_mc_panic_on_ue;
7c9281d7
DT
45}
46
81d87cb1
DJ
47/* this is temporary */
48int edac_mc_get_poll_msec(void)
49{
4de78c68 50 return edac_mc_poll_msec;
7c9281d7
DT
51}
52
096846e2
AJ
53static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
54{
9da21b15 55 unsigned long l;
096846e2
AJ
56 int ret;
57
58 if (!val)
59 return -EINVAL;
60
9da21b15 61 ret = kstrtoul(val, 0, &l);
c542b53d
JH
62 if (ret)
63 return ret;
9da21b15
BP
64
65 if (l < 1000)
096846e2 66 return -EINVAL;
9da21b15
BP
67
68 *((unsigned long *)kp->arg) = l;
096846e2
AJ
69
70 /* notify edac_mc engine to reset the poll period */
71 edac_mc_reset_delay_period(l);
72
73 return 0;
74}
75
7c9281d7 76/* Parameter declarations for above */
4de78c68
DJ
77module_param(edac_mc_panic_on_ue, int, 0644);
78MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
79module_param(edac_mc_log_ue, int, 0644);
80MODULE_PARM_DESC(edac_mc_log_ue,
079708b9 81 "Log uncorrectable error to console: 0=off 1=on");
4de78c68
DJ
82module_param(edac_mc_log_ce, int, 0644);
83MODULE_PARM_DESC(edac_mc_log_ce,
079708b9 84 "Log correctable error to console: 0=off 1=on");
096846e2
AJ
85module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
86 &edac_mc_poll_msec, 0644);
4de78c68 87MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
7c9281d7 88
de3910eb 89static struct device *mci_pdev;
7a623c03 90
7c9281d7
DT
91/*
92 * various constants for Memory Controllers
93 */
8b7719e0 94static const char * const mem_types[] = {
7c9281d7
DT
95 [MEM_EMPTY] = "Empty",
96 [MEM_RESERVED] = "Reserved",
97 [MEM_UNKNOWN] = "Unknown",
98 [MEM_FPM] = "FPM",
99 [MEM_EDO] = "EDO",
100 [MEM_BEDO] = "BEDO",
101 [MEM_SDR] = "Unbuffered-SDR",
102 [MEM_RDR] = "Registered-SDR",
103 [MEM_DDR] = "Unbuffered-DDR",
104 [MEM_RDDR] = "Registered-DDR",
1a9b85e6
DJ
105 [MEM_RMBS] = "RMBS",
106 [MEM_DDR2] = "Unbuffered-DDR2",
107 [MEM_FB_DDR2] = "FullyBuffered-DDR2",
1d5f726c 108 [MEM_RDDR2] = "Registered-DDR2",
b1cfebc9
YS
109 [MEM_XDR] = "XDR",
110 [MEM_DDR3] = "Unbuffered-DDR3",
7b827835
AR
111 [MEM_RDDR3] = "Registered-DDR3",
112 [MEM_DDR4] = "Unbuffered-DDR4",
113 [MEM_RDDR4] = "Registered-DDR4"
7c9281d7
DT
114};
115
8b7719e0 116static const char * const dev_types[] = {
7c9281d7
DT
117 [DEV_UNKNOWN] = "Unknown",
118 [DEV_X1] = "x1",
119 [DEV_X2] = "x2",
120 [DEV_X4] = "x4",
121 [DEV_X8] = "x8",
122 [DEV_X16] = "x16",
123 [DEV_X32] = "x32",
124 [DEV_X64] = "x64"
125};
126
8b7719e0 127static const char * const edac_caps[] = {
7c9281d7
DT
128 [EDAC_UNKNOWN] = "Unknown",
129 [EDAC_NONE] = "None",
130 [EDAC_RESERVED] = "Reserved",
131 [EDAC_PARITY] = "PARITY",
132 [EDAC_EC] = "EC",
133 [EDAC_SECDED] = "SECDED",
134 [EDAC_S2ECD2ED] = "S2ECD2ED",
135 [EDAC_S4ECD4ED] = "S4ECD4ED",
136 [EDAC_S8ECD8ED] = "S8ECD8ED",
137 [EDAC_S16ECD16ED] = "S16ECD16ED"
138};
139
19974710 140#ifdef CONFIG_EDAC_LEGACY_SYSFS
7a623c03
MCC
141/*
142 * EDAC sysfs CSROW data structures and methods
143 */
144
145#define to_csrow(k) container_of(k, struct csrow_info, dev)
146
147/*
148 * We need it to avoid namespace conflicts between the legacy API
149 * and the per-dimm/per-rank one
7c9281d7 150 */
7a623c03 151#define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
fbe2d361 152 static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
7a623c03
MCC
153
154struct dev_ch_attribute {
155 struct device_attribute attr;
156 int channel;
157};
158
159#define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
f11135d8 160 static struct dev_ch_attribute dev_attr_legacy_##_name = \
7a623c03
MCC
161 { __ATTR(_name, _mode, _show, _store), (_var) }
162
163#define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
7c9281d7
DT
164
165/* Set of more default csrow<id> attribute show/store functions */
7a623c03
MCC
166static ssize_t csrow_ue_count_show(struct device *dev,
167 struct device_attribute *mattr, char *data)
7c9281d7 168{
7a623c03
MCC
169 struct csrow_info *csrow = to_csrow(dev);
170
079708b9 171 return sprintf(data, "%u\n", csrow->ue_count);
7c9281d7
DT
172}
173
7a623c03
MCC
174static ssize_t csrow_ce_count_show(struct device *dev,
175 struct device_attribute *mattr, char *data)
7c9281d7 176{
7a623c03
MCC
177 struct csrow_info *csrow = to_csrow(dev);
178
079708b9 179 return sprintf(data, "%u\n", csrow->ce_count);
7c9281d7
DT
180}
181
7a623c03
MCC
182static ssize_t csrow_size_show(struct device *dev,
183 struct device_attribute *mattr, char *data)
7c9281d7 184{
7a623c03 185 struct csrow_info *csrow = to_csrow(dev);
a895bf8b
MCC
186 int i;
187 u32 nr_pages = 0;
188
189 for (i = 0; i < csrow->nr_channels; i++)
de3910eb 190 nr_pages += csrow->channels[i]->dimm->nr_pages;
a895bf8b 191 return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
7c9281d7
DT
192}
193
7a623c03
MCC
194static ssize_t csrow_mem_type_show(struct device *dev,
195 struct device_attribute *mattr, char *data)
7c9281d7 196{
7a623c03
MCC
197 struct csrow_info *csrow = to_csrow(dev);
198
de3910eb 199 return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
7c9281d7
DT
200}
201
7a623c03
MCC
202static ssize_t csrow_dev_type_show(struct device *dev,
203 struct device_attribute *mattr, char *data)
7c9281d7 204{
7a623c03
MCC
205 struct csrow_info *csrow = to_csrow(dev);
206
de3910eb 207 return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
7c9281d7
DT
208}
209
7a623c03
MCC
210static ssize_t csrow_edac_mode_show(struct device *dev,
211 struct device_attribute *mattr,
212 char *data)
7c9281d7 213{
7a623c03
MCC
214 struct csrow_info *csrow = to_csrow(dev);
215
de3910eb 216 return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
7c9281d7
DT
217}
218
219/* show/store functions for DIMM Label attributes */
7a623c03
MCC
220static ssize_t channel_dimm_label_show(struct device *dev,
221 struct device_attribute *mattr,
222 char *data)
7c9281d7 223{
7a623c03
MCC
224 struct csrow_info *csrow = to_csrow(dev);
225 unsigned chan = to_channel(mattr);
de3910eb 226 struct rank_info *rank = csrow->channels[chan];
7a623c03 227
124682c7 228 /* if field has not been initialized, there is nothing to send */
7a623c03 229 if (!rank->dimm->label[0])
124682c7
AJ
230 return 0;
231
1ea62c59 232 return snprintf(data, sizeof(rank->dimm->label) + 1, "%s\n",
7a623c03 233 rank->dimm->label);
7c9281d7
DT
234}
235
7a623c03
MCC
236static ssize_t channel_dimm_label_store(struct device *dev,
237 struct device_attribute *mattr,
238 const char *data, size_t count)
7c9281d7 239{
7a623c03
MCC
240 struct csrow_info *csrow = to_csrow(dev);
241 unsigned chan = to_channel(mattr);
de3910eb 242 struct rank_info *rank = csrow->channels[chan];
438470b8 243 size_t copy_count = count;
7a623c03 244
438470b8
TK
245 if (count == 0)
246 return -EINVAL;
247
248 if (data[count - 1] == '\0' || data[count - 1] == '\n')
249 copy_count -= 1;
250
d0c9c930 251 if (copy_count == 0 || copy_count >= sizeof(rank->dimm->label))
438470b8 252 return -EINVAL;
7c9281d7 253
438470b8
TK
254 strncpy(rank->dimm->label, data, copy_count);
255 rank->dimm->label[copy_count] = '\0';
7c9281d7 256
438470b8 257 return count;
7c9281d7
DT
258}
259
260/* show function for dynamic chX_ce_count attribute */
7a623c03
MCC
261static ssize_t channel_ce_count_show(struct device *dev,
262 struct device_attribute *mattr, char *data)
7c9281d7 263{
7a623c03
MCC
264 struct csrow_info *csrow = to_csrow(dev);
265 unsigned chan = to_channel(mattr);
de3910eb 266 struct rank_info *rank = csrow->channels[chan];
7a623c03
MCC
267
268 return sprintf(data, "%u\n", rank->ce_count);
7c9281d7
DT
269}
270
7a623c03
MCC
271/* cwrow<id>/attribute files */
272DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
273DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
274DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
275DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
276DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
277DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
7c9281d7 278
7a623c03
MCC
279/* default attributes of the CSROW<id> object */
280static struct attribute *csrow_attrs[] = {
281 &dev_attr_legacy_dev_type.attr,
282 &dev_attr_legacy_mem_type.attr,
283 &dev_attr_legacy_edac_mode.attr,
284 &dev_attr_legacy_size_mb.attr,
285 &dev_attr_legacy_ue_count.attr,
286 &dev_attr_legacy_ce_count.attr,
287 NULL,
288};
7c9281d7 289
7a623c03
MCC
290static struct attribute_group csrow_attr_grp = {
291 .attrs = csrow_attrs,
292};
7c9281d7 293
7a623c03
MCC
294static const struct attribute_group *csrow_attr_groups[] = {
295 &csrow_attr_grp,
296 NULL
297};
7c9281d7 298
de3910eb 299static void csrow_attr_release(struct device *dev)
7c9281d7 300{
de3910eb
MCC
301 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
302
956b9ba1 303 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
de3910eb 304 kfree(csrow);
7c9281d7
DT
305}
306
7a623c03
MCC
307static struct device_type csrow_attr_type = {
308 .groups = csrow_attr_groups,
309 .release = csrow_attr_release,
7c9281d7
DT
310};
311
7a623c03
MCC
312/*
313 * possible dynamic channel DIMM Label attribute files
314 *
315 */
7c9281d7 316
7a623c03 317DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 318 channel_dimm_label_show, channel_dimm_label_store, 0);
7a623c03 319DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 320 channel_dimm_label_show, channel_dimm_label_store, 1);
7a623c03 321DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 322 channel_dimm_label_show, channel_dimm_label_store, 2);
7a623c03 323DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 324 channel_dimm_label_show, channel_dimm_label_store, 3);
7a623c03 325DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 326 channel_dimm_label_show, channel_dimm_label_store, 4);
7a623c03 327DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
052dfb45 328 channel_dimm_label_show, channel_dimm_label_store, 5);
7c9281d7
DT
329
330/* Total possible dynamic DIMM Label attribute file table */
2c1946b6
TI
331static struct attribute *dynamic_csrow_dimm_attr[] = {
332 &dev_attr_legacy_ch0_dimm_label.attr.attr,
333 &dev_attr_legacy_ch1_dimm_label.attr.attr,
334 &dev_attr_legacy_ch2_dimm_label.attr.attr,
335 &dev_attr_legacy_ch3_dimm_label.attr.attr,
336 &dev_attr_legacy_ch4_dimm_label.attr.attr,
337 &dev_attr_legacy_ch5_dimm_label.attr.attr,
338 NULL
7c9281d7
DT
339};
340
341/* possible dynamic channel ce_count attribute files */
c8c64d16 342DEVICE_CHANNEL(ch0_ce_count, S_IRUGO,
7a623c03 343 channel_ce_count_show, NULL, 0);
c8c64d16 344DEVICE_CHANNEL(ch1_ce_count, S_IRUGO,
7a623c03 345 channel_ce_count_show, NULL, 1);
c8c64d16 346DEVICE_CHANNEL(ch2_ce_count, S_IRUGO,
7a623c03 347 channel_ce_count_show, NULL, 2);
c8c64d16 348DEVICE_CHANNEL(ch3_ce_count, S_IRUGO,
7a623c03 349 channel_ce_count_show, NULL, 3);
c8c64d16 350DEVICE_CHANNEL(ch4_ce_count, S_IRUGO,
7a623c03 351 channel_ce_count_show, NULL, 4);
c8c64d16 352DEVICE_CHANNEL(ch5_ce_count, S_IRUGO,
7a623c03 353 channel_ce_count_show, NULL, 5);
7c9281d7
DT
354
355/* Total possible dynamic ce_count attribute file table */
2c1946b6
TI
356static struct attribute *dynamic_csrow_ce_count_attr[] = {
357 &dev_attr_legacy_ch0_ce_count.attr.attr,
358 &dev_attr_legacy_ch1_ce_count.attr.attr,
359 &dev_attr_legacy_ch2_ce_count.attr.attr,
360 &dev_attr_legacy_ch3_ce_count.attr.attr,
361 &dev_attr_legacy_ch4_ce_count.attr.attr,
362 &dev_attr_legacy_ch5_ce_count.attr.attr,
363 NULL
364};
365
366static umode_t csrow_dev_is_visible(struct kobject *kobj,
367 struct attribute *attr, int idx)
368{
369 struct device *dev = kobj_to_dev(kobj);
370 struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
371
372 if (idx >= csrow->nr_channels)
373 return 0;
374 /* Only expose populated DIMMs */
375 if (!csrow->channels[idx]->dimm->nr_pages)
376 return 0;
377 return attr->mode;
378}
379
380
381static const struct attribute_group csrow_dev_dimm_group = {
382 .attrs = dynamic_csrow_dimm_attr,
383 .is_visible = csrow_dev_is_visible,
384};
385
386static const struct attribute_group csrow_dev_ce_count_group = {
387 .attrs = dynamic_csrow_ce_count_attr,
388 .is_visible = csrow_dev_is_visible,
389};
390
391static const struct attribute_group *csrow_dev_groups[] = {
392 &csrow_dev_dimm_group,
393 &csrow_dev_ce_count_group,
394 NULL
7c9281d7
DT
395};
396
e39f4ea9
MCC
397static inline int nr_pages_per_csrow(struct csrow_info *csrow)
398{
399 int chan, nr_pages = 0;
400
401 for (chan = 0; chan < csrow->nr_channels; chan++)
de3910eb 402 nr_pages += csrow->channels[chan]->dimm->nr_pages;
e39f4ea9
MCC
403
404 return nr_pages;
405}
406
7a623c03
MCC
407/* Create a CSROW object under specifed edac_mc_device */
408static int edac_create_csrow_object(struct mem_ctl_info *mci,
409 struct csrow_info *csrow, int index)
7c9281d7 410{
7a623c03 411 csrow->dev.type = &csrow_attr_type;
88d84ac9 412 csrow->dev.bus = mci->bus;
2c1946b6 413 csrow->dev.groups = csrow_dev_groups;
7a623c03
MCC
414 device_initialize(&csrow->dev);
415 csrow->dev.parent = &mci->dev;
921a6899 416 csrow->mci = mci;
7a623c03
MCC
417 dev_set_name(&csrow->dev, "csrow%d", index);
418 dev_set_drvdata(&csrow->dev, csrow);
7c9281d7 419
956b9ba1
JP
420 edac_dbg(0, "creating (virtual) csrow node %s\n",
421 dev_name(&csrow->dev));
7c9281d7 422
2c1946b6 423 return device_add(&csrow->dev);
7a623c03 424}
7c9281d7
DT
425
426/* Create a CSROW object under specifed edac_mc_device */
7a623c03 427static int edac_create_csrow_objects(struct mem_ctl_info *mci)
7c9281d7 428{
2c1946b6 429 int err, i;
7a623c03 430 struct csrow_info *csrow;
7c9281d7 431
7a623c03 432 for (i = 0; i < mci->nr_csrows; i++) {
de3910eb 433 csrow = mci->csrows[i];
e39f4ea9
MCC
434 if (!nr_pages_per_csrow(csrow))
435 continue;
de3910eb 436 err = edac_create_csrow_object(mci, mci->csrows[i], i);
3d958823
MCC
437 if (err < 0) {
438 edac_dbg(1,
439 "failure: create csrow objects for csrow %d\n",
440 i);
7a623c03 441 goto error;
3d958823 442 }
7a623c03
MCC
443 }
444 return 0;
8096cfaf 445
7a623c03
MCC
446error:
447 for (--i; i >= 0; i--) {
de3910eb 448 csrow = mci->csrows[i];
e39f4ea9
MCC
449 if (!nr_pages_per_csrow(csrow))
450 continue;
de3910eb 451 put_device(&mci->csrows[i]->dev);
8096cfaf 452 }
7c9281d7 453
7a623c03
MCC
454 return err;
455}
8096cfaf 456
7a623c03
MCC
457static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
458{
2c1946b6 459 int i;
7a623c03 460 struct csrow_info *csrow;
8096cfaf 461
7a623c03 462 for (i = mci->nr_csrows - 1; i >= 0; i--) {
de3910eb 463 csrow = mci->csrows[i];
e39f4ea9
MCC
464 if (!nr_pages_per_csrow(csrow))
465 continue;
44d22e24 466 device_unregister(&mci->csrows[i]->dev);
7c9281d7 467 }
7c9281d7 468}
19974710
MCC
469#endif
470
471/*
472 * Per-dimm (or per-rank) devices
473 */
474
475#define to_dimm(k) container_of(k, struct dimm_info, dev)
476
477/* show/store functions for DIMM Label attributes */
478static ssize_t dimmdev_location_show(struct device *dev,
479 struct device_attribute *mattr, char *data)
480{
481 struct dimm_info *dimm = to_dimm(dev);
19974710 482
6e84d359 483 return edac_dimm_info_location(dimm, data, PAGE_SIZE);
19974710
MCC
484}
485
486static ssize_t dimmdev_label_show(struct device *dev,
487 struct device_attribute *mattr, char *data)
488{
489 struct dimm_info *dimm = to_dimm(dev);
490
491 /* if field has not been initialized, there is nothing to send */
492 if (!dimm->label[0])
493 return 0;
494
1ea62c59 495 return snprintf(data, sizeof(dimm->label) + 1, "%s\n", dimm->label);
19974710
MCC
496}
497
498static ssize_t dimmdev_label_store(struct device *dev,
499 struct device_attribute *mattr,
500 const char *data,
501 size_t count)
502{
503 struct dimm_info *dimm = to_dimm(dev);
438470b8 504 size_t copy_count = count;
19974710 505
438470b8
TK
506 if (count == 0)
507 return -EINVAL;
508
509 if (data[count - 1] == '\0' || data[count - 1] == '\n')
510 copy_count -= 1;
511
d0c9c930 512 if (copy_count == 0 || copy_count >= sizeof(dimm->label))
438470b8 513 return -EINVAL;
19974710 514
438470b8
TK
515 strncpy(dimm->label, data, copy_count);
516 dimm->label[copy_count] = '\0';
19974710 517
438470b8 518 return count;
19974710
MCC
519}
520
521static ssize_t dimmdev_size_show(struct device *dev,
522 struct device_attribute *mattr, char *data)
523{
524 struct dimm_info *dimm = to_dimm(dev);
525
526 return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
527}
528
529static ssize_t dimmdev_mem_type_show(struct device *dev,
530 struct device_attribute *mattr, char *data)
531{
532 struct dimm_info *dimm = to_dimm(dev);
533
534 return sprintf(data, "%s\n", mem_types[dimm->mtype]);
535}
536
537static ssize_t dimmdev_dev_type_show(struct device *dev,
538 struct device_attribute *mattr, char *data)
539{
540 struct dimm_info *dimm = to_dimm(dev);
541
542 return sprintf(data, "%s\n", dev_types[dimm->dtype]);
543}
544
545static ssize_t dimmdev_edac_mode_show(struct device *dev,
546 struct device_attribute *mattr,
547 char *data)
548{
549 struct dimm_info *dimm = to_dimm(dev);
550
551 return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
552}
553
554/* dimm/rank attribute files */
555static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
556 dimmdev_label_show, dimmdev_label_store);
557static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
558static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
559static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
560static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
561static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
562
563/* attributes of the dimm<id>/rank<id> object */
564static struct attribute *dimm_attrs[] = {
565 &dev_attr_dimm_label.attr,
566 &dev_attr_dimm_location.attr,
567 &dev_attr_size.attr,
568 &dev_attr_dimm_mem_type.attr,
569 &dev_attr_dimm_dev_type.attr,
570 &dev_attr_dimm_edac_mode.attr,
571 NULL,
572};
573
574static struct attribute_group dimm_attr_grp = {
575 .attrs = dimm_attrs,
576};
577
578static const struct attribute_group *dimm_attr_groups[] = {
579 &dimm_attr_grp,
580 NULL
581};
582
de3910eb 583static void dimm_attr_release(struct device *dev)
19974710 584{
de3910eb
MCC
585 struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
586
956b9ba1 587 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev));
de3910eb 588 kfree(dimm);
19974710
MCC
589}
590
591static struct device_type dimm_attr_type = {
592 .groups = dimm_attr_groups,
593 .release = dimm_attr_release,
594};
595
596/* Create a DIMM object under specifed memory controller device */
597static int edac_create_dimm_object(struct mem_ctl_info *mci,
598 struct dimm_info *dimm,
599 int index)
600{
601 int err;
602 dimm->mci = mci;
603
604 dimm->dev.type = &dimm_attr_type;
88d84ac9 605 dimm->dev.bus = mci->bus;
19974710
MCC
606 device_initialize(&dimm->dev);
607
608 dimm->dev.parent = &mci->dev;
9713faec 609 if (mci->csbased)
19974710
MCC
610 dev_set_name(&dimm->dev, "rank%d", index);
611 else
612 dev_set_name(&dimm->dev, "dimm%d", index);
613 dev_set_drvdata(&dimm->dev, dimm);
614 pm_runtime_forbid(&mci->dev);
615
616 err = device_add(&dimm->dev);
617
956b9ba1 618 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev));
19974710
MCC
619
620 return err;
621}
7c9281d7 622
7a623c03
MCC
623/*
624 * Memory controller device
625 */
626
627#define to_mci(k) container_of(k, struct mem_ctl_info, dev)
7c9281d7 628
7a623c03
MCC
629static ssize_t mci_reset_counters_store(struct device *dev,
630 struct device_attribute *mattr,
079708b9 631 const char *data, size_t count)
7c9281d7 632{
7a623c03
MCC
633 struct mem_ctl_info *mci = to_mci(dev);
634 int cnt, row, chan, i;
5926ff50
MCC
635 mci->ue_mc = 0;
636 mci->ce_mc = 0;
7a623c03
MCC
637 mci->ue_noinfo_count = 0;
638 mci->ce_noinfo_count = 0;
7c9281d7
DT
639
640 for (row = 0; row < mci->nr_csrows; row++) {
de3910eb 641 struct csrow_info *ri = mci->csrows[row];
7c9281d7
DT
642
643 ri->ue_count = 0;
644 ri->ce_count = 0;
645
646 for (chan = 0; chan < ri->nr_channels; chan++)
de3910eb 647 ri->channels[chan]->ce_count = 0;
7c9281d7
DT
648 }
649
7a623c03
MCC
650 cnt = 1;
651 for (i = 0; i < mci->n_layers; i++) {
652 cnt *= mci->layers[i].size;
653 memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
654 memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
655 }
656
7c9281d7
DT
657 mci->start_time = jiffies;
658 return count;
659}
660
39094443
BP
661/* Memory scrubbing interface:
662 *
663 * A MC driver can limit the scrubbing bandwidth based on the CPU type.
664 * Therefore, ->set_sdram_scrub_rate should be made to return the actual
665 * bandwidth that is accepted or 0 when scrubbing is to be disabled.
666 *
667 * Negative value still means that an error has occurred while setting
668 * the scrub rate.
669 */
7a623c03
MCC
670static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
671 struct device_attribute *mattr,
eba042a8 672 const char *data, size_t count)
7c9281d7 673{
7a623c03 674 struct mem_ctl_info *mci = to_mci(dev);
eba042a8 675 unsigned long bandwidth = 0;
39094443 676 int new_bw = 0;
7c9281d7 677
c7f62fc8 678 if (kstrtoul(data, 10, &bandwidth) < 0)
eba042a8 679 return -EINVAL;
7c9281d7 680
39094443 681 new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
4949603a
MT
682 if (new_bw < 0) {
683 edac_printk(KERN_WARNING, EDAC_MC,
684 "Error setting scrub rate to: %lu\n", bandwidth);
685 return -EINVAL;
7c9281d7 686 }
39094443 687
4949603a 688 return count;
7c9281d7
DT
689}
690
39094443
BP
691/*
692 * ->get_sdram_scrub_rate() return value semantics same as above.
693 */
7a623c03
MCC
694static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
695 struct device_attribute *mattr,
696 char *data)
7c9281d7 697{
7a623c03 698 struct mem_ctl_info *mci = to_mci(dev);
39094443 699 int bandwidth = 0;
eba042a8 700
39094443
BP
701 bandwidth = mci->get_sdram_scrub_rate(mci);
702 if (bandwidth < 0) {
eba042a8 703 edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
39094443 704 return bandwidth;
7c9281d7 705 }
39094443 706
39094443 707 return sprintf(data, "%d\n", bandwidth);
7c9281d7
DT
708}
709
710/* default attribute files for the MCI object */
7a623c03
MCC
711static ssize_t mci_ue_count_show(struct device *dev,
712 struct device_attribute *mattr,
713 char *data)
7c9281d7 714{
7a623c03
MCC
715 struct mem_ctl_info *mci = to_mci(dev);
716
5926ff50 717 return sprintf(data, "%d\n", mci->ue_mc);
7c9281d7
DT
718}
719
7a623c03
MCC
720static ssize_t mci_ce_count_show(struct device *dev,
721 struct device_attribute *mattr,
722 char *data)
7c9281d7 723{
7a623c03
MCC
724 struct mem_ctl_info *mci = to_mci(dev);
725
5926ff50 726 return sprintf(data, "%d\n", mci->ce_mc);
7c9281d7
DT
727}
728
7a623c03
MCC
729static ssize_t mci_ce_noinfo_show(struct device *dev,
730 struct device_attribute *mattr,
731 char *data)
7c9281d7 732{
7a623c03
MCC
733 struct mem_ctl_info *mci = to_mci(dev);
734
079708b9 735 return sprintf(data, "%d\n", mci->ce_noinfo_count);
7c9281d7
DT
736}
737
7a623c03
MCC
738static ssize_t mci_ue_noinfo_show(struct device *dev,
739 struct device_attribute *mattr,
740 char *data)
7c9281d7 741{
7a623c03
MCC
742 struct mem_ctl_info *mci = to_mci(dev);
743
079708b9 744 return sprintf(data, "%d\n", mci->ue_noinfo_count);
7c9281d7
DT
745}
746
7a623c03
MCC
747static ssize_t mci_seconds_show(struct device *dev,
748 struct device_attribute *mattr,
749 char *data)
7c9281d7 750{
7a623c03
MCC
751 struct mem_ctl_info *mci = to_mci(dev);
752
079708b9 753 return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
7c9281d7
DT
754}
755
7a623c03
MCC
756static ssize_t mci_ctl_name_show(struct device *dev,
757 struct device_attribute *mattr,
758 char *data)
7c9281d7 759{
7a623c03
MCC
760 struct mem_ctl_info *mci = to_mci(dev);
761
079708b9 762 return sprintf(data, "%s\n", mci->ctl_name);
7c9281d7
DT
763}
764
7a623c03
MCC
765static ssize_t mci_size_mb_show(struct device *dev,
766 struct device_attribute *mattr,
767 char *data)
7c9281d7 768{
7a623c03 769 struct mem_ctl_info *mci = to_mci(dev);
a895bf8b 770 int total_pages = 0, csrow_idx, j;
7c9281d7 771
a895bf8b 772 for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
de3910eb 773 struct csrow_info *csrow = mci->csrows[csrow_idx];
7c9281d7 774
1eef1282
MCC
775 for (j = 0; j < csrow->nr_channels; j++) {
776 struct dimm_info *dimm = csrow->channels[j]->dimm;
3c062276 777
1eef1282 778 total_pages += dimm->nr_pages;
a895bf8b 779 }
7c9281d7
DT
780 }
781
079708b9 782 return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
7c9281d7
DT
783}
784
8ad6c78a
MCC
785static ssize_t mci_max_location_show(struct device *dev,
786 struct device_attribute *mattr,
787 char *data)
788{
789 struct mem_ctl_info *mci = to_mci(dev);
790 int i;
791 char *p = data;
792
793 for (i = 0; i < mci->n_layers; i++) {
794 p += sprintf(p, "%s %d ",
795 edac_layer_name[mci->layers[i].type],
796 mci->layers[i].size - 1);
797 }
798
799 return p - data;
800}
801
7c9281d7 802/* default Control file */
f11135d8 803static DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
7c9281d7
DT
804
805/* default Attribute files */
f11135d8
BP
806static DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
807static DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
808static DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
809static DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
810static DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
811static DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
812static DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
813static DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
7c9281d7
DT
814
815/* memory scrubber attribute file */
2c1946b6
TI
816DEVICE_ATTR(sdram_scrub_rate, 0, mci_sdram_scrub_rate_show,
817 mci_sdram_scrub_rate_store); /* umode set later in is_visible */
7c9281d7 818
7a623c03
MCC
819static struct attribute *mci_attrs[] = {
820 &dev_attr_reset_counters.attr,
821 &dev_attr_mc_name.attr,
822 &dev_attr_size_mb.attr,
823 &dev_attr_seconds_since_reset.attr,
824 &dev_attr_ue_noinfo_count.attr,
825 &dev_attr_ce_noinfo_count.attr,
826 &dev_attr_ue_count.attr,
827 &dev_attr_ce_count.attr,
8ad6c78a 828 &dev_attr_max_location.attr,
2c1946b6 829 &dev_attr_sdram_scrub_rate.attr,
7c9281d7
DT
830 NULL
831};
832
2c1946b6
TI
833static umode_t mci_attr_is_visible(struct kobject *kobj,
834 struct attribute *attr, int idx)
835{
836 struct device *dev = kobj_to_dev(kobj);
837 struct mem_ctl_info *mci = to_mci(dev);
838 umode_t mode = 0;
839
840 if (attr != &dev_attr_sdram_scrub_rate.attr)
841 return attr->mode;
842 if (mci->get_sdram_scrub_rate)
843 mode |= S_IRUGO;
844 if (mci->set_sdram_scrub_rate)
845 mode |= S_IWUSR;
846 return mode;
847}
848
7a623c03
MCC
849static struct attribute_group mci_attr_grp = {
850 .attrs = mci_attrs,
2c1946b6 851 .is_visible = mci_attr_is_visible,
cc301b3a
MCC
852};
853
7a623c03
MCC
854static const struct attribute_group *mci_attr_groups[] = {
855 &mci_attr_grp,
856 NULL
cc301b3a
MCC
857};
858
de3910eb 859static void mci_attr_release(struct device *dev)
42a8e397 860{
de3910eb
MCC
861 struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
862
956b9ba1 863 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev));
de3910eb 864 kfree(mci);
42a8e397
DT
865}
866
7a623c03
MCC
867static struct device_type mci_attr_type = {
868 .groups = mci_attr_groups,
869 .release = mci_attr_release,
870};
8096cfaf 871
7c9281d7
DT
872/*
873 * Create a new Memory Controller kobject instance,
874 * mc<id> under the 'mc' directory
875 *
876 * Return:
877 * 0 Success
878 * !0 Failure
879 */
4e8d230d
TI
880int edac_create_sysfs_mci_device(struct mem_ctl_info *mci,
881 const struct attribute_group **groups)
7c9281d7 882{
12e26969 883 char *name;
7a623c03 884 int i, err;
7c9281d7 885
de3910eb
MCC
886 /*
887 * The memory controller needs its own bus, in order to avoid
888 * namespace conflicts at /sys/bus/edac.
889 */
12e26969
BP
890 name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
891 if (!name)
de3910eb 892 return -ENOMEM;
88d84ac9 893
12e26969
BP
894 mci->bus->name = name;
895
88d84ac9
BP
896 edac_dbg(0, "creating bus %s\n", mci->bus->name);
897
898 err = bus_register(mci->bus);
12e26969
BP
899 if (err < 0) {
900 kfree(name);
901 return err;
902 }
7c9281d7 903
7a623c03 904 /* get the /sys/devices/system/edac subsys reference */
7a623c03
MCC
905 mci->dev.type = &mci_attr_type;
906 device_initialize(&mci->dev);
7c9281d7 907
de3910eb 908 mci->dev.parent = mci_pdev;
88d84ac9 909 mci->dev.bus = mci->bus;
4e8d230d 910 mci->dev.groups = groups;
7a623c03
MCC
911 dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
912 dev_set_drvdata(&mci->dev, mci);
913 pm_runtime_forbid(&mci->dev);
914
956b9ba1 915 edac_dbg(0, "creating device %s\n", dev_name(&mci->dev));
7a623c03
MCC
916 err = device_add(&mci->dev);
917 if (err < 0) {
3d958823 918 edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev));
1bf1950c 919 goto fail_unregister_bus;
42a8e397
DT
920 }
921
7a623c03
MCC
922 /*
923 * Create the dimm/rank devices
7c9281d7 924 */
7a623c03 925 for (i = 0; i < mci->tot_dimms; i++) {
de3910eb 926 struct dimm_info *dimm = mci->dimms[i];
7a623c03 927 /* Only expose populated DIMMs */
1bf1950c 928 if (!dimm->nr_pages)
7a623c03 929 continue;
1bf1950c 930
7a623c03 931#ifdef CONFIG_EDAC_DEBUG
956b9ba1 932 edac_dbg(1, "creating dimm%d, located at ", i);
7a623c03
MCC
933 if (edac_debug_level >= 1) {
934 int lay;
935 for (lay = 0; lay < mci->n_layers; lay++)
936 printk(KERN_CONT "%s %d ",
937 edac_layer_name[mci->layers[lay].type],
938 dimm->location[lay]);
939 printk(KERN_CONT "\n");
7c9281d7 940 }
7a623c03 941#endif
19974710
MCC
942 err = edac_create_dimm_object(mci, dimm, i);
943 if (err) {
956b9ba1 944 edac_dbg(1, "failure: create dimm %d obj\n", i);
1bf1950c 945 goto fail_unregister_dimm;
19974710 946 }
7c9281d7
DT
947 }
948
19974710 949#ifdef CONFIG_EDAC_LEGACY_SYSFS
7a623c03
MCC
950 err = edac_create_csrow_objects(mci);
951 if (err < 0)
1bf1950c 952 goto fail_unregister_dimm;
19974710 953#endif
7a623c03 954
7ac8bf9b 955 edac_create_debugfs_nodes(mci);
7c9281d7
DT
956 return 0;
957
1bf1950c 958fail_unregister_dimm:
079708b9 959 for (i--; i >= 0; i--) {
de3910eb 960 struct dimm_info *dimm = mci->dimms[i];
1bf1950c 961 if (!dimm->nr_pages)
7a623c03 962 continue;
1bf1950c 963
44d22e24 964 device_unregister(&dimm->dev);
7c9281d7 965 }
44d22e24 966 device_unregister(&mci->dev);
1bf1950c 967fail_unregister_bus:
88d84ac9 968 bus_unregister(mci->bus);
12e26969
BP
969 kfree(name);
970
7c9281d7
DT
971 return err;
972}
973
974/*
975 * remove a Memory Controller instance
976 */
977void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
978{
7a623c03 979 int i;
7c9281d7 980
956b9ba1 981 edac_dbg(0, "\n");
7c9281d7 982
452a6bf9 983#ifdef CONFIG_EDAC_DEBUG
30f84a89 984 edac_debugfs_remove_recursive(mci->debugfs);
452a6bf9 985#endif
19974710 986#ifdef CONFIG_EDAC_LEGACY_SYSFS
7a623c03 987 edac_delete_csrow_objects(mci);
19974710 988#endif
7c9281d7 989
7a623c03 990 for (i = 0; i < mci->tot_dimms; i++) {
de3910eb 991 struct dimm_info *dimm = mci->dimms[i];
7a623c03
MCC
992 if (dimm->nr_pages == 0)
993 continue;
956b9ba1 994 edac_dbg(0, "removing device %s\n", dev_name(&dimm->dev));
44d22e24 995 device_unregister(&dimm->dev);
6fe1108f 996 }
7c9281d7 997}
8096cfaf 998
7a623c03
MCC
999void edac_unregister_sysfs(struct mem_ctl_info *mci)
1000{
ab67b6c2 1001 struct bus_type *bus = mci->bus;
12e26969
BP
1002 const char *name = mci->bus->name;
1003
956b9ba1 1004 edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
44d22e24 1005 device_unregister(&mci->dev);
ab67b6c2 1006 bus_unregister(bus);
12e26969 1007 kfree(name);
7a623c03 1008}
8096cfaf 1009
de3910eb 1010static void mc_attr_release(struct device *dev)
7a623c03 1011{
de3910eb
MCC
1012 /*
1013 * There's no container structure here, as this is just the mci
1014 * parent device, used to create the /sys/devices/mc sysfs node.
1015 * So, there are no attributes on it.
1016 */
956b9ba1 1017 edac_dbg(1, "Releasing device %s\n", dev_name(dev));
de3910eb 1018 kfree(dev);
7a623c03 1019}
8096cfaf 1020
7a623c03
MCC
1021static struct device_type mc_attr_type = {
1022 .release = mc_attr_release,
1023};
8096cfaf 1024/*
7a623c03 1025 * Init/exit code for the module. Basically, creates/removes /sys/class/rc
8096cfaf 1026 */
7a623c03 1027int __init edac_mc_sysfs_init(void)
8096cfaf 1028{
7a623c03 1029 int err;
8096cfaf 1030
de3910eb 1031 mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
2d56b109
DK
1032 if (!mci_pdev) {
1033 err = -ENOMEM;
733476cf 1034 goto out;
2d56b109 1035 }
de3910eb 1036
d4538000 1037 mci_pdev->bus = edac_get_sysfs_subsys();
de3910eb
MCC
1038 mci_pdev->type = &mc_attr_type;
1039 device_initialize(mci_pdev);
1040 dev_set_name(mci_pdev, "mc");
8096cfaf 1041
de3910eb 1042 err = device_add(mci_pdev);
7a623c03 1043 if (err < 0)
2d56b109 1044 goto out_dev_free;
8096cfaf 1045
956b9ba1 1046 edac_dbg(0, "device %s created\n", dev_name(mci_pdev));
de3910eb 1047
8096cfaf 1048 return 0;
2d56b109
DK
1049
1050 out_dev_free:
1051 kfree(mci_pdev);
2d56b109
DK
1052 out:
1053 return err;
8096cfaf
DT
1054}
1055
c6b97bcf 1056void edac_mc_sysfs_exit(void)
8096cfaf 1057{
44d22e24 1058 device_unregister(mci_pdev);
8096cfaf 1059}