[linux-2.6-block.git] / drivers / dma / Kconfig

#
# DMA engine configuration
#

menuconfig DMADEVICES
	bool "DMA Engine support"
	depends on HAS_DMA
	help
	  DMA engines can do asynchronous data transfers without
	  involving the host CPU.  Currently, this framework can be
	  used to offload memory copies in the network stack and
	  RAID operations in the MD driver.  This menu only presents
	  DMA Device drivers supported by the configured arch, it may
	  be empty in some cases.

config DMADEVICES_DEBUG
        bool "DMA Engine debugging"
        depends on DMADEVICES != n
        help
          This is an option for use by developers; most people should
          say N here.  This enables DMA engine core and driver debugging.

config DMADEVICES_VDEBUG
        bool "DMA Engine verbose debugging"
        depends on DMADEVICES_DEBUG != n
        help
          This is an option for use by developers; most people should
          say N here.  This enables deeper (more verbose) debugging of
          the DMA engine core and drivers.


if DMADEVICES

comment "DMA Devices"

config INTEL_MID_DMAC
	tristate "Intel MID DMA support for Peripheral DMA controllers"
	depends on PCI && X86
	select DMA_ENGINE
	default n
	help
	  Enable support for the Intel(R) MID DMA engine present
	  in Intel MID chipsets.

	  Say Y here if you have such a chipset.

	  If unsure, say N.

config ASYNC_TX_DISABLE_CHANNEL_SWITCH
	bool

config AMBA_PL08X
	bool "ARM PrimeCell PL080 or PL081 support"
	depends on ARM_AMBA && EXPERIMENTAL
	select DMA_ENGINE
	help
	  Platform has a PL08x DMAC device
	  which can provide DMA engine support

config INTEL_IOATDMA
	tristate "Intel I/OAT DMA support"
	depends on PCI && X86
	select DMA_ENGINE
	select DCA
	select ASYNC_TX_DISABLE_CHANNEL_SWITCH
	select ASYNC_TX_DISABLE_PQ_VAL_DMA
	select ASYNC_TX_DISABLE_XOR_VAL_DMA
	help
	  Enable support for the Intel(R) I/OAT DMA engine present
	  in recent Intel Xeon chipsets.

	  Say Y here if you have such a chipset.

	  If unsure, say N.

config INTEL_IOP_ADMA
	tristate "Intel IOP ADMA support"
	depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
	select DMA_ENGINE
	help
	  Enable support for the Intel(R) IOP Series RAID engines.

config DW_DMAC
	tristate "Synopsys DesignWare AHB DMA support"
	depends on AVR32
	select DMA_ENGINE
	default y if CPU_AT32AP7000
	help
	  Support the Synopsys DesignWare AHB DMA controller.  This
	  can be integrated in chips such as the Atmel AT32ap7000.

config AT_HDMAC
	tristate "Atmel AHB DMA support"
	depends on ARCH_AT91SAM9RL || ARCH_AT91SAM9G45
	select DMA_ENGINE
	help
	  Support the Atmel AHB DMA controller.  This can be integrated in
	  chips such as the Atmel AT91SAM9RL.

config FSL_DMA
	tristate "Freescale Elo and Elo Plus DMA support"
	depends on FSL_SOC
	select DMA_ENGINE
	---help---
	  Enable support for the Freescale Elo and Elo Plus DMA controllers.
	  The Elo is the DMA controller on some 82xx and 83xx parts, and the
	  Elo Plus is the DMA controller on 85xx and 86xx parts.

config MPC512X_DMA
	tristate "Freescale MPC512x built-in DMA engine support"
	depends on PPC_MPC512x
	select DMA_ENGINE
	---help---
	  Enable support for the Freescale MPC512x built-in DMA engine.

config MV_XOR
	bool "Marvell XOR engine support"
	depends on PLAT_ORION
	select DMA_ENGINE
	---help---
	  Enable support for the Marvell XOR engine.

config MX3_IPU
	bool "MX3x Image Processing Unit support"
	depends on ARCH_MX3
	select DMA_ENGINE
	default y
	help
	  If you plan to use the Image Processing unit in the i.MX3x, say
	  Y here. If unsure, select Y.

config MX3_IPU_IRQS
	int "Number of dynamically mapped interrupts for IPU"
	depends on MX3_IPU
	range 2 137
	default 4
	help
	  Out of 137 interrupt sources on i.MX31 IPU only very few are used.
	  To avoid bloating the irq_desc[] array we allocate a sufficient
	  number of IRQ slots and map them dynamically to specific sources.

config TXX9_DMAC
	tristate "Toshiba TXx9 SoC DMA support"
	depends on MACH_TX49XX || MACH_TX39XX
	select DMA_ENGINE
	help
	  Support the TXx9 SoC internal DMA controller.  This can be
	  integrated in chips such as the Toshiba TX4927/38/39.

config SH_DMAE
	tristate "Renesas SuperH DMAC support"
	depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
	depends on !SH_DMA_API
	select DMA_ENGINE
	help
	  Enable support for the Renesas SuperH DMA controllers.

config COH901318
	bool "ST-Ericsson COH901318 DMA support"
	select DMA_ENGINE
	depends on ARCH_U300
	help
	  Enable support for ST-Ericsson COH 901 318 DMA.

config STE_DMA40
	bool "ST-Ericsson DMA40 support"
	depends on ARCH_U8500
	select DMA_ENGINE
	help
	  Support for ST-Ericsson DMA40 controller

config AMCC_PPC440SPE_ADMA
	tristate "AMCC PPC440SPe ADMA support"
	depends on 440SPe || 440SP
	select DMA_ENGINE
	select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
	help
	  Enable support for the AMCC PPC440SPe RAID engines.

config TIMB_DMA
	tristate "Timberdale FPGA DMA support"
	depends on MFD_TIMBERDALE || HAS_IOMEM
	select DMA_ENGINE
	help
	  Enable support for the Timberdale FPGA DMA engine.

config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
	bool

config PL330_DMA
	tristate "DMA API Driver for PL330"
	select DMA_ENGINE
	depends on PL330
	help
	  Select if your platform has one or more PL330 DMACs.
	  You need to provide platform specific settings via
	  platform_data for a dma-pl330 device.

config PCH_DMA
	tristate "Topcliff PCH DMA support"
	depends on PCI && X86
	select DMA_ENGINE
	help
	  Enable support for the Topcliff PCH DMA engine.

config IMX_SDMA
	tristate "i.MX SDMA support"
	depends on ARCH_MX25 || ARCH_MX3 || ARCH_MX5
	select DMA_ENGINE
	help
	  Support the i.MX SDMA engine. This engine is integrated into
	  Freescale i.MX25/31/35/51 chips.

config IMX_DMA
	tristate "i.MX DMA support"
	depends on ARCH_MX1 || ARCH_MX21 || MACH_MX27
	select DMA_ENGINE
	help
	  Support the i.MX DMA engine. This engine is integrated into
	  Freescale i.MX1/21/27 chips.

config DMA_ENGINE
	bool

comment "DMA Clients"
	depends on DMA_ENGINE

config NET_DMA
	bool "Network: TCP receive copy offload"
	depends on DMA_ENGINE && NET
	default (INTEL_IOATDMA || FSL_DMA)
	help
	  This enables the use of DMA engines in the network stack to
	  offload receive copy-to-user operations, freeing CPU cycles.

	  Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
	  say N.

config ASYNC_TX_DMA
	bool "Async_tx: Offload support for the async_tx api"
	depends on DMA_ENGINE
	help
	  This allows the async_tx api to take advantage of offload engines for
	  memcpy, memset, xor, and raid6 p+q operations.  If your platform has
	  a dma engine that can perform raid operations and you have enabled
	  MD_RAID456 say Y.

	  If unsure, say N.

config DMATEST
	tristate "DMA Test client"
	depends on DMA_ENGINE
	help
	  Simple DMA test client. Say N unless you're debugging a
	  DMA Device driver.

endif
Commit	Line	Data
c13c8260 CL	1	#
	2	# DMA engine configuration
	3	#
	4
2ed6dc34	5	menuconfig DMADEVICES
6d4f5879	6	bool "DMA Engine support"
04ce9ab3	7	depends on HAS_DMA
2ed6dc34	8	help
6d4f5879 HS	9	DMA engines can do asynchronous data transfers without
	10	involving the host CPU. Currently, this framework can be
	11	used to offload memory copies in the network stack and
9c402f4e DW	12	RAID operations in the MD driver. This menu only presents
	13	DMA Device drivers supported by the configured arch, it may
	14	be empty in some cases.
2ed6dc34	15
6c664a89 LW	16	config DMADEVICES_DEBUG
	17	bool "DMA Engine debugging"
	18	depends on DMADEVICES != n
	19	help
	20	This is an option for use by developers; most people should
	21	say N here. This enables DMA engine core and driver debugging.
	22
	23	config DMADEVICES_VDEBUG
	24	bool "DMA Engine verbose debugging"
	25	depends on DMADEVICES_DEBUG != n
	26	help
	27	This is an option for use by developers; most people should
	28	say N here. This enables deeper (more verbose) debugging of
	29	the DMA engine core and drivers.
	30
	31
2ed6dc34 SN	32	if DMADEVICES
	33
	34	comment "DMA Devices"
	35
b3c567e4 VK	36	config INTEL_MID_DMAC
	37	tristate "Intel MID DMA support for Peripheral DMA controllers"
	38	depends on PCI && X86
	39	select DMA_ENGINE
	40	default n
	41	help
	42	Enable support for the Intel(R) MID DMA engine present
	43	in Intel MID chipsets.
	44
	45	Say Y here if you have such a chipset.
	46
	47	If unsure, say N.
	48
138f4c35 DW	49	config ASYNC_TX_DISABLE_CHANNEL_SWITCH
	50	bool
	51
e8689e63 LW	52	config AMBA_PL08X
	53	bool "ARM PrimeCell PL080 or PL081 support"
	54	depends on ARM_AMBA && EXPERIMENTAL
	55	select DMA_ENGINE
	56	help
	57	Platform has a PL08x DMAC device
	58	which can provide DMA engine support
	59
2ed6dc34 SN	60	config INTEL_IOATDMA
	61	tristate "Intel I/OAT DMA support"
	62	depends on PCI && X86
	63	select DMA_ENGINE
	64	select DCA
138f4c35	65	select ASYNC_TX_DISABLE_CHANNEL_SWITCH
7b3cc2b1 DW	66	select ASYNC_TX_DISABLE_PQ_VAL_DMA
7b3cc2b1 DW	67	select ASYNC_TX_DISABLE_XOR_VAL_DMA
2ed6dc34 SN	68	help
	69	Enable support for the Intel(R) I/OAT DMA engine present
	70	in recent Intel Xeon chipsets.
	71
	72	Say Y here if you have such a chipset.
	73
	74	If unsure, say N.
	75
	76	config INTEL_IOP_ADMA
	77	tristate "Intel IOP ADMA support"
	78	depends on ARCH_IOP32X \|\| ARCH_IOP33X \|\| ARCH_IOP13XX
2ed6dc34 SN	79	select DMA_ENGINE
	80	help
	81	Enable support for the Intel(R) IOP Series RAID engines.
c13c8260	82
3bfb1d20 HS	83	config DW_DMAC
	84	tristate "Synopsys DesignWare AHB DMA support"
	85	depends on AVR32
	86	select DMA_ENGINE
	87	default y if CPU_AT32AP7000
	88	help
	89	Support the Synopsys DesignWare AHB DMA controller. This
	90	can be integrated in chips such as the Atmel AT32ap7000.
	91
dc78baa2 NF	92	config AT_HDMAC
dc78baa2 NF	93	tristate "Atmel AHB DMA support"
cd3abf98	94	depends on ARCH_AT91SAM9RL \|\| ARCH_AT91SAM9G45
dc78baa2 NF	95	select DMA_ENGINE
	96	help
	97	Support the Atmel AHB DMA controller. This can be integrated in
	98	chips such as the Atmel AT91SAM9RL.
	99
173acc7c	100	config FSL_DMA
77cd62e8 TT	101	tristate "Freescale Elo and Elo Plus DMA support"
77cd62e8 TT	102	depends on FSL_SOC
173acc7c ZW	103	select DMA_ENGINE
173acc7c ZW	104	---help---
77cd62e8 TT	105	Enable support for the Freescale Elo and Elo Plus DMA controllers.
	106	The Elo is the DMA controller on some 82xx and 83xx parts, and the
	107	Elo Plus is the DMA controller on 85xx and 86xx parts.
173acc7c	108
0fb6f739 PZ	109	config MPC512X_DMA
	110	tristate "Freescale MPC512x built-in DMA engine support"
	111	depends on PPC_MPC512x
	112	select DMA_ENGINE
	113	---help---
	114	Enable support for the Freescale MPC512x built-in DMA engine.
	115
ff7b0479 SB	116	config MV_XOR
	117	bool "Marvell XOR engine support"
	118	depends on PLAT_ORION
ff7b0479 SB	119	select DMA_ENGINE
	120	---help---
	121	Enable support for the Marvell XOR engine.
	122
5296b56d GL	123	config MX3_IPU
	124	bool "MX3x Image Processing Unit support"
	125	depends on ARCH_MX3
	126	select DMA_ENGINE
	127	default y
	128	help
	129	If you plan to use the Image Processing unit in the i.MX3x, say
	130	Y here. If unsure, select Y.
	131
	132	config MX3_IPU_IRQS
	133	int "Number of dynamically mapped interrupts for IPU"
	134	depends on MX3_IPU
	135	range 2 137
	136	default 4
	137	help
	138	Out of 137 interrupt sources on i.MX31 IPU only very few are used.
	139	To avoid bloating the irq_desc[] array we allocate a sufficient
	140	number of IRQ slots and map them dynamically to specific sources.
	141
ea76f0b3 AN	142	config TXX9_DMAC
	143	tristate "Toshiba TXx9 SoC DMA support"
	144	depends on MACH_TX49XX \|\| MACH_TX39XX
	145	select DMA_ENGINE
	146	help
	147	Support the TXx9 SoC internal DMA controller. This can be
	148	integrated in chips such as the Toshiba TX4927/38/39.
	149
d8902adc NI	150	config SH_DMAE
d8902adc NI	151	tristate "Renesas SuperH DMAC support"
927a7c9c	152	depends on (SUPERH && SH_DMA) \|\| (ARM && ARCH_SHMOBILE)
d8902adc NI	153	depends on !SH_DMA_API
	154	select DMA_ENGINE
	155	help
	156	Enable support for the Renesas SuperH DMA controllers.
	157
61f135b9 LW	158	config COH901318
	159	bool "ST-Ericsson COH901318 DMA support"
	160	select DMA_ENGINE
	161	depends on ARCH_U300
	162	help
	163	Enable support for ST-Ericsson COH 901 318 DMA.
	164
8d318a50 LW	165	config STE_DMA40
	166	bool "ST-Ericsson DMA40 support"
	167	depends on ARCH_U8500
	168	select DMA_ENGINE
	169	help
	170	Support for ST-Ericsson DMA40 controller
	171
12458ea0 AG	172	config AMCC_PPC440SPE_ADMA
	173	tristate "AMCC PPC440SPe ADMA support"
	174	depends on 440SPe \|\| 440SP
	175	select DMA_ENGINE
	176	select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
	177	help
	178	Enable support for the AMCC PPC440SPe RAID engines.
	179
de5d4453 RR	180	config TIMB_DMA
	181	tristate "Timberdale FPGA DMA support"
	182	depends on MFD_TIMBERDALE \|\| HAS_IOMEM
	183	select DMA_ENGINE
	184	help
	185	Enable support for the Timberdale FPGA DMA engine.
	186
12458ea0 AG	187	config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
	188	bool
	189
b3040e40 JB	190	config PL330_DMA
	191	tristate "DMA API Driver for PL330"
	192	select DMA_ENGINE
	193	depends on PL330
	194	help
	195	Select if your platform has one or more PL330 DMACs.
	196	You need to provide platform specific settings via
	197	platform_data for a dma-pl330 device.
	198
0c42bd0e YW	199	config PCH_DMA
	200	tristate "Topcliff PCH DMA support"
	201	depends on PCI && X86
	202	select DMA_ENGINE
	203	help
	204	Enable support for the Topcliff PCH DMA engine.
	205
1ec1e82f SH	206	config IMX_SDMA
	207	tristate "i.MX SDMA support"
	208	depends on ARCH_MX25 \|\| ARCH_MX3 \|\| ARCH_MX5
	209	select DMA_ENGINE
	210	help
	211	Support the i.MX SDMA engine. This engine is integrated into
	212	Freescale i.MX25/31/35/51 chips.
	213
1f1846c6 SH	214	config IMX_DMA
	215	tristate "i.MX DMA support"
	216	depends on ARCH_MX1 \|\| ARCH_MX21 \|\| MACH_MX27
	217	select DMA_ENGINE
	218	help
	219	Support the i.MX DMA engine. This engine is integrated into
	220	Freescale i.MX1/21/27 chips.
	221
c13c8260	222	config DMA_ENGINE
2ed6dc34	223	bool
c13c8260	224
db217334	225	comment "DMA Clients"
2ed6dc34	226	depends on DMA_ENGINE
db217334 CL	227
	228	config NET_DMA
	229	bool "Network: TCP receive copy offload"
	230	depends on DMA_ENGINE && NET
9c402f4e	231	default (INTEL_IOATDMA \|\| FSL_DMA)
2ed6dc34	232	help
db217334 CL	233	This enables the use of DMA engines in the network stack to
db217334 CL	234	offload receive copy-to-user operations, freeing CPU cycles.
9c402f4e DW	235
	236	Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
	237	say N.
db217334	238
729b5d1b DW	239	config ASYNC_TX_DMA
729b5d1b DW	240	bool "Async_tx: Offload support for the async_tx api"
9a8de639	241	depends on DMA_ENGINE
729b5d1b DW	242	help
	243	This allows the async_tx api to take advantage of offload engines for
	244	memcpy, memset, xor, and raid6 p+q operations. If your platform has
	245	a dma engine that can perform raid operations and you have enabled
	246	MD_RAID456 say Y.
	247
	248	If unsure, say N.
	249
4a776f0a HS	250	config DMATEST
	251	tristate "DMA Test client"
	252	depends on DMA_ENGINE
	253	help
	254	Simple DMA test client. Say N unless you're debugging a
	255	DMA Device driver.
	256
2ed6dc34	257	endif