Commit | Line | Data |
---|---|---|
c13c8260 CL |
1 | # |
2 | # DMA engine configuration | |
3 | # | |
4 | ||
2ed6dc34 | 5 | menuconfig DMADEVICES |
6d4f5879 | 6 | bool "DMA Engine support" |
04ce9ab3 | 7 | depends on HAS_DMA |
2ed6dc34 | 8 | help |
6d4f5879 HS |
9 | DMA engines can do asynchronous data transfers without |
10 | involving the host CPU. Currently, this framework can be | |
11 | used to offload memory copies in the network stack and | |
9c402f4e DW |
12 | RAID operations in the MD driver. This menu only presents |
13 | DMA Device drivers supported by the configured arch, it may | |
14 | be empty in some cases. | |
2ed6dc34 | 15 | |
6c664a89 LW |
16 | config DMADEVICES_DEBUG |
17 | bool "DMA Engine debugging" | |
18 | depends on DMADEVICES != n | |
19 | help | |
20 | This is an option for use by developers; most people should | |
21 | say N here. This enables DMA engine core and driver debugging. | |
22 | ||
23 | config DMADEVICES_VDEBUG | |
24 | bool "DMA Engine verbose debugging" | |
25 | depends on DMADEVICES_DEBUG != n | |
26 | help | |
27 | This is an option for use by developers; most people should | |
28 | say N here. This enables deeper (more verbose) debugging of | |
29 | the DMA engine core and drivers. | |
30 | ||
31 | ||
2ed6dc34 SN |
32 | if DMADEVICES |
33 | ||
34 | comment "DMA Devices" | |
35 | ||
95b4ecbf SY |
36 | config INTEL_MIC_X100_DMA |
37 | tristate "Intel MIC X100 DMA Driver" | |
38 | depends on 64BIT && X86 && INTEL_MIC_BUS | |
ce05b686 | 39 | select DMA_ENGINE |
95b4ecbf SY |
40 | help |
41 | This enables DMA support for the Intel Many Integrated Core | |
42 | (MIC) family of PCIe form factor coprocessor X100 devices that | |
43 | run a 64 bit Linux OS. This driver will be used by both MIC | |
44 | host and card drivers. | |
45 | ||
46 | If you are building host kernel with a MIC device or a card | |
47 | kernel for a MIC device, then say M (recommended) or Y, else | |
48 | say N. If unsure say N. | |
49 | ||
50 | More information about the Intel MIC family as well as the Linux | |
51 | OS and tools for MIC to use with this driver are available from | |
52 | <http://software.intel.com/en-us/mic-developer>. | |
53 | ||
5fc6d897 | 54 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH |
138f4c35 DW |
55 | bool |
56 | ||
e8689e63 LW |
57 | config AMBA_PL08X |
58 | bool "ARM PrimeCell PL080 or PL081 support" | |
c6a0aec9 | 59 | depends on ARM_AMBA |
e8689e63 | 60 | select DMA_ENGINE |
083be28a | 61 | select DMA_VIRTUAL_CHANNELS |
e8689e63 LW |
62 | help |
63 | Platform has a PL08x DMAC device | |
64 | which can provide DMA engine support | |
65 | ||
2ed6dc34 SN |
66 | config INTEL_IOATDMA |
67 | tristate "Intel I/OAT DMA support" | |
68 | depends on PCI && X86 | |
69 | select DMA_ENGINE | |
3cc377b9 | 70 | select DMA_ENGINE_RAID |
2ed6dc34 SN |
71 | select DCA |
72 | help | |
73 | Enable support for the Intel(R) I/OAT DMA engine present | |
74 | in recent Intel Xeon chipsets. | |
75 | ||
76 | Say Y here if you have such a chipset. | |
77 | ||
78 | If unsure, say N. | |
79 | ||
80 | config INTEL_IOP_ADMA | |
81 | tristate "Intel IOP ADMA support" | |
82 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX | |
2ed6dc34 | 83 | select DMA_ENGINE |
5fc6d897 | 84 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
2ed6dc34 SN |
85 | help |
86 | Enable support for the Intel(R) IOP Series RAID engines. | |
c13c8260 | 87 | |
667dfed9 AS |
88 | config IDMA64 |
89 | tristate "Intel integrated DMA 64-bit support" | |
90 | select DMA_ENGINE | |
91 | select DMA_VIRTUAL_CHANNELS | |
92 | help | |
93 | Enable DMA support for Intel Low Power Subsystem such as found on | |
94 | Intel Skylake PCH. | |
95 | ||
61a76496 | 96 | source "drivers/dma/dw/Kconfig" |
d5ea7b5e | 97 | |
dc78baa2 NF |
98 | config AT_HDMAC |
99 | tristate "Atmel AHB DMA support" | |
f898fed0 | 100 | depends on ARCH_AT91 |
dc78baa2 NF |
101 | select DMA_ENGINE |
102 | help | |
f898fed0 | 103 | Support the Atmel AHB DMA controller. |
dc78baa2 | 104 | |
e1f7c9ee LD |
105 | config AT_XDMAC |
106 | tristate "Atmel XDMA support" | |
6e5ae29b | 107 | depends on ARCH_AT91 |
e1f7c9ee LD |
108 | select DMA_ENGINE |
109 | help | |
110 | Support the Atmel XDMA controller. | |
111 | ||
173acc7c | 112 | config FSL_DMA |
8de7a7d9 | 113 | tristate "Freescale Elo series DMA support" |
77cd62e8 | 114 | depends on FSL_SOC |
173acc7c | 115 | select DMA_ENGINE |
5fc6d897 | 116 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
173acc7c | 117 | ---help--- |
8de7a7d9 HZ |
118 | Enable support for the Freescale Elo series DMA controllers. |
119 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the | |
120 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on | |
121 | some Txxx and Bxxx parts. | |
173acc7c | 122 | |
ad80da65 XS |
123 | config FSL_RAID |
124 | tristate "Freescale RAID engine Support" | |
125 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
126 | select DMA_ENGINE | |
127 | select DMA_ENGINE_RAID | |
128 | ---help--- | |
129 | Enable support for Freescale RAID Engine. RAID Engine is | |
130 | available on some QorIQ SoCs (like P5020/P5040). It has | |
131 | the capability to offload memcpy, xor and pq computation | |
132 | for raid5/6. | |
133 | ||
2b49e0c5 AS |
134 | source "drivers/dma/hsu/Kconfig" |
135 | ||
0fb6f739 PZ |
136 | config MPC512X_DMA |
137 | tristate "Freescale MPC512x built-in DMA engine support" | |
ba2eea25 | 138 | depends on PPC_MPC512x || PPC_MPC831x |
0fb6f739 PZ |
139 | select DMA_ENGINE |
140 | ---help--- | |
141 | Enable support for the Freescale MPC512x built-in DMA engine. | |
142 | ||
9a322993 PDM |
143 | source "drivers/dma/bestcomm/Kconfig" |
144 | ||
ff7b0479 SB |
145 | config MV_XOR |
146 | bool "Marvell XOR engine support" | |
147 | depends on PLAT_ORION | |
ff7b0479 | 148 | select DMA_ENGINE |
3cc377b9 | 149 | select DMA_ENGINE_RAID |
5fc6d897 | 150 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
ff7b0479 SB |
151 | ---help--- |
152 | Enable support for the Marvell XOR engine. | |
153 | ||
5296b56d GL |
154 | config MX3_IPU |
155 | bool "MX3x Image Processing Unit support" | |
8e2d41f8 | 156 | depends on ARCH_MXC |
5296b56d GL |
157 | select DMA_ENGINE |
158 | default y | |
159 | help | |
160 | If you plan to use the Image Processing unit in the i.MX3x, say | |
161 | Y here. If unsure, select Y. | |
162 | ||
163 | config MX3_IPU_IRQS | |
164 | int "Number of dynamically mapped interrupts for IPU" | |
165 | depends on MX3_IPU | |
166 | range 2 137 | |
167 | default 4 | |
168 | help | |
169 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. | |
170 | To avoid bloating the irq_desc[] array we allocate a sufficient | |
171 | number of IRQ slots and map them dynamically to specific sources. | |
172 | ||
a57e16cf RJ |
173 | config PXA_DMA |
174 | bool "PXA DMA support" | |
175 | depends on (ARCH_MMP || ARCH_PXA) | |
176 | select DMA_ENGINE | |
177 | select DMA_VIRTUAL_CHANNELS | |
178 | help | |
179 | Support the DMA engine for PXA. It is also compatible with MMP PDMA | |
180 | platform. The internal DMA IP of all PXA variants is supported, with | |
181 | 16 to 32 channels for peripheral to memory or memory to memory | |
182 | transfers. | |
183 | ||
ea76f0b3 AN |
184 | config TXX9_DMAC |
185 | tristate "Toshiba TXx9 SoC DMA support" | |
186 | depends on MACH_TX49XX || MACH_TX39XX | |
187 | select DMA_ENGINE | |
188 | help | |
189 | Support the TXx9 SoC internal DMA controller. This can be | |
190 | integrated in chips such as the Toshiba TX4927/38/39. | |
191 | ||
ec8a1586 LD |
192 | config TEGRA20_APB_DMA |
193 | bool "NVIDIA Tegra20 APB DMA support" | |
194 | depends on ARCH_TEGRA | |
195 | select DMA_ENGINE | |
196 | help | |
197 | Support for the NVIDIA Tegra20 APB DMA controller driver. The | |
198 | DMA controller is having multiple DMA channel which can be | |
199 | configured for different peripherals like audio, UART, SPI, | |
200 | I2C etc which is in APB bus. | |
201 | This DMA controller transfers data from memory to peripheral fifo | |
202 | or vice versa. It does not support memory to memory data transfer. | |
203 | ||
ddeccb8d HS |
204 | config S3C24XX_DMAC |
205 | tristate "Samsung S3C24XX DMA support" | |
d50b9e2e | 206 | depends on ARCH_S3C24XX |
ddeccb8d HS |
207 | select DMA_ENGINE |
208 | select DMA_VIRTUAL_CHANNELS | |
209 | help | |
210 | Support for the Samsung S3C24XX DMA controller driver. The | |
211 | DMA controller is having multiple DMA channels which can be | |
212 | configured for different peripherals like audio, UART, SPI. | |
213 | The DMA controller can transfer data from memory to peripheral, | |
214 | periphal to memory, periphal to periphal and memory to memory. | |
215 | ||
189b4ee8 | 216 | source "drivers/dma/sh/Kconfig" |
d8902adc | 217 | |
61f135b9 LW |
218 | config COH901318 |
219 | bool "ST-Ericsson COH901318 DMA support" | |
220 | select DMA_ENGINE | |
221 | depends on ARCH_U300 | |
222 | help | |
223 | Enable support for ST-Ericsson COH 901 318 DMA. | |
224 | ||
8d318a50 LW |
225 | config STE_DMA40 |
226 | bool "ST-Ericsson DMA40 support" | |
227 | depends on ARCH_U8500 | |
228 | select DMA_ENGINE | |
229 | help | |
230 | Support for ST-Ericsson DMA40 controller | |
231 | ||
12458ea0 AG |
232 | config AMCC_PPC440SPE_ADMA |
233 | tristate "AMCC PPC440SPe ADMA support" | |
234 | depends on 440SPe || 440SP | |
235 | select DMA_ENGINE | |
3cc377b9 | 236 | select DMA_ENGINE_RAID |
12458ea0 | 237 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
5fc6d897 | 238 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
12458ea0 AG |
239 | help |
240 | Enable support for the AMCC PPC440SPe RAID engines. | |
241 | ||
de5d4453 RR |
242 | config TIMB_DMA |
243 | tristate "Timberdale FPGA DMA support" | |
2dda47d1 | 244 | depends on MFD_TIMBERDALE |
de5d4453 RR |
245 | select DMA_ENGINE |
246 | help | |
247 | Enable support for the Timberdale FPGA DMA engine. | |
248 | ||
ca21a146 | 249 | config SIRF_DMA |
f7d935dc BS |
250 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" |
251 | depends on ARCH_SIRF | |
ca21a146 RY |
252 | select DMA_ENGINE |
253 | help | |
254 | Enable support for the CSR SiRFprimaII DMA engine. | |
255 | ||
c2dde5f8 | 256 | config TI_EDMA |
76448041 | 257 | bool "TI EDMA support" |
e7ed8b40 | 258 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE |
c2dde5f8 MP |
259 | select DMA_ENGINE |
260 | select DMA_VIRTUAL_CHANNELS | |
c2b9e974 | 261 | select TI_PRIV_EDMA |
c2dde5f8 MP |
262 | default n |
263 | help | |
264 | Enable support for the TI EDMA controller. This DMA | |
265 | engine is found on TI DaVinci and AM33xx parts. | |
266 | ||
a074ae38 PU |
267 | config TI_DMA_CROSSBAR |
268 | bool | |
269 | ||
12458ea0 AG |
270 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
271 | bool | |
272 | ||
b3040e40 JB |
273 | config PL330_DMA |
274 | tristate "DMA API Driver for PL330" | |
275 | select DMA_ENGINE | |
1b9bb715 | 276 | depends on ARM_AMBA |
b3040e40 JB |
277 | help |
278 | Select if your platform has one or more PL330 DMACs. | |
279 | You need to provide platform specific settings via | |
280 | platform_data for a dma-pl330 device. | |
281 | ||
0c42bd0e | 282 | config PCH_DMA |
ca7fe2db | 283 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
4828b493 | 284 | depends on PCI && (X86_32 || COMPILE_TEST) |
0c42bd0e YW |
285 | select DMA_ENGINE |
286 | help | |
2cdf2455 TM |
287 | Enable support for Intel EG20T PCH DMA engine. |
288 | ||
e79e72be | 289 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
ca7fe2db TM |
290 | Output Hub), ML7213, ML7223 and ML7831. |
291 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is | |
292 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. | |
293 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. | |
294 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. | |
0c42bd0e | 295 | |
1ec1e82f SH |
296 | config IMX_SDMA |
297 | tristate "i.MX SDMA support" | |
8e2d41f8 | 298 | depends on ARCH_MXC |
1ec1e82f SH |
299 | select DMA_ENGINE |
300 | help | |
301 | Support the i.MX SDMA engine. This engine is integrated into | |
50cf5534 | 302 | Freescale i.MX25/31/35/51/53/6 chips. |
1ec1e82f | 303 | |
1f1846c6 SH |
304 | config IMX_DMA |
305 | tristate "i.MX DMA support" | |
5b2e02e4 | 306 | depends on ARCH_MXC |
1f1846c6 SH |
307 | select DMA_ENGINE |
308 | help | |
309 | Support the i.MX DMA engine. This engine is integrated into | |
310 | Freescale i.MX1/21/27 chips. | |
311 | ||
a580b8c5 SG |
312 | config MXS_DMA |
313 | bool "MXS DMA support" | |
f5c55847 | 314 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q |
f5b7efcc | 315 | select STMP_DEVICE |
a580b8c5 SG |
316 | select DMA_ENGINE |
317 | help | |
318 | Support the MXS DMA engine. This engine including APBH-DMA | |
654fa249 | 319 | and APBX-DMA is integrated into Freescale i.MX23/28/MX6Q/MX6DL chips. |
a580b8c5 | 320 | |
760ee1c4 MW |
321 | config EP93XX_DMA |
322 | bool "Cirrus Logic EP93xx DMA support" | |
323 | depends on ARCH_EP93XX | |
324 | select DMA_ENGINE | |
325 | help | |
326 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. | |
327 | ||
6365bead RK |
328 | config DMA_SA11X0 |
329 | tristate "SA-11x0 DMA support" | |
330 | depends on ARCH_SA1100 | |
331 | select DMA_ENGINE | |
50437bff | 332 | select DMA_VIRTUAL_CHANNELS |
6365bead RK |
333 | help |
334 | Support the DMA engine found on Intel StrongARM SA-1100 and | |
335 | SA-1110 SoCs. This DMA engine can only be used with on-chip | |
336 | devices. | |
337 | ||
c6da0ba8 ZG |
338 | config MMP_TDMA |
339 | bool "MMP Two-Channel DMA support" | |
49d57b5e | 340 | depends on ARCH_MMP |
c6da0ba8 | 341 | select DMA_ENGINE |
b9f10a10 | 342 | select MMP_SRAM |
c6da0ba8 ZG |
343 | help |
344 | Support the MMP Two-Channel DMA engine. | |
345 | This engine used for MMP Audio DMA and pxa910 SQU. | |
b9f10a10 | 346 | It needs sram driver under mach-mmp. |
c6da0ba8 ZG |
347 | |
348 | Say Y here if you enabled MMP ADMA, otherwise say N. | |
349 | ||
7bedaa55 RK |
350 | config DMA_OMAP |
351 | tristate "OMAP DMA support" | |
352 | depends on ARCH_OMAP | |
353 | select DMA_ENGINE | |
354 | select DMA_VIRTUAL_CHANNELS | |
a074ae38 | 355 | select TI_DMA_CROSSBAR if SOC_DRA7XX |
7bedaa55 | 356 | |
96286b57 FM |
357 | config DMA_BCM2835 |
358 | tristate "BCM2835 DMA engine support" | |
dd1ed372 | 359 | depends on ARCH_BCM2835 |
96286b57 FM |
360 | select DMA_ENGINE |
361 | select DMA_VIRTUAL_CHANNELS | |
362 | ||
9b3452d1 SAS |
363 | config TI_CPPI41 |
364 | tristate "AM33xx CPPI41 DMA support" | |
365 | depends on ARCH_OMAP | |
366 | select DMA_ENGINE | |
367 | help | |
368 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine | |
369 | is currently used by the USB driver on AM335x platforms. | |
370 | ||
c8acd6aa ZG |
371 | config MMP_PDMA |
372 | bool "MMP PDMA support" | |
373 | depends on (ARCH_MMP || ARCH_PXA) | |
374 | select DMA_ENGINE | |
375 | help | |
8c88126b | 376 | Support the MMP PDMA engine for PXA and MMP platform. |
c8acd6aa | 377 | |
7c169a42 LPC |
378 | config DMA_JZ4740 |
379 | tristate "JZ4740 DMA support" | |
380 | depends on MACH_JZ4740 | |
381 | select DMA_ENGINE | |
382 | select DMA_VIRTUAL_CHANNELS | |
383 | ||
d894fc60 AS |
384 | config DMA_JZ4780 |
385 | tristate "JZ4780 DMA support" | |
386 | depends on MACH_JZ4780 | |
387 | select DMA_ENGINE | |
388 | select DMA_VIRTUAL_CHANNELS | |
389 | help | |
390 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. | |
391 | If you have a board based on such a SoC and wish to use DMA for | |
392 | devices which can use the DMA controller, say Y or M here. | |
393 | ||
8e6152bc ZG |
394 | config K3_DMA |
395 | tristate "Hisilicon K3 DMA support" | |
396 | depends on ARCH_HI3xxx | |
397 | select DMA_ENGINE | |
398 | select DMA_VIRTUAL_CHANNELS | |
399 | help | |
400 | Support the DMA engine for Hisilicon K3 platform | |
401 | devices. | |
402 | ||
5f9e685a JJ |
403 | config MOXART_DMA |
404 | tristate "MOXART DMA support" | |
405 | depends on ARCH_MOXART | |
406 | select DMA_ENGINE | |
e803d988 | 407 | select DMA_OF |
5f9e685a JJ |
408 | select DMA_VIRTUAL_CHANNELS |
409 | help | |
410 | Enable support for the MOXA ART SoC DMA controller. | |
d6be34fb JL |
411 | |
412 | config FSL_EDMA | |
413 | tristate "Freescale eDMA engine support" | |
414 | depends on OF | |
415 | select DMA_ENGINE | |
416 | select DMA_VIRTUAL_CHANNELS | |
417 | help | |
418 | Support the Freescale eDMA engine with programmable channel | |
419 | multiplexing capability for DMA request sources(slot). | |
420 | This module can be found on Freescale Vybrid and LS-1 SoCs. | |
5f9e685a | 421 | |
9cd4360d ST |
422 | config XILINX_VDMA |
423 | tristate "Xilinx AXI VDMA Engine" | |
424 | depends on (ARCH_ZYNQ || MICROBLAZE) | |
425 | select DMA_ENGINE | |
426 | help | |
427 | Enable support for Xilinx AXI VDMA Soft IP. | |
428 | ||
429 | This engine provides high-bandwidth direct memory access | |
430 | between memory and AXI4-Stream video type target | |
431 | peripherals including peripherals which support AXI4- | |
432 | Stream Video Protocol. It has two stream interfaces/ | |
433 | channels, Memory Mapped to Stream (MM2S) and Stream to | |
434 | Memory Mapped (S2MM) for the data transfers. | |
435 | ||
55585930 MR |
436 | config DMA_SUN6I |
437 | tristate "Allwinner A31 SoCs DMA support" | |
0b04ddf8 | 438 | depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST |
a0bbe990 | 439 | depends on RESET_CONTROLLER |
55585930 MR |
440 | select DMA_ENGINE |
441 | select DMA_VIRTUAL_CHANNELS | |
442 | help | |
0b04ddf8 | 443 | Support for the DMA engine first found in Allwinner A31 SoCs. |
55585930 | 444 | |
b45b262c GL |
445 | config NBPFAXI_DMA |
446 | tristate "Renesas Type-AXI NBPF DMA support" | |
447 | select DMA_ENGINE | |
cfc6abc3 | 448 | depends on ARM || COMPILE_TEST |
b45b262c GL |
449 | help |
450 | Support for "Type-AXI" NBPF DMA IPs from Renesas | |
451 | ||
5689ba7f AB |
452 | config IMG_MDC_DMA |
453 | tristate "IMG MDC support" | |
454 | depends on MIPS || COMPILE_TEST | |
455 | depends on MFD_SYSCON | |
456 | select DMA_ENGINE | |
457 | select DMA_VIRTUAL_CHANNELS | |
458 | help | |
459 | Enable support for the IMG multi-threaded DMA controller (MDC). | |
460 | ||
9f2fd0df RPS |
461 | config XGENE_DMA |
462 | tristate "APM X-Gene DMA support" | |
80166146 | 463 | depends on ARCH_XGENE || COMPILE_TEST |
9f2fd0df RPS |
464 | select DMA_ENGINE |
465 | select DMA_ENGINE_RAID | |
466 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH | |
467 | help | |
468 | Enable support for the APM X-Gene SoC DMA engine. | |
469 | ||
c13c8260 | 470 | config DMA_ENGINE |
2ed6dc34 | 471 | bool |
c13c8260 | 472 | |
50437bff RK |
473 | config DMA_VIRTUAL_CHANNELS |
474 | tristate | |
475 | ||
1b2e98bc AS |
476 | config DMA_ACPI |
477 | def_bool y | |
478 | depends on ACPI | |
479 | ||
5fa422c9 VK |
480 | config DMA_OF |
481 | def_bool y | |
482 | depends on OF | |
2795eedf | 483 | select DMA_ENGINE |
5fa422c9 | 484 | |
db217334 | 485 | comment "DMA Clients" |
2ed6dc34 | 486 | depends on DMA_ENGINE |
db217334 | 487 | |
729b5d1b DW |
488 | config ASYNC_TX_DMA |
489 | bool "Async_tx: Offload support for the async_tx api" | |
9a8de639 | 490 | depends on DMA_ENGINE |
729b5d1b DW |
491 | help |
492 | This allows the async_tx api to take advantage of offload engines for | |
493 | memcpy, memset, xor, and raid6 p+q operations. If your platform has | |
494 | a dma engine that can perform raid operations and you have enabled | |
495 | MD_RAID456 say Y. | |
496 | ||
497 | If unsure, say N. | |
498 | ||
4a776f0a HS |
499 | config DMATEST |
500 | tristate "DMA Test client" | |
501 | depends on DMA_ENGINE | |
502 | help | |
503 | Simple DMA test client. Say N unless you're debugging a | |
504 | DMA Device driver. | |
505 | ||
3cc377b9 DW |
506 | config DMA_ENGINE_RAID |
507 | bool | |
508 | ||
e7c0fe2a AG |
509 | config QCOM_BAM_DMA |
510 | tristate "QCOM BAM DMA support" | |
511 | depends on ARCH_QCOM || (COMPILE_TEST && OF && ARM) | |
512 | select DMA_ENGINE | |
513 | select DMA_VIRTUAL_CHANNELS | |
514 | ---help--- | |
515 | Enable support for the QCOM BAM DMA controller. This controller | |
516 | provides DMA capabilities for a variety of on-chip devices. | |
517 | ||
2ed6dc34 | 518 | endif |