[linux-2.6-block.git] / drivers / crypto / qat / qat_common / adf_common_drv.h

/*
  This file is provided under a dual BSD/GPLv2 license.  When using or
  redistributing this file, you may do so under either license.

  GPL LICENSE SUMMARY
  Copyright(c) 2014 Intel Corporation.
  This program is free software; you can redistribute it and/or modify
  it under the terms of version 2 of the GNU General Public License as
  published by the Free Software Foundation.

  This program is distributed in the hope that it will be useful, but
  WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  General Public License for more details.

  Contact Information:
  qat-linux@intel.com

  BSD LICENSE
  Copyright(c) 2014 Intel Corporation.
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions
  are met:

    * Redistributions of source code must retain the above copyright
      notice, this list of conditions and the following disclaimer.
    * Redistributions in binary form must reproduce the above copyright
      notice, this list of conditions and the following disclaimer in
      the documentation and/or other materials provided with the
      distribution.
    * Neither the name of Intel Corporation nor the names of its
      contributors may be used to endorse or promote products derived
      from this software without specific prior written permission.

  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef ADF_DRV_H
#define ADF_DRV_H

#include <linux/list.h>
#include <linux/pci.h>
#include "adf_accel_devices.h"
#include "icp_qat_fw_loader_handle.h"
#include "icp_qat_hal.h"

#define ADF_MAJOR_VERSION	0
#define ADF_MINOR_VERSION	2
#define ADF_BUILD_VERSION	0
#define ADF_DRV_VERSION		__stringify(ADF_MAJOR_VERSION) "." \
				__stringify(ADF_MINOR_VERSION) "." \
				__stringify(ADF_BUILD_VERSION)

#define ADF_STATUS_RESTARTING 0
#define ADF_STATUS_STARTING 1
#define ADF_STATUS_CONFIGURED 2
#define ADF_STATUS_STARTED 3
#define ADF_STATUS_AE_INITIALISED 4
#define ADF_STATUS_AE_UCODE_LOADED 5
#define ADF_STATUS_AE_STARTED 6
#define ADF_STATUS_ORPHAN_TH_RUNNING 7
#define ADF_STATUS_IRQ_ALLOCATED 8

enum adf_dev_reset_mode {
	ADF_DEV_RESET_ASYNC = 0,
	ADF_DEV_RESET_SYNC
};

enum adf_event {
	ADF_EVENT_INIT = 0,
	ADF_EVENT_START,
	ADF_EVENT_STOP,
	ADF_EVENT_SHUTDOWN,
	ADF_EVENT_RESTARTING,
	ADF_EVENT_RESTARTED,
};

struct service_hndl {
	int (*event_hld)(struct adf_accel_dev *accel_dev,
			 enum adf_event event);
	unsigned long init_status;
	unsigned long start_status;
	char *name;
	struct list_head list;
};

static inline int get_current_node(void)
{
	return topology_physical_package_id(smp_processor_id());
}

int adf_service_register(struct service_hndl *service);
int adf_service_unregister(struct service_hndl *service);

int adf_dev_init(struct adf_accel_dev *accel_dev);
int adf_dev_start(struct adf_accel_dev *accel_dev);
int adf_dev_stop(struct adf_accel_dev *accel_dev);
void adf_dev_shutdown(struct adf_accel_dev *accel_dev);

void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr);
void adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev);
int adf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev);
void adf_vf2pf_req_hndl(struct adf_accel_vf_info *vf_info);
void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data);
void adf_clean_vf_map(bool);

int adf_ctl_dev_register(void);
void adf_ctl_dev_unregister(void);
int adf_processes_dev_register(void);
void adf_processes_dev_unregister(void);

int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev,
		       struct adf_accel_dev *pf);
void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev,
		       struct adf_accel_dev *pf);
struct list_head *adf_devmgr_get_head(void);
struct adf_accel_dev *adf_devmgr_get_dev_by_id(uint32_t id);
struct adf_accel_dev *adf_devmgr_get_first(void);
struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(struct pci_dev *pci_dev);
int adf_devmgr_verify_id(uint32_t id);
void adf_devmgr_get_num_dev(uint32_t *num);
int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev);
int adf_dev_started(struct adf_accel_dev *accel_dev);
int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev);
int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev);
int adf_ae_init(struct adf_accel_dev *accel_dev);
int adf_ae_shutdown(struct adf_accel_dev *accel_dev);
int adf_ae_fw_load(struct adf_accel_dev *accel_dev);
void adf_ae_fw_release(struct adf_accel_dev *accel_dev);
int adf_ae_start(struct adf_accel_dev *accel_dev);
int adf_ae_stop(struct adf_accel_dev *accel_dev);

int adf_enable_aer(struct adf_accel_dev *accel_dev, struct pci_driver *adf);
void adf_disable_aer(struct adf_accel_dev *accel_dev);
int adf_init_aer(void);
void adf_exit_aer(void);
int adf_init_admin_comms(struct adf_accel_dev *accel_dev);
void adf_exit_admin_comms(struct adf_accel_dev *accel_dev);
int adf_send_admin_init(struct adf_accel_dev *accel_dev);
int adf_init_arb(struct adf_accel_dev *accel_dev);
void adf_exit_arb(struct adf_accel_dev *accel_dev);
void adf_update_ring_arb(struct adf_etr_ring_data *ring);

int adf_dev_get(struct adf_accel_dev *accel_dev);
void adf_dev_put(struct adf_accel_dev *accel_dev);
int adf_dev_in_use(struct adf_accel_dev *accel_dev);
int adf_init_etr_data(struct adf_accel_dev *accel_dev);
void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev);
int qat_crypto_register(void);
int qat_crypto_unregister(void);
struct qat_crypto_instance *qat_crypto_get_instance_node(int node);
void qat_crypto_put_instance(struct qat_crypto_instance *inst);
void qat_alg_callback(void *resp);
void qat_alg_asym_callback(void *resp);
int qat_algs_init(void);
void qat_algs_exit(void);
int qat_algs_register(void);
int qat_algs_unregister(void);
int qat_asym_algs_register(void);
void qat_asym_algs_unregister(void);

int qat_hal_init(struct adf_accel_dev *accel_dev);
void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle);
void qat_hal_start(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
		   unsigned int ctx_mask);
void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
		  unsigned int ctx_mask);
void qat_hal_reset(struct icp_qat_fw_loader_handle *handle);
int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle);
void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle,
			  unsigned char ae, unsigned int ctx_mask);
int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle,
			   unsigned char ae, enum icp_qat_uof_regtype lm_type,
			   unsigned char mode);
int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle,
			    unsigned char ae, unsigned char mode);
int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle,
			   unsigned char ae, unsigned char mode);
void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle,
		    unsigned char ae, unsigned int ctx_mask, unsigned int upc);
void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle,
		       unsigned char ae, unsigned int uaddr,
		       unsigned int words_num, uint64_t *uword);
void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
		     unsigned int uword_addr, unsigned int words_num,
		     unsigned int *data);
int qat_hal_get_ins_num(void);
int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle,
			unsigned char ae,
			struct icp_qat_uof_batch_init *lm_init_header);
int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle,
		     unsigned char ae, unsigned char ctx_mask,
		     enum icp_qat_uof_regtype reg_type,
		     unsigned short reg_num, unsigned int regdata);
int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle,
			 unsigned char ae, unsigned char ctx_mask,
			 enum icp_qat_uof_regtype reg_type,
			 unsigned short reg_num, unsigned int regdata);
int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle,
			 unsigned char ae, unsigned char ctx_mask,
			 enum icp_qat_uof_regtype reg_type,
			 unsigned short reg_num, unsigned int regdata);
int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle,
		    unsigned char ae, unsigned char ctx_mask,
		    unsigned short reg_num, unsigned int regdata);
int qat_hal_wr_lm(struct icp_qat_fw_loader_handle *handle,
		  unsigned char ae, unsigned short lm_addr, unsigned int value);
int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle);
void qat_uclo_del_uof_obj(struct icp_qat_fw_loader_handle *handle);
int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle,
			 void *addr_ptr, int mem_size);
void qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle,
			void *addr_ptr, int mem_size);
#if defined(CONFIG_PCI_IOV)
int adf_sriov_configure(struct pci_dev *pdev, int numvfs);
void adf_disable_sriov(struct adf_accel_dev *accel_dev);
void adf_disable_vf2pf_interrupts(struct adf_accel_dev *accel_dev,
				  uint32_t vf_mask);
void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev,
				 uint32_t vf_mask);
#else
static inline int adf_sriov_configure(struct pci_dev *pdev, int numvfs)
{
	return 0;
}

static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev)
{
}
#endif
#endif
Commit	Line	Data
d8cba25d TS	1	/*
	2	This file is provided under a dual BSD/GPLv2 license. When using or
	3	redistributing this file, you may do so under either license.
	4
	5	GPL LICENSE SUMMARY
	6	Copyright(c) 2014 Intel Corporation.
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of version 2 of the GNU General Public License as
	9	published by the Free Software Foundation.
	10
	11	This program is distributed in the hope that it will be useful, but
	12	WITHOUT ANY WARRANTY; without even the implied warranty of
	13	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	14	General Public License for more details.
	15
	16	Contact Information:
	17	qat-linux@intel.com
	18
	19	BSD LICENSE
	20	Copyright(c) 2014 Intel Corporation.
	21	Redistribution and use in source and binary forms, with or without
	22	modification, are permitted provided that the following conditions
	23	are met:
	24
	25	* Redistributions of source code must retain the above copyright
	26	notice, this list of conditions and the following disclaimer.
	27	* Redistributions in binary form must reproduce the above copyright
	28	notice, this list of conditions and the following disclaimer in
	29	the documentation and/or other materials provided with the
	30	distribution.
	31	* Neither the name of Intel Corporation nor the names of its
	32	contributors may be used to endorse or promote products derived
	33	from this software without specific prior written permission.
	34
	35	THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
	36	"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
	37	LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
	38	A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
	39	OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
	40	SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
	41	LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
	42	DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
	43	THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	44	(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	45	OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	46	*/
	47	#ifndef ADF_DRV_H
	48	#define ADF_DRV_H
	49
	50	#include <linux/list.h>
	51	#include <linux/pci.h>
	52	#include "adf_accel_devices.h"
	53	#include "icp_qat_fw_loader_handle.h"
	54	#include "icp_qat_hal.h"
	55
551d7ed2	56	#define ADF_MAJOR_VERSION 0
ed8ccaef TS	57	#define ADF_MINOR_VERSION 2
ed8ccaef TS	58	#define ADF_BUILD_VERSION 0
551d7ed2 AB	59	#define ADF_DRV_VERSION __stringify(ADF_MAJOR_VERSION) "." \
	60	__stringify(ADF_MINOR_VERSION) "." \
	61	__stringify(ADF_BUILD_VERSION)
	62
d8cba25d TS	63	#define ADF_STATUS_RESTARTING 0
	64	#define ADF_STATUS_STARTING 1
	65	#define ADF_STATUS_CONFIGURED 2
	66	#define ADF_STATUS_STARTED 3
	67	#define ADF_STATUS_AE_INITIALISED 4
	68	#define ADF_STATUS_AE_UCODE_LOADED 5
	69	#define ADF_STATUS_AE_STARTED 6
	70	#define ADF_STATUS_ORPHAN_TH_RUNNING 7
	71	#define ADF_STATUS_IRQ_ALLOCATED 8
	72
	73	enum adf_dev_reset_mode {
	74	ADF_DEV_RESET_ASYNC = 0,
	75	ADF_DEV_RESET_SYNC
	76	};
	77
	78	enum adf_event {
	79	ADF_EVENT_INIT = 0,
	80	ADF_EVENT_START,
	81	ADF_EVENT_STOP,
	82	ADF_EVENT_SHUTDOWN,
	83	ADF_EVENT_RESTARTING,
	84	ADF_EVENT_RESTARTED,
	85	};
	86
	87	struct service_hndl {
	88	int (event_hld)(struct adf_accel_dev accel_dev,
	89	enum adf_event event);
	90	unsigned long init_status;
	91	unsigned long start_status;
	92	char *name;
	93	struct list_head list;
d8cba25d TS	94	};
d8cba25d TS	95
a9905320 TS	96	static inline int get_current_node(void)
a9905320 TS	97	{
ed8ccaef	98	return topology_physical_package_id(smp_processor_id());
a9905320 TS	99	}
a9905320 TS	100
d8cba25d TS	101	int adf_service_register(struct service_hndl *service);
	102	int adf_service_unregister(struct service_hndl *service);
	103
	104	int adf_dev_init(struct adf_accel_dev *accel_dev);
	105	int adf_dev_start(struct adf_accel_dev *accel_dev);
	106	int adf_dev_stop(struct adf_accel_dev *accel_dev);
22e4dda0	107	void adf_dev_shutdown(struct adf_accel_dev *accel_dev);
d8cba25d	108
ed8ccaef TS	109	void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
	110	void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev);
	111	int adf_iov_putmsg(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr);
	112	void adf_pf2vf_notify_restarting(struct adf_accel_dev *accel_dev);
	113	int adf_enable_vf2pf_comms(struct adf_accel_dev *accel_dev);
df9e21e1	114	void adf_vf2pf_req_hndl(struct adf_accel_vf_info *vf_info);
ed8ccaef TS	115	void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data);
	116	void adf_clean_vf_map(bool);
	117
d8cba25d TS	118	int adf_ctl_dev_register(void);
	119	void adf_ctl_dev_unregister(void);
	120	int adf_processes_dev_register(void);
	121	void adf_processes_dev_unregister(void);
	122
ed8ccaef TS	123	int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev,
	124	struct adf_accel_dev *pf);
	125	void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev,
	126	struct adf_accel_dev *pf);
d8cba25d TS	127	struct list_head *adf_devmgr_get_head(void);
	128	struct adf_accel_dev *adf_devmgr_get_dev_by_id(uint32_t id);
	129	struct adf_accel_dev *adf_devmgr_get_first(void);
	130	struct adf_accel_dev adf_devmgr_pci_to_accel_dev(struct pci_dev pci_dev);
	131	int adf_devmgr_verify_id(uint32_t id);
	132	void adf_devmgr_get_num_dev(uint32_t *num);
	133	int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev);
	134	int adf_dev_started(struct adf_accel_dev *accel_dev);
	135	int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev);
	136	int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev);
	137	int adf_ae_init(struct adf_accel_dev *accel_dev);
	138	int adf_ae_shutdown(struct adf_accel_dev *accel_dev);
	139	int adf_ae_fw_load(struct adf_accel_dev *accel_dev);
b4e97050	140	void adf_ae_fw_release(struct adf_accel_dev *accel_dev);
d8cba25d TS	141	int adf_ae_start(struct adf_accel_dev *accel_dev);
	142	int adf_ae_stop(struct adf_accel_dev *accel_dev);
	143
	144	int adf_enable_aer(struct adf_accel_dev accel_dev, struct pci_driver adf);
	145	void adf_disable_aer(struct adf_accel_dev *accel_dev);
	146	int adf_init_aer(void);
	147	void adf_exit_aer(void);
a5733139 TS	148	int adf_init_admin_comms(struct adf_accel_dev *accel_dev);
	149	void adf_exit_admin_comms(struct adf_accel_dev *accel_dev);
	150	int adf_send_admin_init(struct adf_accel_dev *accel_dev);
	151	int adf_init_arb(struct adf_accel_dev *accel_dev);
	152	void adf_exit_arb(struct adf_accel_dev *accel_dev);
	153	void adf_update_ring_arb(struct adf_etr_ring_data *ring);
d8cba25d TS	154
	155	int adf_dev_get(struct adf_accel_dev *accel_dev);
	156	void adf_dev_put(struct adf_accel_dev *accel_dev);
	157	int adf_dev_in_use(struct adf_accel_dev *accel_dev);
	158	int adf_init_etr_data(struct adf_accel_dev *accel_dev);
	159	void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev);
	160	int qat_crypto_register(void);
	161	int qat_crypto_unregister(void);
	162	struct qat_crypto_instance *qat_crypto_get_instance_node(int node);
	163	void qat_crypto_put_instance(struct qat_crypto_instance *inst);
	164	void qat_alg_callback(void *resp);
a9905320	165	void qat_alg_asym_callback(void *resp);
d8cba25d TS	166	int qat_algs_init(void);
	167	void qat_algs_exit(void);
	168	int qat_algs_register(void);
	169	int qat_algs_unregister(void);
a9905320 TS	170	int qat_asym_algs_register(void);
a9905320 TS	171	void qat_asym_algs_unregister(void);
d8cba25d TS	172
	173	int qat_hal_init(struct adf_accel_dev *accel_dev);
	174	void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle);
	175	void qat_hal_start(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
	176	unsigned int ctx_mask);
	177	void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
	178	unsigned int ctx_mask);
	179	void qat_hal_reset(struct icp_qat_fw_loader_handle *handle);
	180	int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle);
	181	void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle,
	182	unsigned char ae, unsigned int ctx_mask);
	183	int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle,
	184	unsigned char ae, enum icp_qat_uof_regtype lm_type,
	185	unsigned char mode);
	186	int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle,
	187	unsigned char ae, unsigned char mode);
	188	int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle,
	189	unsigned char ae, unsigned char mode);
	190	void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle,
	191	unsigned char ae, unsigned int ctx_mask, unsigned int upc);
	192	void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle,
	193	unsigned char ae, unsigned int uaddr,
	194	unsigned int words_num, uint64_t *uword);
	195	void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae,
	196	unsigned int uword_addr, unsigned int words_num,
	197	unsigned int *data);
	198	int qat_hal_get_ins_num(void);
	199	int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle,
	200	unsigned char ae,
	201	struct icp_qat_uof_batch_init *lm_init_header);
	202	int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle,
	203	unsigned char ae, unsigned char ctx_mask,
	204	enum icp_qat_uof_regtype reg_type,
	205	unsigned short reg_num, unsigned int regdata);
	206	int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle,
	207	unsigned char ae, unsigned char ctx_mask,
	208	enum icp_qat_uof_regtype reg_type,
	209	unsigned short reg_num, unsigned int regdata);
	210	int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle,
	211	unsigned char ae, unsigned char ctx_mask,
	212	enum icp_qat_uof_regtype reg_type,
	213	unsigned short reg_num, unsigned int regdata);
	214	int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle,
	215	unsigned char ae, unsigned char ctx_mask,
	216	unsigned short reg_num, unsigned int regdata);
	217	int qat_hal_wr_lm(struct icp_qat_fw_loader_handle *handle,
	218	unsigned char ae, unsigned short lm_addr, unsigned int value);
	219	int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle);
8f312d64	220	void qat_uclo_del_uof_obj(struct icp_qat_fw_loader_handle *handle);
d8cba25d TS	221	int qat_uclo_map_uof_obj(struct icp_qat_fw_loader_handle *handle,
d8cba25d TS	222	void *addr_ptr, int mem_size);
f3dd7e60 PY	223	void qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle,
f3dd7e60 PY	224	void *addr_ptr, int mem_size);
ed8ccaef TS	225	#if defined(CONFIG_PCI_IOV)
	226	int adf_sriov_configure(struct pci_dev *pdev, int numvfs);
	227	void adf_disable_sriov(struct adf_accel_dev *accel_dev);
	228	void adf_disable_vf2pf_interrupts(struct adf_accel_dev *accel_dev,
	229	uint32_t vf_mask);
	230	void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev,
	231	uint32_t vf_mask);
	232	#else
	233	static inline int adf_sriov_configure(struct pci_dev *pdev, int numvfs)
	234	{
	235	return 0;
	236	}
	237
	238	static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev)
	239	{
	240	}
	241	#endif
d8cba25d	242	#endif