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Merge branch 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / drivers / char / serial167.c
CommitLineData
1da177e4
LT		 1/*
2 * linux/drivers/char/serial167.c
3 *
4 * Driver for MVME166/7 board serial ports, which are via a CD2401.
5 * Based very much on cyclades.c.
6 *
7 * MVME166/7 work by Richard Hirst [richard@sleepie.demon.co.uk]
8 *
9 * ==============================================================
10 *
11 * static char rcsid[] =
12 * "$Revision: 1.36.1.4 $$Date: 1995/03/29 06:14:14 $";
13 *
14 * linux/kernel/cyclades.c
15 *
16 * Maintained by Marcio Saito (cyclades@netcom.com) and
17 * Randolph Bentson (bentson@grieg.seaslug.org)
18 *
19 * Much of the design and some of the code came from serial.c
20 * which was copyright (C) 1991, 1992 Linus Torvalds. It was
21 * extensively rewritten by Theodore Ts'o, 8/16/92 -- 9/14/92,
22 * and then fixed as suggested by Michael K. Johnson 12/12/92.
23 *
24 * This version does not support shared irq's.
25 *
26 * $Log: cyclades.c,v $
27 * Revision 1.36.1.4 1995/03/29 06:14:14 bentson
28 * disambiguate between Cyclom-16Y and Cyclom-32Ye;
29 *
30 * Changes:
31 *
32 * 200 lines of changes record removed - RGH 11-10-95, starting work on
33 * converting this to drive serial ports on mvme166 (cd2401).
34 *
35 * Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 2000/08/25
36 * - get rid of verify_area
37 * - use get_user to access memory from userspace in set_threshold,
38 * set_default_threshold and set_timeout
39 * - don't use the panic function in serial167_init
40 * - do resource release on failure on serial167_init
41 * - include missing restore_flags in mvme167_serial_console_setup
42 *
43 * Kars de Jong <jongk@linux-m68k.org> - 2004/09/06
44 * - replace bottom half handler with task queue handler
45 */
46
1da177e4
LT		 47#include <linux/errno.h>
48#include <linux/signal.h>
49#include <linux/sched.h>
50#include <linux/timer.h>
51#include <linux/tty.h>
52#include <linux/interrupt.h>
53#include <linux/serial.h>
54#include <linux/serialP.h>
405f5571 55#include <linux/smp_lock.h>
1da177e4
LT		 56#include <linux/string.h>
57#include <linux/fcntl.h>
58#include <linux/ptrace.h>
59#include <linux/serial167.h>
60#include <linux/delay.h>
61#include <linux/major.h>
62#include <linux/mm.h>
63#include <linux/console.h>
64#include <linux/module.h>
65#include <linux/bitops.h>
81e859ac 66#include <linux/tty_flip.h>
5a0e3ad6 67#include <linux/gfp.h>
1da177e4
LT		 68
69#include <asm/system.h>
70#include <asm/io.h>
71#include <asm/mvme16xhw.h>
72#include <asm/bootinfo.h>
73#include <asm/setup.h>
74
75#include <linux/types.h>
76#include <linux/kernel.h>
77
78#include <asm/uaccess.h>
79#include <linux/init.h>
80
81#define SERIAL_PARANOIA_CHECK
82#undef SERIAL_DEBUG_OPEN
83#undef SERIAL_DEBUG_THROTTLE
84#undef SERIAL_DEBUG_OTHER
85#undef SERIAL_DEBUG_IO
86#undef SERIAL_DEBUG_COUNT
87#undef SERIAL_DEBUG_DTR
88#undef CYCLOM_16Y_HACK
89#define CYCLOM_ENABLE_MONITORING
90
91#define WAKEUP_CHARS 256
92
93#define STD_COM_FLAGS (0)
94
1da177e4
LT		 95static struct tty_driver *cy_serial_driver;
96extern int serial_console;
97static struct cyclades_port *serial_console_info = NULL;
98static unsigned int serial_console_cflag = 0;
99u_char initial_console_speed;
100
101/* Base address of cd2401 chip on mvme166/7 */
102
103#define BASE_ADDR (0xfff45000)
104#define pcc2chip ((volatile u_char *)0xfff42000)
105#define PccSCCMICR 0x1d
106#define PccSCCTICR 0x1e
107#define PccSCCRICR 0x1f
108#define PccTPIACKR 0x25
109#define PccRPIACKR 0x27
110#define PccIMLR 0x3f
111
112/* This is the per-port data structure */
113struct cyclades_port cy_port[] = {
44bafdf3
JS		 114 /* CARD# */
115 {-1}, /* ttyS0 */
116 {-1}, /* ttyS1 */
117 {-1}, /* ttyS2 */
118 {-1}, /* ttyS3 */
1da177e4 119};
44bafdf3 120
fe971071 121#define NR_PORTS ARRAY_SIZE(cy_port)
1da177e4 122
1da177e4
LT		 123/*
124 * This is used to look up the divisor speeds and the timeouts
125 * We're normally limited to 15 distinct baud rates. The extra
126 * are accessed via settings in info->flags.
127 * 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
128 * 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
129 * HI VHI
130 */
131static int baud_table[] = {
44bafdf3
JS		 132 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200,
133 1800, 2400, 4800, 9600, 19200, 38400, 57600, 76800, 115200, 150000,
134 0
135};
1da177e4
LT		 136
137#if 0
44bafdf3
JS		 138static char baud_co[] = { /* 25 MHz clock option table */
139 /* value => 00 01 02 03 04 */
140 /* divide by 8 32 128 512 2048 */
141 0x00, 0x04, 0x04, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02,
142 0x02, 0x02, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
143};
1da177e4 144
44bafdf3
JS		 145static char baud_bpr[] = { /* 25 MHz baud rate period table */
146 0x00, 0xf5, 0xa3, 0x6f, 0x5c, 0x51, 0xf5, 0xa3, 0x51, 0xa3,
147 0x6d, 0x51, 0xa3, 0x51, 0xa3, 0x51, 0x36, 0x29, 0x1b, 0x15
148};
1da177e4
LT		 149#endif
150
151/* I think 166 brd clocks 2401 at 20MHz.... */
152
153/* These values are written directly to tcor, and >> 5 for writing to rcor */
44bafdf3
JS		 154static u_char baud_co[] = { /* 20 MHz clock option table */
155 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x60, 0x60, 0x40,
156 0x40, 0x40, 0x20, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
157};
1da177e4
LT		 158
159/* These values written directly to tbpr/rbpr */
44bafdf3
JS		 160static u_char baud_bpr[] = { /* 20 MHz baud rate period table */
161 0x00, 0xc0, 0x80, 0x58, 0x6c, 0x40, 0xc0, 0x81, 0x40, 0x81,
162 0x57, 0x40, 0x81, 0x40, 0x81, 0x40, 0x2b, 0x20, 0x15, 0x10
163};
1da177e4 164
44bafdf3
JS		 165static u_char baud_cor4[] = { /* receive threshold */
166 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a,
167 0x0a, 0x0a, 0x0a, 0x09, 0x09, 0x08, 0x08, 0x08, 0x08, 0x07
168};
1da177e4
LT		 169
170static void shutdown(struct cyclades_port *);
44bafdf3 171static int startup(struct cyclades_port *);
1da177e4
LT		 172static void cy_throttle(struct tty_struct *);
173static void cy_unthrottle(struct tty_struct *);
174static void config_setup(struct cyclades_port *);
1da177e4
LT		 175#ifdef CYCLOM_SHOW_STATUS
176static void show_status(int);
177#endif
178
179#ifdef CONFIG_REMOTE_DEBUG
180static void debug_setup(void);
44bafdf3 181void queueDebugChar(int c);
1da177e4
LT		 182int getDebugChar(void);
183
184#define DEBUG_PORT 1
185#define DEBUG_LEN 256
186
187typedef struct {
44bafdf3
JS		 188 int in;
189 int out;
190 unsigned char buf[DEBUG_LEN];
1da177e4
LT		 191} debugq;
192
193debugq debugiq;
194#endif
195
196/*
197 * I have my own version of udelay(), as it is needed when initialising
198 * the chip, before the delay loop has been calibrated. Should probably
199 * reference one of the vmechip2 or pccchip2 counter for an accurate
200 * delay, but this wild guess will do for now.
201 */
202
44bafdf3 203void my_udelay(long us)
1da177e4
LT		 204{
205 u_char x;
206 volatile u_char *p = &x;
207 int i;
208
209 while (us--)
210 for (i = 100; i; i--)
211 x |= *p;
212}
213
44bafdf3
JS		 214static inline int serial_paranoia_check(struct cyclades_port *info, char *name,
215 const char *routine)
1da177e4
LT		 216{
217#ifdef SERIAL_PARANOIA_CHECK
44bafdf3
JS		 218 if (!info) {
219 printk("Warning: null cyclades_port for (%s) in %s\n", name,
220 routine);
221 return 1;
222 }
223
f23fc156 224 if (info < &cy_port[0] || info >= &cy_port[NR_PORTS]) {
44bafdf3
JS		 225 printk("Warning: cyclades_port out of range for (%s) in %s\n",
226 name, routine);
227 return 1;
228 }
229
230 if (info->magic != CYCLADES_MAGIC) {
231 printk("Warning: bad magic number for serial struct (%s) in "
232 "%s\n", name, routine);
233 return 1;
234 }
1da177e4
LT		 235#endif
236 return 0;
44bafdf3 237} /* serial_paranoia_check */
1da177e4
LT		 238
239#if 0
240/* The following diagnostic routines allow the driver to spew
241 information on the screen, even (especially!) during interrupts.
242 */
44bafdf3
JS		 243void SP(char *data)
244{
245 unsigned long flags;
246 local_irq_save(flags);
353f6dd2 247 printk(KERN_EMERG "%s", data);
44bafdf3 248 local_irq_restore(flags);
1da177e4 249}
44bafdf3 250
1da177e4 251char scrn[2];
44bafdf3
JS		 252void CP(char data)
253{
254 unsigned long flags;
255 local_irq_save(flags);
256 scrn[0] = data;
353f6dd2 257 printk(KERN_EMERG "%c", scrn);
44bafdf3
JS		 258 local_irq_restore(flags);
259} /* CP */
1da177e4 260
44bafdf3
JS		 261void CP1(int data)
262{
263 (data < 10) ? CP(data + '0') : CP(data + 'A' - 10);
264} /* CP1 */
265void CP2(int data)
266{
267 CP1((data >> 4) & 0x0f);
268 CP1(data & 0x0f);
269} /* CP2 */
270void CP4(int data)
271{
272 CP2((data >> 8) & 0xff);
273 CP2(data & 0xff);
274} /* CP4 */
275void CP8(long data)
276{
277 CP4((data >> 16) & 0xffff);
278 CP4(data & 0xffff);
279} /* CP8 */
1da177e4
LT		 280#endif
281
282/* This routine waits up to 1000 micro-seconds for the previous
283 command to the Cirrus chip to complete and then issues the
284 new command. An error is returned if the previous command
285 didn't finish within the time limit.
286 */
44bafdf3 287u_short write_cy_cmd(volatile u_char * base_addr, u_char cmd)
1da177e4 288{
44bafdf3
JS		 289 unsigned long flags;
290 volatile int i;
1da177e4 291
44bafdf3 292 local_irq_save(flags);
1da177e4 293 /* Check to see that the previous command has completed */
44bafdf3
JS		 294 for (i = 0; i < 100; i++) {
295 if (base_addr[CyCCR] == 0) {
296 break;
297 }
298 my_udelay(10L);
1da177e4
LT		 299 }
300 /* if the CCR never cleared, the previous command
44bafdf3
JS		 301 didn't finish within the "reasonable time" */
302 if (i == 10) {
303 local_irq_restore(flags);
304 return (-1);
1da177e4
LT		 305 }
306
307 /* Issue the new command */
308 base_addr[CyCCR] = cmd;
44bafdf3
JS		 309 local_irq_restore(flags);
310 return (0);
311} /* write_cy_cmd */
1da177e4
LT		 312
313/* cy_start and cy_stop provide software output flow control as a
314 function of XON/XOFF, software CTS, and other such stuff. */
315
44bafdf3 316static void cy_stop(struct tty_struct *tty)
1da177e4 317{
c9f19e96 318 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 319 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
320 int channel;
321 unsigned long flags;
1da177e4
LT		 322
323#ifdef SERIAL_DEBUG_OTHER
44bafdf3 324 printk("cy_stop %s\n", tty->name); /* */
1da177e4
LT		 325#endif
326
44bafdf3
JS		 327 if (serial_paranoia_check(info, tty->name, "cy_stop"))
328 return;
1da177e4 329
44bafdf3 330 channel = info->line;
1da177e4 331
44bafdf3
JS		 332 local_irq_save(flags);
333 base_addr[CyCAR] = (u_char) (channel); /* index channel */
334 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
335 local_irq_restore(flags);
336} /* cy_stop */
1da177e4 337
44bafdf3 338static void cy_start(struct tty_struct *tty)
1da177e4 339{
c9f19e96 340 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 341 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
342 int channel;
343 unsigned long flags;
1da177e4
LT		 344
345#ifdef SERIAL_DEBUG_OTHER
44bafdf3 346 printk("cy_start %s\n", tty->name); /* */
1da177e4
LT		 347#endif
348
44bafdf3
JS		 349 if (serial_paranoia_check(info, tty->name, "cy_start"))
350 return;
1da177e4 351
44bafdf3 352 channel = info->line;
1da177e4 353
44bafdf3
JS		 354 local_irq_save(flags);
355 base_addr[CyCAR] = (u_char) (channel);
356 base_addr[CyIER] |= CyTxMpty;
357 local_irq_restore(flags);
358} /* cy_start */
1da177e4 359
1da177e4
LT		 360/* The real interrupt service routines are called
361 whenever the card wants its hand held--chars
362 received, out buffer empty, modem change, etc.
363 */
44bafdf3 364static irqreturn_t cd2401_rxerr_interrupt(int irq, void *dev_id)
1da177e4 365{
44bafdf3
JS		 366 struct tty_struct *tty;
367 struct cyclades_port *info;
368 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
369 unsigned char err, rfoc;
370 int channel;
371 char data;
372
373 /* determine the channel and change to that context */
374 channel = (u_short) (base_addr[CyLICR] >> 2);
375 info = &cy_port[channel];
376 info->last_active = jiffies;
377
378 if ((err = base_addr[CyRISR]) & CyTIMEOUT) {
379 /* This is a receive timeout interrupt, ignore it */
380 base_addr[CyREOIR] = CyNOTRANS;
381 return IRQ_HANDLED;
382 }
1da177e4 383
44bafdf3
JS		 384 /* Read a byte of data if there is any - assume the error
385 * is associated with this character */
1da177e4 386
44bafdf3
JS		 387 if ((rfoc = base_addr[CyRFOC]) != 0)
388 data = base_addr[CyRDR];
389 else
390 data = 0;
391
392 /* if there is nowhere to put the data, discard it */
393 if (info->tty == 0) {
394 base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS;
395 return IRQ_HANDLED;
396 } else { /* there is an open port for this data */
397 tty = info->tty;
398 if (err & info->ignore_status_mask) {
399 base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS;
400 return IRQ_HANDLED;
401 }
402 if (tty_buffer_request_room(tty, 1) != 0) {
403 if (err & info->read_status_mask) {
404 if (err & CyBREAK) {
405 tty_insert_flip_char(tty, data,
406 TTY_BREAK);
407 if (info->flags & ASYNC_SAK) {
408 do_SAK(tty);
409 }
410 } else if (err & CyFRAME) {
411 tty_insert_flip_char(tty, data,
412 TTY_FRAME);
413 } else if (err & CyPARITY) {
414 tty_insert_flip_char(tty, data,
415 TTY_PARITY);
416 } else if (err & CyOVERRUN) {
417 tty_insert_flip_char(tty, 0,
418 TTY_OVERRUN);
419 /*
420 If the flip buffer itself is
c4f01240 421 overflowing, we still lose
44bafdf3
JS		 422 the next incoming character.
423 */
424 if (tty_buffer_request_room(tty, 1) !=
425 0) {
426 tty_insert_flip_char(tty, data,
427 TTY_FRAME);
428 }
429 /* These two conditions may imply */
430 /* a normal read should be done. */
431 /* else if(data & CyTIMEOUT) */
432 /* else if(data & CySPECHAR) */
433 } else {
434 tty_insert_flip_char(tty, 0,
435 TTY_NORMAL);
436 }
437 } else {
438 tty_insert_flip_char(tty, data, TTY_NORMAL);
439 }
440 } else {
441 /* there was a software buffer overrun
442 and nothing could be done about it!!! */
443 }
444 }
445 tty_schedule_flip(tty);
446 /* end of service */
1da177e4
LT		 447 base_addr[CyREOIR] = rfoc ? 0 : CyNOTRANS;
448 return IRQ_HANDLED;
44bafdf3
JS		 449} /* cy_rxerr_interrupt */
450
451static irqreturn_t cd2401_modem_interrupt(int irq, void *dev_id)
1da177e4 452{
44bafdf3
JS		 453 struct cyclades_port *info;
454 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
455 int channel;
456 int mdm_change;
457 int mdm_status;
458
459 /* determine the channel and change to that context */
460 channel = (u_short) (base_addr[CyLICR] >> 2);
461 info = &cy_port[channel];
462 info->last_active = jiffies;
463
464 mdm_change = base_addr[CyMISR];
465 mdm_status = base_addr[CyMSVR1];
466
467 if (info->tty == 0) { /* nowhere to put the data, ignore it */
468 ;
469 } else {
470 if ((mdm_change & CyDCD)
471 && (info->flags & ASYNC_CHECK_CD)) {
472 if (mdm_status & CyDCD) {
1da177e4 473/* CP('!'); */
3099bbc5 474 wake_up_interruptible(&info->open_wait);
44bafdf3 475 } else {
1da177e4 476/* CP('@'); */
3099bbc5
JS		 477 tty_hangup(info->tty);
478 wake_up_interruptible(&info->open_wait);
479 info->flags &= ~ASYNC_NORMAL_ACTIVE;
44bafdf3 480 }
1da177e4 481 }
44bafdf3
JS		 482 if ((mdm_change & CyCTS)
483 && (info->flags & ASYNC_CTS_FLOW)) {
484 if (info->tty->stopped) {
485 if (mdm_status & CyCTS) {
486 /* !!! cy_start isn't used because... */
487 info->tty->stopped = 0;
488 base_addr[CyIER] |= CyTxMpty;
3099bbc5 489 tty_wakeup(info->tty);
44bafdf3
JS		 490 }
491 } else {
492 if (!(mdm_status & CyCTS)) {
493 /* !!! cy_stop isn't used because... */
494 info->tty->stopped = 1;
495 base_addr[CyIER] &=
496 ~(CyTxMpty | CyTxRdy);
497 }
498 }
499 }
500 if (mdm_status & CyDSR) {
1da177e4 501 }
1da177e4 502 }
44bafdf3
JS		 503 base_addr[CyMEOIR] = 0;
504 return IRQ_HANDLED;
505} /* cy_modem_interrupt */
1da177e4 506
44bafdf3 507static irqreturn_t cd2401_tx_interrupt(int irq, void *dev_id)
1da177e4 508{
44bafdf3
JS		 509 struct cyclades_port *info;
510 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
511 int channel;
512 int char_count, saved_cnt;
513 int outch;
1da177e4 514
44bafdf3
JS		 515 /* determine the channel and change to that context */
516 channel = (u_short) (base_addr[CyLICR] >> 2);
1da177e4
LT		 517
518#ifdef CONFIG_REMOTE_DEBUG
44bafdf3
JS		 519 if (channel == DEBUG_PORT) {
520 panic("TxInt on debug port!!!");
521 }
1da177e4 522#endif
44bafdf3
JS		 523 /* validate the port number (as configured and open) */
524 if ((channel < 0) || (NR_PORTS <= channel)) {
525 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
526 base_addr[CyTEOIR] = CyNOTRANS;
527 return IRQ_HANDLED;
528 }
f23fc156 529 info = &cy_port[channel];
44bafdf3
JS		 530 info->last_active = jiffies;
531 if (info->tty == 0) {
532 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
44bafdf3
JS		 533 base_addr[CyTEOIR] = CyNOTRANS;
534 return IRQ_HANDLED;
535 }
536
537 /* load the on-chip space available for outbound data */
538 saved_cnt = char_count = base_addr[CyTFTC];
539
540 if (info->x_char) { /* send special char */
541 outch = info->x_char;
1da177e4 542 base_addr[CyTDR] = outch;
1da177e4 543 char_count--;
44bafdf3 544 info->x_char = 0;
1da177e4 545 }
1da177e4 546
44bafdf3
JS		 547 if (info->x_break) {
548 /* The Cirrus chip requires the "Embedded Transmit
549 Commands" of start break, delay, and end break
550 sequences to be sent. The duration of the
551 break is given in TICs, which runs at HZ
552 (typically 100) and the PPR runs at 200 Hz,
553 so the delay is duration * 200/HZ, and thus a
554 break can run from 1/100 sec to about 5/4 sec.
555 Need to check these values - RGH 141095.
556 */
557 base_addr[CyTDR] = 0; /* start break */
558 base_addr[CyTDR] = 0x81;
559 base_addr[CyTDR] = 0; /* delay a bit */
560 base_addr[CyTDR] = 0x82;
561 base_addr[CyTDR] = info->x_break * 200 / HZ;
562 base_addr[CyTDR] = 0; /* terminate break */
563 base_addr[CyTDR] = 0x83;
564 char_count -= 7;
565 info->x_break = 0;
566 }
567
568 while (char_count > 0) {
569 if (!info->xmit_cnt) {
570 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
571 break;
572 }
573 if (info->xmit_buf == 0) {
574 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
575 break;
576 }
577 if (info->tty->stopped || info->tty->hw_stopped) {
578 base_addr[CyIER] &= ~(CyTxMpty | CyTxRdy);
579 break;
580 }
581 /* Because the Embedded Transmit Commands have been
582 enabled, we must check to see if the escape
583 character, NULL, is being sent. If it is, we
584 must ensure that there is room for it to be
585 doubled in the output stream. Therefore we
586 no longer advance the pointer when the character
587 is fetched, but rather wait until after the check
588 for a NULL output character. (This is necessary
589 because there may not be room for the two chars
590 needed to send a NULL.
591 */
592 outch = info->xmit_buf[info->xmit_tail];
593 if (outch) {
594 info->xmit_cnt--;
595 info->xmit_tail = (info->xmit_tail + 1)
596 & (PAGE_SIZE - 1);
597 base_addr[CyTDR] = outch;
598 char_count--;
599 } else {
600 if (char_count > 1) {
601 info->xmit_cnt--;
602 info->xmit_tail = (info->xmit_tail + 1)
603 & (PAGE_SIZE - 1);
604 base_addr[CyTDR] = outch;
605 base_addr[CyTDR] = 0;
606 char_count--;
607 char_count--;
608 } else {
609 break;
610 }
611 }
612 }
613
3099bbc5
JS		 614 if (info->xmit_cnt < WAKEUP_CHARS)
615 tty_wakeup(info->tty);
616
44bafdf3
JS		 617 base_addr[CyTEOIR] = (char_count != saved_cnt) ? 0 : CyNOTRANS;
618 return IRQ_HANDLED;
619} /* cy_tx_interrupt */
1da177e4 620
44bafdf3 621static irqreturn_t cd2401_rx_interrupt(int irq, void *dev_id)
1da177e4 622{
44bafdf3
JS		 623 struct tty_struct *tty;
624 struct cyclades_port *info;
625 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
626 int channel;
627 char data;
628 int char_count;
629 int save_cnt;
44bafdf3
JS		 630
631 /* determine the channel and change to that context */
632 channel = (u_short) (base_addr[CyLICR] >> 2);
633 info = &cy_port[channel];
634 info->last_active = jiffies;
635 save_cnt = char_count = base_addr[CyRFOC];
1da177e4
LT		 636
637#ifdef CONFIG_REMOTE_DEBUG
44bafdf3
JS		 638 if (channel == DEBUG_PORT) {
639 while (char_count--) {
640 data = base_addr[CyRDR];
641 queueDebugChar(data);
642 }
643 } else
1da177e4 644#endif
44bafdf3
JS		 645 /* if there is nowhere to put the data, discard it */
646 if (info->tty == 0) {
647 while (char_count--) {
648 data = base_addr[CyRDR];
649 }
650 } else { /* there is an open port for this data */
651 tty = info->tty;
652 /* load # characters available from the chip */
1da177e4
LT		 653
654#ifdef CYCLOM_ENABLE_MONITORING
44bafdf3
JS		 655 ++info->mon.int_count;
656 info->mon.char_count += char_count;
657 if (char_count > info->mon.char_max)
658 info->mon.char_max = char_count;
659 info->mon.char_last = char_count;
660#endif
4165fe4e 661 while (char_count--) {
44bafdf3
JS		 662 data = base_addr[CyRDR];
663 tty_insert_flip_char(tty, data, TTY_NORMAL);
1da177e4 664#ifdef CYCLOM_16Y_HACK
44bafdf3 665 udelay(10L);
1da177e4 666#endif
44bafdf3
JS		 667 }
668 tty_schedule_flip(tty);
669 }
670 /* end of service */
671 base_addr[CyREOIR] = save_cnt ? 0 : CyNOTRANS;
672 return IRQ_HANDLED;
673} /* cy_rx_interrupt */
1da177e4 674
1da177e4
LT		 675/* This is called whenever a port becomes active;
676 interrupts are enabled and DTR & RTS are turned on.
677 */
44bafdf3 678static int startup(struct cyclades_port *info)
1da177e4 679{
44bafdf3
JS		 680 unsigned long flags;
681 volatile unsigned char *base_addr = (unsigned char *)BASE_ADDR;
682 int channel;
1da177e4 683
44bafdf3
JS		 684 if (info->flags & ASYNC_INITIALIZED) {
685 return 0;
686 }
1da177e4 687
44bafdf3
JS		 688 if (!info->type) {
689 if (info->tty) {
690 set_bit(TTY_IO_ERROR, &info->tty->flags);
691 }
692 return 0;
1da177e4 693 }
44bafdf3
JS		 694 if (!info->xmit_buf) {
695 info->xmit_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
696 if (!info->xmit_buf) {
697 return -ENOMEM;
698 }
1da177e4 699 }
1da177e4 700
44bafdf3 701 config_setup(info);
1da177e4 702
44bafdf3 703 channel = info->line;
1da177e4
LT		 704
705#ifdef SERIAL_DEBUG_OPEN
44bafdf3 706 printk("startup channel %d\n", channel);
1da177e4
LT		 707#endif
708
44bafdf3
JS		 709 local_irq_save(flags);
710 base_addr[CyCAR] = (u_char) channel;
711 write_cy_cmd(base_addr, CyENB_RCVR | CyENB_XMTR);
1da177e4 712
44bafdf3 713 base_addr[CyCAR] = (u_char) channel; /* !!! Is this needed? */
1da177e4
LT		 714 base_addr[CyMSVR1] = CyRTS;
715/* CP('S');CP('1'); */
716 base_addr[CyMSVR2] = CyDTR;
717
718#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 719 printk("cyc: %d: raising DTR\n", __LINE__);
720 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
721 base_addr[CyMSVR2]);
1da177e4
LT		 722#endif
723
724 base_addr[CyIER] |= CyRxData;
725 info->flags |= ASYNC_INITIALIZED;
726
44bafdf3
JS		 727 if (info->tty) {
728 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1da177e4
LT		 729 }
730 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
731
44bafdf3 732 local_irq_restore(flags);
1da177e4
LT		 733
734#ifdef SERIAL_DEBUG_OPEN
44bafdf3 735 printk(" done\n");
1da177e4 736#endif
44bafdf3
JS		 737 return 0;
738} /* startup */
1da177e4 739
44bafdf3 740void start_xmit(struct cyclades_port *info)
1da177e4 741{
44bafdf3
JS		 742 unsigned long flags;
743 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
744 int channel;
1da177e4 745
44bafdf3
JS		 746 channel = info->line;
747 local_irq_save(flags);
1da177e4
LT		 748 base_addr[CyCAR] = channel;
749 base_addr[CyIER] |= CyTxMpty;
44bafdf3
JS		 750 local_irq_restore(flags);
751} /* start_xmit */
1da177e4
LT		 752
753/*
754 * This routine shuts down a serial port; interrupts are disabled,
755 * and DTR is dropped if the hangup on close termio flag is on.
756 */
44bafdf3 757static void shutdown(struct cyclades_port *info)
1da177e4 758{
44bafdf3
JS		 759 unsigned long flags;
760 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
761 int channel;
1da177e4 762
44bafdf3 763 if (!(info->flags & ASYNC_INITIALIZED)) {
1da177e4 764/* CP('$'); */
44bafdf3
JS		 765 return;
766 }
1da177e4 767
44bafdf3 768 channel = info->line;
1da177e4
LT		 769
770#ifdef SERIAL_DEBUG_OPEN
44bafdf3 771 printk("shutdown channel %d\n", channel);
1da177e4
LT		 772#endif
773
44bafdf3
JS		 774 /* !!! REALLY MUST WAIT FOR LAST CHARACTER TO BE
775 SENT BEFORE DROPPING THE LINE !!! (Perhaps
776 set some flag that is read when XMTY happens.)
777 Other choices are to delay some fixed interval
778 or schedule some later processing.
779 */
780 local_irq_save(flags);
781 if (info->xmit_buf) {
782 free_page((unsigned long)info->xmit_buf);
783 info->xmit_buf = NULL;
1da177e4
LT		 784 }
785
44bafdf3 786 base_addr[CyCAR] = (u_char) channel;
1da177e4 787 if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) {
44bafdf3 788 base_addr[CyMSVR1] = 0;
1da177e4 789/* CP('C');CP('1'); */
44bafdf3 790 base_addr[CyMSVR2] = 0;
1da177e4 791#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 792 printk("cyc: %d: dropping DTR\n", __LINE__);
793 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
794 base_addr[CyMSVR2]);
1da177e4 795#endif
44bafdf3
JS		 796 }
797 write_cy_cmd(base_addr, CyDIS_RCVR);
798 /* it may be appropriate to clear _XMIT at
799 some later date (after testing)!!! */
1da177e4 800
44bafdf3
JS		 801 if (info->tty) {
802 set_bit(TTY_IO_ERROR, &info->tty->flags);
1da177e4
LT		 803 }
804 info->flags &= ~ASYNC_INITIALIZED;
44bafdf3 805 local_irq_restore(flags);
1da177e4
LT		 806
807#ifdef SERIAL_DEBUG_OPEN
44bafdf3 808 printk(" done\n");
1da177e4 809#endif
44bafdf3 810} /* shutdown */
1da177e4
LT		 811
812/*
813 * This routine finds or computes the various line characteristics.
814 */
44bafdf3 815static void config_setup(struct cyclades_port *info)
1da177e4 816{
44bafdf3
JS		 817 unsigned long flags;
818 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
819 int channel;
820 unsigned cflag;
821 int i;
822 unsigned char ti, need_init_chan = 0;
823
824 if (!info->tty || !info->tty->termios) {
825 return;
826 }
827 if (info->line == -1) {
828 return;
829 }
830 cflag = info->tty->termios->c_cflag;
831
832 /* baud rate */
833 i = cflag & CBAUD;
1da177e4
LT		 834#ifdef CBAUDEX
835/* Starting with kernel 1.1.65, there is direct support for
836 higher baud rates. The following code supports those
837 changes. The conditional aspect allows this driver to be
838 used for earlier as well as later kernel versions. (The
839 mapping is slightly different from serial.c because there
840 is still the possibility of supporting 75 kbit/sec with
841 the Cyclades board.)
842 */
44bafdf3
JS		 843 if (i & CBAUDEX) {
844 if (i == B57600)
845 i = 16;
846 else if (i == B115200)
847 i = 18;
1da177e4 848#ifdef B78600
44bafdf3
JS		 849 else if (i == B78600)
850 i = 17;
1da177e4 851#endif
44bafdf3
JS		 852 else
853 info->tty->termios->c_cflag &= ~CBAUDEX;
854 }
855#endif
856 if (i == 15) {
857 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_HI)
858 i += 1;
859 if ((info->flags & ASYNC_SPD_MASK) == ASYNC_SPD_VHI)
860 i += 3;
861 }
862 /* Don't ever change the speed of the console port. It will
863 * run at the speed specified in bootinfo, or at 19.2K */
864 /* Actually, it should run at whatever speed 166Bug was using */
865 /* Note info->timeout isn't used at present */
866 if (info != serial_console_info) {
867 info->tbpr = baud_bpr[i]; /* Tx BPR */
868 info->tco = baud_co[i]; /* Tx CO */
869 info->rbpr = baud_bpr[i]; /* Rx BPR */
870 info->rco = baud_co[i] >> 5; /* Rx CO */
871 if (baud_table[i] == 134) {
872 info->timeout =
873 (info->xmit_fifo_size * HZ * 30 / 269) + 2;
874 /* get it right for 134.5 baud */
875 } else if (baud_table[i]) {
876 info->timeout =
877 (info->xmit_fifo_size * HZ * 15 / baud_table[i]) +
878 2;
879 /* this needs to be propagated into the card info */
880 } else {
881 info->timeout = 0;
882 }
883 }
884 /* By tradition (is it a standard?) a baud rate of zero
885 implies the line should be/has been closed. A bit
886 later in this routine such a test is performed. */
887
888 /* byte size and parity */
889 info->cor7 = 0;
890 info->cor6 = 0;
891 info->cor5 = 0;
892 info->cor4 = (info->default_threshold ? info->default_threshold : baud_cor4[i]); /* receive threshold */
893 /* Following two lines added 101295, RGH. */
894 /* It is obviously wrong to access CyCORx, and not info->corx here,
895 * try and remember to fix it later! */
896 channel = info->line;
897 base_addr[CyCAR] = (u_char) channel;
898 if (C_CLOCAL(info->tty)) {
899 if (base_addr[CyIER] & CyMdmCh)
900 base_addr[CyIER] &= ~CyMdmCh; /* without modem intr */
901 /* ignore 1->0 modem transitions */
902 if (base_addr[CyCOR4] & (CyDSR | CyCTS | CyDCD))
903 base_addr[CyCOR4] &= ~(CyDSR | CyCTS | CyDCD);
904 /* ignore 0->1 modem transitions */
905 if (base_addr[CyCOR5] & (CyDSR | CyCTS | CyDCD))
906 base_addr[CyCOR5] &= ~(CyDSR | CyCTS | CyDCD);
1da177e4 907 } else {
44bafdf3
JS		 908 if ((base_addr[CyIER] & CyMdmCh) != CyMdmCh)
909 base_addr[CyIER] |= CyMdmCh; /* with modem intr */
910 /* act on 1->0 modem transitions */
911 if ((base_addr[CyCOR4] & (CyDSR | CyCTS | CyDCD)) !=
912 (CyDSR | CyCTS | CyDCD))
913 base_addr[CyCOR4] |= CyDSR | CyCTS | CyDCD;
914 /* act on 0->1 modem transitions */
915 if ((base_addr[CyCOR5] & (CyDSR | CyCTS | CyDCD)) !=
916 (CyDSR | CyCTS | CyDCD))
917 base_addr[CyCOR5] |= CyDSR | CyCTS | CyDCD;
918 }
919 info->cor3 = (cflag & CSTOPB) ? Cy_2_STOP : Cy_1_STOP;
920 info->cor2 = CyETC;
921 switch (cflag & CSIZE) {
922 case CS5:
923 info->cor1 = Cy_5_BITS;
924 break;
925 case CS6:
926 info->cor1 = Cy_6_BITS;
927 break;
928 case CS7:
929 info->cor1 = Cy_7_BITS;
930 break;
931 case CS8:
932 info->cor1 = Cy_8_BITS;
933 break;
934 }
935 if (cflag & PARENB) {
936 if (cflag & PARODD) {
937 info->cor1 |= CyPARITY_O;
938 } else {
939 info->cor1 |= CyPARITY_E;
940 }
941 } else {
942 info->cor1 |= CyPARITY_NONE;
943 }
944
945 /* CTS flow control flag */
1da177e4 946#if 0
44bafdf3
JS		 947 /* Don't complcate matters for now! RGH 141095 */
948 if (cflag & CRTSCTS) {
949 info->flags |= ASYNC_CTS_FLOW;
950 info->cor2 |= CyCtsAE;
951 } else {
952 info->flags &= ~ASYNC_CTS_FLOW;
953 info->cor2 &= ~CyCtsAE;
954 }
955#endif
956 if (cflag & CLOCAL)
957 info->flags &= ~ASYNC_CHECK_CD;
958 else
959 info->flags |= ASYNC_CHECK_CD;
1da177e4
LT		 960
961 /***********************************************
962 The hardware option, CyRtsAO, presents RTS when
963 the chip has characters to send. Since most modems
964 use RTS as reverse (inbound) flow control, this
965 option is not used. If inbound flow control is
966 necessary, DTR can be programmed to provide the
967 appropriate signals for use with a non-standard
968 cable. Contact Marcio Saito for details.
969 ***********************************************/
970
44bafdf3 971 channel = info->line;
1da177e4 972
44bafdf3
JS		 973 local_irq_save(flags);
974 base_addr[CyCAR] = (u_char) channel;
1da177e4
LT		 975
976 /* CyCMR set once only in mvme167_init_serial() */
977 if (base_addr[CyLICR] != channel << 2)
44bafdf3 978 base_addr[CyLICR] = channel << 2;
1da177e4 979 if (base_addr[CyLIVR] != 0x5c)
44bafdf3 980 base_addr[CyLIVR] = 0x5c;
1da177e4 981
44bafdf3 982 /* tx and rx baud rate */
1da177e4
LT		 983
984 if (base_addr[CyCOR1] != info->cor1)
44bafdf3 985 need_init_chan = 1;
1da177e4 986 if (base_addr[CyTCOR] != info->tco)
44bafdf3 987 base_addr[CyTCOR] = info->tco;
1da177e4 988 if (base_addr[CyTBPR] != info->tbpr)
44bafdf3 989 base_addr[CyTBPR] = info->tbpr;
1da177e4 990 if (base_addr[CyRCOR] != info->rco)
44bafdf3 991 base_addr[CyRCOR] = info->rco;
1da177e4 992 if (base_addr[CyRBPR] != info->rbpr)
44bafdf3 993 base_addr[CyRBPR] = info->rbpr;
1da177e4
LT		 994
995 /* set line characteristics according configuration */
996
997 if (base_addr[CySCHR1] != START_CHAR(info->tty))
44bafdf3 998 base_addr[CySCHR1] = START_CHAR(info->tty);
1da177e4 999 if (base_addr[CySCHR2] != STOP_CHAR(info->tty))
44bafdf3 1000 base_addr[CySCHR2] = STOP_CHAR(info->tty);
1da177e4 1001 if (base_addr[CySCRL] != START_CHAR(info->tty))
44bafdf3 1002 base_addr[CySCRL] = START_CHAR(info->tty);
1da177e4 1003 if (base_addr[CySCRH] != START_CHAR(info->tty))
44bafdf3 1004 base_addr[CySCRH] = START_CHAR(info->tty);
1da177e4 1005 if (base_addr[CyCOR1] != info->cor1)
44bafdf3 1006 base_addr[CyCOR1] = info->cor1;
1da177e4 1007 if (base_addr[CyCOR2] != info->cor2)
44bafdf3 1008 base_addr[CyCOR2] = info->cor2;
1da177e4 1009 if (base_addr[CyCOR3] != info->cor3)
44bafdf3 1010 base_addr[CyCOR3] = info->cor3;
1da177e4 1011 if (base_addr[CyCOR4] != info->cor4)
44bafdf3 1012 base_addr[CyCOR4] = info->cor4;
1da177e4 1013 if (base_addr[CyCOR5] != info->cor5)
44bafdf3 1014 base_addr[CyCOR5] = info->cor5;
1da177e4 1015 if (base_addr[CyCOR6] != info->cor6)
44bafdf3 1016 base_addr[CyCOR6] = info->cor6;
1da177e4 1017 if (base_addr[CyCOR7] != info->cor7)
44bafdf3 1018 base_addr[CyCOR7] = info->cor7;
1da177e4
LT		 1019
1020 if (need_init_chan)
44bafdf3 1021 write_cy_cmd(base_addr, CyINIT_CHAN);
1da177e4 1022
44bafdf3 1023 base_addr[CyCAR] = (u_char) channel; /* !!! Is this needed? */
1da177e4
LT		 1024
1025 /* 2ms default rx timeout */
1026 ti = info->default_timeout ? info->default_timeout : 0x02;
1027 if (base_addr[CyRTPRL] != ti)
44bafdf3 1028 base_addr[CyRTPRL] = ti;
1da177e4 1029 if (base_addr[CyRTPRH] != 0)
44bafdf3 1030 base_addr[CyRTPRH] = 0;
1da177e4
LT		 1031
1032 /* Set up RTS here also ????? RGH 141095 */
44bafdf3
JS		 1033 if (i == 0) { /* baud rate is zero, turn off line */
1034 if ((base_addr[CyMSVR2] & CyDTR) == CyDTR)
1035 base_addr[CyMSVR2] = 0;
1da177e4 1036#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 1037 printk("cyc: %d: dropping DTR\n", __LINE__);
1038 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
1039 base_addr[CyMSVR2]);
1da177e4 1040#endif
44bafdf3
JS		 1041 } else {
1042 if ((base_addr[CyMSVR2] & CyDTR) != CyDTR)
1043 base_addr[CyMSVR2] = CyDTR;
1da177e4 1044#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 1045 printk("cyc: %d: raising DTR\n", __LINE__);
1046 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
1047 base_addr[CyMSVR2]);
1da177e4
LT		 1048#endif
1049 }
1050
44bafdf3
JS		 1051 if (info->tty) {
1052 clear_bit(TTY_IO_ERROR, &info->tty->flags);
1da177e4
LT		 1053 }
1054
44bafdf3 1055 local_irq_restore(flags);
1da177e4 1056
44bafdf3 1057} /* config_setup */
1da177e4 1058
a5b08c66 1059static int cy_put_char(struct tty_struct *tty, unsigned char ch)
1da177e4 1060{
c9f19e96 1061 struct cyclades_port *info = tty->driver_data;
44bafdf3 1062 unsigned long flags;
1da177e4
LT		 1063
1064#ifdef SERIAL_DEBUG_IO
44bafdf3 1065 printk("cy_put_char %s(0x%02x)\n", tty->name, ch);
1da177e4
LT		 1066#endif
1067
44bafdf3 1068 if (serial_paranoia_check(info, tty->name, "cy_put_char"))
a5b08c66 1069 return 0;
1da177e4 1070
44bafdf3 1071 if (!info->xmit_buf)
63a59fa7 1072 return 0;
1da177e4 1073
44bafdf3 1074 local_irq_save(flags);
1da177e4 1075 if (info->xmit_cnt >= PAGE_SIZE - 1) {
44bafdf3 1076 local_irq_restore(flags);
a5b08c66 1077 return 0;
1da177e4
LT		 1078 }
1079
1080 info->xmit_buf[info->xmit_head++] = ch;
1081 info->xmit_head &= PAGE_SIZE - 1;
1082 info->xmit_cnt++;
44bafdf3 1083 local_irq_restore(flags);
a5b08c66 1084 return 1;
44bafdf3 1085} /* cy_put_char */
1da177e4 1086
44bafdf3 1087static void cy_flush_chars(struct tty_struct *tty)
1da177e4 1088{
c9f19e96 1089 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 1090 unsigned long flags;
1091 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1092 int channel;
1093
1da177e4 1094#ifdef SERIAL_DEBUG_IO
44bafdf3 1095 printk("cy_flush_chars %s\n", tty->name); /* */
1da177e4
LT		 1096#endif
1097
44bafdf3
JS		 1098 if (serial_paranoia_check(info, tty->name, "cy_flush_chars"))
1099 return;
1da177e4 1100
44bafdf3
JS		 1101 if (info->xmit_cnt <= 0 || tty->stopped
1102 || tty->hw_stopped || !info->xmit_buf)
1103 return;
1da177e4 1104
44bafdf3 1105 channel = info->line;
1da177e4 1106
44bafdf3 1107 local_irq_save(flags);
1da177e4
LT		 1108 base_addr[CyCAR] = channel;
1109 base_addr[CyIER] |= CyTxMpty;
44bafdf3
JS		 1110 local_irq_restore(flags);
1111} /* cy_flush_chars */
1da177e4
LT		 1112
1113/* This routine gets called when tty_write has put something into
1114 the write_queue. If the port is not already transmitting stuff,
1115 start it off by enabling interrupts. The interrupt service
1116 routine will then ensure that the characters are sent. If the
1117 port is already active, there is no need to kick it.
1118 */
44bafdf3 1119static int cy_write(struct tty_struct *tty, const unsigned char *buf, int count)
1da177e4 1120{
c9f19e96 1121 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 1122 unsigned long flags;
1123 int c, total = 0;
1da177e4
LT		 1124
1125#ifdef SERIAL_DEBUG_IO
44bafdf3 1126 printk("cy_write %s\n", tty->name); /* */
1da177e4
LT		 1127#endif
1128
44bafdf3
JS		 1129 if (serial_paranoia_check(info, tty->name, "cy_write")) {
1130 return 0;
1131 }
1da177e4 1132
44bafdf3
JS		 1133 if (!info->xmit_buf) {
1134 return 0;
1135 }
1da177e4 1136
44bafdf3
JS		 1137 while (1) {
1138 local_irq_save(flags);
1139 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1140 SERIAL_XMIT_SIZE - info->xmit_head));
1141 if (c <= 0) {
1142 local_irq_restore(flags);
1143 break;
1144 }
1145
1146 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1147 info->xmit_head =
1148 (info->xmit_head + c) & (SERIAL_XMIT_SIZE - 1);
1149 info->xmit_cnt += c;
1150 local_irq_restore(flags);
1151
1152 buf += c;
1153 count -= c;
1154 total += c;
1155 }
1156
1157 if (info->xmit_cnt && !tty->stopped && !tty->hw_stopped) {
1158 start_xmit(info);
1159 }
1160 return total;
1161} /* cy_write */
1162
1163static int cy_write_room(struct tty_struct *tty)
1da177e4 1164{
c9f19e96 1165 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 1166 int ret;
1167
1da177e4 1168#ifdef SERIAL_DEBUG_IO
44bafdf3 1169 printk("cy_write_room %s\n", tty->name); /* */
1da177e4
LT		 1170#endif
1171
44bafdf3
JS		 1172 if (serial_paranoia_check(info, tty->name, "cy_write_room"))
1173 return 0;
1174 ret = PAGE_SIZE - info->xmit_cnt - 1;
1175 if (ret < 0)
1176 ret = 0;
1177 return ret;
1178} /* cy_write_room */
1da177e4 1179
44bafdf3 1180static int cy_chars_in_buffer(struct tty_struct *tty)
1da177e4 1181{
c9f19e96 1182 struct cyclades_port *info = tty->driver_data;
44bafdf3 1183
1da177e4 1184#ifdef SERIAL_DEBUG_IO
44bafdf3 1185 printk("cy_chars_in_buffer %s %d\n", tty->name, info->xmit_cnt); /* */
1da177e4
LT		 1186#endif
1187
44bafdf3
JS		 1188 if (serial_paranoia_check(info, tty->name, "cy_chars_in_buffer"))
1189 return 0;
1da177e4 1190
44bafdf3
JS		 1191 return info->xmit_cnt;
1192} /* cy_chars_in_buffer */
1da177e4 1193
44bafdf3 1194static void cy_flush_buffer(struct tty_struct *tty)
1da177e4 1195{
c9f19e96 1196 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 1197 unsigned long flags;
1198
1da177e4 1199#ifdef SERIAL_DEBUG_IO
44bafdf3 1200 printk("cy_flush_buffer %s\n", tty->name); /* */
1da177e4
LT		 1201#endif
1202
44bafdf3
JS		 1203 if (serial_paranoia_check(info, tty->name, "cy_flush_buffer"))
1204 return;
1205 local_irq_save(flags);
1da177e4 1206 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
44bafdf3
JS		 1207 local_irq_restore(flags);
1208 tty_wakeup(tty);
1209} /* cy_flush_buffer */
1da177e4
LT		 1210
1211/* This routine is called by the upper-layer tty layer to signal
1212 that incoming characters should be throttled or that the
1213 throttle should be released.
1214 */
44bafdf3 1215static void cy_throttle(struct tty_struct *tty)
1da177e4 1216{
c9f19e96 1217 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 1218 unsigned long flags;
1219 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1220 int channel;
1da177e4
LT		 1221
1222#ifdef SERIAL_DEBUG_THROTTLE
44bafdf3
JS		 1223 char buf[64];
1224
1225 printk("throttle %s: %d....\n", tty_name(tty, buf),
1226 tty->ldisc.chars_in_buffer(tty));
1227 printk("cy_throttle %s\n", tty->name);
1da177e4
LT		 1228#endif
1229
44bafdf3
JS		 1230 if (serial_paranoia_check(info, tty->name, "cy_nthrottle")) {
1231 return;
1232 }
1da177e4 1233
44bafdf3
JS		 1234 if (I_IXOFF(tty)) {
1235 info->x_char = STOP_CHAR(tty);
1236 /* Should use the "Send Special Character" feature!!! */
1237 }
1da177e4 1238
44bafdf3 1239 channel = info->line;
1da177e4 1240
44bafdf3
JS		 1241 local_irq_save(flags);
1242 base_addr[CyCAR] = (u_char) channel;
1da177e4 1243 base_addr[CyMSVR1] = 0;
44bafdf3
JS		 1244 local_irq_restore(flags);
1245} /* cy_throttle */
1da177e4 1246
44bafdf3 1247static void cy_unthrottle(struct tty_struct *tty)
1da177e4 1248{
c9f19e96 1249 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 1250 unsigned long flags;
1251 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1252 int channel;
1da177e4
LT		 1253
1254#ifdef SERIAL_DEBUG_THROTTLE
44bafdf3
JS		 1255 char buf[64];
1256
1257 printk("throttle %s: %d....\n", tty_name(tty, buf),
1258 tty->ldisc.chars_in_buffer(tty));
1259 printk("cy_unthrottle %s\n", tty->name);
1da177e4
LT		 1260#endif
1261
44bafdf3
JS		 1262 if (serial_paranoia_check(info, tty->name, "cy_nthrottle")) {
1263 return;
1264 }
1da177e4 1265
44bafdf3
JS		 1266 if (I_IXOFF(tty)) {
1267 info->x_char = START_CHAR(tty);
1268 /* Should use the "Send Special Character" feature!!! */
1269 }
1da177e4 1270
44bafdf3 1271 channel = info->line;
1da177e4 1272
44bafdf3
JS		 1273 local_irq_save(flags);
1274 base_addr[CyCAR] = (u_char) channel;
1da177e4 1275 base_addr[CyMSVR1] = CyRTS;
44bafdf3
JS		 1276 local_irq_restore(flags);
1277} /* cy_unthrottle */
1da177e4
LT		 1278
1279static int
44bafdf3
JS		 1280get_serial_info(struct cyclades_port *info,
1281 struct serial_struct __user * retinfo)
1da177e4 1282{
44bafdf3 1283 struct serial_struct tmp;
1da177e4
LT		 1284
1285/* CP('g'); */
44bafdf3
JS		 1286 if (!retinfo)
1287 return -EFAULT;
1288 memset(&tmp, 0, sizeof(tmp));
1289 tmp.type = info->type;
1290 tmp.line = info->line;
1291 tmp.port = info->line;
1292 tmp.irq = 0;
1293 tmp.flags = info->flags;
1294 tmp.baud_base = 0; /*!!! */
1295 tmp.close_delay = info->close_delay;
1296 tmp.custom_divisor = 0; /*!!! */
1297 tmp.hub6 = 0; /*!!! */
1298 return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
1299} /* get_serial_info */
1da177e4
LT		 1300
1301static int
44bafdf3
JS		 1302set_serial_info(struct cyclades_port *info,
1303 struct serial_struct __user * new_info)
1da177e4 1304{
44bafdf3
JS		 1305 struct serial_struct new_serial;
1306 struct cyclades_port old_info;
1da177e4
LT		 1307
1308/* CP('s'); */
44bafdf3
JS		 1309 if (!new_info)
1310 return -EFAULT;
1311 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1312 return -EFAULT;
1313 old_info = *info;
1314
1315 if (!capable(CAP_SYS_ADMIN)) {
1316 if ((new_serial.close_delay != info->close_delay) ||
1317 ((new_serial.flags & ASYNC_FLAGS & ~ASYNC_USR_MASK) !=
1318 (info->flags & ASYNC_FLAGS & ~ASYNC_USR_MASK)))
1319 return -EPERM;
1320 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
1321 (new_serial.flags & ASYNC_USR_MASK));
1322 goto check_and_exit;
1323 }
1da177e4 1324
44bafdf3
JS		 1325 /*
1326 * OK, past this point, all the error checking has been done.
1327 * At this point, we start making changes.....
1328 */
1da177e4 1329
44bafdf3
JS		 1330 info->flags = ((info->flags & ~ASYNC_FLAGS) |
1331 (new_serial.flags & ASYNC_FLAGS));
1332 info->close_delay = new_serial.close_delay;
1da177e4 1333
44bafdf3
JS		 1334check_and_exit:
1335 if (info->flags & ASYNC_INITIALIZED) {
1336 config_setup(info);
1337 return 0;
1338 }
1339 return startup(info);
1340} /* set_serial_info */
1da177e4 1341
44bafdf3
JS		 1342static int cy_tiocmget(struct tty_struct *tty, struct file *file)
1343{
c9f19e96 1344 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 1345 int channel;
1346 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1347 unsigned long flags;
1348 unsigned char status;
1da177e4 1349
44bafdf3 1350 channel = info->line;
1da177e4 1351
44bafdf3
JS		 1352 local_irq_save(flags);
1353 base_addr[CyCAR] = (u_char) channel;
1354 status = base_addr[CyMSVR1] | base_addr[CyMSVR2];
1355 local_irq_restore(flags);
1da177e4 1356
44bafdf3
JS		 1357 return ((status & CyRTS) ? TIOCM_RTS : 0)
1358 | ((status & CyDTR) ? TIOCM_DTR : 0)
1359 | ((status & CyDCD) ? TIOCM_CAR : 0)
1360 | ((status & CyDSR) ? TIOCM_DSR : 0)
1361 | ((status & CyCTS) ? TIOCM_CTS : 0);
1362} /* cy_tiocmget */
1da177e4
LT		 1363
1364static int
1365cy_tiocmset(struct tty_struct *tty, struct file *file,
1366 unsigned int set, unsigned int clear)
1367{
c9f19e96 1368 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 1369 int channel;
1370 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1371 unsigned long flags;
1372
1373 channel = info->line;
1374
1375 if (set & TIOCM_RTS) {
1376 local_irq_save(flags);
1377 base_addr[CyCAR] = (u_char) channel;
1da177e4 1378 base_addr[CyMSVR1] = CyRTS;
44bafdf3 1379 local_irq_restore(flags);
1da177e4 1380 }
44bafdf3
JS		 1381 if (set & TIOCM_DTR) {
1382 local_irq_save(flags);
1383 base_addr[CyCAR] = (u_char) channel;
1da177e4 1384/* CP('S');CP('2'); */
44bafdf3 1385 base_addr[CyMSVR2] = CyDTR;
1da177e4 1386#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 1387 printk("cyc: %d: raising DTR\n", __LINE__);
1388 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
1389 base_addr[CyMSVR2]);
1da177e4 1390#endif
44bafdf3 1391 local_irq_restore(flags);
1da177e4
LT		 1392 }
1393
44bafdf3
JS		 1394 if (clear & TIOCM_RTS) {
1395 local_irq_save(flags);
1396 base_addr[CyCAR] = (u_char) channel;
1da177e4 1397 base_addr[CyMSVR1] = 0;
44bafdf3 1398 local_irq_restore(flags);
1da177e4 1399 }
44bafdf3
JS		 1400 if (clear & TIOCM_DTR) {
1401 local_irq_save(flags);
1402 base_addr[CyCAR] = (u_char) channel;
1da177e4 1403/* CP('C');CP('2'); */
44bafdf3 1404 base_addr[CyMSVR2] = 0;
1da177e4 1405#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 1406 printk("cyc: %d: dropping DTR\n", __LINE__);
1407 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
1408 base_addr[CyMSVR2]);
1da177e4 1409#endif
44bafdf3 1410 local_irq_restore(flags);
1da177e4
LT		 1411 }
1412
44bafdf3
JS		 1413 return 0;
1414} /* set_modem_info */
1415
1416static void send_break(struct cyclades_port *info, int duration)
1417{ /* Let the transmit ISR take care of this (since it
1418 requires stuffing characters into the output stream).
1419 */
1420 info->x_break = duration;
1421 if (!info->xmit_cnt) {
1422 start_xmit(info);
1423 }
1424} /* send_break */
1da177e4
LT		 1425
1426static int
44bafdf3 1427get_mon_info(struct cyclades_port *info, struct cyclades_monitor __user * mon)
1da177e4
LT		 1428{
1429
44bafdf3
JS		 1430 if (copy_to_user(mon, &info->mon, sizeof(struct cyclades_monitor)))
1431 return -EFAULT;
1432 info->mon.int_count = 0;
1433 info->mon.char_count = 0;
1434 info->mon.char_max = 0;
1435 info->mon.char_last = 0;
1436 return 0;
1da177e4
LT		 1437}
1438
44bafdf3 1439static int set_threshold(struct cyclades_port *info, unsigned long __user * arg)
1da177e4 1440{
44bafdf3
JS		 1441 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1442 unsigned long value;
1443 int channel;
1444
1445 if (get_user(value, arg))
1446 return -EFAULT;
1447
1448 channel = info->line;
1449 info->cor4 &= ~CyREC_FIFO;
1450 info->cor4 |= value & CyREC_FIFO;
1451 base_addr[CyCOR4] = info->cor4;
1452 return 0;
1da177e4
LT		 1453}
1454
1455static int
44bafdf3 1456get_threshold(struct cyclades_port *info, unsigned long __user * value)
1da177e4 1457{
44bafdf3
JS		 1458 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1459 int channel;
1460 unsigned long tmp;
1461
1462 channel = info->line;
1463
1464 tmp = base_addr[CyCOR4] & CyREC_FIFO;
1465 return put_user(tmp, value);
1da177e4
LT		 1466}
1467
1468static int
44bafdf3 1469set_default_threshold(struct cyclades_port *info, unsigned long __user * arg)
1da177e4 1470{
44bafdf3 1471 unsigned long value;
1da177e4 1472
44bafdf3
JS		 1473 if (get_user(value, arg))
1474 return -EFAULT;
1da177e4 1475
44bafdf3
JS		 1476 info->default_threshold = value & 0x0f;
1477 return 0;
1da177e4
LT		 1478}
1479
1480static int
44bafdf3 1481get_default_threshold(struct cyclades_port *info, unsigned long __user * value)
1da177e4 1482{
44bafdf3 1483 return put_user(info->default_threshold, value);
1da177e4
LT		 1484}
1485
44bafdf3 1486static int set_timeout(struct cyclades_port *info, unsigned long __user * arg)
1da177e4 1487{
44bafdf3
JS		 1488 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1489 int channel;
1490 unsigned long value;
1491
1492 if (get_user(value, arg))
1493 return -EFAULT;
1494
1495 channel = info->line;
1496
1497 base_addr[CyRTPRL] = value & 0xff;
1498 base_addr[CyRTPRH] = (value >> 8) & 0xff;
1499 return 0;
1da177e4
LT		 1500}
1501
44bafdf3 1502static int get_timeout(struct cyclades_port *info, unsigned long __user * value)
1da177e4 1503{
44bafdf3
JS		 1504 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1505 int channel;
1506 unsigned long tmp;
1507
1508 channel = info->line;
1509
1510 tmp = base_addr[CyRTPRL];
1511 return put_user(tmp, value);
1da177e4
LT		 1512}
1513
44bafdf3 1514static int set_default_timeout(struct cyclades_port *info, unsigned long value)
1da177e4 1515{
44bafdf3
JS		 1516 info->default_timeout = value & 0xff;
1517 return 0;
1da177e4
LT		 1518}
1519
1520static int
44bafdf3 1521get_default_timeout(struct cyclades_port *info, unsigned long __user * value)
1da177e4 1522{
44bafdf3 1523 return put_user(info->default_timeout, value);
1da177e4
LT		 1524}
1525
1526static int
44bafdf3
JS		 1527cy_ioctl(struct tty_struct *tty, struct file *file,
1528 unsigned int cmd, unsigned long arg)
1da177e4 1529{
c9f19e96 1530 struct cyclades_port *info = tty->driver_data;
44bafdf3
JS		 1531 int ret_val = 0;
1532 void __user *argp = (void __user *)arg;
1da177e4
LT		 1533
1534#ifdef SERIAL_DEBUG_OTHER
44bafdf3
JS		 1535 printk("cy_ioctl %s, cmd = %x arg = %lx\n", tty->name, cmd, arg); /* */
1536#endif
1537
638157bc
AC		 1538 lock_kernel();
1539
44bafdf3
JS		 1540 switch (cmd) {
1541 case CYGETMON:
1542 ret_val = get_mon_info(info, argp);
1543 break;
1544 case CYGETTHRESH:
1545 ret_val = get_threshold(info, argp);
1546 break;
1547 case CYSETTHRESH:
1548 ret_val = set_threshold(info, argp);
1549 break;
1550 case CYGETDEFTHRESH:
1551 ret_val = get_default_threshold(info, argp);
1552 break;
1553 case CYSETDEFTHRESH:
1554 ret_val = set_default_threshold(info, argp);
1555 break;
1556 case CYGETTIMEOUT:
1557 ret_val = get_timeout(info, argp);
1558 break;
1559 case CYSETTIMEOUT:
1560 ret_val = set_timeout(info, argp);
1561 break;
1562 case CYGETDEFTIMEOUT:
1563 ret_val = get_default_timeout(info, argp);
1564 break;
1565 case CYSETDEFTIMEOUT:
1566 ret_val = set_default_timeout(info, (unsigned long)arg);
1567 break;
1568 case TCSBRK: /* SVID version: non-zero arg --> no break */
1569 ret_val = tty_check_change(tty);
1570 if (ret_val)
1571 break;
1572 tty_wait_until_sent(tty, 0);
1573 if (!arg)
1574 send_break(info, HZ / 4); /* 1/4 second */
1575 break;
1576 case TCSBRKP: /* support for POSIX tcsendbreak() */
1577 ret_val = tty_check_change(tty);
1578 if (ret_val)
1579 break;
1580 tty_wait_until_sent(tty, 0);
1581 send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
1da177e4 1582 break;
1da177e4
LT		 1583
1584/* The following commands are incompletely implemented!!! */
44bafdf3
JS		 1585 case TIOCGSERIAL:
1586 ret_val = get_serial_info(info, argp);
1587 break;
1588 case TIOCSSERIAL:
1589 ret_val = set_serial_info(info, argp);
1590 break;
1591 default:
1592 ret_val = -ENOIOCTLCMD;
1593 }
638157bc 1594 unlock_kernel();
1da177e4
LT		 1595
1596#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1597 printk("cy_ioctl done\n");
1da177e4
LT		 1598#endif
1599
44bafdf3
JS		 1600 return ret_val;
1601} /* cy_ioctl */
1da177e4 1602
44bafdf3 1603static void cy_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1604{
c9f19e96 1605 struct cyclades_port *info = tty->driver_data;
1da177e4
LT		 1606
1607#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1608 printk("cy_set_termios %s\n", tty->name);
1da177e4
LT		 1609#endif
1610
44bafdf3
JS		 1611 if (tty->termios->c_cflag == old_termios->c_cflag)
1612 return;
1613 config_setup(info);
1da177e4 1614
44bafdf3
JS		 1615 if ((old_termios->c_cflag & CRTSCTS) &&
1616 !(tty->termios->c_cflag & CRTSCTS)) {
1617 tty->stopped = 0;
1618 cy_start(tty);
1619 }
1da177e4 1620#ifdef tytso_patch_94Nov25_1726
44bafdf3
JS		 1621 if (!(old_termios->c_cflag & CLOCAL) &&
1622 (tty->termios->c_cflag & CLOCAL))
1623 wake_up_interruptible(&info->open_wait);
1da177e4 1624#endif
44bafdf3 1625} /* cy_set_termios */
1da177e4 1626
44bafdf3 1627static void cy_close(struct tty_struct *tty, struct file *filp)
1da177e4 1628{
c9f19e96 1629 struct cyclades_port *info = tty->driver_data;
1da177e4
LT		 1630
1631/* CP('C'); */
1632#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1633 printk("cy_close %s\n", tty->name);
1da177e4
LT		 1634#endif
1635
44bafdf3
JS		 1636 if (!info || serial_paranoia_check(info, tty->name, "cy_close")) {
1637 return;
1638 }
1da177e4 1639#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1640 printk("cy_close %s, count = %d\n", tty->name, info->count);
1641#endif
1642
1643 if ((tty->count == 1) && (info->count != 1)) {
1644 /*
1645 * Uh, oh. tty->count is 1, which means that the tty
1646 * structure will be freed. Info->count should always
1647 * be one in these conditions. If it's greater than
1648 * one, we've got real problems, since it means the
1649 * serial port won't be shutdown.
1650 */
1651 printk("cy_close: bad serial port count; tty->count is 1, "
1652 "info->count is %d\n", info->count);
1653 info->count = 1;
1654 }
1da177e4 1655#ifdef SERIAL_DEBUG_COUNT
44bafdf3
JS		 1656 printk("cyc: %d: decrementing count to %d\n", __LINE__,
1657 info->count - 1);
1da177e4 1658#endif
44bafdf3
JS		 1659 if (--info->count < 0) {
1660 printk("cy_close: bad serial port count for ttys%d: %d\n",
1661 info->line, info->count);
1da177e4 1662#ifdef SERIAL_DEBUG_COUNT
44bafdf3 1663 printk("cyc: %d: setting count to 0\n", __LINE__);
1da177e4 1664#endif
44bafdf3 1665 info->count = 0;
1da177e4 1666 }
44bafdf3
JS		 1667 if (info->count)
1668 return;
1669 info->flags |= ASYNC_CLOSING;
1670 if (info->flags & ASYNC_INITIALIZED)
1671 tty_wait_until_sent(tty, 3000); /* 30 seconds timeout */
1672 shutdown(info);
978e595f 1673 cy_flush_buffer(tty);
44bafdf3 1674 tty_ldisc_flush(tty);
44bafdf3
JS		 1675 info->tty = NULL;
1676 if (info->blocked_open) {
1677 if (info->close_delay) {
1678 msleep_interruptible(jiffies_to_msecs
1679 (info->close_delay));
1680 }
1681 wake_up_interruptible(&info->open_wait);
1682 }
1683 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1684 wake_up_interruptible(&info->close_wait);
1da177e4
LT		 1685
1686#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1687 printk("cy_close done\n");
1da177e4 1688#endif
44bafdf3 1689} /* cy_close */
1da177e4
LT		 1690
1691/*
1692 * cy_hangup() --- called by tty_hangup() when a hangup is signaled.
1693 */
44bafdf3 1694void cy_hangup(struct tty_struct *tty)
1da177e4 1695{
c9f19e96 1696 struct cyclades_port *info = tty->driver_data;
44bafdf3 1697
1da177e4 1698#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1699 printk("cy_hangup %s\n", tty->name); /* */
1da177e4
LT		 1700#endif
1701
44bafdf3
JS		 1702 if (serial_paranoia_check(info, tty->name, "cy_hangup"))
1703 return;
1704
1705 shutdown(info);
1da177e4 1706#if 0
44bafdf3
JS		 1707 info->event = 0;
1708 info->count = 0;
1da177e4 1709#ifdef SERIAL_DEBUG_COUNT
44bafdf3 1710 printk("cyc: %d: setting count to 0\n", __LINE__);
1da177e4 1711#endif
44bafdf3 1712 info->tty = 0;
1da177e4 1713#endif
44bafdf3
JS		 1714 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1715 wake_up_interruptible(&info->open_wait);
1716} /* cy_hangup */
1da177e4
LT		 1717
1718/*
1719 * ------------------------------------------------------------
1720 * cy_open() and friends
1721 * ------------------------------------------------------------
1722 */
1723
1724static int
44bafdf3
JS		 1725block_til_ready(struct tty_struct *tty, struct file *filp,
1726 struct cyclades_port *info)
1da177e4 1727{
44bafdf3
JS		 1728 DECLARE_WAITQUEUE(wait, current);
1729 unsigned long flags;
1730 int channel;
1731 int retval;
1732 volatile u_char *base_addr = (u_char *) BASE_ADDR;
1733
1734 /*
1735 * If the device is in the middle of being closed, then block
1736 * until it's done, and then try again.
1737 */
1738 if (info->flags & ASYNC_CLOSING) {
1739 interruptible_sleep_on(&info->close_wait);
1740 if (info->flags & ASYNC_HUP_NOTIFY) {
1741 return -EAGAIN;
1742 } else {
1743 return -ERESTARTSYS;
1744 }
1745 }
1746
1747 /*
1748 * If non-blocking mode is set, then make the check up front
1749 * and then exit.
1750 */
1751 if (filp->f_flags & O_NONBLOCK) {
1752 info->flags |= ASYNC_NORMAL_ACTIVE;
1753 return 0;
1754 }
1755
1756 /*
1757 * Block waiting for the carrier detect and the line to become
1758 * free (i.e., not in use by the callout). While we are in
1759 * this loop, info->count is dropped by one, so that
1760 * cy_close() knows when to free things. We restore it upon
1761 * exit, either normal or abnormal.
1762 */
1763 retval = 0;
1764 add_wait_queue(&info->open_wait, &wait);
1da177e4 1765#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1766 printk("block_til_ready before block: %s, count = %d\n",
1767 tty->name, info->count);
1768 /**/
1da177e4 1769#endif
44bafdf3 1770 info->count--;
1da177e4 1771#ifdef SERIAL_DEBUG_COUNT
44bafdf3 1772 printk("cyc: %d: decrementing count to %d\n", __LINE__, info->count);
1da177e4 1773#endif
44bafdf3 1774 info->blocked_open++;
1da177e4 1775
44bafdf3 1776 channel = info->line;
1da177e4 1777
44bafdf3
JS		 1778 while (1) {
1779 local_irq_save(flags);
1780 base_addr[CyCAR] = (u_char) channel;
1781 base_addr[CyMSVR1] = CyRTS;
1da177e4 1782/* CP('S');CP('4'); */
44bafdf3 1783 base_addr[CyMSVR2] = CyDTR;
1da177e4 1784#ifdef SERIAL_DEBUG_DTR
44bafdf3
JS		 1785 printk("cyc: %d: raising DTR\n", __LINE__);
1786 printk(" status: 0x%x, 0x%x\n", base_addr[CyMSVR1],
1787 base_addr[CyMSVR2]);
1788#endif
1789 local_irq_restore(flags);
1790 set_current_state(TASK_INTERRUPTIBLE);
1791 if (tty_hung_up_p(filp)
1792 || !(info->flags & ASYNC_INITIALIZED)) {
1793 if (info->flags & ASYNC_HUP_NOTIFY) {
1794 retval = -EAGAIN;
1795 } else {
1796 retval = -ERESTARTSYS;
1797 }
1798 break;
1799 }
1800 local_irq_save(flags);
1801 base_addr[CyCAR] = (u_char) channel;
1da177e4 1802/* CP('L');CP1(1 && C_CLOCAL(tty)); CP1(1 && (base_addr[CyMSVR1] & CyDCD) ); */
44bafdf3
JS		 1803 if (!(info->flags & ASYNC_CLOSING)
1804 && (C_CLOCAL(tty)
1805 || (base_addr[CyMSVR1] & CyDCD))) {
1806 local_irq_restore(flags);
1807 break;
1808 }
1809 local_irq_restore(flags);
1810 if (signal_pending(current)) {
1811 retval = -ERESTARTSYS;
1812 break;
1813 }
1da177e4 1814#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1815 printk("block_til_ready blocking: %s, count = %d\n",
1816 tty->name, info->count);
1817 /**/
1818#endif
1819 schedule();
1820 }
cc0a8fbb 1821 __set_current_state(TASK_RUNNING);
44bafdf3
JS		 1822 remove_wait_queue(&info->open_wait, &wait);
1823 if (!tty_hung_up_p(filp)) {
1824 info->count++;
1da177e4 1825#ifdef SERIAL_DEBUG_COUNT
44bafdf3
JS		 1826 printk("cyc: %d: incrementing count to %d\n", __LINE__,
1827 info->count);
1da177e4 1828#endif
44bafdf3
JS		 1829 }
1830 info->blocked_open--;
1da177e4 1831#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1832 printk("block_til_ready after blocking: %s, count = %d\n",
1833 tty->name, info->count);
1834 /**/
1da177e4 1835#endif
44bafdf3
JS		 1836 if (retval)
1837 return retval;
1838 info->flags |= ASYNC_NORMAL_ACTIVE;
1839 return 0;
1840} /* block_til_ready */
1da177e4
LT		 1841
1842/*
1843 * This routine is called whenever a serial port is opened. It
1844 * performs the serial-specific initialization for the tty structure.
1845 */
44bafdf3 1846int cy_open(struct tty_struct *tty, struct file *filp)
1da177e4 1847{
44bafdf3
JS		 1848 struct cyclades_port *info;
1849 int retval, line;
1da177e4
LT		 1850
1851/* CP('O'); */
44bafdf3
JS		 1852 line = tty->index;
1853 if ((line < 0) || (NR_PORTS <= line)) {
1854 return -ENODEV;
1855 }
1856 info = &cy_port[line];
1857 if (info->line < 0) {
1858 return -ENODEV;
1859 }
1da177e4 1860#ifdef SERIAL_DEBUG_OTHER
44bafdf3 1861 printk("cy_open %s\n", tty->name); /* */
1da177e4 1862#endif
44bafdf3
JS		 1863 if (serial_paranoia_check(info, tty->name, "cy_open")) {
1864 return -ENODEV;
1865 }
1da177e4 1866#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1867 printk("cy_open %s, count = %d\n", tty->name, info->count);
1868 /**/
1da177e4 1869#endif
44bafdf3 1870 info->count++;
1da177e4 1871#ifdef SERIAL_DEBUG_COUNT
44bafdf3 1872 printk("cyc: %d: incrementing count to %d\n", __LINE__, info->count);
1da177e4 1873#endif
44bafdf3
JS		 1874 tty->driver_data = info;
1875 info->tty = tty;
1da177e4 1876
44bafdf3
JS		 1877 /*
1878 * Start up serial port
1879 */
1880 retval = startup(info);
1881 if (retval) {
1882 return retval;
1883 }
1da177e4 1884
44bafdf3
JS		 1885 retval = block_til_ready(tty, filp, info);
1886 if (retval) {
1da177e4 1887#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1888 printk("cy_open returning after block_til_ready with %d\n",
1889 retval);
1da177e4 1890#endif
44bafdf3
JS		 1891 return retval;
1892 }
1da177e4 1893#ifdef SERIAL_DEBUG_OPEN
44bafdf3
JS		 1894 printk("cy_open done\n");
1895 /**/
1da177e4 1896#endif
44bafdf3
JS		 1897 return 0;
1898} /* cy_open */
1da177e4
LT		 1899
1900/*
1901 * ---------------------------------------------------------------------
1902 * serial167_init() and friends
1903 *
1904 * serial167_init() is called at boot-time to initialize the serial driver.
1905 * ---------------------------------------------------------------------
1906 */
1907
1908/*
1909 * This routine prints out the appropriate serial driver version
1910 * number, and identifies which options were configured into this
1911 * driver.
1912 */
44bafdf3 1913static void show_version(void)
1da177e4 1914{
44bafdf3
JS		 1915 printk("MVME166/167 cd2401 driver\n");
1916} /* show_version */
1da177e4
LT		 1917
1918/* initialize chips on card -- return number of valid
1919 chips (which is number of ports/4) */
1920
1921/*
1922 * This initialises the hardware to a reasonable state. It should
1923 * probe the chip first so as to copy 166-Bug setup as a default for
1924 * port 0. It initialises CMR to CyASYNC; that is never done again, so
1925 * as to limit the number of CyINIT_CHAN commands in normal running.
1926 *
1927 * ... I wonder what I should do if this fails ...
1928 */
1929
44bafdf3 1930void mvme167_serial_console_setup(int cflag)
1da177e4 1931{
44bafdf3 1932 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1da177e4
LT		 1933 int ch;
1934 u_char spd;
1935 u_char rcor, rbpr, badspeed = 0;
1936 unsigned long flags;
1937
1938 local_irq_save(flags);
1939
1940 /*
1941 * First probe channel zero of the chip, to see what speed has
1942 * been selected.
1943 */
1944
1945 base_addr[CyCAR] = 0;
1946
1947 rcor = base_addr[CyRCOR] << 5;
1948 rbpr = base_addr[CyRBPR];
1949
1950 for (spd = 0; spd < sizeof(baud_bpr); spd++)
1951 if (rbpr == baud_bpr[spd] && rcor == baud_co[spd])
1952 break;
1953 if (spd >= sizeof(baud_bpr)) {
1954 spd = 14; /* 19200 */
1955 badspeed = 1; /* Failed to identify speed */
1956 }
1957 initial_console_speed = spd;
1958
1959 /* OK, we have chosen a speed, now reset and reinitialise */
1960
44bafdf3
JS		 1961 my_udelay(20000L); /* Allow time for any active o/p to complete */
1962 if (base_addr[CyCCR] != 0x00) {
1963 local_irq_restore(flags);
1964 /* printk(" chip is never idle (CCR != 0)\n"); */
1965 return;
1966 }
1da177e4 1967
44bafdf3
JS		 1968 base_addr[CyCCR] = CyCHIP_RESET; /* Reset the chip */
1969 my_udelay(1000L);
1da177e4 1970
44bafdf3
JS		 1971 if (base_addr[CyGFRCR] == 0x00) {
1972 local_irq_restore(flags);
1973 /* printk(" chip is not responding (GFRCR stayed 0)\n"); */
1974 return;
1975 }
1da177e4
LT		 1976
1977 /*
1978 * System clock is 20Mhz, divided by 2048, so divide by 10 for a 1.0ms
1979 * tick
1980 */
1981
1982 base_addr[CyTPR] = 10;
1983
44bafdf3
JS		 1984 base_addr[CyPILR1] = 0x01; /* Interrupt level for modem change */
1985 base_addr[CyPILR2] = 0x02; /* Interrupt level for tx ints */
1986 base_addr[CyPILR3] = 0x03; /* Interrupt level for rx ints */
1da177e4
LT		 1987
1988 /*
1989 * Attempt to set up all channels to something reasonable, and
1990 * bang out a INIT_CHAN command. We should then be able to limit
9ddc5b6f 1991 * the amount of fiddling we have to do in normal running.
1da177e4
LT		 1992 */
1993
44bafdf3
JS		 1994 for (ch = 3; ch >= 0; ch--) {
1995 base_addr[CyCAR] = (u_char) ch;
1da177e4
LT		 1996 base_addr[CyIER] = 0;
1997 base_addr[CyCMR] = CyASYNC;
44bafdf3 1998 base_addr[CyLICR] = (u_char) ch << 2;
1da177e4
LT		 1999 base_addr[CyLIVR] = 0x5c;
2000 base_addr[CyTCOR] = baud_co[spd];
2001 base_addr[CyTBPR] = baud_bpr[spd];
2002 base_addr[CyRCOR] = baud_co[spd] >> 5;
2003 base_addr[CyRBPR] = baud_bpr[spd];
2004 base_addr[CySCHR1] = 'Q' & 0x1f;
2005 base_addr[CySCHR2] = 'X' & 0x1f;
2006 base_addr[CySCRL] = 0;
2007 base_addr[CySCRH] = 0;
2008 base_addr[CyCOR1] = Cy_8_BITS | CyPARITY_NONE;
2009 base_addr[CyCOR2] = 0;
2010 base_addr[CyCOR3] = Cy_1_STOP;
2011 base_addr[CyCOR4] = baud_cor4[spd];
2012 base_addr[CyCOR5] = 0;
2013 base_addr[CyCOR6] = 0;
2014 base_addr[CyCOR7] = 0;
2015 base_addr[CyRTPRL] = 2;
2016 base_addr[CyRTPRH] = 0;
44bafdf3
JS		 2017 base_addr[CyMSVR1] = 0;
2018 base_addr[CyMSVR2] = 0;
2019 write_cy_cmd(base_addr, CyINIT_CHAN | CyDIS_RCVR | CyDIS_XMTR);
1da177e4
LT		 2020 }
2021
2022 /*
2023 * Now do specials for channel zero....
2024 */
2025
44bafdf3
JS		 2026 base_addr[CyMSVR1] = CyRTS;
2027 base_addr[CyMSVR2] = CyDTR;
1da177e4 2028 base_addr[CyIER] = CyRxData;
44bafdf3 2029 write_cy_cmd(base_addr, CyENB_RCVR | CyENB_XMTR);
1da177e4
LT		 2030
2031 local_irq_restore(flags);
2032
2033 my_udelay(20000L); /* Let it all settle down */
2034
44bafdf3 2035 printk("CD2401 initialised, chip is rev 0x%02x\n", base_addr[CyGFRCR]);
1da177e4 2036 if (badspeed)
44bafdf3
JS		 2037 printk
2038 (" WARNING: Failed to identify line speed, rcor=%02x,rbpr=%02x\n",
2039 rcor >> 5, rbpr);
2040} /* serial_console_init */
1da177e4 2041
b68e31d0 2042static const struct tty_operations cy_ops = {
1da177e4
LT		 2043 .open = cy_open,
2044 .close = cy_close,
2045 .write = cy_write,
2046 .put_char = cy_put_char,
2047 .flush_chars = cy_flush_chars,
2048 .write_room = cy_write_room,
2049 .chars_in_buffer = cy_chars_in_buffer,
2050 .flush_buffer = cy_flush_buffer,
2051 .ioctl = cy_ioctl,
2052 .throttle = cy_throttle,
2053 .unthrottle = cy_unthrottle,
2054 .set_termios = cy_set_termios,
2055 .stop = cy_stop,
2056 .start = cy_start,
2057 .hangup = cy_hangup,
2058 .tiocmget = cy_tiocmget,
2059 .tiocmset = cy_tiocmset,
2060};
44bafdf3 2061
1da177e4
LT		 2062/* The serial driver boot-time initialization code!
2063 Hardware I/O ports are mapped to character special devices on a
2064 first found, first allocated manner. That is, this code searches
2065 for Cyclom cards in the system. As each is found, it is probed
2066 to discover how many chips (and thus how many ports) are present.
2067 These ports are mapped to the tty ports 64 and upward in monotonic
2068 fashion. If an 8-port card is replaced with a 16-port card, the
2069 port mapping on a following card will shift.
2070
2071 This approach is different from what is used in the other serial
2072 device driver because the Cyclom is more properly a multiplexer,
2073 not just an aggregation of serial ports on one card.
2074
2075 If there are more cards with more ports than have been statically
2076 allocated above, a warning is printed and the extra ports are ignored.
2077 */
44bafdf3 2078static int __init serial167_init(void)
1da177e4 2079{
44bafdf3
JS		 2080 struct cyclades_port *info;
2081 int ret = 0;
2082 int good_ports = 0;
2083 int port_num = 0;
2084 int index;
2085 int DefSpeed;
1da177e4 2086#ifdef notyet
44bafdf3 2087 struct sigaction sa;
1da177e4
LT		 2088#endif
2089
44bafdf3
JS		 2090 if (!(mvme16x_config & MVME16x_CONFIG_GOT_CD2401))
2091 return 0;
1da177e4 2092
44bafdf3
JS		 2093 cy_serial_driver = alloc_tty_driver(NR_PORTS);
2094 if (!cy_serial_driver)
2095 return -ENOMEM;
1da177e4
LT		 2096
2097#if 0
44bafdf3 2098 scrn[1] = '\0';
1da177e4
LT		 2099#endif
2100
44bafdf3 2101 show_version();
1da177e4 2102
44bafdf3
JS		 2103 /* Has "console=0,9600n8" been used in bootinfo to change speed? */
2104 if (serial_console_cflag)
2105 DefSpeed = serial_console_cflag & 0017;
2106 else {
2107 DefSpeed = initial_console_speed;
2108 serial_console_info = &cy_port[0];
2109 serial_console_cflag = DefSpeed | CS8;
1da177e4 2110#if 0
44bafdf3
JS		 2111 serial_console = 64; /*callout_driver.minor_start */
2112#endif
2113 }
1da177e4 2114
44bafdf3 2115 /* Initialize the tty_driver structure */
1da177e4 2116
44bafdf3
JS		 2117 cy_serial_driver->owner = THIS_MODULE;
2118 cy_serial_driver->name = "ttyS";
2119 cy_serial_driver->major = TTY_MAJOR;
2120 cy_serial_driver->minor_start = 64;
2121 cy_serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
2122 cy_serial_driver->subtype = SERIAL_TYPE_NORMAL;
2123 cy_serial_driver->init_termios = tty_std_termios;
2124 cy_serial_driver->init_termios.c_cflag =
2125 B9600 | CS8 | CREAD | HUPCL | CLOCAL;
2126 cy_serial_driver->flags = TTY_DRIVER_REAL_RAW;
2127 tty_set_operations(cy_serial_driver, &cy_ops);
2128
2129 ret = tty_register_driver(cy_serial_driver);
2130 if (ret) {
2131 printk(KERN_ERR "Couldn't register MVME166/7 serial driver\n");
2132 put_tty_driver(cy_serial_driver);
2133 return ret;
2134 }
1da177e4 2135
44bafdf3
JS		 2136 port_num = 0;
2137 info = cy_port;
2138 for (index = 0; index < 1; index++) {
1da177e4 2139
44bafdf3
JS		 2140 good_ports = 4;
2141
2142 if (port_num < NR_PORTS) {
2143 while (good_ports-- && port_num < NR_PORTS) {
1da177e4 2144 /*** initialize port ***/
44bafdf3
JS		 2145 info->magic = CYCLADES_MAGIC;
2146 info->type = PORT_CIRRUS;
2147 info->card = index;
2148 info->line = port_num;
2149 info->flags = STD_COM_FLAGS;
2150 info->tty = NULL;
2151 info->xmit_fifo_size = 12;
2152 info->cor1 = CyPARITY_NONE | Cy_8_BITS;
2153 info->cor2 = CyETC;
2154 info->cor3 = Cy_1_STOP;
2155 info->cor4 = 0x08; /* _very_ small receive threshold */
2156 info->cor5 = 0;
2157 info->cor6 = 0;
2158 info->cor7 = 0;
2159 info->tbpr = baud_bpr[DefSpeed]; /* Tx BPR */
2160 info->tco = baud_co[DefSpeed]; /* Tx CO */
2161 info->rbpr = baud_bpr[DefSpeed]; /* Rx BPR */
2162 info->rco = baud_co[DefSpeed] >> 5; /* Rx CO */
2163 info->close_delay = 0;
2164 info->x_char = 0;
44bafdf3 2165 info->count = 0;
1da177e4 2166#ifdef SERIAL_DEBUG_COUNT
44bafdf3
JS		 2167 printk("cyc: %d: setting count to 0\n",
2168 __LINE__);
2169#endif
2170 info->blocked_open = 0;
2171 info->default_threshold = 0;
2172 info->default_timeout = 0;
44bafdf3
JS		 2173 init_waitqueue_head(&info->open_wait);
2174 init_waitqueue_head(&info->close_wait);
2175 /* info->session */
2176 /* info->pgrp */
1da177e4 2177/*** !!!!!!!! this may expose new bugs !!!!!!!!! *********/
44bafdf3
JS		 2178 info->read_status_mask =
2179 CyTIMEOUT | CySPECHAR | CyBREAK | CyPARITY |
2180 CyFRAME | CyOVERRUN;
2181 /* info->timeout */
2182
2183 printk("ttyS%d ", info->line);
2184 port_num++;
2185 info++;
2186 if (!(port_num & 7)) {
2187 printk("\n ");
2188 }
2189 }
1da177e4 2190 }
44bafdf3
JS		 2191 printk("\n");
2192 }
2193 while (port_num < NR_PORTS) {
2194 info->line = -1;
2195 port_num++;
2196 info++;
2197 }
1da177e4 2198#ifdef CONFIG_REMOTE_DEBUG
44bafdf3
JS		 2199 debug_setup();
2200#endif
2201 ret = request_irq(MVME167_IRQ_SER_ERR, cd2401_rxerr_interrupt, 0,
2202 "cd2401_errors", cd2401_rxerr_interrupt);
2203 if (ret) {
2204 printk(KERN_ERR "Could't get cd2401_errors IRQ");
2205 goto cleanup_serial_driver;
2206 }
2207
2208 ret = request_irq(MVME167_IRQ_SER_MODEM, cd2401_modem_interrupt, 0,
2209 "cd2401_modem", cd2401_modem_interrupt);
2210 if (ret) {
2211 printk(KERN_ERR "Could't get cd2401_modem IRQ");
2212 goto cleanup_irq_cd2401_errors;
2213 }
2214
2215 ret = request_irq(MVME167_IRQ_SER_TX, cd2401_tx_interrupt, 0,
2216 "cd2401_txints", cd2401_tx_interrupt);
2217 if (ret) {
2218 printk(KERN_ERR "Could't get cd2401_txints IRQ");
2219 goto cleanup_irq_cd2401_modem;
2220 }
2221
2222 ret = request_irq(MVME167_IRQ_SER_RX, cd2401_rx_interrupt, 0,
2223 "cd2401_rxints", cd2401_rx_interrupt);
2224 if (ret) {
2225 printk(KERN_ERR "Could't get cd2401_rxints IRQ");
2226 goto cleanup_irq_cd2401_txints;
2227 }
2228
2229 /* Now we have registered the interrupt handlers, allow the interrupts */
2230
2231 pcc2chip[PccSCCMICR] = 0x15; /* Serial ints are level 5 */
2232 pcc2chip[PccSCCTICR] = 0x15;
2233 pcc2chip[PccSCCRICR] = 0x15;
2234
2235 pcc2chip[PccIMLR] = 3; /* Allow PCC2 ints above 3!? */
2236
2237 return 0;
1da177e4 2238cleanup_irq_cd2401_txints:
44bafdf3 2239 free_irq(MVME167_IRQ_SER_TX, cd2401_tx_interrupt);
1da177e4 2240cleanup_irq_cd2401_modem:
44bafdf3 2241 free_irq(MVME167_IRQ_SER_MODEM, cd2401_modem_interrupt);
1da177e4 2242cleanup_irq_cd2401_errors:
44bafdf3 2243 free_irq(MVME167_IRQ_SER_ERR, cd2401_rxerr_interrupt);
1da177e4 2244cleanup_serial_driver:
44bafdf3
JS		 2245 if (tty_unregister_driver(cy_serial_driver))
2246 printk(KERN_ERR
2247 "Couldn't unregister MVME166/7 serial driver\n");
2248 put_tty_driver(cy_serial_driver);
2249 return ret;
2250} /* serial167_init */
1da177e4
LT		 2251
2252module_init(serial167_init);
2253
1da177e4 2254#ifdef CYCLOM_SHOW_STATUS
44bafdf3 2255static void show_status(int line_num)
1da177e4 2256{
44bafdf3
JS		 2257 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
2258 int channel;
2259 struct cyclades_port *info;
2260 unsigned long flags;
2261
2262 info = &cy_port[line_num];
2263 channel = info->line;
2264 printk(" channel %d\n", channel);
2265 /**/ printk(" cy_port\n");
2266 printk(" card line flags = %d %d %x\n",
2267 info->card, info->line, info->flags);
2268 printk
2269 (" *tty read_status_mask timeout xmit_fifo_size = %lx %x %x %x\n",
2270 (long)info->tty, info->read_status_mask, info->timeout,
2271 info->xmit_fifo_size);
2272 printk(" cor1,cor2,cor3,cor4,cor5,cor6,cor7 = %x %x %x %x %x %x %x\n",
2273 info->cor1, info->cor2, info->cor3, info->cor4, info->cor5,
2274 info->cor6, info->cor7);
2275 printk(" tbpr,tco,rbpr,rco = %d %d %d %d\n", info->tbpr, info->tco,
2276 info->rbpr, info->rco);
2277 printk(" close_delay event count = %d %d %d\n", info->close_delay,
2278 info->event, info->count);
2279 printk(" x_char blocked_open = %x %x\n", info->x_char,
2280 info->blocked_open);
2281 printk(" open_wait = %lx %lx %lx\n", (long)info->open_wait);
2282
2283 local_irq_save(flags);
1da177e4
LT		 2284
2285/* Global Registers */
2286
2287 printk(" CyGFRCR %x\n", base_addr[CyGFRCR]);
2288 printk(" CyCAR %x\n", base_addr[CyCAR]);
2289 printk(" CyRISR %x\n", base_addr[CyRISR]);
2290 printk(" CyTISR %x\n", base_addr[CyTISR]);
2291 printk(" CyMISR %x\n", base_addr[CyMISR]);
2292 printk(" CyRIR %x\n", base_addr[CyRIR]);
2293 printk(" CyTIR %x\n", base_addr[CyTIR]);
2294 printk(" CyMIR %x\n", base_addr[CyMIR]);
2295 printk(" CyTPR %x\n", base_addr[CyTPR]);
2296
44bafdf3 2297 base_addr[CyCAR] = (u_char) channel;
1da177e4
LT		 2298
2299/* Virtual Registers */
2300
2301#if 0
2302 printk(" CyRIVR %x\n", base_addr[CyRIVR]);
2303 printk(" CyTIVR %x\n", base_addr[CyTIVR]);
2304 printk(" CyMIVR %x\n", base_addr[CyMIVR]);
2305 printk(" CyMISR %x\n", base_addr[CyMISR]);
2306#endif
2307
2308/* Channel Registers */
2309
2310 printk(" CyCCR %x\n", base_addr[CyCCR]);
2311 printk(" CyIER %x\n", base_addr[CyIER]);
2312 printk(" CyCOR1 %x\n", base_addr[CyCOR1]);
2313 printk(" CyCOR2 %x\n", base_addr[CyCOR2]);
2314 printk(" CyCOR3 %x\n", base_addr[CyCOR3]);
2315 printk(" CyCOR4 %x\n", base_addr[CyCOR4]);
2316 printk(" CyCOR5 %x\n", base_addr[CyCOR5]);
2317#if 0
2318 printk(" CyCCSR %x\n", base_addr[CyCCSR]);
2319 printk(" CyRDCR %x\n", base_addr[CyRDCR]);
2320#endif
2321 printk(" CySCHR1 %x\n", base_addr[CySCHR1]);
2322 printk(" CySCHR2 %x\n", base_addr[CySCHR2]);
2323#if 0
2324 printk(" CySCHR3 %x\n", base_addr[CySCHR3]);
2325 printk(" CySCHR4 %x\n", base_addr[CySCHR4]);
2326 printk(" CySCRL %x\n", base_addr[CySCRL]);
2327 printk(" CySCRH %x\n", base_addr[CySCRH]);
2328 printk(" CyLNC %x\n", base_addr[CyLNC]);
2329 printk(" CyMCOR1 %x\n", base_addr[CyMCOR1]);
2330 printk(" CyMCOR2 %x\n", base_addr[CyMCOR2]);
2331#endif
2332 printk(" CyRTPRL %x\n", base_addr[CyRTPRL]);
2333 printk(" CyRTPRH %x\n", base_addr[CyRTPRH]);
2334 printk(" CyMSVR1 %x\n", base_addr[CyMSVR1]);
2335 printk(" CyMSVR2 %x\n", base_addr[CyMSVR2]);
2336 printk(" CyRBPR %x\n", base_addr[CyRBPR]);
2337 printk(" CyRCOR %x\n", base_addr[CyRCOR]);
2338 printk(" CyTBPR %x\n", base_addr[CyTBPR]);
2339 printk(" CyTCOR %x\n", base_addr[CyTCOR]);
2340
44bafdf3
JS		 2341 local_irq_restore(flags);
2342} /* show_status */
1da177e4
LT		 2343#endif
2344
1da177e4
LT		 2345#if 0
2346/* Dummy routine in mvme16x/config.c for now */
2347
2348/* Serial console setup. Called from linux/init/main.c */
2349
2350void console_setup(char *str, int *ints)
2351{
2352 char *s;
2353 int baud, bits, parity;
2354 int cflag = 0;
2355
2356 /* Sanity check. */
44bafdf3
JS		 2357 if (ints[0] > 3 || ints[1] > 3)
2358 return;
1da177e4
LT		 2359
2360 /* Get baud, bits and parity */
2361 baud = 2400;
2362 bits = 8;
2363 parity = 'n';
44bafdf3
JS		 2364 if (ints[2])
2365 baud = ints[2];
1da177e4
LT		 2366 if ((s = strchr(str, ','))) {
2367 do {
2368 s++;
44bafdf3
JS		 2369 } while (*s >= '0' && *s <= '9');
2370 if (*s)
2371 parity = *s++;
2372 if (*s)
2373 bits = *s - '0';
1da177e4
LT		 2374 }
2375
2376 /* Now construct a cflag setting. */
44bafdf3
JS		 2377 switch (baud) {
2378 case 1200:
2379 cflag |= B1200;
2380 break;
2381 case 9600:
2382 cflag |= B9600;
2383 break;
2384 case 19200:
2385 cflag |= B19200;
2386 break;
2387 case 38400:
2388 cflag |= B38400;
2389 break;
2390 case 2400:
2391 default:
2392 cflag |= B2400;
2393 break;
1da177e4 2394 }
44bafdf3
JS		 2395 switch (bits) {
2396 case 7:
2397 cflag |= CS7;
2398 break;
2399 default:
2400 case 8:
2401 cflag |= CS8;
2402 break;
1da177e4 2403 }
44bafdf3
JS		 2404 switch (parity) {
2405 case 'o':
2406 case 'O':
2407 cflag |= PARODD;
2408 break;
2409 case 'e':
2410 case 'E':
2411 cflag |= PARENB;
2412 break;
1da177e4
LT		 2413 }
2414
2415 serial_console_info = &cy_port[ints[1]];
2416 serial_console_cflag = cflag;
44bafdf3 2417 serial_console = ints[1] + 64; /*callout_driver.minor_start */
1da177e4
LT		 2418}
2419#endif
2420
2421/*
2422 * The following is probably out of date for 2.1.x serial console stuff.
2423 *
2424 * The console is registered early on from arch/m68k/kernel/setup.c, and
2425 * it therefore relies on the chip being setup correctly by 166-Bug. This
2426 * seems reasonable, as the serial port has been used to invoke the system
2427 * boot. It also means that this function must not rely on any data
2428 * initialisation performed by serial167_init() etc.
2429 *
2430 * Of course, once the console has been registered, we had better ensure
2431 * that serial167_init() doesn't leave the chip non-functional.
2432 *
2433 * The console must be locked when we get here.
2434 */
2435
44bafdf3
JS		 2436void serial167_console_write(struct console *co, const char *str,
2437 unsigned count)
1da177e4 2438{
44bafdf3 2439 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1da177e4
LT		 2440 unsigned long flags;
2441 volatile u_char sink;
2442 u_char ier;
2443 int port;
2444 u_char do_lf = 0;
2445 int i = 0;
2446
2447 local_irq_save(flags);
2448
2449 /* Ensure transmitter is enabled! */
2450
2451 port = 0;
44bafdf3 2452 base_addr[CyCAR] = (u_char) port;
1da177e4
LT		 2453 while (base_addr[CyCCR])
2454 ;
2455 base_addr[CyCCR] = CyENB_XMTR;
2456
2457 ier = base_addr[CyIER];
2458 base_addr[CyIER] = CyTxMpty;
2459
2460 while (1) {
44bafdf3 2461 if (pcc2chip[PccSCCTICR] & 0x20) {
1da177e4
LT		 2462 /* We have a Tx int. Acknowledge it */
2463 sink = pcc2chip[PccTPIACKR];
2464 if ((base_addr[CyLICR] >> 2) == port) {
2465 if (i == count) {
2466 /* Last char of string is now output */
2467 base_addr[CyTEOIR] = CyNOTRANS;
2468 break;
2469 }
2470 if (do_lf) {
2471 base_addr[CyTDR] = '\n';
2472 str++;
2473 i++;
2474 do_lf = 0;
44bafdf3 2475 } else if (*str == '\n') {
1da177e4
LT		 2476 base_addr[CyTDR] = '\r';
2477 do_lf = 1;
44bafdf3 2478 } else {
1da177e4
LT		 2479 base_addr[CyTDR] = *str++;
2480 i++;
2481 }
2482 base_addr[CyTEOIR] = 0;
44bafdf3 2483 } else
1da177e4
LT		 2484 base_addr[CyTEOIR] = CyNOTRANS;
2485 }
2486 }
2487
2488 base_addr[CyIER] = ier;
2489
2490 local_irq_restore(flags);
2491}
2492
44bafdf3
JS		 2493static struct tty_driver *serial167_console_device(struct console *c,
2494 int *index)
1da177e4
LT		 2495{
2496 *index = c->index;
2497 return cy_serial_driver;
2498}
2499
1da177e4 2500static struct console sercons = {
44bafdf3
JS		 2501 .name = "ttyS",
2502 .write = serial167_console_write,
2503 .device = serial167_console_device,
44bafdf3
JS		 2504 .flags = CON_PRINTBUFFER,
2505 .index = -1,
1da177e4
LT		 2506};
2507
1da177e4
LT		 2508static int __init serial167_console_init(void)
2509{
2510 if (vme_brdtype == VME_TYPE_MVME166 ||
44bafdf3
JS		 2511 vme_brdtype == VME_TYPE_MVME167 ||
2512 vme_brdtype == VME_TYPE_MVME177) {
1da177e4
LT		 2513 mvme167_serial_console_setup(0);
2514 register_console(&sercons);
2515 }
2516 return 0;
2517}
44bafdf3 2518
1da177e4
LT		 2519console_initcall(serial167_console_init);
2520
2521#ifdef CONFIG_REMOTE_DEBUG
44bafdf3 2522void putDebugChar(int c)
1da177e4 2523{
44bafdf3 2524 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1da177e4
LT		 2525 unsigned long flags;
2526 volatile u_char sink;
2527 u_char ier;
2528 int port;
2529
2530 local_irq_save(flags);
2531
2532 /* Ensure transmitter is enabled! */
2533
2534 port = DEBUG_PORT;
44bafdf3 2535 base_addr[CyCAR] = (u_char) port;
1da177e4
LT		 2536 while (base_addr[CyCCR])
2537 ;
2538 base_addr[CyCCR] = CyENB_XMTR;
2539
2540 ier = base_addr[CyIER];
2541 base_addr[CyIER] = CyTxMpty;
2542
2543 while (1) {
44bafdf3 2544 if (pcc2chip[PccSCCTICR] & 0x20) {
1da177e4
LT		 2545 /* We have a Tx int. Acknowledge it */
2546 sink = pcc2chip[PccTPIACKR];
2547 if ((base_addr[CyLICR] >> 2) == port) {
2548 base_addr[CyTDR] = c;
2549 base_addr[CyTEOIR] = 0;
2550 break;
44bafdf3 2551 } else
1da177e4
LT		 2552 base_addr[CyTEOIR] = CyNOTRANS;
2553 }
2554 }
2555
2556 base_addr[CyIER] = ier;
2557
2558 local_irq_restore(flags);
2559}
2560
2561int getDebugChar()
2562{
44bafdf3 2563 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
1da177e4
LT		 2564 unsigned long flags;
2565 volatile u_char sink;
2566 u_char ier;
2567 int port;
2568 int i, c;
2569
2570 i = debugiq.out;
2571 if (i != debugiq.in) {
2572 c = debugiq.buf[i];
2573 if (++i == DEBUG_LEN)
2574 i = 0;
2575 debugiq.out = i;
2576 return c;
2577 }
2578 /* OK, nothing in queue, wait in poll loop */
2579
2580 local_irq_save(flags);
2581
2582 /* Ensure receiver is enabled! */
2583
2584 port = DEBUG_PORT;
44bafdf3 2585 base_addr[CyCAR] = (u_char) port;
1da177e4
LT		 2586#if 0
2587 while (base_addr[CyCCR])
2588 ;
2589 base_addr[CyCCR] = CyENB_RCVR;
2590#endif
2591 ier = base_addr[CyIER];
2592 base_addr[CyIER] = CyRxData;
2593
2594 while (1) {
44bafdf3 2595 if (pcc2chip[PccSCCRICR] & 0x20) {
1da177e4
LT		 2596 /* We have a Rx int. Acknowledge it */
2597 sink = pcc2chip[PccRPIACKR];
2598 if ((base_addr[CyLICR] >> 2) == port) {
2599 int cnt = base_addr[CyRFOC];
44bafdf3 2600 while (cnt-- > 0) {
1da177e4
LT		 2601 c = base_addr[CyRDR];
2602 if (c == 0)
44bafdf3
JS		 2603 printk
2604 ("!! debug char is null (cnt=%d) !!",
2605 cnt);
1da177e4 2606 else
44bafdf3 2607 queueDebugChar(c);
1da177e4
LT		 2608 }
2609 base_addr[CyREOIR] = 0;
2610 i = debugiq.out;
2611 if (i == debugiq.in)
44bafdf3 2612 panic("Debug input queue empty!");
1da177e4
LT		 2613 c = debugiq.buf[i];
2614 if (++i == DEBUG_LEN)
2615 i = 0;
2616 debugiq.out = i;
2617 break;
44bafdf3 2618 } else
1da177e4
LT		 2619 base_addr[CyREOIR] = CyNOTRANS;
2620 }
2621 }
2622
2623 base_addr[CyIER] = ier;
2624
2625 local_irq_restore(flags);
2626
2627 return (c);
2628}
2629
44bafdf3 2630void queueDebugChar(int c)
1da177e4
LT		 2631{
2632 int i;
2633
2634 i = debugiq.in;
2635 debugiq.buf[i] = c;
2636 if (++i == DEBUG_LEN)
2637 i = 0;
2638 if (i != debugiq.out)
2639 debugiq.in = i;
2640}
2641
44bafdf3 2642static void debug_setup()
1da177e4 2643{
44bafdf3
JS		 2644 unsigned long flags;
2645 volatile unsigned char *base_addr = (u_char *) BASE_ADDR;
2646 int i, cflag;
1da177e4 2647
44bafdf3 2648 cflag = B19200;
1da177e4 2649
44bafdf3 2650 local_irq_save(flags);
1da177e4 2651
44bafdf3
JS		 2652 for (i = 0; i < 4; i++) {
2653 base_addr[CyCAR] = i;
2654 base_addr[CyLICR] = i << 2;
2655 }
1da177e4 2656
44bafdf3 2657 debugiq.in = debugiq.out = 0;
1da177e4 2658
44bafdf3 2659 base_addr[CyCAR] = DEBUG_PORT;
1da177e4 2660
44bafdf3
JS		 2661 /* baud rate */
2662 i = cflag & CBAUD;
1da177e4 2663
44bafdf3 2664 base_addr[CyIER] = 0;
1da177e4 2665
44bafdf3
JS		 2666 base_addr[CyCMR] = CyASYNC;
2667 base_addr[CyLICR] = DEBUG_PORT << 2;
2668 base_addr[CyLIVR] = 0x5c;
1da177e4 2669
44bafdf3 2670 /* tx and rx baud rate */
1da177e4 2671
44bafdf3
JS		 2672 base_addr[CyTCOR] = baud_co[i];
2673 base_addr[CyTBPR] = baud_bpr[i];
2674 base_addr[CyRCOR] = baud_co[i] >> 5;
2675 base_addr[CyRBPR] = baud_bpr[i];
1da177e4 2676
44bafdf3 2677 /* set line characteristics according configuration */
1da177e4 2678
44bafdf3
JS		 2679 base_addr[CySCHR1] = 0;
2680 base_addr[CySCHR2] = 0;
2681 base_addr[CySCRL] = 0;
2682 base_addr[CySCRH] = 0;
2683 base_addr[CyCOR1] = Cy_8_BITS | CyPARITY_NONE;
2684 base_addr[CyCOR2] = 0;
2685 base_addr[CyCOR3] = Cy_1_STOP;
2686 base_addr[CyCOR4] = baud_cor4[i];
2687 base_addr[CyCOR5] = 0;
2688 base_addr[CyCOR6] = 0;
2689 base_addr[CyCOR7] = 0;
1da177e4 2690
44bafdf3
JS		 2691 write_cy_cmd(base_addr, CyINIT_CHAN);
2692 write_cy_cmd(base_addr, CyENB_RCVR);
1da177e4 2693
44bafdf3 2694 base_addr[CyCAR] = DEBUG_PORT; /* !!! Is this needed? */
1da177e4 2695
44bafdf3
JS		 2696 base_addr[CyRTPRL] = 2;
2697 base_addr[CyRTPRH] = 0;
1da177e4 2698
44bafdf3
JS		 2699 base_addr[CyMSVR1] = CyRTS;
2700 base_addr[CyMSVR2] = CyDTR;
1da177e4 2701
44bafdf3 2702 base_addr[CyIER] = CyRxData;
1da177e4 2703
44bafdf3 2704 local_irq_restore(flags);
1da177e4 2705
44bafdf3 2706} /* debug_setup */
1da177e4
LT		 2707
2708#endif
2709
2710MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)