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drm: fix stupid missing semicolon.
[linux-block.git] / drivers / char / drm / drm.h
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1da177e4
LT		 1/**
2 * \file drm.h
3 * Header for the Direct Rendering Manager
4 *
5 * \author Rickard E. (Rik) Faith <faith@valinux.com>
6 *
7 * \par Acknowledgments:
8 * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg.
9 */
10
11/*
12 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
13 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
14 * All rights reserved.
15 *
16 * Permission is hereby granted, free of charge, to any person obtaining a
17 * copy of this software and associated documentation files (the "Software"),
18 * to deal in the Software without restriction, including without limitation
19 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
20 * and/or sell copies of the Software, and to permit persons to whom the
21 * Software is furnished to do so, subject to the following conditions:
22 *
23 * The above copyright notice and this permission notice (including the next
24 * paragraph) shall be included in all copies or substantial portions of the
25 * Software.
26 *
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
28 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
29 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
30 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
31 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
32 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
33 * OTHER DEALINGS IN THE SOFTWARE.
34 */
35
36
37#ifndef _DRM_H_
38#define _DRM_H_
39
40#if defined(__linux__)
850eb83a 41#if defined(__KERNEL__)
1da177e4 42#include <linux/config.h>
850eb83a 43#endif
1da177e4
LT		 44#include <asm/ioctl.h> /* For _IO* macros */
45#define DRM_IOCTL_NR(n) _IOC_NR(n)
46#define DRM_IOC_VOID _IOC_NONE
47#define DRM_IOC_READ _IOC_READ
48#define DRM_IOC_WRITE _IOC_WRITE
49#define DRM_IOC_READWRITE _IOC_READ|_IOC_WRITE
50#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
51#elif defined(__FreeBSD__) || defined(__NetBSD__) || defined(__OpenBSD__)
52#if defined(__FreeBSD__) && defined(IN_MODULE)
53/* Prevent name collision when including sys/ioccom.h */
54#undef ioctl
55#include <sys/ioccom.h>
56#define ioctl(a,b,c) xf86ioctl(a,b,c)
57#else
58#include <sys/ioccom.h>
59#endif /* __FreeBSD__ && xf86ioctl */
60#define DRM_IOCTL_NR(n) ((n) & 0xff)
61#define DRM_IOC_VOID IOC_VOID
62#define DRM_IOC_READ IOC_OUT
63#define DRM_IOC_WRITE IOC_IN
64#define DRM_IOC_READWRITE IOC_INOUT
65#define DRM_IOC(dir, group, nr, size) _IOC(dir, group, nr, size)
66#endif
67
68#define XFREE86_VERSION(major,minor,patch,snap) \
69 ((major << 16) | (minor << 8) | patch)
70
71#ifndef CONFIG_XFREE86_VERSION
72#define CONFIG_XFREE86_VERSION XFREE86_VERSION(4,1,0,0)
73#endif
74
75#if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
76#define DRM_PROC_DEVICES "/proc/devices"
77#define DRM_PROC_MISC "/proc/misc"
78#define DRM_PROC_DRM "/proc/drm"
79#define DRM_DEV_DRM "/dev/drm"
80#define DRM_DEV_MODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
81#define DRM_DEV_UID 0
82#define DRM_DEV_GID 0
83#endif
84
85#if CONFIG_XFREE86_VERSION >= XFREE86_VERSION(4,1,0,0)
86#define DRM_MAJOR 226
87#define DRM_MAX_MINOR 15
88#endif
89#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */
90#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */
91#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */
92#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */
93
94#define _DRM_LOCK_HELD 0x80000000 /**< Hardware lock is held */
95#define _DRM_LOCK_CONT 0x40000000 /**< Hardware lock is contended */
96#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD)
97#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT)
98#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
99
100
101typedef unsigned long drm_handle_t;
102typedef unsigned int drm_context_t;
103typedef unsigned int drm_drawable_t;
104typedef unsigned int drm_magic_t;
105
106
107/**
108 * Cliprect.
109 *
110 * \warning: If you change this structure, make sure you change
111 * XF86DRIClipRectRec in the server as well
112 *
113 * \note KW: Actually it's illegal to change either for
114 * backwards-compatibility reasons.
115 */
116typedef struct drm_clip_rect {
117 unsigned short x1;
118 unsigned short y1;
119 unsigned short x2;
120 unsigned short y2;
121} drm_clip_rect_t;
122
123
124/**
125 * Texture region,
126 */
127typedef struct drm_tex_region {
128 unsigned char next;
129 unsigned char prev;
130 unsigned char in_use;
131 unsigned char padding;
132 unsigned int age;
133} drm_tex_region_t;
134
135/**
136 * Hardware lock.
137 *
138 * The lock structure is a simple cache-line aligned integer. To avoid
139 * processor bus contention on a multiprocessor system, there should not be any
140 * other data stored in the same cache line.
141 */
142typedef struct drm_hw_lock {
143 __volatile__ unsigned int lock; /**< lock variable */
144 char padding[60]; /**< Pad to cache line */
145} drm_hw_lock_t;
146
147
148/**
149 * DRM_IOCTL_VERSION ioctl argument type.
150 *
151 * \sa drmGetVersion().
152 */
153typedef struct drm_version {
154 int version_major; /**< Major version */
155 int version_minor; /**< Minor version */
156 int version_patchlevel;/**< Patch level */
157 size_t name_len; /**< Length of name buffer */
158 char __user *name; /**< Name of driver */
159 size_t date_len; /**< Length of date buffer */
160 char __user *date; /**< User-space buffer to hold date */
161 size_t desc_len; /**< Length of desc buffer */
162 char __user *desc; /**< User-space buffer to hold desc */
163} drm_version_t;
164
165
166/**
167 * DRM_IOCTL_GET_UNIQUE ioctl argument type.
168 *
169 * \sa drmGetBusid() and drmSetBusId().
170 */
171typedef struct drm_unique {
172 size_t unique_len; /**< Length of unique */
173 char __user *unique; /**< Unique name for driver instantiation */
174} drm_unique_t;
175
176
177typedef struct drm_list {
178 int count; /**< Length of user-space structures */
179 drm_version_t __user *version;
180} drm_list_t;
181
182
183typedef struct drm_block {
184 int unused;
185} drm_block_t;
186
187
188/**
189 * DRM_IOCTL_CONTROL ioctl argument type.
190 *
191 * \sa drmCtlInstHandler() and drmCtlUninstHandler().
192 */
193typedef struct drm_control {
194 enum {
195 DRM_ADD_COMMAND,
196 DRM_RM_COMMAND,
197 DRM_INST_HANDLER,
198 DRM_UNINST_HANDLER
199 } func;
200 int irq;
201} drm_control_t;
202
203
204/**
205 * Type of memory to map.
206 */
207typedef enum drm_map_type {
208 _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */
209 _DRM_REGISTERS = 1, /**< no caching, no core dump */
210 _DRM_SHM = 2, /**< shared, cached */
211 _DRM_AGP = 3, /**< AGP/GART */
212 _DRM_SCATTER_GATHER = 4 /**< Scatter/gather memory for PCI DMA */
213} drm_map_type_t;
214
215
216/**
217 * Memory mapping flags.
218 */
219typedef enum drm_map_flags {
220 _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */
221 _DRM_READ_ONLY = 0x02,
222 _DRM_LOCKED = 0x04, /**< shared, cached, locked */
223 _DRM_KERNEL = 0x08, /**< kernel requires access */
224 _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
225 _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */
226 _DRM_REMOVABLE = 0x40 /**< Removable mapping */
227} drm_map_flags_t;
228
229
230typedef struct drm_ctx_priv_map {
231 unsigned int ctx_id; /**< Context requesting private mapping */
232 void *handle; /**< Handle of map */
233} drm_ctx_priv_map_t;
234
235
236/**
237 * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
238 * argument type.
239 *
240 * \sa drmAddMap().
241 */
242typedef struct drm_map {
243 unsigned long offset; /**< Requested physical address (0 for SAREA)*/
244 unsigned long size; /**< Requested physical size (bytes) */
245 drm_map_type_t type; /**< Type of memory to map */
246 drm_map_flags_t flags; /**< Flags */
247 void *handle; /**< User-space: "Handle" to pass to mmap() */
248 /**< Kernel-space: kernel-virtual address */
249 int mtrr; /**< MTRR slot used */
250 /* Private data */
251} drm_map_t;
252
253
254/**
255 * DRM_IOCTL_GET_CLIENT ioctl argument type.
256 */
257typedef struct drm_client {
258 int idx; /**< Which client desired? */
259 int auth; /**< Is client authenticated? */
260 unsigned long pid; /**< Process ID */
261 unsigned long uid; /**< User ID */
262 unsigned long magic; /**< Magic */
263 unsigned long iocs; /**< Ioctl count */
264} drm_client_t;
265
266
267typedef enum {
268 _DRM_STAT_LOCK,
269 _DRM_STAT_OPENS,
270 _DRM_STAT_CLOSES,
271 _DRM_STAT_IOCTLS,
272 _DRM_STAT_LOCKS,
273 _DRM_STAT_UNLOCKS,
274 _DRM_STAT_VALUE, /**< Generic value */
275 _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */
276 _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */
277
278 _DRM_STAT_IRQ, /**< IRQ */
279 _DRM_STAT_PRIMARY, /**< Primary DMA bytes */
280 _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */
281 _DRM_STAT_DMA, /**< DMA */
282 _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */
283 _DRM_STAT_MISSED /**< Missed DMA opportunity */
284
285 /* Add to the *END* of the list */
286} drm_stat_type_t;
287
288
289/**
290 * DRM_IOCTL_GET_STATS ioctl argument type.
291 */
292typedef struct drm_stats {
293 unsigned long count;
294 struct {
295 unsigned long value;
296 drm_stat_type_t type;
297 } data[15];
298} drm_stats_t;
299
300
301/**
302 * Hardware locking flags.
303 */
304typedef enum drm_lock_flags {
305 _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */
306 _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */
307 _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */
308 _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */
309 /* These *HALT* flags aren't supported yet
310 -- they will be used to support the
311 full-screen DGA-like mode. */
312 _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
313 _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */
314} drm_lock_flags_t;
315
316
317/**
318 * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
319 *
320 * \sa drmGetLock() and drmUnlock().
321 */
322typedef struct drm_lock {
323 int context;
324 drm_lock_flags_t flags;
325} drm_lock_t;
326
327
328/**
329 * DMA flags
330 *
331 * \warning
332 * These values \e must match xf86drm.h.
333 *
334 * \sa drm_dma.
335 */
336typedef enum drm_dma_flags {
337 /* Flags for DMA buffer dispatch */
338 _DRM_DMA_BLOCK = 0x01, /**<
339 * Block until buffer dispatched.
340 *
341 * \note The buffer may not yet have
342 * been processed by the hardware --
343 * getting a hardware lock with the
344 * hardware quiescent will ensure
345 * that the buffer has been
346 * processed.
347 */
348 _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
349 _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */
350
351 /* Flags for DMA buffer request */
352 _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */
353 _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */
354 _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */
355} drm_dma_flags_t;
356
357
358/**
359 * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
360 *
361 * \sa drmAddBufs().
362 */
363typedef struct drm_buf_desc {
364 int count; /**< Number of buffers of this size */
365 int size; /**< Size in bytes */
366 int low_mark; /**< Low water mark */
367 int high_mark; /**< High water mark */
368 enum {
369 _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
370 _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
371 _DRM_SG_BUFFER = 0x04 /**< Scatter/gather memory buffer */
372 } flags;
373 unsigned long agp_start; /**<
374 * Start address of where the AGP buffers are
375 * in the AGP aperture
376 */
377} drm_buf_desc_t;
378
379
380/**
381 * DRM_IOCTL_INFO_BUFS ioctl argument type.
382 */
383typedef struct drm_buf_info {
384 int count; /**< Entries in list */
385 drm_buf_desc_t __user *list;
386} drm_buf_info_t;
387
388
389/**
390 * DRM_IOCTL_FREE_BUFS ioctl argument type.
391 */
392typedef struct drm_buf_free {
393 int count;
394 int __user *list;
395} drm_buf_free_t;
396
397
398/**
399 * Buffer information
400 *
401 * \sa drm_buf_map.
402 */
403typedef struct drm_buf_pub {
404 int idx; /**< Index into the master buffer list */
405 int total; /**< Buffer size */
406 int used; /**< Amount of buffer in use (for DMA) */
407 void __user *address; /**< Address of buffer */
408} drm_buf_pub_t;
409
410
411/**
412 * DRM_IOCTL_MAP_BUFS ioctl argument type.
413 */
414typedef struct drm_buf_map {
415 int count; /**< Length of the buffer list */
416 void __user *virtual; /**< Mmap'd area in user-virtual */
417 drm_buf_pub_t __user *list; /**< Buffer information */
418} drm_buf_map_t;
419
420
421/**
422 * DRM_IOCTL_DMA ioctl argument type.
423 *
424 * Indices here refer to the offset into the buffer list in drm_buf_get.
425 *
426 * \sa drmDMA().
427 */
428typedef struct drm_dma {
429 int context; /**< Context handle */
430 int send_count; /**< Number of buffers to send */
431 int __user *send_indices; /**< List of handles to buffers */
432 int __user *send_sizes; /**< Lengths of data to send */
433 drm_dma_flags_t flags; /**< Flags */
434 int request_count; /**< Number of buffers requested */
435 int request_size; /**< Desired size for buffers */
436 int __user *request_indices; /**< Buffer information */
437 int __user *request_sizes;
438 int granted_count; /**< Number of buffers granted */
439} drm_dma_t;
440
441
442typedef enum {
443 _DRM_CONTEXT_PRESERVED = 0x01,
444 _DRM_CONTEXT_2DONLY = 0x02
445} drm_ctx_flags_t;
446
447
448/**
449 * DRM_IOCTL_ADD_CTX ioctl argument type.
450 *
451 * \sa drmCreateContext() and drmDestroyContext().
452 */
453typedef struct drm_ctx {
454 drm_context_t handle;
455 drm_ctx_flags_t flags;
456} drm_ctx_t;
457
458
459/**
460 * DRM_IOCTL_RES_CTX ioctl argument type.
461 */
462typedef struct drm_ctx_res {
463 int count;
464 drm_ctx_t __user *contexts;
465} drm_ctx_res_t;
466
467
468/**
469 * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
470 */
471typedef struct drm_draw {
472 drm_drawable_t handle;
473} drm_draw_t;
474
475
476/**
477 * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
478 */
479typedef struct drm_auth {
480 drm_magic_t magic;
481} drm_auth_t;
482
483
484/**
485 * DRM_IOCTL_IRQ_BUSID ioctl argument type.
486 *
487 * \sa drmGetInterruptFromBusID().
488 */
489typedef struct drm_irq_busid {
490 int irq; /**< IRQ number */
491 int busnum; /**< bus number */
492 int devnum; /**< device number */
493 int funcnum; /**< function number */
494} drm_irq_busid_t;
495
496
497typedef enum {
498 _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */
499 _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */
500 _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking */
501} drm_vblank_seq_type_t;
502
503
504#define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL
505
506
507struct drm_wait_vblank_request {
508 drm_vblank_seq_type_t type;
509 unsigned int sequence;
510 unsigned long signal;
511};
512
513
514struct drm_wait_vblank_reply {
515 drm_vblank_seq_type_t type;
516 unsigned int sequence;
517 long tval_sec;
518 long tval_usec;
519};
520
521
522/**
523 * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
524 *
525 * \sa drmWaitVBlank().
526 */
527typedef union drm_wait_vblank {
528 struct drm_wait_vblank_request request;
529 struct drm_wait_vblank_reply reply;
530} drm_wait_vblank_t;
531
532
533/**
534 * DRM_IOCTL_AGP_ENABLE ioctl argument type.
535 *
536 * \sa drmAgpEnable().
537 */
538typedef struct drm_agp_mode {
539 unsigned long mode; /**< AGP mode */
540} drm_agp_mode_t;
541
542
543/**
544 * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
545 *
546 * \sa drmAgpAlloc() and drmAgpFree().
547 */
548typedef struct drm_agp_buffer {
549 unsigned long size; /**< In bytes -- will round to page boundary */
550 unsigned long handle; /**< Used for binding / unbinding */
551 unsigned long type; /**< Type of memory to allocate */
552 unsigned long physical; /**< Physical used by i810 */
553} drm_agp_buffer_t;
554
555
556/**
557 * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
558 *
559 * \sa drmAgpBind() and drmAgpUnbind().
560 */
561typedef struct drm_agp_binding {
562 unsigned long handle; /**< From drm_agp_buffer */
563 unsigned long offset; /**< In bytes -- will round to page boundary */
564} drm_agp_binding_t;
565
566
567/**
568 * DRM_IOCTL_AGP_INFO ioctl argument type.
569 *
570 * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(),
571 * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(),
572 * drmAgpVendorId() and drmAgpDeviceId().
573 */
574typedef struct drm_agp_info {
575 int agp_version_major;
576 int agp_version_minor;
577 unsigned long mode;
578 unsigned long aperture_base; /* physical address */
579 unsigned long aperture_size; /* bytes */
580 unsigned long memory_allowed; /* bytes */
581 unsigned long memory_used;
582
583 /* PCI information */
584 unsigned short id_vendor;
585 unsigned short id_device;
586} drm_agp_info_t;
587
588
589/**
590 * DRM_IOCTL_SG_ALLOC ioctl argument type.
591 */
592typedef struct drm_scatter_gather {
593 unsigned long size; /**< In bytes -- will round to page boundary */
594 unsigned long handle; /**< Used for mapping / unmapping */
595} drm_scatter_gather_t;
596
597/**
598 * DRM_IOCTL_SET_VERSION ioctl argument type.
599 */
600typedef struct drm_set_version {
601 int drm_di_major;
602 int drm_di_minor;
603 int drm_dd_major;
604 int drm_dd_minor;
605} drm_set_version_t;
606
607
608#define DRM_IOCTL_BASE 'd'
609#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr)
610#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type)
611#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type)
612#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type)
613
614#define DRM_IOCTL_VERSION DRM_IOWR(0x00, drm_version_t)
615#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, drm_unique_t)
616#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, drm_auth_t)
617#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, drm_irq_busid_t)
618#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, drm_map_t)
619#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, drm_client_t)
620#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, drm_stats_t)
621#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, drm_set_version_t)
622
623#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, drm_unique_t)
624#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, drm_auth_t)
625#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, drm_block_t)
626#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, drm_block_t)
627#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, drm_control_t)
628#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, drm_map_t)
629#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, drm_buf_desc_t)
630#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, drm_buf_desc_t)
631#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, drm_buf_info_t)
632#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, drm_buf_map_t)
633#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, drm_buf_free_t)
634
635#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, drm_map_t)
636
637#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, drm_ctx_priv_map_t)
638#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, drm_ctx_priv_map_t)
639
640#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, drm_ctx_t)
641#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, drm_ctx_t)
642#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, drm_ctx_t)
643#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, drm_ctx_t)
644#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, drm_ctx_t)
645#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, drm_ctx_t)
646#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, drm_ctx_res_t)
647#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, drm_draw_t)
648#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, drm_draw_t)
649#define DRM_IOCTL_DMA DRM_IOWR(0x29, drm_dma_t)
650#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, drm_lock_t)
651#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, drm_lock_t)
652#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, drm_lock_t)
653
654#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30)
655#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31)
656#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, drm_agp_mode_t)
657#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, drm_agp_info_t)
658#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, drm_agp_buffer_t)
659#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, drm_agp_buffer_t)
660#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, drm_agp_binding_t)
661#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, drm_agp_binding_t)
662
663#define DRM_IOCTL_SG_ALLOC DRM_IOW( 0x38, drm_scatter_gather_t)
664#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, drm_scatter_gather_t)
665
666#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, drm_wait_vblank_t)
667
668/**
669 * Device specific ioctls should only be in their respective headers
670 * The device specific ioctl range is from 0x40 to 0x79.
671 *
672 * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and
673 * drmCommandReadWrite().
674 */
675#define DRM_COMMAND_BASE 0x40
676
677#endif
Linux 6.x block layer and io_uring tree(s)