[linux-2.6-block.git] / drivers / bus / Kconfig

#
# Bus Devices
#

menu "Bus devices"

config ARM_CCI
	bool

config ARM_CCI_PMU
	bool
	select ARM_CCI

config ARM_CCI400_COMMON
	bool
	select ARM_CCI

config ARM_CCI400_PMU
	bool "ARM CCI400 PMU support"
	depends on (ARM && CPU_V7) || ARM64
	depends on PERF_EVENTS
	select ARM_CCI400_COMMON
	select ARM_CCI_PMU
	help
	  Support for PMU events monitoring on the ARM CCI-400 (cache coherent
	  interconnect). CCI-400 supports counting events related to the
	  connected slave/master interfaces.

config ARM_CCI400_PORT_CTRL
	bool
	depends on ARM && OF && CPU_V7
	select ARM_CCI400_COMMON
	help
	  Low level power management driver for CCI400 cache coherent
	  interconnect for ARM platforms.

config ARM_CCI500_PMU
	bool "ARM CCI500 PMU support"
	depends on (ARM && CPU_V7) || ARM64
	depends on PERF_EVENTS
	select ARM_CCI_PMU
	help
	  Support for PMU events monitoring on the ARM CCI-500 cache coherent
	  interconnect. CCI-500 provides 8 independent event counters, which
	  can count events pertaining to the slave/master interfaces as well
	  as the internal events to the CCI.

	  If unsure, say Y

config ARM_CCN
	bool "ARM CCN driver support"
	depends on ARM || ARM64
	depends on PERF_EVENTS
	help
	  PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
	  interconnect.

config BRCMSTB_GISB_ARB
	bool "Broadcom STB GISB bus arbiter"
	depends on ARM || MIPS
	help
	  Driver for the Broadcom Set Top Box System-on-a-chip internal bus
	  arbiter. This driver provides timeout and target abort error handling
	  and internal bus master decoding.

config IMX_WEIM
	bool "Freescale EIM DRIVER"
	depends on ARCH_MXC
	help
	  Driver for i.MX WEIM controller.
	  The WEIM(Wireless External Interface Module) works like a bus.
	  You can attach many different devices on it, such as NOR, onenand.

config MIPS_CDMM
	bool "MIPS Common Device Memory Map (CDMM) Driver"
	depends on CPU_MIPSR2
	help
	  Driver needed for the MIPS Common Device Memory Map bus in MIPS
	  cores. This bus is for per-CPU tightly coupled devices such as the
	  Fast Debug Channel (FDC).

	  For this to work, either your bootloader needs to enable the CDMM
	  region at an unused physical address on the boot CPU, or else your
	  platform code needs to implement mips_cdmm_phys_base() (see
	  asm/cdmm.h).

config MVEBU_MBUS
	bool
	depends on PLAT_ORION
	help
	  Driver needed for the MBus configuration on Marvell EBU SoCs
	  (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).

config OMAP_INTERCONNECT
	tristate "OMAP INTERCONNECT DRIVER"
	depends on ARCH_OMAP2PLUS

	help
	  Driver to enable OMAP interconnect error handling driver.

config OMAP_OCP2SCP
	tristate "OMAP OCP2SCP DRIVER"
	depends on ARCH_OMAP2PLUS
	help
	  Driver to enable ocp2scp module which transforms ocp interface
	  protocol to scp protocol. In OMAP4, USB PHY is connected via
	  OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
	  OCP2SCP.

config SIMPLE_PM_BUS
	bool "Simple Power-Managed Bus Driver"
	depends on OF && PM
	depends on ARCH_SHMOBILE || COMPILE_TEST
	help
	  Driver for transparent busses that don't need a real driver, but
	  where the bus controller is part of a PM domain, or under the control
	  of a functional clock, and thus relies on runtime PM for managing
	  this PM domain and/or clock.
	  An example of such a bus controller is the Renesas Bus State
	  Controller (BSC, sometimes called "LBSC within Bus Bridge", or
	  "External Bus Interface") as found on several Renesas ARM SoCs.

config SUNXI_RSB
	tristate "Allwinner sunXi Reduced Serial Bus Driver"
	  default MACH_SUN8I || MACH_SUN9I
	  depends on ARCH_SUNXI
	  select REGMAP
	  help
	  Say y here to enable support for Allwinner's Reduced Serial Bus
	  (RSB) support. This controller is responsible for communicating
	  with various RSB based devices, such as AXP223, AXP8XX PMICs,
	  and AC100/AC200 ICs.

config VEXPRESS_CONFIG
	bool "Versatile Express configuration bus"
	default y if ARCH_VEXPRESS
	depends on ARM || ARM64
	depends on OF
	select REGMAP
	help
	  Platform configuration infrastructure for the ARM Ltd.
	  Versatile Express.
endmenu
Commit	Line	Data
26a84b3e KVA	1	#
	2	# Bus Devices
	3	#
	4
	5	menu "Bus devices"
	6
13fbf3c8	7	config ARM_CCI
47f36e49 OJ	8	bool
47f36e49 OJ	9
f4d58938 SP	10	config ARM_CCI_PMU
	11	bool
	12	select ARM_CCI
	13
47f36e49 OJ	14	config ARM_CCI400_COMMON
	15	bool
	16	select ARM_CCI
	17
	18	config ARM_CCI400_PMU
	19	bool "ARM CCI400 PMU support"
85bbba70 SP	20	depends on (ARM && CPU_V7) \|\| ARM64
85bbba70 SP	21	depends on PERF_EVENTS
47f36e49	22	select ARM_CCI400_COMMON
f4d58938	23	select ARM_CCI_PMU
47f36e49	24	help
85bbba70 SP	25	Support for PMU events monitoring on the ARM CCI-400 (cache coherent
	26	interconnect). CCI-400 supports counting events related to the
	27	connected slave/master interfaces.
47f36e49 OJ	28
	29	config ARM_CCI400_PORT_CTRL
	30	bool
13fbf3c8	31	depends on ARM && OF && CPU_V7
47f36e49	32	select ARM_CCI400_COMMON
13fbf3c8	33	help
47f36e49 OJ	34	Low level power management driver for CCI400 cache coherent
47f36e49 OJ	35	interconnect for ARM platforms.
13fbf3c8	36
a95791ef SP	37	config ARM_CCI500_PMU
a95791ef SP	38	bool "ARM CCI500 PMU support"
a95791ef SP	39	depends on (ARM && CPU_V7) \|\| ARM64
	40	depends on PERF_EVENTS
	41	select ARM_CCI_PMU
	42	help
	43	Support for PMU events monitoring on the ARM CCI-500 cache coherent
	44	interconnect. CCI-500 provides 8 independent event counters, which
	45	can count events pertaining to the slave/master interfaces as well
	46	as the internal events to the CCI.
	47
	48	If unsure, say Y
	49
13fbf3c8 GU	50	config ARM_CCN
	51	bool "ARM CCN driver support"
	52	depends on ARM \|\| ARM64
	53	depends on PERF_EVENTS
	54	help
	55	PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
	56	interconnect.
	57
44127b77 FF	58	config BRCMSTB_GISB_ARB
44127b77 FF	59	bool "Broadcom STB GISB bus arbiter"
dd1d78a1	60	depends on ARM \|\| MIPS
44127b77 FF	61	help
	62	Driver for the Broadcom Set Top Box System-on-a-chip internal bus
	63	arbiter. This driver provides timeout and target abort error handling
	64	and internal bus master decoding.
	65
85bf6d4e HS	66	config IMX_WEIM
	67	bool "Freescale EIM DRIVER"
	68	depends on ARCH_MXC
	69	help
3f98b6ba	70	Driver for i.MX WEIM controller.
85bf6d4e HS	71	The WEIM(Wireless External Interface Module) works like a bus.
85bf6d4e HS	72	You can attach many different devices on it, such as NOR, onenand.
85bf6d4e	73
8286ae03 JH	74	config MIPS_CDMM
	75	bool "MIPS Common Device Memory Map (CDMM) Driver"
	76	depends on CPU_MIPSR2
	77	help
	78	Driver needed for the MIPS Common Device Memory Map bus in MIPS
	79	cores. This bus is for per-CPU tightly coupled devices such as the
	80	Fast Debug Channel (FDC).
	81
	82	For this to work, either your bootloader needs to enable the CDMM
	83	region at an unused physical address on the boot CPU, or else your
	84	platform code needs to implement mips_cdmm_phys_base() (see
	85	asm/cdmm.h).
	86
fddddb52 TP	87	config MVEBU_MBUS
	88	bool
	89	depends on PLAT_ORION
	90	help
	91	Driver needed for the MBus configuration on Marvell EBU SoCs
	92	(Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
	93
0ee7261c SS	94	config OMAP_INTERCONNECT
	95	tristate "OMAP INTERCONNECT DRIVER"
	96	depends on ARCH_OMAP2PLUS
	97
	98	help
	99	Driver to enable OMAP interconnect error handling driver.
ed69bdd8	100
13fbf3c8 GU	101	config OMAP_OCP2SCP
	102	tristate "OMAP OCP2SCP DRIVER"
	103	depends on ARCH_OMAP2PLUS
ed69bdd8	104	help
13fbf3c8 GU	105	Driver to enable ocp2scp module which transforms ocp interface
	106	protocol to scp protocol. In OMAP4, USB PHY is connected via
	107	OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
	108	OCP2SCP.
3b9334ac	109
89d463ea GU	110	config SIMPLE_PM_BUS
	111	bool "Simple Power-Managed Bus Driver"
	112	depends on OF && PM
	113	depends on ARCH_SHMOBILE \|\| COMPILE_TEST
a33b0daa	114	help
89d463ea GU	115	Driver for transparent busses that don't need a real driver, but
	116	where the bus controller is part of a PM domain, or under the control
	117	of a functional clock, and thus relies on runtime PM for managing
	118	this PM domain and/or clock.
	119	An example of such a bus controller is the Renesas Bus State
	120	Controller (BSC, sometimes called "LBSC within Bus Bridge", or
	121	"External Bus Interface") as found on several Renesas ARM SoCs.
a33b0daa	122
d787dcdb CYT	123	config SUNXI_RSB
	124	tristate "Allwinner sunXi Reduced Serial Bus Driver"
	125	default MACH_SUN8I \|\| MACH_SUN9I
	126	depends on ARCH_SUNXI
	127	select REGMAP
	128	help
	129	Say y here to enable support for Allwinner's Reduced Serial Bus
	130	(RSB) support. This controller is responsible for communicating
	131	with various RSB based devices, such as AXP223, AXP8XX PMICs,
	132	and AC100/AC200 ICs.
	133
3b9334ac PM	134	config VEXPRESS_CONFIG
	135	bool "Versatile Express configuration bus"
	136	default y if ARCH_VEXPRESS
	137	depends on ARM \|\| ARM64
b33cdd28	138	depends on OF
3b9334ac PM	139	select REGMAP
	140	help
	141	Platform configuration infrastructure for the ARM Ltd.
	142	Versatile Express.
26a84b3e	143	endmenu