NVMe: Update copyright headers
[linux-2.6-block.git] / drivers / block / nvme-scsi.c
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1/*
2 * NVM Express device driver
8757ad65 3 * Copyright (c) 2011-2014, Intel Corporation.
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4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
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13 */
14
15/*
16 * Refer to the SCSI-NVMe Translation spec for details on how
17 * each command is translated.
18 */
19
20#include <linux/nvme.h>
21#include <linux/bio.h>
22#include <linux/bitops.h>
23#include <linux/blkdev.h>
320a3827 24#include <linux/compat.h>
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25#include <linux/delay.h>
26#include <linux/errno.h>
27#include <linux/fs.h>
28#include <linux/genhd.h>
29#include <linux/idr.h>
30#include <linux/init.h>
31#include <linux/interrupt.h>
32#include <linux/io.h>
33#include <linux/kdev_t.h>
34#include <linux/kthread.h>
35#include <linux/kernel.h>
36#include <linux/mm.h>
37#include <linux/module.h>
38#include <linux/moduleparam.h>
39#include <linux/pci.h>
40#include <linux/poison.h>
41#include <linux/sched.h>
42#include <linux/slab.h>
43#include <linux/types.h>
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44#include <scsi/sg.h>
45#include <scsi/scsi.h>
46
47
48static int sg_version_num = 30534; /* 2 digits for each component */
49
50#define SNTI_TRANSLATION_SUCCESS 0
51#define SNTI_INTERNAL_ERROR 1
52
53/* VPD Page Codes */
54#define VPD_SUPPORTED_PAGES 0x00
55#define VPD_SERIAL_NUMBER 0x80
56#define VPD_DEVICE_IDENTIFIERS 0x83
57#define VPD_EXTENDED_INQUIRY 0x86
58#define VPD_BLOCK_DEV_CHARACTERISTICS 0xB1
59
60/* CDB offsets */
61#define REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET 6
62#define REPORT_LUNS_SR_OFFSET 2
63#define READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET 10
64#define REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET 4
65#define REQUEST_SENSE_DESC_OFFSET 1
66#define REQUEST_SENSE_DESC_MASK 0x01
67#define DESCRIPTOR_FORMAT_SENSE_DATA_TYPE 1
68#define INQUIRY_EVPD_BYTE_OFFSET 1
69#define INQUIRY_PAGE_CODE_BYTE_OFFSET 2
70#define INQUIRY_EVPD_BIT_MASK 1
71#define INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET 3
72#define START_STOP_UNIT_CDB_IMMED_OFFSET 1
73#define START_STOP_UNIT_CDB_IMMED_MASK 0x1
74#define START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET 3
75#define START_STOP_UNIT_CDB_POWER_COND_MOD_MASK 0xF
76#define START_STOP_UNIT_CDB_POWER_COND_OFFSET 4
77#define START_STOP_UNIT_CDB_POWER_COND_MASK 0xF0
78#define START_STOP_UNIT_CDB_NO_FLUSH_OFFSET 4
79#define START_STOP_UNIT_CDB_NO_FLUSH_MASK 0x4
80#define START_STOP_UNIT_CDB_START_OFFSET 4
81#define START_STOP_UNIT_CDB_START_MASK 0x1
82#define WRITE_BUFFER_CDB_MODE_OFFSET 1
83#define WRITE_BUFFER_CDB_MODE_MASK 0x1F
84#define WRITE_BUFFER_CDB_BUFFER_ID_OFFSET 2
85#define WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET 3
86#define WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET 6
87#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET 1
88#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK 0xC0
89#define FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT 6
90#define FORMAT_UNIT_CDB_LONG_LIST_OFFSET 1
91#define FORMAT_UNIT_CDB_LONG_LIST_MASK 0x20
92#define FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET 1
93#define FORMAT_UNIT_CDB_FORMAT_DATA_MASK 0x10
94#define FORMAT_UNIT_SHORT_PARM_LIST_LEN 4
95#define FORMAT_UNIT_LONG_PARM_LIST_LEN 8
96#define FORMAT_UNIT_PROT_INT_OFFSET 3
97#define FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET 0
98#define FORMAT_UNIT_PROT_FIELD_USAGE_MASK 0x07
ec503733 99#define UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET 7
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100
101/* Misc. defines */
102#define NIBBLE_SHIFT 4
103#define FIXED_SENSE_DATA 0x70
104#define DESC_FORMAT_SENSE_DATA 0x72
105#define FIXED_SENSE_DATA_ADD_LENGTH 10
106#define LUN_ENTRY_SIZE 8
107#define LUN_DATA_HEADER_SIZE 8
108#define ALL_LUNS_RETURNED 0x02
109#define ALL_WELL_KNOWN_LUNS_RETURNED 0x01
110#define RESTRICTED_LUNS_RETURNED 0x00
111#define NVME_POWER_STATE_START_VALID 0x00
112#define NVME_POWER_STATE_ACTIVE 0x01
113#define NVME_POWER_STATE_IDLE 0x02
114#define NVME_POWER_STATE_STANDBY 0x03
115#define NVME_POWER_STATE_LU_CONTROL 0x07
116#define POWER_STATE_0 0
117#define POWER_STATE_1 1
118#define POWER_STATE_2 2
119#define POWER_STATE_3 3
120#define DOWNLOAD_SAVE_ACTIVATE 0x05
121#define DOWNLOAD_SAVE_DEFER_ACTIVATE 0x0E
122#define ACTIVATE_DEFERRED_MICROCODE 0x0F
123#define FORMAT_UNIT_IMMED_MASK 0x2
124#define FORMAT_UNIT_IMMED_OFFSET 1
125#define KELVIN_TEMP_FACTOR 273
126#define FIXED_FMT_SENSE_DATA_SIZE 18
127#define DESC_FMT_SENSE_DATA_SIZE 8
128
129/* SCSI/NVMe defines and bit masks */
130#define INQ_STANDARD_INQUIRY_PAGE 0x00
131#define INQ_SUPPORTED_VPD_PAGES_PAGE 0x00
132#define INQ_UNIT_SERIAL_NUMBER_PAGE 0x80
133#define INQ_DEVICE_IDENTIFICATION_PAGE 0x83
134#define INQ_EXTENDED_INQUIRY_DATA_PAGE 0x86
135#define INQ_BDEV_CHARACTERISTICS_PAGE 0xB1
136#define INQ_SERIAL_NUMBER_LENGTH 0x14
137#define INQ_NUM_SUPPORTED_VPD_PAGES 5
138#define VERSION_SPC_4 0x06
139#define ACA_UNSUPPORTED 0
140#define STANDARD_INQUIRY_LENGTH 36
141#define ADDITIONAL_STD_INQ_LENGTH 31
142#define EXTENDED_INQUIRY_DATA_PAGE_LENGTH 0x3C
143#define RESERVED_FIELD 0
144
145/* SCSI READ/WRITE Defines */
146#define IO_CDB_WP_MASK 0xE0
147#define IO_CDB_WP_SHIFT 5
148#define IO_CDB_FUA_MASK 0x8
149#define IO_6_CDB_LBA_OFFSET 0
150#define IO_6_CDB_LBA_MASK 0x001FFFFF
151#define IO_6_CDB_TX_LEN_OFFSET 4
152#define IO_6_DEFAULT_TX_LEN 256
153#define IO_10_CDB_LBA_OFFSET 2
154#define IO_10_CDB_TX_LEN_OFFSET 7
155#define IO_10_CDB_WP_OFFSET 1
156#define IO_10_CDB_FUA_OFFSET 1
157#define IO_12_CDB_LBA_OFFSET 2
158#define IO_12_CDB_TX_LEN_OFFSET 6
159#define IO_12_CDB_WP_OFFSET 1
160#define IO_12_CDB_FUA_OFFSET 1
161#define IO_16_CDB_FUA_OFFSET 1
162#define IO_16_CDB_WP_OFFSET 1
163#define IO_16_CDB_LBA_OFFSET 2
164#define IO_16_CDB_TX_LEN_OFFSET 10
165
166/* Mode Sense/Select defines */
167#define MODE_PAGE_INFO_EXCEP 0x1C
168#define MODE_PAGE_CACHING 0x08
169#define MODE_PAGE_CONTROL 0x0A
170#define MODE_PAGE_POWER_CONDITION 0x1A
171#define MODE_PAGE_RETURN_ALL 0x3F
172#define MODE_PAGE_BLK_DES_LEN 0x08
173#define MODE_PAGE_LLBAA_BLK_DES_LEN 0x10
174#define MODE_PAGE_CACHING_LEN 0x14
175#define MODE_PAGE_CONTROL_LEN 0x0C
176#define MODE_PAGE_POW_CND_LEN 0x28
177#define MODE_PAGE_INF_EXC_LEN 0x0C
178#define MODE_PAGE_ALL_LEN 0x54
179#define MODE_SENSE6_MPH_SIZE 4
180#define MODE_SENSE6_ALLOC_LEN_OFFSET 4
181#define MODE_SENSE_PAGE_CONTROL_OFFSET 2
182#define MODE_SENSE_PAGE_CONTROL_MASK 0xC0
183#define MODE_SENSE_PAGE_CODE_OFFSET 2
184#define MODE_SENSE_PAGE_CODE_MASK 0x3F
185#define MODE_SENSE_LLBAA_OFFSET 1
186#define MODE_SENSE_LLBAA_MASK 0x10
187#define MODE_SENSE_LLBAA_SHIFT 4
188#define MODE_SENSE_DBD_OFFSET 1
189#define MODE_SENSE_DBD_MASK 8
190#define MODE_SENSE_DBD_SHIFT 3
191#define MODE_SENSE10_MPH_SIZE 8
192#define MODE_SENSE10_ALLOC_LEN_OFFSET 7
193#define MODE_SELECT_CDB_PAGE_FORMAT_OFFSET 1
194#define MODE_SELECT_CDB_SAVE_PAGES_OFFSET 1
195#define MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET 4
196#define MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET 7
197#define MODE_SELECT_CDB_PAGE_FORMAT_MASK 0x10
198#define MODE_SELECT_CDB_SAVE_PAGES_MASK 0x1
199#define MODE_SELECT_6_BD_OFFSET 3
200#define MODE_SELECT_10_BD_OFFSET 6
201#define MODE_SELECT_10_LLBAA_OFFSET 4
202#define MODE_SELECT_10_LLBAA_MASK 1
203#define MODE_SELECT_6_MPH_SIZE 4
204#define MODE_SELECT_10_MPH_SIZE 8
205#define CACHING_MODE_PAGE_WCE_MASK 0x04
206#define MODE_SENSE_BLK_DESC_ENABLED 0
207#define MODE_SENSE_BLK_DESC_COUNT 1
208#define MODE_SELECT_PAGE_CODE_MASK 0x3F
209#define SHORT_DESC_BLOCK 8
210#define LONG_DESC_BLOCK 16
211#define MODE_PAGE_POW_CND_LEN_FIELD 0x26
212#define MODE_PAGE_INF_EXC_LEN_FIELD 0x0A
213#define MODE_PAGE_CACHING_LEN_FIELD 0x12
214#define MODE_PAGE_CONTROL_LEN_FIELD 0x0A
215#define MODE_SENSE_PC_CURRENT_VALUES 0
216
217/* Log Sense defines */
218#define LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE 0x00
219#define LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH 0x07
220#define LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE 0x2F
221#define LOG_PAGE_TEMPERATURE_PAGE 0x0D
222#define LOG_SENSE_CDB_SP_OFFSET 1
223#define LOG_SENSE_CDB_SP_NOT_ENABLED 0
224#define LOG_SENSE_CDB_PC_OFFSET 2
225#define LOG_SENSE_CDB_PC_MASK 0xC0
226#define LOG_SENSE_CDB_PC_SHIFT 6
227#define LOG_SENSE_CDB_PC_CUMULATIVE_VALUES 1
228#define LOG_SENSE_CDB_PAGE_CODE_MASK 0x3F
229#define LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET 7
230#define REMAINING_INFO_EXCP_PAGE_LENGTH 0x8
231#define LOG_INFO_EXCP_PAGE_LENGTH 0xC
232#define REMAINING_TEMP_PAGE_LENGTH 0xC
233#define LOG_TEMP_PAGE_LENGTH 0x10
234#define LOG_TEMP_UNKNOWN 0xFF
235#define SUPPORTED_LOG_PAGES_PAGE_LENGTH 0x3
236
237/* Read Capacity defines */
238#define READ_CAP_10_RESP_SIZE 8
239#define READ_CAP_16_RESP_SIZE 32
240
241/* NVMe Namespace and Command Defines */
242#define NVME_GET_SMART_LOG_PAGE 0x02
243#define NVME_GET_FEAT_TEMP_THRESH 0x04
244#define BYTES_TO_DWORDS 4
245#define NVME_MAX_FIRMWARE_SLOT 7
246
247/* Report LUNs defines */
248#define REPORT_LUNS_FIRST_LUN_OFFSET 8
249
250/* SCSI ADDITIONAL SENSE Codes */
251
252#define SCSI_ASC_NO_SENSE 0x00
253#define SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT 0x03
254#define SCSI_ASC_LUN_NOT_READY 0x04
255#define SCSI_ASC_WARNING 0x0B
256#define SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED 0x10
257#define SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED 0x10
258#define SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED 0x10
259#define SCSI_ASC_UNRECOVERED_READ_ERROR 0x11
260#define SCSI_ASC_MISCOMPARE_DURING_VERIFY 0x1D
261#define SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID 0x20
262#define SCSI_ASC_ILLEGAL_COMMAND 0x20
263#define SCSI_ASC_ILLEGAL_BLOCK 0x21
264#define SCSI_ASC_INVALID_CDB 0x24
265#define SCSI_ASC_INVALID_LUN 0x25
266#define SCSI_ASC_INVALID_PARAMETER 0x26
267#define SCSI_ASC_FORMAT_COMMAND_FAILED 0x31
268#define SCSI_ASC_INTERNAL_TARGET_FAILURE 0x44
269
270/* SCSI ADDITIONAL SENSE Code Qualifiers */
271
272#define SCSI_ASCQ_CAUSE_NOT_REPORTABLE 0x00
273#define SCSI_ASCQ_FORMAT_COMMAND_FAILED 0x01
274#define SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED 0x01
275#define SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED 0x02
276#define SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED 0x03
277#define SCSI_ASCQ_FORMAT_IN_PROGRESS 0x04
278#define SCSI_ASCQ_POWER_LOSS_EXPECTED 0x08
279#define SCSI_ASCQ_INVALID_LUN_ID 0x09
280
281/**
282 * DEVICE_SPECIFIC_PARAMETER in mode parameter header (see sbc2r16) to
283 * enable DPOFUA support type 0x10 value.
284 */
285#define DEVICE_SPECIFIC_PARAMETER 0
286#define VPD_ID_DESCRIPTOR_LENGTH sizeof(VPD_IDENTIFICATION_DESCRIPTOR)
287
288/* MACROs to extract information from CDBs */
289
290#define GET_OPCODE(cdb) cdb[0]
291
292#define GET_U8_FROM_CDB(cdb, index) (cdb[index] << 0)
293
294#define GET_U16_FROM_CDB(cdb, index) ((cdb[index] << 8) | (cdb[index + 1] << 0))
295
296#define GET_U24_FROM_CDB(cdb, index) ((cdb[index] << 16) | \
297(cdb[index + 1] << 8) | \
298(cdb[index + 2] << 0))
299
300#define GET_U32_FROM_CDB(cdb, index) ((cdb[index] << 24) | \
301(cdb[index + 1] << 16) | \
302(cdb[index + 2] << 8) | \
303(cdb[index + 3] << 0))
304
305#define GET_U64_FROM_CDB(cdb, index) ((((u64)cdb[index]) << 56) | \
306(((u64)cdb[index + 1]) << 48) | \
307(((u64)cdb[index + 2]) << 40) | \
308(((u64)cdb[index + 3]) << 32) | \
309(((u64)cdb[index + 4]) << 24) | \
310(((u64)cdb[index + 5]) << 16) | \
311(((u64)cdb[index + 6]) << 8) | \
312(((u64)cdb[index + 7]) << 0))
313
314/* Inquiry Helper Macros */
315#define GET_INQ_EVPD_BIT(cdb) \
316((GET_U8_FROM_CDB(cdb, INQUIRY_EVPD_BYTE_OFFSET) & \
317INQUIRY_EVPD_BIT_MASK) ? 1 : 0)
318
319#define GET_INQ_PAGE_CODE(cdb) \
320(GET_U8_FROM_CDB(cdb, INQUIRY_PAGE_CODE_BYTE_OFFSET))
321
322#define GET_INQ_ALLOC_LENGTH(cdb) \
323(GET_U16_FROM_CDB(cdb, INQUIRY_CDB_ALLOCATION_LENGTH_OFFSET))
324
325/* Report LUNs Helper Macros */
326#define GET_REPORT_LUNS_ALLOC_LENGTH(cdb) \
327(GET_U32_FROM_CDB(cdb, REPORT_LUNS_CDB_ALLOC_LENGTH_OFFSET))
328
329/* Read Capacity Helper Macros */
330#define GET_READ_CAP_16_ALLOC_LENGTH(cdb) \
331(GET_U32_FROM_CDB(cdb, READ_CAP_16_CDB_ALLOC_LENGTH_OFFSET))
332
333#define IS_READ_CAP_16(cdb) \
334((cdb[0] == SERVICE_ACTION_IN && cdb[1] == SAI_READ_CAPACITY_16) ? 1 : 0)
335
336/* Request Sense Helper Macros */
337#define GET_REQUEST_SENSE_ALLOC_LENGTH(cdb) \
338(GET_U8_FROM_CDB(cdb, REQUEST_SENSE_CDB_ALLOC_LENGTH_OFFSET))
339
340/* Mode Sense Helper Macros */
341#define GET_MODE_SENSE_DBD(cdb) \
342((GET_U8_FROM_CDB(cdb, MODE_SENSE_DBD_OFFSET) & MODE_SENSE_DBD_MASK) >> \
343MODE_SENSE_DBD_SHIFT)
344
345#define GET_MODE_SENSE_LLBAA(cdb) \
346((GET_U8_FROM_CDB(cdb, MODE_SENSE_LLBAA_OFFSET) & \
347MODE_SENSE_LLBAA_MASK) >> MODE_SENSE_LLBAA_SHIFT)
348
349#define GET_MODE_SENSE_MPH_SIZE(cdb10) \
350(cdb10 ? MODE_SENSE10_MPH_SIZE : MODE_SENSE6_MPH_SIZE)
351
352
353/* Struct to gather data that needs to be extracted from a SCSI CDB.
354 Not conforming to any particular CDB variant, but compatible with all. */
355
356struct nvme_trans_io_cdb {
357 u8 fua;
358 u8 prot_info;
359 u64 lba;
360 u32 xfer_len;
361};
362
363
364/* Internal Helper Functions */
365
366
367/* Copy data to userspace memory */
368
369static int nvme_trans_copy_to_user(struct sg_io_hdr *hdr, void *from,
370 unsigned long n)
371{
372 int res = SNTI_TRANSLATION_SUCCESS;
373 unsigned long not_copied;
374 int i;
375 void *index = from;
376 size_t remaining = n;
377 size_t xfer_len;
378
379 if (hdr->iovec_count > 0) {
8741ee4c 380 struct sg_iovec sgl;
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381
382 for (i = 0; i < hdr->iovec_count; i++) {
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383 not_copied = copy_from_user(&sgl, hdr->dxferp +
384 i * sizeof(struct sg_iovec),
385 sizeof(struct sg_iovec));
386 if (not_copied)
387 return -EFAULT;
388 xfer_len = min(remaining, sgl.iov_len);
389 not_copied = copy_to_user(sgl.iov_base, index,
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390 xfer_len);
391 if (not_copied) {
392 res = -EFAULT;
393 break;
394 }
395 index += xfer_len;
396 remaining -= xfer_len;
397 if (remaining == 0)
398 break;
399 }
400 return res;
401 }
8741ee4c 402 not_copied = copy_to_user(hdr->dxferp, from, n);
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403 if (not_copied)
404 res = -EFAULT;
405 return res;
406}
407
408/* Copy data from userspace memory */
409
410static int nvme_trans_copy_from_user(struct sg_io_hdr *hdr, void *to,
411 unsigned long n)
412{
413 int res = SNTI_TRANSLATION_SUCCESS;
414 unsigned long not_copied;
415 int i;
416 void *index = to;
417 size_t remaining = n;
418 size_t xfer_len;
419
420 if (hdr->iovec_count > 0) {
8741ee4c 421 struct sg_iovec sgl;
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422
423 for (i = 0; i < hdr->iovec_count; i++) {
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424 not_copied = copy_from_user(&sgl, hdr->dxferp +
425 i * sizeof(struct sg_iovec),
426 sizeof(struct sg_iovec));
427 if (not_copied)
428 return -EFAULT;
429 xfer_len = min(remaining, sgl.iov_len);
430 not_copied = copy_from_user(index, sgl.iov_base,
431 xfer_len);
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432 if (not_copied) {
433 res = -EFAULT;
434 break;
435 }
436 index += xfer_len;
437 remaining -= xfer_len;
438 if (remaining == 0)
439 break;
440 }
441 return res;
442 }
443
8741ee4c 444 not_copied = copy_from_user(to, hdr->dxferp, n);
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445 if (not_copied)
446 res = -EFAULT;
447 return res;
448}
449
450/* Status/Sense Buffer Writeback */
451
452static int nvme_trans_completion(struct sg_io_hdr *hdr, u8 status, u8 sense_key,
453 u8 asc, u8 ascq)
454{
455 int res = SNTI_TRANSLATION_SUCCESS;
456 u8 xfer_len;
457 u8 resp[DESC_FMT_SENSE_DATA_SIZE];
458
459 if (scsi_status_is_good(status)) {
460 hdr->status = SAM_STAT_GOOD;
461 hdr->masked_status = GOOD;
462 hdr->host_status = DID_OK;
463 hdr->driver_status = DRIVER_OK;
464 hdr->sb_len_wr = 0;
465 } else {
466 hdr->status = status;
467 hdr->masked_status = status >> 1;
468 hdr->host_status = DID_OK;
469 hdr->driver_status = DRIVER_OK;
470
471 memset(resp, 0, DESC_FMT_SENSE_DATA_SIZE);
472 resp[0] = DESC_FORMAT_SENSE_DATA;
473 resp[1] = sense_key;
474 resp[2] = asc;
475 resp[3] = ascq;
476
477 xfer_len = min_t(u8, hdr->mx_sb_len, DESC_FMT_SENSE_DATA_SIZE);
478 hdr->sb_len_wr = xfer_len;
8741ee4c 479 if (copy_to_user(hdr->sbp, resp, xfer_len) > 0)
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480 res = -EFAULT;
481 }
482
483 return res;
484}
485
486static int nvme_trans_status_code(struct sg_io_hdr *hdr, int nvme_sc)
487{
488 u8 status, sense_key, asc, ascq;
489 int res = SNTI_TRANSLATION_SUCCESS;
490
491 /* For non-nvme (Linux) errors, simply return the error code */
492 if (nvme_sc < 0)
493 return nvme_sc;
494
495 /* Mask DNR, More, and reserved fields */
496 nvme_sc &= 0x7FF;
497
498 switch (nvme_sc) {
499 /* Generic Command Status */
500 case NVME_SC_SUCCESS:
501 status = SAM_STAT_GOOD;
502 sense_key = NO_SENSE;
503 asc = SCSI_ASC_NO_SENSE;
504 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
505 break;
506 case NVME_SC_INVALID_OPCODE:
507 status = SAM_STAT_CHECK_CONDITION;
508 sense_key = ILLEGAL_REQUEST;
509 asc = SCSI_ASC_ILLEGAL_COMMAND;
510 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
511 break;
512 case NVME_SC_INVALID_FIELD:
513 status = SAM_STAT_CHECK_CONDITION;
514 sense_key = ILLEGAL_REQUEST;
515 asc = SCSI_ASC_INVALID_CDB;
516 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
517 break;
518 case NVME_SC_DATA_XFER_ERROR:
519 status = SAM_STAT_CHECK_CONDITION;
520 sense_key = MEDIUM_ERROR;
521 asc = SCSI_ASC_NO_SENSE;
522 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
523 break;
524 case NVME_SC_POWER_LOSS:
525 status = SAM_STAT_TASK_ABORTED;
526 sense_key = ABORTED_COMMAND;
527 asc = SCSI_ASC_WARNING;
528 ascq = SCSI_ASCQ_POWER_LOSS_EXPECTED;
529 break;
530 case NVME_SC_INTERNAL:
531 status = SAM_STAT_CHECK_CONDITION;
532 sense_key = HARDWARE_ERROR;
533 asc = SCSI_ASC_INTERNAL_TARGET_FAILURE;
534 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
535 break;
536 case NVME_SC_ABORT_REQ:
537 status = SAM_STAT_TASK_ABORTED;
538 sense_key = ABORTED_COMMAND;
539 asc = SCSI_ASC_NO_SENSE;
540 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
541 break;
542 case NVME_SC_ABORT_QUEUE:
543 status = SAM_STAT_TASK_ABORTED;
544 sense_key = ABORTED_COMMAND;
545 asc = SCSI_ASC_NO_SENSE;
546 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
547 break;
548 case NVME_SC_FUSED_FAIL:
549 status = SAM_STAT_TASK_ABORTED;
550 sense_key = ABORTED_COMMAND;
551 asc = SCSI_ASC_NO_SENSE;
552 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
553 break;
554 case NVME_SC_FUSED_MISSING:
555 status = SAM_STAT_TASK_ABORTED;
556 sense_key = ABORTED_COMMAND;
557 asc = SCSI_ASC_NO_SENSE;
558 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
559 break;
560 case NVME_SC_INVALID_NS:
561 status = SAM_STAT_CHECK_CONDITION;
562 sense_key = ILLEGAL_REQUEST;
563 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
564 ascq = SCSI_ASCQ_INVALID_LUN_ID;
565 break;
566 case NVME_SC_LBA_RANGE:
567 status = SAM_STAT_CHECK_CONDITION;
568 sense_key = ILLEGAL_REQUEST;
569 asc = SCSI_ASC_ILLEGAL_BLOCK;
570 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
571 break;
572 case NVME_SC_CAP_EXCEEDED:
573 status = SAM_STAT_CHECK_CONDITION;
574 sense_key = MEDIUM_ERROR;
575 asc = SCSI_ASC_NO_SENSE;
576 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
577 break;
578 case NVME_SC_NS_NOT_READY:
579 status = SAM_STAT_CHECK_CONDITION;
580 sense_key = NOT_READY;
581 asc = SCSI_ASC_LUN_NOT_READY;
582 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
583 break;
584
585 /* Command Specific Status */
586 case NVME_SC_INVALID_FORMAT:
587 status = SAM_STAT_CHECK_CONDITION;
588 sense_key = ILLEGAL_REQUEST;
589 asc = SCSI_ASC_FORMAT_COMMAND_FAILED;
590 ascq = SCSI_ASCQ_FORMAT_COMMAND_FAILED;
591 break;
592 case NVME_SC_BAD_ATTRIBUTES:
593 status = SAM_STAT_CHECK_CONDITION;
594 sense_key = ILLEGAL_REQUEST;
595 asc = SCSI_ASC_INVALID_CDB;
596 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
597 break;
598
599 /* Media Errors */
600 case NVME_SC_WRITE_FAULT:
601 status = SAM_STAT_CHECK_CONDITION;
602 sense_key = MEDIUM_ERROR;
603 asc = SCSI_ASC_PERIPHERAL_DEV_WRITE_FAULT;
604 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
605 break;
606 case NVME_SC_READ_ERROR:
607 status = SAM_STAT_CHECK_CONDITION;
608 sense_key = MEDIUM_ERROR;
609 asc = SCSI_ASC_UNRECOVERED_READ_ERROR;
610 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
611 break;
612 case NVME_SC_GUARD_CHECK:
613 status = SAM_STAT_CHECK_CONDITION;
614 sense_key = MEDIUM_ERROR;
615 asc = SCSI_ASC_LOG_BLOCK_GUARD_CHECK_FAILED;
616 ascq = SCSI_ASCQ_LOG_BLOCK_GUARD_CHECK_FAILED;
617 break;
618 case NVME_SC_APPTAG_CHECK:
619 status = SAM_STAT_CHECK_CONDITION;
620 sense_key = MEDIUM_ERROR;
621 asc = SCSI_ASC_LOG_BLOCK_APPTAG_CHECK_FAILED;
622 ascq = SCSI_ASCQ_LOG_BLOCK_APPTAG_CHECK_FAILED;
623 break;
624 case NVME_SC_REFTAG_CHECK:
625 status = SAM_STAT_CHECK_CONDITION;
626 sense_key = MEDIUM_ERROR;
627 asc = SCSI_ASC_LOG_BLOCK_REFTAG_CHECK_FAILED;
628 ascq = SCSI_ASCQ_LOG_BLOCK_REFTAG_CHECK_FAILED;
629 break;
630 case NVME_SC_COMPARE_FAILED:
631 status = SAM_STAT_CHECK_CONDITION;
632 sense_key = MISCOMPARE;
633 asc = SCSI_ASC_MISCOMPARE_DURING_VERIFY;
634 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
635 break;
636 case NVME_SC_ACCESS_DENIED:
637 status = SAM_STAT_CHECK_CONDITION;
638 sense_key = ILLEGAL_REQUEST;
639 asc = SCSI_ASC_ACCESS_DENIED_INVALID_LUN_ID;
640 ascq = SCSI_ASCQ_INVALID_LUN_ID;
641 break;
642
643 /* Unspecified/Default */
644 case NVME_SC_CMDID_CONFLICT:
645 case NVME_SC_CMD_SEQ_ERROR:
646 case NVME_SC_CQ_INVALID:
647 case NVME_SC_QID_INVALID:
648 case NVME_SC_QUEUE_SIZE:
649 case NVME_SC_ABORT_LIMIT:
650 case NVME_SC_ABORT_MISSING:
651 case NVME_SC_ASYNC_LIMIT:
652 case NVME_SC_FIRMWARE_SLOT:
653 case NVME_SC_FIRMWARE_IMAGE:
654 case NVME_SC_INVALID_VECTOR:
655 case NVME_SC_INVALID_LOG_PAGE:
656 default:
657 status = SAM_STAT_CHECK_CONDITION;
658 sense_key = ILLEGAL_REQUEST;
659 asc = SCSI_ASC_NO_SENSE;
660 ascq = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
661 break;
662 }
663
664 res = nvme_trans_completion(hdr, status, sense_key, asc, ascq);
665
666 return res;
667}
668
669/* INQUIRY Helper Functions */
670
671static int nvme_trans_standard_inquiry_page(struct nvme_ns *ns,
672 struct sg_io_hdr *hdr, u8 *inq_response,
673 int alloc_len)
674{
675 struct nvme_dev *dev = ns->dev;
676 dma_addr_t dma_addr;
677 void *mem;
678 struct nvme_id_ns *id_ns;
679 int res = SNTI_TRANSLATION_SUCCESS;
680 int nvme_sc;
681 int xfer_len;
682 u8 resp_data_format = 0x02;
683 u8 protect;
684 u8 cmdque = 0x01 << 1;
685
686 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
687 &dma_addr, GFP_KERNEL);
688 if (mem == NULL) {
689 res = -ENOMEM;
690 goto out_dma;
691 }
692
693 /* nvme ns identify - use DPS value for PROTECT field */
694 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
695 res = nvme_trans_status_code(hdr, nvme_sc);
696 /*
697 * If nvme_sc was -ve, res will be -ve here.
698 * If nvme_sc was +ve, the status would bace been translated, and res
699 * can only be 0 or -ve.
700 * - If 0 && nvme_sc > 0, then go into next if where res gets nvme_sc
701 * - If -ve, return because its a Linux error.
702 */
703 if (res)
704 goto out_free;
705 if (nvme_sc) {
706 res = nvme_sc;
707 goto out_free;
708 }
709 id_ns = mem;
710 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
711
712 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
713 inq_response[2] = VERSION_SPC_4;
714 inq_response[3] = resp_data_format; /*normaca=0 | hisup=0 */
715 inq_response[4] = ADDITIONAL_STD_INQ_LENGTH;
716 inq_response[5] = protect; /* sccs=0 | acc=0 | tpgs=0 | pc3=0 */
717 inq_response[7] = cmdque; /* wbus16=0 | sync=0 | vs=0 */
718 strncpy(&inq_response[8], "NVMe ", 8);
719 strncpy(&inq_response[16], dev->model, 16);
720 strncpy(&inq_response[32], dev->firmware_rev, 4);
721
722 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
723 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
724
725 out_free:
726 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
727 dma_addr);
728 out_dma:
729 return res;
730}
731
732static int nvme_trans_supported_vpd_pages(struct nvme_ns *ns,
733 struct sg_io_hdr *hdr, u8 *inq_response,
734 int alloc_len)
735{
736 int res = SNTI_TRANSLATION_SUCCESS;
737 int xfer_len;
738
739 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
740 inq_response[1] = INQ_SUPPORTED_VPD_PAGES_PAGE; /* Page Code */
741 inq_response[3] = INQ_NUM_SUPPORTED_VPD_PAGES; /* Page Length */
742 inq_response[4] = INQ_SUPPORTED_VPD_PAGES_PAGE;
743 inq_response[5] = INQ_UNIT_SERIAL_NUMBER_PAGE;
744 inq_response[6] = INQ_DEVICE_IDENTIFICATION_PAGE;
745 inq_response[7] = INQ_EXTENDED_INQUIRY_DATA_PAGE;
746 inq_response[8] = INQ_BDEV_CHARACTERISTICS_PAGE;
747
748 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
749 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
750
751 return res;
752}
753
754static int nvme_trans_unit_serial_page(struct nvme_ns *ns,
755 struct sg_io_hdr *hdr, u8 *inq_response,
756 int alloc_len)
757{
758 struct nvme_dev *dev = ns->dev;
759 int res = SNTI_TRANSLATION_SUCCESS;
760 int xfer_len;
761
762 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
763 inq_response[1] = INQ_UNIT_SERIAL_NUMBER_PAGE; /* Page Code */
764 inq_response[3] = INQ_SERIAL_NUMBER_LENGTH; /* Page Length */
765 strncpy(&inq_response[4], dev->serial, INQ_SERIAL_NUMBER_LENGTH);
766
767 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
768 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
769
770 return res;
771}
772
773static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
774 u8 *inq_response, int alloc_len)
775{
776 struct nvme_dev *dev = ns->dev;
777 dma_addr_t dma_addr;
778 void *mem;
779 struct nvme_id_ctrl *id_ctrl;
780 int res = SNTI_TRANSLATION_SUCCESS;
781 int nvme_sc;
782 u8 ieee[4];
783 int xfer_len;
8741ee4c 784 __be32 tmp_id = cpu_to_be32(ns->ns_id);
5d0f6131
VV
785
786 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
787 &dma_addr, GFP_KERNEL);
788 if (mem == NULL) {
789 res = -ENOMEM;
790 goto out_dma;
791 }
792
793 /* nvme controller identify */
794 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
795 res = nvme_trans_status_code(hdr, nvme_sc);
796 if (res)
797 goto out_free;
798 if (nvme_sc) {
799 res = nvme_sc;
800 goto out_free;
801 }
802 id_ctrl = mem;
803
804 /* Since SCSI tried to save 4 bits... [SPC-4(r34) Table 591] */
805 ieee[0] = id_ctrl->ieee[0] << 4;
806 ieee[1] = id_ctrl->ieee[0] >> 4 | id_ctrl->ieee[1] << 4;
807 ieee[2] = id_ctrl->ieee[1] >> 4 | id_ctrl->ieee[2] << 4;
808 ieee[3] = id_ctrl->ieee[2] >> 4;
809
810 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
811 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
812 inq_response[3] = 20; /* Page Length */
813 /* Designation Descriptor start */
814 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
815 inq_response[5] = 0x03; /* PIV=0b | Asso=00b | Designator Type=3h */
816 inq_response[6] = 0x00; /* Rsvd */
817 inq_response[7] = 16; /* Designator Length */
818 /* Designator start */
819 inq_response[8] = 0x60 | ieee[3]; /* NAA=6h | IEEE ID MSB, High nibble*/
820 inq_response[9] = ieee[2]; /* IEEE ID */
821 inq_response[10] = ieee[1]; /* IEEE ID */
822 inq_response[11] = ieee[0]; /* IEEE ID| Vendor Specific ID... */
823 inq_response[12] = (dev->pci_dev->vendor & 0xFF00) >> 8;
824 inq_response[13] = (dev->pci_dev->vendor & 0x00FF);
825 inq_response[14] = dev->serial[0];
826 inq_response[15] = dev->serial[1];
827 inq_response[16] = dev->model[0];
828 inq_response[17] = dev->model[1];
829 memcpy(&inq_response[18], &tmp_id, sizeof(u32));
830 /* Last 2 bytes are zero */
831
832 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH);
833 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
834
835 out_free:
836 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
837 dma_addr);
838 out_dma:
839 return res;
840}
841
842static int nvme_trans_ext_inq_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
843 int alloc_len)
844{
845 u8 *inq_response;
846 int res = SNTI_TRANSLATION_SUCCESS;
847 int nvme_sc;
848 struct nvme_dev *dev = ns->dev;
849 dma_addr_t dma_addr;
850 void *mem;
851 struct nvme_id_ctrl *id_ctrl;
852 struct nvme_id_ns *id_ns;
853 int xfer_len;
854 u8 microcode = 0x80;
855 u8 spt;
856 u8 spt_lut[8] = {0, 0, 2, 1, 4, 6, 5, 7};
857 u8 grd_chk, app_chk, ref_chk, protect;
858 u8 uask_sup = 0x20;
859 u8 v_sup;
860 u8 luiclr = 0x01;
861
862 inq_response = kmalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
863 if (inq_response == NULL) {
864 res = -ENOMEM;
865 goto out_mem;
866 }
867
868 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
869 &dma_addr, GFP_KERNEL);
870 if (mem == NULL) {
871 res = -ENOMEM;
872 goto out_dma;
873 }
874
875 /* nvme ns identify */
876 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
877 res = nvme_trans_status_code(hdr, nvme_sc);
878 if (res)
879 goto out_free;
880 if (nvme_sc) {
881 res = nvme_sc;
882 goto out_free;
883 }
884 id_ns = mem;
885 spt = spt_lut[(id_ns->dpc) & 0x07] << 3;
886 (id_ns->dps) ? (protect = 0x01) : (protect = 0);
887 grd_chk = protect << 2;
888 app_chk = protect << 1;
889 ref_chk = protect;
890
891 /* nvme controller identify */
892 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
893 res = nvme_trans_status_code(hdr, nvme_sc);
894 if (res)
895 goto out_free;
896 if (nvme_sc) {
897 res = nvme_sc;
898 goto out_free;
899 }
900 id_ctrl = mem;
901 v_sup = id_ctrl->vwc;
902
903 memset(inq_response, 0, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
904 inq_response[1] = INQ_EXTENDED_INQUIRY_DATA_PAGE; /* Page Code */
905 inq_response[2] = 0x00; /* Page Length MSB */
906 inq_response[3] = 0x3C; /* Page Length LSB */
907 inq_response[4] = microcode | spt | grd_chk | app_chk | ref_chk;
908 inq_response[5] = uask_sup;
909 inq_response[6] = v_sup;
910 inq_response[7] = luiclr;
911 inq_response[8] = 0;
912 inq_response[9] = 0;
913
914 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
915 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
916
917 out_free:
918 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
919 dma_addr);
920 out_dma:
921 kfree(inq_response);
922 out_mem:
923 return res;
924}
925
926static int nvme_trans_bdev_char_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
927 int alloc_len)
928{
929 u8 *inq_response;
930 int res = SNTI_TRANSLATION_SUCCESS;
931 int xfer_len;
932
03ea83e9 933 inq_response = kzalloc(EXTENDED_INQUIRY_DATA_PAGE_LENGTH, GFP_KERNEL);
5d0f6131
VV
934 if (inq_response == NULL) {
935 res = -ENOMEM;
936 goto out_mem;
937 }
938
5d0f6131
VV
939 inq_response[1] = INQ_BDEV_CHARACTERISTICS_PAGE; /* Page Code */
940 inq_response[2] = 0x00; /* Page Length MSB */
941 inq_response[3] = 0x3C; /* Page Length LSB */
942 inq_response[4] = 0x00; /* Medium Rotation Rate MSB */
943 inq_response[5] = 0x01; /* Medium Rotation Rate LSB */
944 inq_response[6] = 0x00; /* Form Factor */
945
946 xfer_len = min(alloc_len, EXTENDED_INQUIRY_DATA_PAGE_LENGTH);
947 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
948
949 kfree(inq_response);
950 out_mem:
951 return res;
952}
953
954/* LOG SENSE Helper Functions */
955
956static int nvme_trans_log_supp_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
957 int alloc_len)
958{
959 int res = SNTI_TRANSLATION_SUCCESS;
960 int xfer_len;
961 u8 *log_response;
962
03ea83e9 963 log_response = kzalloc(LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH, GFP_KERNEL);
5d0f6131
VV
964 if (log_response == NULL) {
965 res = -ENOMEM;
966 goto out_mem;
967 }
5d0f6131
VV
968
969 log_response[0] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
970 /* Subpage=0x00, Page Length MSB=0 */
971 log_response[3] = SUPPORTED_LOG_PAGES_PAGE_LENGTH;
972 log_response[4] = LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE;
973 log_response[5] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
974 log_response[6] = LOG_PAGE_TEMPERATURE_PAGE;
975
976 xfer_len = min(alloc_len, LOG_PAGE_SUPPORTED_LOG_PAGES_LENGTH);
977 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
978
979 kfree(log_response);
980 out_mem:
981 return res;
982}
983
984static int nvme_trans_log_info_exceptions(struct nvme_ns *ns,
985 struct sg_io_hdr *hdr, int alloc_len)
986{
987 int res = SNTI_TRANSLATION_SUCCESS;
988 int xfer_len;
989 u8 *log_response;
990 struct nvme_command c;
991 struct nvme_dev *dev = ns->dev;
992 struct nvme_smart_log *smart_log;
993 dma_addr_t dma_addr;
994 void *mem;
995 u8 temp_c;
996 u16 temp_k;
997
03ea83e9 998 log_response = kzalloc(LOG_INFO_EXCP_PAGE_LENGTH, GFP_KERNEL);
5d0f6131
VV
999 if (log_response == NULL) {
1000 res = -ENOMEM;
1001 goto out_mem;
1002 }
5d0f6131
VV
1003
1004 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1005 sizeof(struct nvme_smart_log),
1006 &dma_addr, GFP_KERNEL);
1007 if (mem == NULL) {
1008 res = -ENOMEM;
1009 goto out_dma;
1010 }
1011
1012 /* Get SMART Log Page */
1013 memset(&c, 0, sizeof(c));
1014 c.common.opcode = nvme_admin_get_log_page;
1015 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1016 c.common.prp1 = cpu_to_le64(dma_addr);
1017 c.common.cdw10[0] = cpu_to_le32(((sizeof(struct nvme_smart_log) /
1018 BYTES_TO_DWORDS) << 16) | NVME_GET_SMART_LOG_PAGE);
1019 res = nvme_submit_admin_cmd(dev, &c, NULL);
1020 if (res != NVME_SC_SUCCESS) {
1021 temp_c = LOG_TEMP_UNKNOWN;
1022 } else {
1023 smart_log = mem;
1024 temp_k = (smart_log->temperature[1] << 8) +
1025 (smart_log->temperature[0]);
1026 temp_c = temp_k - KELVIN_TEMP_FACTOR;
1027 }
1028
1029 log_response[0] = LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE;
1030 /* Subpage=0x00, Page Length MSB=0 */
1031 log_response[3] = REMAINING_INFO_EXCP_PAGE_LENGTH;
1032 /* Informational Exceptions Log Parameter 1 Start */
1033 /* Parameter Code=0x0000 bytes 4,5 */
1034 log_response[6] = 0x23; /* DU=0, TSD=1, ETC=0, TMC=0, FMT_AND_LNK=11b */
1035 log_response[7] = 0x04; /* PARAMETER LENGTH */
1036 /* Add sense Code and qualifier = 0x00 each */
1037 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1038 log_response[10] = temp_c;
1039
1040 xfer_len = min(alloc_len, LOG_INFO_EXCP_PAGE_LENGTH);
1041 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1042
1043 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1044 mem, dma_addr);
1045 out_dma:
1046 kfree(log_response);
1047 out_mem:
1048 return res;
1049}
1050
1051static int nvme_trans_log_temperature(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1052 int alloc_len)
1053{
1054 int res = SNTI_TRANSLATION_SUCCESS;
1055 int xfer_len;
1056 u8 *log_response;
1057 struct nvme_command c;
1058 struct nvme_dev *dev = ns->dev;
1059 struct nvme_smart_log *smart_log;
1060 dma_addr_t dma_addr;
1061 void *mem;
1062 u32 feature_resp;
1063 u8 temp_c_cur, temp_c_thresh;
1064 u16 temp_k;
1065
03ea83e9 1066 log_response = kzalloc(LOG_TEMP_PAGE_LENGTH, GFP_KERNEL);
5d0f6131
VV
1067 if (log_response == NULL) {
1068 res = -ENOMEM;
1069 goto out_mem;
1070 }
5d0f6131
VV
1071
1072 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1073 sizeof(struct nvme_smart_log),
1074 &dma_addr, GFP_KERNEL);
1075 if (mem == NULL) {
1076 res = -ENOMEM;
1077 goto out_dma;
1078 }
1079
1080 /* Get SMART Log Page */
1081 memset(&c, 0, sizeof(c));
1082 c.common.opcode = nvme_admin_get_log_page;
1083 c.common.nsid = cpu_to_le32(0xFFFFFFFF);
1084 c.common.prp1 = cpu_to_le64(dma_addr);
1085 c.common.cdw10[0] = cpu_to_le32(((sizeof(struct nvme_smart_log) /
1086 BYTES_TO_DWORDS) << 16) | NVME_GET_SMART_LOG_PAGE);
1087 res = nvme_submit_admin_cmd(dev, &c, NULL);
1088 if (res != NVME_SC_SUCCESS) {
1089 temp_c_cur = LOG_TEMP_UNKNOWN;
1090 } else {
1091 smart_log = mem;
1092 temp_k = (smart_log->temperature[1] << 8) +
1093 (smart_log->temperature[0]);
1094 temp_c_cur = temp_k - KELVIN_TEMP_FACTOR;
1095 }
1096
1097 /* Get Features for Temp Threshold */
1098 res = nvme_get_features(dev, NVME_FEAT_TEMP_THRESH, 0, 0,
1099 &feature_resp);
1100 if (res != NVME_SC_SUCCESS)
1101 temp_c_thresh = LOG_TEMP_UNKNOWN;
1102 else
1103 temp_c_thresh = (feature_resp & 0xFFFF) - KELVIN_TEMP_FACTOR;
1104
1105 log_response[0] = LOG_PAGE_TEMPERATURE_PAGE;
1106 /* Subpage=0x00, Page Length MSB=0 */
1107 log_response[3] = REMAINING_TEMP_PAGE_LENGTH;
1108 /* Temperature Log Parameter 1 (Temperature) Start */
1109 /* Parameter Code = 0x0000 */
1110 log_response[6] = 0x01; /* Format and Linking = 01b */
1111 log_response[7] = 0x02; /* Parameter Length */
1112 /* Use Temperature from NVMe Get Log Page, convert to C from K */
1113 log_response[9] = temp_c_cur;
1114 /* Temperature Log Parameter 2 (Reference Temperature) Start */
1115 log_response[11] = 0x01; /* Parameter Code = 0x0001 */
1116 log_response[12] = 0x01; /* Format and Linking = 01b */
1117 log_response[13] = 0x02; /* Parameter Length */
1118 /* Use Temperature Thresh from NVMe Get Log Page, convert to C from K */
1119 log_response[15] = temp_c_thresh;
1120
1121 xfer_len = min(alloc_len, LOG_TEMP_PAGE_LENGTH);
1122 res = nvme_trans_copy_to_user(hdr, log_response, xfer_len);
1123
1124 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_smart_log),
1125 mem, dma_addr);
1126 out_dma:
1127 kfree(log_response);
1128 out_mem:
1129 return res;
1130}
1131
1132/* MODE SENSE Helper Functions */
1133
1134static int nvme_trans_fill_mode_parm_hdr(u8 *resp, int len, u8 cdb10, u8 llbaa,
1135 u16 mode_data_length, u16 blk_desc_len)
1136{
1137 /* Quick check to make sure I don't stomp on my own memory... */
1138 if ((cdb10 && len < 8) || (!cdb10 && len < 4))
1139 return SNTI_INTERNAL_ERROR;
1140
1141 if (cdb10) {
1142 resp[0] = (mode_data_length & 0xFF00) >> 8;
1143 resp[1] = (mode_data_length & 0x00FF);
1144 /* resp[2] and [3] are zero */
1145 resp[4] = llbaa;
1146 resp[5] = RESERVED_FIELD;
1147 resp[6] = (blk_desc_len & 0xFF00) >> 8;
1148 resp[7] = (blk_desc_len & 0x00FF);
1149 } else {
1150 resp[0] = (mode_data_length & 0x00FF);
1151 /* resp[1] and [2] are zero */
1152 resp[3] = (blk_desc_len & 0x00FF);
1153 }
1154
1155 return SNTI_TRANSLATION_SUCCESS;
1156}
1157
1158static int nvme_trans_fill_blk_desc(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1159 u8 *resp, int len, u8 llbaa)
1160{
1161 int res = SNTI_TRANSLATION_SUCCESS;
1162 int nvme_sc;
1163 struct nvme_dev *dev = ns->dev;
1164 dma_addr_t dma_addr;
1165 void *mem;
1166 struct nvme_id_ns *id_ns;
1167 u8 flbas;
1168 u32 lba_length;
1169
1170 if (llbaa == 0 && len < MODE_PAGE_BLK_DES_LEN)
1171 return SNTI_INTERNAL_ERROR;
1172 else if (llbaa > 0 && len < MODE_PAGE_LLBAA_BLK_DES_LEN)
1173 return SNTI_INTERNAL_ERROR;
1174
1175 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1176 &dma_addr, GFP_KERNEL);
1177 if (mem == NULL) {
1178 res = -ENOMEM;
1179 goto out;
1180 }
1181
1182 /* nvme ns identify */
1183 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1184 res = nvme_trans_status_code(hdr, nvme_sc);
1185 if (res)
1186 goto out_dma;
1187 if (nvme_sc) {
1188 res = nvme_sc;
1189 goto out_dma;
1190 }
1191 id_ns = mem;
1192 flbas = (id_ns->flbas) & 0x0F;
1193 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1194
1195 if (llbaa == 0) {
8741ee4c 1196 __be32 tmp_cap = cpu_to_be32(le64_to_cpu(id_ns->ncap));
5d0f6131 1197 /* Byte 4 is reserved */
8741ee4c 1198 __be32 tmp_len = cpu_to_be32(lba_length & 0x00FFFFFF);
5d0f6131
VV
1199
1200 memcpy(resp, &tmp_cap, sizeof(u32));
1201 memcpy(&resp[4], &tmp_len, sizeof(u32));
1202 } else {
8741ee4c
VV
1203 __be64 tmp_cap = cpu_to_be64(le64_to_cpu(id_ns->ncap));
1204 __be32 tmp_len = cpu_to_be32(lba_length);
5d0f6131
VV
1205
1206 memcpy(resp, &tmp_cap, sizeof(u64));
1207 /* Bytes 8, 9, 10, 11 are reserved */
1208 memcpy(&resp[12], &tmp_len, sizeof(u32));
1209 }
1210
1211 out_dma:
1212 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1213 dma_addr);
1214 out:
1215 return res;
1216}
1217
1218static int nvme_trans_fill_control_page(struct nvme_ns *ns,
1219 struct sg_io_hdr *hdr, u8 *resp,
1220 int len)
1221{
1222 if (len < MODE_PAGE_CONTROL_LEN)
1223 return SNTI_INTERNAL_ERROR;
1224
1225 resp[0] = MODE_PAGE_CONTROL;
1226 resp[1] = MODE_PAGE_CONTROL_LEN_FIELD;
1227 resp[2] = 0x0E; /* TST=000b, TMF_ONLY=0, DPICZ=1,
1228 * D_SENSE=1, GLTSD=1, RLEC=0 */
1229 resp[3] = 0x12; /* Q_ALGO_MODIFIER=1h, NUAR=0, QERR=01b */
1230 /* Byte 4: VS=0, RAC=0, UA_INT=0, SWP=0 */
1231 resp[5] = 0x40; /* ATO=0, TAS=1, ATMPE=0, RWWP=0, AUTOLOAD=0 */
1232 /* resp[6] and [7] are obsolete, thus zero */
1233 resp[8] = 0xFF; /* Busy timeout period = 0xffff */
1234 resp[9] = 0xFF;
1235 /* Bytes 10,11: Extended selftest completion time = 0x0000 */
1236
1237 return SNTI_TRANSLATION_SUCCESS;
1238}
1239
1240static int nvme_trans_fill_caching_page(struct nvme_ns *ns,
1241 struct sg_io_hdr *hdr,
1242 u8 *resp, int len)
1243{
1244 int res = SNTI_TRANSLATION_SUCCESS;
1245 int nvme_sc;
1246 struct nvme_dev *dev = ns->dev;
1247 u32 feature_resp;
1248 u8 vwc;
1249
1250 if (len < MODE_PAGE_CACHING_LEN)
1251 return SNTI_INTERNAL_ERROR;
1252
1253 nvme_sc = nvme_get_features(dev, NVME_FEAT_VOLATILE_WC, 0, 0,
1254 &feature_resp);
1255 res = nvme_trans_status_code(hdr, nvme_sc);
1256 if (res)
1257 goto out;
1258 if (nvme_sc) {
1259 res = nvme_sc;
1260 goto out;
1261 }
1262 vwc = feature_resp & 0x00000001;
1263
1264 resp[0] = MODE_PAGE_CACHING;
1265 resp[1] = MODE_PAGE_CACHING_LEN_FIELD;
1266 resp[2] = vwc << 2;
1267
1268 out:
1269 return res;
1270}
1271
1272static int nvme_trans_fill_pow_cnd_page(struct nvme_ns *ns,
1273 struct sg_io_hdr *hdr, u8 *resp,
1274 int len)
1275{
1276 int res = SNTI_TRANSLATION_SUCCESS;
1277
1278 if (len < MODE_PAGE_POW_CND_LEN)
1279 return SNTI_INTERNAL_ERROR;
1280
1281 resp[0] = MODE_PAGE_POWER_CONDITION;
1282 resp[1] = MODE_PAGE_POW_CND_LEN_FIELD;
1283 /* All other bytes are zero */
1284
1285 return res;
1286}
1287
1288static int nvme_trans_fill_inf_exc_page(struct nvme_ns *ns,
1289 struct sg_io_hdr *hdr, u8 *resp,
1290 int len)
1291{
1292 int res = SNTI_TRANSLATION_SUCCESS;
1293
1294 if (len < MODE_PAGE_INF_EXC_LEN)
1295 return SNTI_INTERNAL_ERROR;
1296
1297 resp[0] = MODE_PAGE_INFO_EXCEP;
1298 resp[1] = MODE_PAGE_INF_EXC_LEN_FIELD;
1299 resp[2] = 0x88;
1300 /* All other bytes are zero */
1301
1302 return res;
1303}
1304
1305static int nvme_trans_fill_all_pages(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1306 u8 *resp, int len)
1307{
1308 int res = SNTI_TRANSLATION_SUCCESS;
1309 u16 mode_pages_offset_1 = 0;
1310 u16 mode_pages_offset_2, mode_pages_offset_3, mode_pages_offset_4;
1311
1312 mode_pages_offset_2 = mode_pages_offset_1 + MODE_PAGE_CACHING_LEN;
1313 mode_pages_offset_3 = mode_pages_offset_2 + MODE_PAGE_CONTROL_LEN;
1314 mode_pages_offset_4 = mode_pages_offset_3 + MODE_PAGE_POW_CND_LEN;
1315
1316 res = nvme_trans_fill_caching_page(ns, hdr, &resp[mode_pages_offset_1],
1317 MODE_PAGE_CACHING_LEN);
1318 if (res != SNTI_TRANSLATION_SUCCESS)
1319 goto out;
1320 res = nvme_trans_fill_control_page(ns, hdr, &resp[mode_pages_offset_2],
1321 MODE_PAGE_CONTROL_LEN);
1322 if (res != SNTI_TRANSLATION_SUCCESS)
1323 goto out;
1324 res = nvme_trans_fill_pow_cnd_page(ns, hdr, &resp[mode_pages_offset_3],
1325 MODE_PAGE_POW_CND_LEN);
1326 if (res != SNTI_TRANSLATION_SUCCESS)
1327 goto out;
1328 res = nvme_trans_fill_inf_exc_page(ns, hdr, &resp[mode_pages_offset_4],
1329 MODE_PAGE_INF_EXC_LEN);
1330 if (res != SNTI_TRANSLATION_SUCCESS)
1331 goto out;
1332
1333 out:
1334 return res;
1335}
1336
1337static inline int nvme_trans_get_blk_desc_len(u8 dbd, u8 llbaa)
1338{
1339 if (dbd == MODE_SENSE_BLK_DESC_ENABLED) {
1340 /* SPC-4: len = 8 x Num_of_descriptors if llbaa = 0, 16x if 1 */
1341 return 8 * (llbaa + 1) * MODE_SENSE_BLK_DESC_COUNT;
1342 } else {
1343 return 0;
1344 }
1345}
1346
1347static int nvme_trans_mode_page_create(struct nvme_ns *ns,
1348 struct sg_io_hdr *hdr, u8 *cmd,
1349 u16 alloc_len, u8 cdb10,
1350 int (*mode_page_fill_func)
1351 (struct nvme_ns *,
1352 struct sg_io_hdr *hdr, u8 *, int),
1353 u16 mode_pages_tot_len)
1354{
1355 int res = SNTI_TRANSLATION_SUCCESS;
1356 int xfer_len;
1357 u8 *response;
1358 u8 dbd, llbaa;
1359 u16 resp_size;
1360 int mph_size;
1361 u16 mode_pages_offset_1;
1362 u16 blk_desc_len, blk_desc_offset, mode_data_length;
1363
1364 dbd = GET_MODE_SENSE_DBD(cmd);
1365 llbaa = GET_MODE_SENSE_LLBAA(cmd);
1366 mph_size = GET_MODE_SENSE_MPH_SIZE(cdb10);
1367 blk_desc_len = nvme_trans_get_blk_desc_len(dbd, llbaa);
1368
1369 resp_size = mph_size + blk_desc_len + mode_pages_tot_len;
1370 /* Refer spc4r34 Table 440 for calculation of Mode data Length field */
1371 mode_data_length = 3 + (3 * cdb10) + blk_desc_len + mode_pages_tot_len;
1372
1373 blk_desc_offset = mph_size;
1374 mode_pages_offset_1 = blk_desc_offset + blk_desc_len;
1375
03ea83e9 1376 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV
1377 if (response == NULL) {
1378 res = -ENOMEM;
1379 goto out_mem;
1380 }
5d0f6131
VV
1381
1382 res = nvme_trans_fill_mode_parm_hdr(&response[0], mph_size, cdb10,
1383 llbaa, mode_data_length, blk_desc_len);
1384 if (res != SNTI_TRANSLATION_SUCCESS)
1385 goto out_free;
1386 if (blk_desc_len > 0) {
1387 res = nvme_trans_fill_blk_desc(ns, hdr,
1388 &response[blk_desc_offset],
1389 blk_desc_len, llbaa);
1390 if (res != SNTI_TRANSLATION_SUCCESS)
1391 goto out_free;
1392 }
1393 res = mode_page_fill_func(ns, hdr, &response[mode_pages_offset_1],
1394 mode_pages_tot_len);
1395 if (res != SNTI_TRANSLATION_SUCCESS)
1396 goto out_free;
1397
1398 xfer_len = min(alloc_len, resp_size);
1399 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
1400
1401 out_free:
1402 kfree(response);
1403 out_mem:
1404 return res;
1405}
1406
1407/* Read Capacity Helper Functions */
1408
1409static void nvme_trans_fill_read_cap(u8 *response, struct nvme_id_ns *id_ns,
1410 u8 cdb16)
1411{
1412 u8 flbas;
1413 u32 lba_length;
1414 u64 rlba;
1415 u8 prot_en;
1416 u8 p_type_lut[4] = {0, 0, 1, 2};
8741ee4c
VV
1417 __be64 tmp_rlba;
1418 __be32 tmp_rlba_32;
1419 __be32 tmp_len;
5d0f6131
VV
1420
1421 flbas = (id_ns->flbas) & 0x0F;
1422 lba_length = (1 << (id_ns->lbaf[flbas].ds));
1423 rlba = le64_to_cpup(&id_ns->nsze) - 1;
1424 (id_ns->dps) ? (prot_en = 0x01) : (prot_en = 0);
1425
1426 if (!cdb16) {
1427 if (rlba > 0xFFFFFFFF)
1428 rlba = 0xFFFFFFFF;
1429 tmp_rlba_32 = cpu_to_be32(rlba);
1430 tmp_len = cpu_to_be32(lba_length);
1431 memcpy(response, &tmp_rlba_32, sizeof(u32));
1432 memcpy(&response[4], &tmp_len, sizeof(u32));
1433 } else {
1434 tmp_rlba = cpu_to_be64(rlba);
1435 tmp_len = cpu_to_be32(lba_length);
1436 memcpy(response, &tmp_rlba, sizeof(u64));
1437 memcpy(&response[8], &tmp_len, sizeof(u32));
1438 response[12] = (p_type_lut[id_ns->dps & 0x3] << 1) | prot_en;
1439 /* P_I_Exponent = 0x0 | LBPPBE = 0x0 */
1440 /* LBPME = 0 | LBPRZ = 0 | LALBA = 0x00 */
1441 /* Bytes 16-31 - Reserved */
1442 }
1443}
1444
1445/* Start Stop Unit Helper Functions */
1446
1447static int nvme_trans_power_state(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1448 u8 pc, u8 pcmod, u8 start)
1449{
1450 int res = SNTI_TRANSLATION_SUCCESS;
1451 int nvme_sc;
1452 struct nvme_dev *dev = ns->dev;
1453 dma_addr_t dma_addr;
1454 void *mem;
1455 struct nvme_id_ctrl *id_ctrl;
1456 int lowest_pow_st; /* max npss = lowest power consumption */
1457 unsigned ps_desired = 0;
1458
1459 /* NVMe Controller Identify */
1460 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1461 sizeof(struct nvme_id_ctrl),
1462 &dma_addr, GFP_KERNEL);
1463 if (mem == NULL) {
1464 res = -ENOMEM;
1465 goto out;
1466 }
1467 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
1468 res = nvme_trans_status_code(hdr, nvme_sc);
1469 if (res)
1470 goto out_dma;
1471 if (nvme_sc) {
1472 res = nvme_sc;
1473 goto out_dma;
1474 }
1475 id_ctrl = mem;
1476 lowest_pow_st = id_ctrl->npss - 1;
1477
1478 switch (pc) {
1479 case NVME_POWER_STATE_START_VALID:
1480 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1481 if (pcmod == 0 && start == 0x1)
1482 ps_desired = POWER_STATE_0;
1483 if (pcmod == 0 && start == 0x0)
1484 ps_desired = lowest_pow_st;
1485 break;
1486 case NVME_POWER_STATE_ACTIVE:
1487 /* Action unspecified if POWER CONDITION MODIFIER != 0 */
1488 if (pcmod == 0)
1489 ps_desired = POWER_STATE_0;
1490 break;
1491 case NVME_POWER_STATE_IDLE:
1492 /* Action unspecified if POWER CONDITION MODIFIER != [0,1,2] */
1493 /* min of desired state and (lps-1) because lps is STOP */
1494 if (pcmod == 0x0)
1495 ps_desired = min(POWER_STATE_1, (lowest_pow_st - 1));
1496 else if (pcmod == 0x1)
1497 ps_desired = min(POWER_STATE_2, (lowest_pow_st - 1));
1498 else if (pcmod == 0x2)
1499 ps_desired = min(POWER_STATE_3, (lowest_pow_st - 1));
1500 break;
1501 case NVME_POWER_STATE_STANDBY:
1502 /* Action unspecified if POWER CONDITION MODIFIER != [0,1] */
1503 if (pcmod == 0x0)
1504 ps_desired = max(0, (lowest_pow_st - 2));
1505 else if (pcmod == 0x1)
1506 ps_desired = max(0, (lowest_pow_st - 1));
1507 break;
1508 case NVME_POWER_STATE_LU_CONTROL:
1509 default:
1510 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1511 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1512 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1513 break;
1514 }
1515 nvme_sc = nvme_set_features(dev, NVME_FEAT_POWER_MGMT, ps_desired, 0,
1516 NULL);
1517 res = nvme_trans_status_code(hdr, nvme_sc);
1518 if (res)
1519 goto out_dma;
1520 if (nvme_sc)
1521 res = nvme_sc;
1522 out_dma:
1523 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
1524 dma_addr);
1525 out:
1526 return res;
1527}
1528
1529/* Write Buffer Helper Functions */
1530/* Also using this for Format Unit with hdr passed as NULL, and buffer_id, 0 */
1531
1532static int nvme_trans_send_fw_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1533 u8 opcode, u32 tot_len, u32 offset,
1534 u8 buffer_id)
1535{
1536 int res = SNTI_TRANSLATION_SUCCESS;
1537 int nvme_sc;
1538 struct nvme_dev *dev = ns->dev;
1539 struct nvme_command c;
1540 struct nvme_iod *iod = NULL;
1541 unsigned length;
1542
1543 memset(&c, 0, sizeof(c));
1544 c.common.opcode = opcode;
1545 if (opcode == nvme_admin_download_fw) {
1546 if (hdr->iovec_count > 0) {
1547 /* Assuming SGL is not allowed for this command */
1548 res = nvme_trans_completion(hdr,
1549 SAM_STAT_CHECK_CONDITION,
1550 ILLEGAL_REQUEST,
1551 SCSI_ASC_INVALID_CDB,
1552 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1553 goto out;
1554 }
1555 iod = nvme_map_user_pages(dev, DMA_TO_DEVICE,
1556 (unsigned long)hdr->dxferp, tot_len);
1557 if (IS_ERR(iod)) {
1558 res = PTR_ERR(iod);
1559 goto out;
1560 }
edd10d33 1561 length = nvme_setup_prps(dev, iod, tot_len, GFP_KERNEL);
5d0f6131
VV
1562 if (length != tot_len) {
1563 res = -ENOMEM;
1564 goto out_unmap;
1565 }
1566
edd10d33
KB
1567 c.dlfw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
1568 c.dlfw.prp2 = cpu_to_le64(iod->first_dma);
8741ee4c
VV
1569 c.dlfw.numd = cpu_to_le32((tot_len/BYTES_TO_DWORDS) - 1);
1570 c.dlfw.offset = cpu_to_le32(offset/BYTES_TO_DWORDS);
5d0f6131 1571 } else if (opcode == nvme_admin_activate_fw) {
ab3ea5bf
MW
1572 u32 cdw10 = buffer_id | NVME_FWACT_REPL_ACTV;
1573 c.common.cdw10[0] = cpu_to_le32(cdw10);
5d0f6131
VV
1574 }
1575
1576 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1577 res = nvme_trans_status_code(hdr, nvme_sc);
1578 if (res)
1579 goto out_unmap;
1580 if (nvme_sc)
1581 res = nvme_sc;
1582
1583 out_unmap:
1584 if (opcode == nvme_admin_download_fw) {
1585 nvme_unmap_user_pages(dev, DMA_TO_DEVICE, iod);
1586 nvme_free_iod(dev, iod);
1587 }
1588 out:
1589 return res;
1590}
1591
1592/* Mode Select Helper Functions */
1593
1594static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
1595 u16 *bd_len, u8 *llbaa)
1596{
1597 if (cdb10) {
1598 /* 10 Byte CDB */
1599 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
1600 parm_list[MODE_SELECT_10_BD_OFFSET + 1];
1601 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &&
1602 MODE_SELECT_10_LLBAA_MASK;
1603 } else {
1604 /* 6 Byte CDB */
1605 *bd_len = parm_list[MODE_SELECT_6_BD_OFFSET];
1606 }
1607}
1608
1609static void nvme_trans_modesel_save_bd(struct nvme_ns *ns, u8 *parm_list,
1610 u16 idx, u16 bd_len, u8 llbaa)
1611{
1612 u16 bd_num;
1613
1614 bd_num = bd_len / ((llbaa == 0) ?
1615 SHORT_DESC_BLOCK : LONG_DESC_BLOCK);
1616 /* Store block descriptor info if a FORMAT UNIT comes later */
1617 /* TODO Saving 1st BD info; what to do if multiple BD received? */
1618 if (llbaa == 0) {
1619 /* Standard Block Descriptor - spc4r34 7.5.5.1 */
1620 ns->mode_select_num_blocks =
1621 (parm_list[idx + 1] << 16) +
1622 (parm_list[idx + 2] << 8) +
1623 (parm_list[idx + 3]);
1624
1625 ns->mode_select_block_len =
1626 (parm_list[idx + 5] << 16) +
1627 (parm_list[idx + 6] << 8) +
1628 (parm_list[idx + 7]);
1629 } else {
1630 /* Long LBA Block Descriptor - sbc3r27 6.4.2.3 */
1631 ns->mode_select_num_blocks =
1632 (((u64)parm_list[idx + 0]) << 56) +
1633 (((u64)parm_list[idx + 1]) << 48) +
1634 (((u64)parm_list[idx + 2]) << 40) +
1635 (((u64)parm_list[idx + 3]) << 32) +
1636 (((u64)parm_list[idx + 4]) << 24) +
1637 (((u64)parm_list[idx + 5]) << 16) +
1638 (((u64)parm_list[idx + 6]) << 8) +
1639 ((u64)parm_list[idx + 7]);
1640
1641 ns->mode_select_block_len =
1642 (parm_list[idx + 12] << 24) +
1643 (parm_list[idx + 13] << 16) +
1644 (parm_list[idx + 14] << 8) +
1645 (parm_list[idx + 15]);
1646 }
1647}
1648
710a143d 1649static int nvme_trans_modesel_get_mp(struct nvme_ns *ns, struct sg_io_hdr *hdr,
5d0f6131
VV
1650 u8 *mode_page, u8 page_code)
1651{
1652 int res = SNTI_TRANSLATION_SUCCESS;
1653 int nvme_sc;
1654 struct nvme_dev *dev = ns->dev;
1655 unsigned dword11;
1656
1657 switch (page_code) {
1658 case MODE_PAGE_CACHING:
1659 dword11 = ((mode_page[2] & CACHING_MODE_PAGE_WCE_MASK) ? 1 : 0);
1660 nvme_sc = nvme_set_features(dev, NVME_FEAT_VOLATILE_WC, dword11,
1661 0, NULL);
1662 res = nvme_trans_status_code(hdr, nvme_sc);
1663 if (res)
1664 break;
1665 if (nvme_sc) {
1666 res = nvme_sc;
1667 break;
1668 }
1669 break;
1670 case MODE_PAGE_CONTROL:
1671 break;
1672 case MODE_PAGE_POWER_CONDITION:
1673 /* Verify the OS is not trying to set timers */
1674 if ((mode_page[2] & 0x01) != 0 || (mode_page[3] & 0x0F) != 0) {
1675 res = nvme_trans_completion(hdr,
1676 SAM_STAT_CHECK_CONDITION,
1677 ILLEGAL_REQUEST,
1678 SCSI_ASC_INVALID_PARAMETER,
1679 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1680 if (!res)
1681 res = SNTI_INTERNAL_ERROR;
1682 break;
1683 }
1684 break;
1685 default:
1686 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1687 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1688 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1689 if (!res)
1690 res = SNTI_INTERNAL_ERROR;
1691 break;
1692 }
1693
1694 return res;
1695}
1696
1697static int nvme_trans_modesel_data(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1698 u8 *cmd, u16 parm_list_len, u8 pf,
1699 u8 sp, u8 cdb10)
1700{
1701 int res = SNTI_TRANSLATION_SUCCESS;
1702 u8 *parm_list;
1703 u16 bd_len;
1704 u8 llbaa = 0;
1705 u16 index, saved_index;
1706 u8 page_code;
1707 u16 mp_size;
1708
1709 /* Get parm list from data-in/out buffer */
1710 parm_list = kmalloc(parm_list_len, GFP_KERNEL);
1711 if (parm_list == NULL) {
1712 res = -ENOMEM;
1713 goto out;
1714 }
1715
1716 res = nvme_trans_copy_from_user(hdr, parm_list, parm_list_len);
1717 if (res != SNTI_TRANSLATION_SUCCESS)
1718 goto out_mem;
1719
1720 nvme_trans_modesel_get_bd_len(parm_list, cdb10, &bd_len, &llbaa);
1721 index = (cdb10) ? (MODE_SELECT_10_MPH_SIZE) : (MODE_SELECT_6_MPH_SIZE);
1722
1723 if (bd_len != 0) {
1724 /* Block Descriptors present, parse */
1725 nvme_trans_modesel_save_bd(ns, parm_list, index, bd_len, llbaa);
1726 index += bd_len;
1727 }
1728 saved_index = index;
1729
1730 /* Multiple mode pages may be present; iterate through all */
1731 /* In 1st Iteration, don't do NVME Command, only check for CDB errors */
1732 do {
1733 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1734 mp_size = parm_list[index + 1] + 2;
1735 if ((page_code != MODE_PAGE_CACHING) &&
1736 (page_code != MODE_PAGE_CONTROL) &&
1737 (page_code != MODE_PAGE_POWER_CONDITION)) {
1738 res = nvme_trans_completion(hdr,
1739 SAM_STAT_CHECK_CONDITION,
1740 ILLEGAL_REQUEST,
1741 SCSI_ASC_INVALID_CDB,
1742 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1743 goto out_mem;
1744 }
1745 index += mp_size;
1746 } while (index < parm_list_len);
1747
1748 /* In 2nd Iteration, do the NVME Commands */
1749 index = saved_index;
1750 do {
1751 page_code = parm_list[index] & MODE_SELECT_PAGE_CODE_MASK;
1752 mp_size = parm_list[index + 1] + 2;
1753 res = nvme_trans_modesel_get_mp(ns, hdr, &parm_list[index],
1754 page_code);
1755 if (res != SNTI_TRANSLATION_SUCCESS)
1756 break;
1757 index += mp_size;
1758 } while (index < parm_list_len);
1759
1760 out_mem:
1761 kfree(parm_list);
1762 out:
1763 return res;
1764}
1765
1766/* Format Unit Helper Functions */
1767
1768static int nvme_trans_fmt_set_blk_size_count(struct nvme_ns *ns,
1769 struct sg_io_hdr *hdr)
1770{
1771 int res = SNTI_TRANSLATION_SUCCESS;
1772 int nvme_sc;
1773 struct nvme_dev *dev = ns->dev;
1774 dma_addr_t dma_addr;
1775 void *mem;
1776 struct nvme_id_ns *id_ns;
1777 u8 flbas;
1778
1779 /*
1780 * SCSI Expects a MODE SELECT would have been issued prior to
1781 * a FORMAT UNIT, and the block size and number would be used
1782 * from the block descriptor in it. If a MODE SELECT had not
1783 * been issued, FORMAT shall use the current values for both.
1784 */
1785
1786 if (ns->mode_select_num_blocks == 0 || ns->mode_select_block_len == 0) {
1787 mem = dma_alloc_coherent(&dev->pci_dev->dev,
1788 sizeof(struct nvme_id_ns), &dma_addr, GFP_KERNEL);
1789 if (mem == NULL) {
1790 res = -ENOMEM;
1791 goto out;
1792 }
1793 /* nvme ns identify */
1794 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1795 res = nvme_trans_status_code(hdr, nvme_sc);
1796 if (res)
1797 goto out_dma;
1798 if (nvme_sc) {
1799 res = nvme_sc;
1800 goto out_dma;
1801 }
1802 id_ns = mem;
1803
1804 if (ns->mode_select_num_blocks == 0)
8741ee4c 1805 ns->mode_select_num_blocks = le64_to_cpu(id_ns->ncap);
5d0f6131
VV
1806 if (ns->mode_select_block_len == 0) {
1807 flbas = (id_ns->flbas) & 0x0F;
1808 ns->mode_select_block_len =
1809 (1 << (id_ns->lbaf[flbas].ds));
1810 }
1811 out_dma:
1812 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1813 mem, dma_addr);
1814 }
1815 out:
1816 return res;
1817}
1818
1819static int nvme_trans_fmt_get_parm_header(struct sg_io_hdr *hdr, u8 len,
1820 u8 format_prot_info, u8 *nvme_pf_code)
1821{
1822 int res = SNTI_TRANSLATION_SUCCESS;
1823 u8 *parm_list;
1824 u8 pf_usage, pf_code;
1825
1826 parm_list = kmalloc(len, GFP_KERNEL);
1827 if (parm_list == NULL) {
1828 res = -ENOMEM;
1829 goto out;
1830 }
1831 res = nvme_trans_copy_from_user(hdr, parm_list, len);
1832 if (res != SNTI_TRANSLATION_SUCCESS)
1833 goto out_mem;
1834
1835 if ((parm_list[FORMAT_UNIT_IMMED_OFFSET] &
1836 FORMAT_UNIT_IMMED_MASK) != 0) {
1837 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1838 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1839 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1840 goto out_mem;
1841 }
1842
1843 if (len == FORMAT_UNIT_LONG_PARM_LIST_LEN &&
1844 (parm_list[FORMAT_UNIT_PROT_INT_OFFSET] & 0x0F) != 0) {
1845 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1846 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1847 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1848 goto out_mem;
1849 }
1850 pf_usage = parm_list[FORMAT_UNIT_PROT_FIELD_USAGE_OFFSET] &
1851 FORMAT_UNIT_PROT_FIELD_USAGE_MASK;
1852 pf_code = (pf_usage << 2) | format_prot_info;
1853 switch (pf_code) {
1854 case 0:
1855 *nvme_pf_code = 0;
1856 break;
1857 case 2:
1858 *nvme_pf_code = 1;
1859 break;
1860 case 3:
1861 *nvme_pf_code = 2;
1862 break;
1863 case 7:
1864 *nvme_pf_code = 3;
1865 break;
1866 default:
1867 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1868 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
1869 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1870 break;
1871 }
1872
1873 out_mem:
1874 kfree(parm_list);
1875 out:
1876 return res;
1877}
1878
1879static int nvme_trans_fmt_send_cmd(struct nvme_ns *ns, struct sg_io_hdr *hdr,
1880 u8 prot_info)
1881{
1882 int res = SNTI_TRANSLATION_SUCCESS;
1883 int nvme_sc;
1884 struct nvme_dev *dev = ns->dev;
1885 dma_addr_t dma_addr;
1886 void *mem;
1887 struct nvme_id_ns *id_ns;
1888 u8 i;
1889 u8 flbas, nlbaf;
1890 u8 selected_lbaf = 0xFF;
1891 u32 cdw10 = 0;
1892 struct nvme_command c;
1893
1894 /* Loop thru LBAF's in id_ns to match reqd lbaf, put in cdw10 */
1895 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
1896 &dma_addr, GFP_KERNEL);
1897 if (mem == NULL) {
1898 res = -ENOMEM;
1899 goto out;
1900 }
1901 /* nvme ns identify */
1902 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
1903 res = nvme_trans_status_code(hdr, nvme_sc);
1904 if (res)
1905 goto out_dma;
1906 if (nvme_sc) {
1907 res = nvme_sc;
1908 goto out_dma;
1909 }
1910 id_ns = mem;
1911 flbas = (id_ns->flbas) & 0x0F;
1912 nlbaf = id_ns->nlbaf;
1913
1914 for (i = 0; i < nlbaf; i++) {
1915 if (ns->mode_select_block_len == (1 << (id_ns->lbaf[i].ds))) {
1916 selected_lbaf = i;
1917 break;
1918 }
1919 }
1920 if (selected_lbaf > 0x0F) {
1921 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1922 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1923 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1924 }
8741ee4c 1925 if (ns->mode_select_num_blocks != le64_to_cpu(id_ns->ncap)) {
5d0f6131
VV
1926 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
1927 ILLEGAL_REQUEST, SCSI_ASC_INVALID_PARAMETER,
1928 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
1929 }
1930
1931 cdw10 |= prot_info << 5;
1932 cdw10 |= selected_lbaf & 0x0F;
1933 memset(&c, 0, sizeof(c));
1934 c.format.opcode = nvme_admin_format_nvm;
8741ee4c 1935 c.format.nsid = cpu_to_le32(ns->ns_id);
5d0f6131
VV
1936 c.format.cdw10 = cpu_to_le32(cdw10);
1937
1938 nvme_sc = nvme_submit_admin_cmd(dev, &c, NULL);
1939 res = nvme_trans_status_code(hdr, nvme_sc);
1940 if (res)
1941 goto out_dma;
1942 if (nvme_sc)
1943 res = nvme_sc;
1944
1945 out_dma:
1946 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
1947 dma_addr);
1948 out:
1949 return res;
1950}
1951
1952/* Read/Write Helper Functions */
1953
1954static inline void nvme_trans_get_io_cdb6(u8 *cmd,
1955 struct nvme_trans_io_cdb *cdb_info)
1956{
1957 cdb_info->fua = 0;
1958 cdb_info->prot_info = 0;
1959 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_6_CDB_LBA_OFFSET) &
1960 IO_6_CDB_LBA_MASK;
1961 cdb_info->xfer_len = GET_U8_FROM_CDB(cmd, IO_6_CDB_TX_LEN_OFFSET);
1962
1963 /* sbc3r27 sec 5.32 - TRANSFER LEN of 0 implies a 256 Block transfer */
1964 if (cdb_info->xfer_len == 0)
1965 cdb_info->xfer_len = IO_6_DEFAULT_TX_LEN;
1966}
1967
1968static inline void nvme_trans_get_io_cdb10(u8 *cmd,
1969 struct nvme_trans_io_cdb *cdb_info)
1970{
1971 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_10_CDB_FUA_OFFSET) &
1972 IO_CDB_FUA_MASK;
1973 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_10_CDB_WP_OFFSET) &
1974 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1975 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_10_CDB_LBA_OFFSET);
1976 cdb_info->xfer_len = GET_U16_FROM_CDB(cmd, IO_10_CDB_TX_LEN_OFFSET);
1977}
1978
1979static inline void nvme_trans_get_io_cdb12(u8 *cmd,
1980 struct nvme_trans_io_cdb *cdb_info)
1981{
1982 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_12_CDB_FUA_OFFSET) &
1983 IO_CDB_FUA_MASK;
1984 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_12_CDB_WP_OFFSET) &
1985 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1986 cdb_info->lba = GET_U32_FROM_CDB(cmd, IO_12_CDB_LBA_OFFSET);
1987 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_12_CDB_TX_LEN_OFFSET);
1988}
1989
1990static inline void nvme_trans_get_io_cdb16(u8 *cmd,
1991 struct nvme_trans_io_cdb *cdb_info)
1992{
1993 cdb_info->fua = GET_U8_FROM_CDB(cmd, IO_16_CDB_FUA_OFFSET) &
1994 IO_CDB_FUA_MASK;
1995 cdb_info->prot_info = GET_U8_FROM_CDB(cmd, IO_16_CDB_WP_OFFSET) &
1996 IO_CDB_WP_MASK >> IO_CDB_WP_SHIFT;
1997 cdb_info->lba = GET_U64_FROM_CDB(cmd, IO_16_CDB_LBA_OFFSET);
1998 cdb_info->xfer_len = GET_U32_FROM_CDB(cmd, IO_16_CDB_TX_LEN_OFFSET);
1999}
2000
2001static inline u32 nvme_trans_io_get_num_cmds(struct sg_io_hdr *hdr,
2002 struct nvme_trans_io_cdb *cdb_info,
2003 u32 max_blocks)
2004{
2005 /* If using iovecs, send one nvme command per vector */
2006 if (hdr->iovec_count > 0)
2007 return hdr->iovec_count;
2008 else if (cdb_info->xfer_len > max_blocks)
2009 return ((cdb_info->xfer_len - 1) / max_blocks) + 1;
2010 else
2011 return 1;
2012}
2013
2014static u16 nvme_trans_io_get_control(struct nvme_ns *ns,
2015 struct nvme_trans_io_cdb *cdb_info)
2016{
2017 u16 control = 0;
2018
2019 /* When Protection information support is added, implement here */
2020
2021 if (cdb_info->fua > 0)
2022 control |= NVME_RW_FUA;
2023
2024 return control;
2025}
2026
2027static int nvme_trans_do_nvme_io(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2028 struct nvme_trans_io_cdb *cdb_info, u8 is_write)
2029{
2030 int res = SNTI_TRANSLATION_SUCCESS;
2031 int nvme_sc;
2032 struct nvme_dev *dev = ns->dev;
5d0f6131
VV
2033 u32 num_cmds;
2034 struct nvme_iod *iod;
2035 u64 unit_len;
2036 u64 unit_num_blocks; /* Number of blocks to xfer in each nvme cmd */
2037 u32 retcode;
2038 u32 i = 0;
2039 u64 nvme_offset = 0;
8741ee4c 2040 void __user *next_mapping_addr;
5d0f6131
VV
2041 struct nvme_command c;
2042 u8 opcode = (is_write ? nvme_cmd_write : nvme_cmd_read);
2043 u16 control;
ddcb7762 2044 u32 max_blocks = queue_max_hw_sectors(ns->queue);
5d0f6131
VV
2045
2046 num_cmds = nvme_trans_io_get_num_cmds(hdr, cdb_info, max_blocks);
2047
2048 /*
2049 * This loop handles two cases.
2050 * First, when an SGL is used in the form of an iovec list:
2051 * - Use iov_base as the next mapping address for the nvme command_id
2052 * - Use iov_len as the data transfer length for the command.
2053 * Second, when we have a single buffer
2054 * - If larger than max_blocks, split into chunks, offset
2055 * each nvme command accordingly.
2056 */
2057 for (i = 0; i < num_cmds; i++) {
2058 memset(&c, 0, sizeof(c));
2059 if (hdr->iovec_count > 0) {
8741ee4c
VV
2060 struct sg_iovec sgl;
2061
2062 retcode = copy_from_user(&sgl, hdr->dxferp +
2063 i * sizeof(struct sg_iovec),
2064 sizeof(struct sg_iovec));
2065 if (retcode)
2066 return -EFAULT;
2067 unit_len = sgl.iov_len;
5d0f6131 2068 unit_num_blocks = unit_len >> ns->lba_shift;
8741ee4c 2069 next_mapping_addr = sgl.iov_base;
5d0f6131
VV
2070 } else {
2071 unit_num_blocks = min((u64)max_blocks,
2072 (cdb_info->xfer_len - nvme_offset));
2073 unit_len = unit_num_blocks << ns->lba_shift;
2074 next_mapping_addr = hdr->dxferp +
2075 ((1 << ns->lba_shift) * nvme_offset);
2076 }
2077
2078 c.rw.opcode = opcode;
2079 c.rw.nsid = cpu_to_le32(ns->ns_id);
2080 c.rw.slba = cpu_to_le64(cdb_info->lba + nvme_offset);
2081 c.rw.length = cpu_to_le16(unit_num_blocks - 1);
2082 control = nvme_trans_io_get_control(ns, cdb_info);
2083 c.rw.control = cpu_to_le16(control);
2084
2085 iod = nvme_map_user_pages(dev,
2086 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2087 (unsigned long)next_mapping_addr, unit_len);
2088 if (IS_ERR(iod)) {
2089 res = PTR_ERR(iod);
2090 goto out;
2091 }
edd10d33 2092 retcode = nvme_setup_prps(dev, iod, unit_len, GFP_KERNEL);
5d0f6131
VV
2093 if (retcode != unit_len) {
2094 nvme_unmap_user_pages(dev,
2095 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2096 iod);
2097 nvme_free_iod(dev, iod);
2098 res = -ENOMEM;
2099 goto out;
2100 }
edd10d33
KB
2101 c.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
2102 c.rw.prp2 = cpu_to_le64(iod->first_dma);
5d0f6131
VV
2103
2104 nvme_offset += unit_num_blocks;
2105
4f5099af 2106 nvme_sc = nvme_submit_io_cmd(dev, &c, NULL);
5d0f6131
VV
2107 if (nvme_sc != NVME_SC_SUCCESS) {
2108 nvme_unmap_user_pages(dev,
2109 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2110 iod);
2111 nvme_free_iod(dev, iod);
2112 res = nvme_trans_status_code(hdr, nvme_sc);
2113 goto out;
2114 }
2115 nvme_unmap_user_pages(dev,
2116 (is_write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE,
2117 iod);
2118 nvme_free_iod(dev, iod);
2119 }
2120 res = nvme_trans_status_code(hdr, NVME_SC_SUCCESS);
2121
2122 out:
2123 return res;
2124}
2125
2126
2127/* SCSI Command Translation Functions */
2128
2129static int nvme_trans_io(struct nvme_ns *ns, struct sg_io_hdr *hdr, u8 is_write,
2130 u8 *cmd)
2131{
2132 int res = SNTI_TRANSLATION_SUCCESS;
2133 struct nvme_trans_io_cdb cdb_info;
2134 u8 opcode = cmd[0];
2135 u64 xfer_bytes;
2136 u64 sum_iov_len = 0;
8741ee4c 2137 struct sg_iovec sgl;
5d0f6131 2138 int i;
8741ee4c 2139 size_t not_copied;
5d0f6131
VV
2140
2141 /* Extract Fields from CDB */
2142 switch (opcode) {
2143 case WRITE_6:
2144 case READ_6:
2145 nvme_trans_get_io_cdb6(cmd, &cdb_info);
2146 break;
2147 case WRITE_10:
2148 case READ_10:
2149 nvme_trans_get_io_cdb10(cmd, &cdb_info);
2150 break;
2151 case WRITE_12:
2152 case READ_12:
2153 nvme_trans_get_io_cdb12(cmd, &cdb_info);
2154 break;
2155 case WRITE_16:
2156 case READ_16:
2157 nvme_trans_get_io_cdb16(cmd, &cdb_info);
2158 break;
2159 default:
2160 /* Will never really reach here */
2161 res = SNTI_INTERNAL_ERROR;
2162 goto out;
2163 }
2164
2165 /* Calculate total length of transfer (in bytes) */
2166 if (hdr->iovec_count > 0) {
5d0f6131 2167 for (i = 0; i < hdr->iovec_count; i++) {
8741ee4c
VV
2168 not_copied = copy_from_user(&sgl, hdr->dxferp +
2169 i * sizeof(struct sg_iovec),
2170 sizeof(struct sg_iovec));
2171 if (not_copied)
2172 return -EFAULT;
2173 sum_iov_len += sgl.iov_len;
5d0f6131 2174 /* IO vector sizes should be multiples of block size */
8741ee4c 2175 if (sgl.iov_len % (1 << ns->lba_shift) != 0) {
5d0f6131
VV
2176 res = nvme_trans_completion(hdr,
2177 SAM_STAT_CHECK_CONDITION,
2178 ILLEGAL_REQUEST,
2179 SCSI_ASC_INVALID_PARAMETER,
2180 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2181 goto out;
2182 }
2183 }
2184 } else {
2185 sum_iov_len = hdr->dxfer_len;
2186 }
2187
2188 /* As Per sg ioctl howto, if the lengths differ, use the lower one */
2189 xfer_bytes = min(((u64)hdr->dxfer_len), sum_iov_len);
2190
2191 /* If block count and actual data buffer size dont match, error out */
2192 if (xfer_bytes != (cdb_info.xfer_len << ns->lba_shift)) {
2193 res = -EINVAL;
2194 goto out;
2195 }
2196
2197 /* Check for 0 length transfer - it is not illegal */
2198 if (cdb_info.xfer_len == 0)
2199 goto out;
2200
2201 /* Send NVMe IO Command(s) */
2202 res = nvme_trans_do_nvme_io(ns, hdr, &cdb_info, is_write);
2203 if (res != SNTI_TRANSLATION_SUCCESS)
2204 goto out;
2205
2206 out:
2207 return res;
2208}
2209
2210static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2211 u8 *cmd)
2212{
2213 int res = SNTI_TRANSLATION_SUCCESS;
2214 u8 evpd;
2215 u8 page_code;
2216 int alloc_len;
2217 u8 *inq_response;
2218
2219 evpd = GET_INQ_EVPD_BIT(cmd);
2220 page_code = GET_INQ_PAGE_CODE(cmd);
2221 alloc_len = GET_INQ_ALLOC_LENGTH(cmd);
2222
2223 inq_response = kmalloc(STANDARD_INQUIRY_LENGTH, GFP_KERNEL);
2224 if (inq_response == NULL) {
2225 res = -ENOMEM;
2226 goto out_mem;
2227 }
2228
2229 if (evpd == 0) {
2230 if (page_code == INQ_STANDARD_INQUIRY_PAGE) {
2231 res = nvme_trans_standard_inquiry_page(ns, hdr,
2232 inq_response, alloc_len);
2233 } else {
2234 res = nvme_trans_completion(hdr,
2235 SAM_STAT_CHECK_CONDITION,
2236 ILLEGAL_REQUEST,
2237 SCSI_ASC_INVALID_CDB,
2238 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2239 }
2240 } else {
2241 switch (page_code) {
2242 case VPD_SUPPORTED_PAGES:
2243 res = nvme_trans_supported_vpd_pages(ns, hdr,
2244 inq_response, alloc_len);
2245 break;
2246 case VPD_SERIAL_NUMBER:
2247 res = nvme_trans_unit_serial_page(ns, hdr, inq_response,
2248 alloc_len);
2249 break;
2250 case VPD_DEVICE_IDENTIFIERS:
2251 res = nvme_trans_device_id_page(ns, hdr, inq_response,
2252 alloc_len);
2253 break;
2254 case VPD_EXTENDED_INQUIRY:
2255 res = nvme_trans_ext_inq_page(ns, hdr, alloc_len);
2256 break;
2257 case VPD_BLOCK_DEV_CHARACTERISTICS:
2258 res = nvme_trans_bdev_char_page(ns, hdr, alloc_len);
2259 break;
2260 default:
2261 res = nvme_trans_completion(hdr,
2262 SAM_STAT_CHECK_CONDITION,
2263 ILLEGAL_REQUEST,
2264 SCSI_ASC_INVALID_CDB,
2265 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2266 break;
2267 }
2268 }
2269 kfree(inq_response);
2270 out_mem:
2271 return res;
2272}
2273
2274static int nvme_trans_log_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2275 u8 *cmd)
2276{
2277 int res = SNTI_TRANSLATION_SUCCESS;
2278 u16 alloc_len;
2279 u8 sp;
2280 u8 pc;
2281 u8 page_code;
2282
2283 sp = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_SP_OFFSET);
2284 if (sp != LOG_SENSE_CDB_SP_NOT_ENABLED) {
2285 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2286 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2287 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2288 goto out;
2289 }
2290 pc = GET_U8_FROM_CDB(cmd, LOG_SENSE_CDB_PC_OFFSET);
2291 page_code = pc & LOG_SENSE_CDB_PAGE_CODE_MASK;
2292 pc = (pc & LOG_SENSE_CDB_PC_MASK) >> LOG_SENSE_CDB_PC_SHIFT;
2293 if (pc != LOG_SENSE_CDB_PC_CUMULATIVE_VALUES) {
2294 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2295 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2296 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2297 goto out;
2298 }
2299 alloc_len = GET_U16_FROM_CDB(cmd, LOG_SENSE_CDB_ALLOC_LENGTH_OFFSET);
2300 switch (page_code) {
2301 case LOG_PAGE_SUPPORTED_LOG_PAGES_PAGE:
2302 res = nvme_trans_log_supp_pages(ns, hdr, alloc_len);
2303 break;
2304 case LOG_PAGE_INFORMATIONAL_EXCEPTIONS_PAGE:
2305 res = nvme_trans_log_info_exceptions(ns, hdr, alloc_len);
2306 break;
2307 case LOG_PAGE_TEMPERATURE_PAGE:
2308 res = nvme_trans_log_temperature(ns, hdr, alloc_len);
2309 break;
2310 default:
2311 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2312 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2313 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2314 break;
2315 }
2316
2317 out:
2318 return res;
2319}
2320
2321static int nvme_trans_mode_select(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2322 u8 *cmd)
2323{
2324 int res = SNTI_TRANSLATION_SUCCESS;
2325 u8 cdb10 = 0;
2326 u16 parm_list_len;
2327 u8 page_format;
2328 u8 save_pages;
2329
2330 page_format = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_PAGE_FORMAT_OFFSET);
2331 page_format &= MODE_SELECT_CDB_PAGE_FORMAT_MASK;
2332
2333 save_pages = GET_U8_FROM_CDB(cmd, MODE_SELECT_CDB_SAVE_PAGES_OFFSET);
2334 save_pages &= MODE_SELECT_CDB_SAVE_PAGES_MASK;
2335
2336 if (GET_OPCODE(cmd) == MODE_SELECT) {
2337 parm_list_len = GET_U8_FROM_CDB(cmd,
2338 MODE_SELECT_6_CDB_PARAM_LIST_LENGTH_OFFSET);
2339 } else {
2340 parm_list_len = GET_U16_FROM_CDB(cmd,
2341 MODE_SELECT_10_CDB_PARAM_LIST_LENGTH_OFFSET);
2342 cdb10 = 1;
2343 }
2344
2345 if (parm_list_len != 0) {
2346 /*
2347 * According to SPC-4 r24, a paramter list length field of 0
2348 * shall not be considered an error
2349 */
2350 res = nvme_trans_modesel_data(ns, hdr, cmd, parm_list_len,
2351 page_format, save_pages, cdb10);
2352 }
2353
2354 return res;
2355}
2356
2357static int nvme_trans_mode_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2358 u8 *cmd)
2359{
2360 int res = SNTI_TRANSLATION_SUCCESS;
2361 u16 alloc_len;
2362 u8 cdb10 = 0;
2363 u8 page_code;
2364 u8 pc;
2365
2366 if (GET_OPCODE(cmd) == MODE_SENSE) {
2367 alloc_len = GET_U8_FROM_CDB(cmd, MODE_SENSE6_ALLOC_LEN_OFFSET);
2368 } else {
2369 alloc_len = GET_U16_FROM_CDB(cmd,
2370 MODE_SENSE10_ALLOC_LEN_OFFSET);
2371 cdb10 = 1;
2372 }
2373
2374 pc = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CONTROL_OFFSET) &
2375 MODE_SENSE_PAGE_CONTROL_MASK;
2376 if (pc != MODE_SENSE_PC_CURRENT_VALUES) {
2377 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2378 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2379 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2380 goto out;
2381 }
2382
2383 page_code = GET_U8_FROM_CDB(cmd, MODE_SENSE_PAGE_CODE_OFFSET) &
2384 MODE_SENSE_PAGE_CODE_MASK;
2385 switch (page_code) {
2386 case MODE_PAGE_CACHING:
2387 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2388 cdb10,
2389 &nvme_trans_fill_caching_page,
2390 MODE_PAGE_CACHING_LEN);
2391 break;
2392 case MODE_PAGE_CONTROL:
2393 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2394 cdb10,
2395 &nvme_trans_fill_control_page,
2396 MODE_PAGE_CONTROL_LEN);
2397 break;
2398 case MODE_PAGE_POWER_CONDITION:
2399 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2400 cdb10,
2401 &nvme_trans_fill_pow_cnd_page,
2402 MODE_PAGE_POW_CND_LEN);
2403 break;
2404 case MODE_PAGE_INFO_EXCEP:
2405 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2406 cdb10,
2407 &nvme_trans_fill_inf_exc_page,
2408 MODE_PAGE_INF_EXC_LEN);
2409 break;
2410 case MODE_PAGE_RETURN_ALL:
2411 res = nvme_trans_mode_page_create(ns, hdr, cmd, alloc_len,
2412 cdb10,
2413 &nvme_trans_fill_all_pages,
2414 MODE_PAGE_ALL_LEN);
2415 break;
2416 default:
2417 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2418 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2419 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2420 break;
2421 }
2422
2423 out:
2424 return res;
2425}
2426
2427static int nvme_trans_read_capacity(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2428 u8 *cmd)
2429{
2430 int res = SNTI_TRANSLATION_SUCCESS;
2431 int nvme_sc;
2432 u32 alloc_len = READ_CAP_10_RESP_SIZE;
2433 u32 resp_size = READ_CAP_10_RESP_SIZE;
2434 u32 xfer_len;
2435 u8 cdb16;
2436 struct nvme_dev *dev = ns->dev;
2437 dma_addr_t dma_addr;
2438 void *mem;
2439 struct nvme_id_ns *id_ns;
2440 u8 *response;
2441
2442 cdb16 = IS_READ_CAP_16(cmd);
2443 if (cdb16) {
2444 alloc_len = GET_READ_CAP_16_ALLOC_LENGTH(cmd);
2445 resp_size = READ_CAP_16_RESP_SIZE;
2446 }
2447
2448 mem = dma_alloc_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns),
2449 &dma_addr, GFP_KERNEL);
2450 if (mem == NULL) {
2451 res = -ENOMEM;
2452 goto out;
2453 }
2454 /* nvme ns identify */
2455 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
2456 res = nvme_trans_status_code(hdr, nvme_sc);
2457 if (res)
2458 goto out_dma;
2459 if (nvme_sc) {
2460 res = nvme_sc;
2461 goto out_dma;
2462 }
2463 id_ns = mem;
2464
03ea83e9 2465 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV
2466 if (response == NULL) {
2467 res = -ENOMEM;
2468 goto out_dma;
2469 }
5d0f6131
VV
2470 nvme_trans_fill_read_cap(response, id_ns, cdb16);
2471
2472 xfer_len = min(alloc_len, resp_size);
2473 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2474
2475 kfree(response);
2476 out_dma:
2477 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ns), mem,
2478 dma_addr);
2479 out:
2480 return res;
2481}
2482
2483static int nvme_trans_report_luns(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2484 u8 *cmd)
2485{
2486 int res = SNTI_TRANSLATION_SUCCESS;
2487 int nvme_sc;
2488 u32 alloc_len, xfer_len, resp_size;
2489 u8 select_report;
2490 u8 *response;
2491 struct nvme_dev *dev = ns->dev;
2492 dma_addr_t dma_addr;
2493 void *mem;
2494 struct nvme_id_ctrl *id_ctrl;
2495 u32 ll_length, lun_id;
2496 u8 lun_id_offset = REPORT_LUNS_FIRST_LUN_OFFSET;
8741ee4c 2497 __be32 tmp_len;
5d0f6131
VV
2498
2499 alloc_len = GET_REPORT_LUNS_ALLOC_LENGTH(cmd);
2500 select_report = GET_U8_FROM_CDB(cmd, REPORT_LUNS_SR_OFFSET);
2501
2502 if ((select_report != ALL_LUNS_RETURNED) &&
2503 (select_report != ALL_WELL_KNOWN_LUNS_RETURNED) &&
2504 (select_report != RESTRICTED_LUNS_RETURNED)) {
2505 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2506 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2507 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2508 goto out;
2509 } else {
2510 /* NVMe Controller Identify */
2511 mem = dma_alloc_coherent(&dev->pci_dev->dev,
2512 sizeof(struct nvme_id_ctrl),
2513 &dma_addr, GFP_KERNEL);
2514 if (mem == NULL) {
2515 res = -ENOMEM;
2516 goto out;
2517 }
2518 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
2519 res = nvme_trans_status_code(hdr, nvme_sc);
2520 if (res)
2521 goto out_dma;
2522 if (nvme_sc) {
2523 res = nvme_sc;
2524 goto out_dma;
2525 }
2526 id_ctrl = mem;
8741ee4c 2527 ll_length = le32_to_cpu(id_ctrl->nn) * LUN_ENTRY_SIZE;
5d0f6131
VV
2528 resp_size = ll_length + LUN_DATA_HEADER_SIZE;
2529
2530 if (alloc_len < resp_size) {
2531 res = nvme_trans_completion(hdr,
2532 SAM_STAT_CHECK_CONDITION,
2533 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2534 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2535 goto out_dma;
2536 }
2537
03ea83e9 2538 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV
2539 if (response == NULL) {
2540 res = -ENOMEM;
2541 goto out_dma;
2542 }
5d0f6131
VV
2543
2544 /* The first LUN ID will always be 0 per the SAM spec */
8741ee4c 2545 for (lun_id = 0; lun_id < le32_to_cpu(id_ctrl->nn); lun_id++) {
5d0f6131
VV
2546 /*
2547 * Set the LUN Id and then increment to the next LUN
2548 * location in the parameter data.
2549 */
8741ee4c 2550 __be64 tmp_id = cpu_to_be64(lun_id);
5d0f6131
VV
2551 memcpy(&response[lun_id_offset], &tmp_id, sizeof(u64));
2552 lun_id_offset += LUN_ENTRY_SIZE;
2553 }
2554 tmp_len = cpu_to_be32(ll_length);
2555 memcpy(response, &tmp_len, sizeof(u32));
2556 }
2557
2558 xfer_len = min(alloc_len, resp_size);
2559 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2560
2561 kfree(response);
2562 out_dma:
2563 dma_free_coherent(&dev->pci_dev->dev, sizeof(struct nvme_id_ctrl), mem,
2564 dma_addr);
2565 out:
2566 return res;
2567}
2568
2569static int nvme_trans_request_sense(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2570 u8 *cmd)
2571{
2572 int res = SNTI_TRANSLATION_SUCCESS;
2573 u8 alloc_len, xfer_len, resp_size;
2574 u8 desc_format;
2575 u8 *response;
2576
2577 alloc_len = GET_REQUEST_SENSE_ALLOC_LENGTH(cmd);
2578 desc_format = GET_U8_FROM_CDB(cmd, REQUEST_SENSE_DESC_OFFSET);
2579 desc_format &= REQUEST_SENSE_DESC_MASK;
2580
2581 resp_size = ((desc_format) ? (DESC_FMT_SENSE_DATA_SIZE) :
2582 (FIXED_FMT_SENSE_DATA_SIZE));
03ea83e9 2583 response = kzalloc(resp_size, GFP_KERNEL);
5d0f6131
VV
2584 if (response == NULL) {
2585 res = -ENOMEM;
2586 goto out;
2587 }
5d0f6131
VV
2588
2589 if (desc_format == DESCRIPTOR_FORMAT_SENSE_DATA_TYPE) {
2590 /* Descriptor Format Sense Data */
2591 response[0] = DESC_FORMAT_SENSE_DATA;
2592 response[1] = NO_SENSE;
2593 /* TODO How is LOW POWER CONDITION ON handled? (byte 2) */
2594 response[2] = SCSI_ASC_NO_SENSE;
2595 response[3] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2596 /* SDAT_OVFL = 0 | Additional Sense Length = 0 */
2597 } else {
2598 /* Fixed Format Sense Data */
2599 response[0] = FIXED_SENSE_DATA;
2600 /* Byte 1 = Obsolete */
2601 response[2] = NO_SENSE; /* FM, EOM, ILI, SDAT_OVFL = 0 */
2602 /* Bytes 3-6 - Information - set to zero */
2603 response[7] = FIXED_SENSE_DATA_ADD_LENGTH;
2604 /* Bytes 8-11 - Cmd Specific Information - set to zero */
2605 response[12] = SCSI_ASC_NO_SENSE;
2606 response[13] = SCSI_ASCQ_CAUSE_NOT_REPORTABLE;
2607 /* Byte 14 = Field Replaceable Unit Code = 0 */
2608 /* Bytes 15-17 - SKSV=0; Sense Key Specific = 0 */
2609 }
2610
2611 xfer_len = min(alloc_len, resp_size);
2612 res = nvme_trans_copy_to_user(hdr, response, xfer_len);
2613
2614 kfree(response);
2615 out:
2616 return res;
2617}
2618
2619static int nvme_trans_security_protocol(struct nvme_ns *ns,
2620 struct sg_io_hdr *hdr,
2621 u8 *cmd)
2622{
2623 return nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2624 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2625 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2626}
2627
2628static int nvme_trans_start_stop(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2629 u8 *cmd)
2630{
2631 int res = SNTI_TRANSLATION_SUCCESS;
2632 int nvme_sc;
14385de1 2633 struct nvme_command c;
5d0f6131
VV
2634 u8 immed, pcmod, pc, no_flush, start;
2635
2636 immed = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_IMMED_OFFSET);
2637 pcmod = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_MOD_OFFSET);
2638 pc = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_POWER_COND_OFFSET);
2639 no_flush = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_NO_FLUSH_OFFSET);
2640 start = GET_U8_FROM_CDB(cmd, START_STOP_UNIT_CDB_START_OFFSET);
2641
2642 immed &= START_STOP_UNIT_CDB_IMMED_MASK;
2643 pcmod &= START_STOP_UNIT_CDB_POWER_COND_MOD_MASK;
2644 pc = (pc & START_STOP_UNIT_CDB_POWER_COND_MASK) >> NIBBLE_SHIFT;
2645 no_flush &= START_STOP_UNIT_CDB_NO_FLUSH_MASK;
2646 start &= START_STOP_UNIT_CDB_START_MASK;
2647
2648 if (immed != 0) {
2649 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2650 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2651 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2652 } else {
2653 if (no_flush == 0) {
2654 /* Issue NVME FLUSH command prior to START STOP UNIT */
14385de1
KB
2655 memset(&c, 0, sizeof(c));
2656 c.common.opcode = nvme_cmd_flush;
2657 c.common.nsid = cpu_to_le32(ns->ns_id);
2658
4f5099af 2659 nvme_sc = nvme_submit_io_cmd(ns->dev, &c, NULL);
5d0f6131
VV
2660 res = nvme_trans_status_code(hdr, nvme_sc);
2661 if (res)
2662 goto out;
2663 if (nvme_sc) {
2664 res = nvme_sc;
2665 goto out;
2666 }
2667 }
2668 /* Setup the expected power state transition */
2669 res = nvme_trans_power_state(ns, hdr, pc, pcmod, start);
2670 }
2671
2672 out:
2673 return res;
2674}
2675
2676static int nvme_trans_synchronize_cache(struct nvme_ns *ns,
2677 struct sg_io_hdr *hdr, u8 *cmd)
2678{
2679 int res = SNTI_TRANSLATION_SUCCESS;
2680 int nvme_sc;
14385de1 2681 struct nvme_command c;
14385de1
KB
2682
2683 memset(&c, 0, sizeof(c));
2684 c.common.opcode = nvme_cmd_flush;
2685 c.common.nsid = cpu_to_le32(ns->ns_id);
2686
4f5099af 2687 nvme_sc = nvme_submit_io_cmd(ns->dev, &c, NULL);
14385de1 2688
5d0f6131
VV
2689 res = nvme_trans_status_code(hdr, nvme_sc);
2690 if (res)
2691 goto out;
2692 if (nvme_sc)
2693 res = nvme_sc;
2694
2695 out:
2696 return res;
2697}
2698
2699static int nvme_trans_format_unit(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2700 u8 *cmd)
2701{
2702 int res = SNTI_TRANSLATION_SUCCESS;
2703 u8 parm_hdr_len = 0;
2704 u8 nvme_pf_code = 0;
2705 u8 format_prot_info, long_list, format_data;
2706
2707 format_prot_info = GET_U8_FROM_CDB(cmd,
2708 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_OFFSET);
2709 long_list = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_LONG_LIST_OFFSET);
2710 format_data = GET_U8_FROM_CDB(cmd, FORMAT_UNIT_CDB_FORMAT_DATA_OFFSET);
2711
2712 format_prot_info = (format_prot_info &
2713 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_MASK) >>
2714 FORMAT_UNIT_CDB_FORMAT_PROT_INFO_SHIFT;
2715 long_list &= FORMAT_UNIT_CDB_LONG_LIST_MASK;
2716 format_data &= FORMAT_UNIT_CDB_FORMAT_DATA_MASK;
2717
2718 if (format_data != 0) {
2719 if (format_prot_info != 0) {
2720 if (long_list == 0)
2721 parm_hdr_len = FORMAT_UNIT_SHORT_PARM_LIST_LEN;
2722 else
2723 parm_hdr_len = FORMAT_UNIT_LONG_PARM_LIST_LEN;
2724 }
2725 } else if (format_data == 0 && format_prot_info != 0) {
2726 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2727 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2728 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2729 goto out;
2730 }
2731
2732 /* Get parm header from data-in/out buffer */
2733 /*
2734 * According to the translation spec, the only fields in the parameter
2735 * list we are concerned with are in the header. So allocate only that.
2736 */
2737 if (parm_hdr_len > 0) {
2738 res = nvme_trans_fmt_get_parm_header(hdr, parm_hdr_len,
2739 format_prot_info, &nvme_pf_code);
2740 if (res != SNTI_TRANSLATION_SUCCESS)
2741 goto out;
2742 }
2743
2744 /* Attempt to activate any previously downloaded firmware image */
2745 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw, 0, 0, 0);
2746
2747 /* Determine Block size and count and send format command */
2748 res = nvme_trans_fmt_set_blk_size_count(ns, hdr);
2749 if (res != SNTI_TRANSLATION_SUCCESS)
2750 goto out;
2751
2752 res = nvme_trans_fmt_send_cmd(ns, hdr, nvme_pf_code);
2753
2754 out:
2755 return res;
2756}
2757
2758static int nvme_trans_test_unit_ready(struct nvme_ns *ns,
2759 struct sg_io_hdr *hdr,
2760 u8 *cmd)
2761{
2762 int res = SNTI_TRANSLATION_SUCCESS;
2763 struct nvme_dev *dev = ns->dev;
2764
2765 if (!(readl(&dev->bar->csts) & NVME_CSTS_RDY))
2766 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2767 NOT_READY, SCSI_ASC_LUN_NOT_READY,
2768 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2769 else
2770 res = nvme_trans_completion(hdr, SAM_STAT_GOOD, NO_SENSE, 0, 0);
2771
2772 return res;
2773}
2774
2775static int nvme_trans_write_buffer(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2776 u8 *cmd)
2777{
2778 int res = SNTI_TRANSLATION_SUCCESS;
2779 u32 buffer_offset, parm_list_length;
2780 u8 buffer_id, mode;
2781
2782 parm_list_length =
2783 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_PARM_LIST_LENGTH_OFFSET);
2784 if (parm_list_length % BYTES_TO_DWORDS != 0) {
2785 /* NVMe expects Firmware file to be a whole number of DWORDS */
2786 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2787 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2788 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2789 goto out;
2790 }
2791 buffer_id = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_ID_OFFSET);
2792 if (buffer_id > NVME_MAX_FIRMWARE_SLOT) {
2793 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2794 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2795 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2796 goto out;
2797 }
2798 mode = GET_U8_FROM_CDB(cmd, WRITE_BUFFER_CDB_MODE_OFFSET) &
2799 WRITE_BUFFER_CDB_MODE_MASK;
2800 buffer_offset =
2801 GET_U24_FROM_CDB(cmd, WRITE_BUFFER_CDB_BUFFER_OFFSET_OFFSET);
2802
2803 switch (mode) {
2804 case DOWNLOAD_SAVE_ACTIVATE:
2805 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2806 parm_list_length, buffer_offset,
2807 buffer_id);
2808 if (res != SNTI_TRANSLATION_SUCCESS)
2809 goto out;
2810 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2811 parm_list_length, buffer_offset,
2812 buffer_id);
2813 break;
2814 case DOWNLOAD_SAVE_DEFER_ACTIVATE:
2815 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_download_fw,
2816 parm_list_length, buffer_offset,
2817 buffer_id);
2818 break;
2819 case ACTIVATE_DEFERRED_MICROCODE:
2820 res = nvme_trans_send_fw_cmd(ns, hdr, nvme_admin_activate_fw,
2821 parm_list_length, buffer_offset,
2822 buffer_id);
2823 break;
2824 default:
2825 res = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2826 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
2827 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2828 break;
2829 }
2830
2831 out:
2832 return res;
2833}
2834
ec503733
KB
2835struct scsi_unmap_blk_desc {
2836 __be64 slba;
2837 __be32 nlb;
2838 u32 resv;
2839};
2840
2841struct scsi_unmap_parm_list {
2842 __be16 unmap_data_len;
2843 __be16 unmap_blk_desc_data_len;
2844 u32 resv;
2845 struct scsi_unmap_blk_desc desc[0];
2846};
2847
2848static int nvme_trans_unmap(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2849 u8 *cmd)
2850{
2851 struct nvme_dev *dev = ns->dev;
2852 struct scsi_unmap_parm_list *plist;
2853 struct nvme_dsm_range *range;
ec503733
KB
2854 struct nvme_command c;
2855 int i, nvme_sc, res = -ENOMEM;
2856 u16 ndesc, list_len;
2857 dma_addr_t dma_addr;
2858
2859 list_len = GET_U16_FROM_CDB(cmd, UNMAP_CDB_PARAM_LIST_LENGTH_OFFSET);
2860 if (!list_len)
2861 return -EINVAL;
2862
2863 plist = kmalloc(list_len, GFP_KERNEL);
2864 if (!plist)
2865 return -ENOMEM;
2866
2867 res = nvme_trans_copy_from_user(hdr, plist, list_len);
2868 if (res != SNTI_TRANSLATION_SUCCESS)
2869 goto out;
2870
2871 ndesc = be16_to_cpu(plist->unmap_blk_desc_data_len) >> 4;
2872 if (!ndesc || ndesc > 256) {
2873 res = -EINVAL;
2874 goto out;
2875 }
2876
2877 range = dma_alloc_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2878 &dma_addr, GFP_KERNEL);
2879 if (!range)
2880 goto out;
2881
2882 for (i = 0; i < ndesc; i++) {
2883 range[i].nlb = cpu_to_le32(be32_to_cpu(plist->desc[i].nlb));
2884 range[i].slba = cpu_to_le64(be64_to_cpu(plist->desc[i].slba));
2885 range[i].cattr = 0;
2886 }
2887
2888 memset(&c, 0, sizeof(c));
2889 c.dsm.opcode = nvme_cmd_dsm;
2890 c.dsm.nsid = cpu_to_le32(ns->ns_id);
2891 c.dsm.prp1 = cpu_to_le64(dma_addr);
2892 c.dsm.nr = cpu_to_le32(ndesc - 1);
2893 c.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
2894
4f5099af 2895 nvme_sc = nvme_submit_io_cmd(dev, &c, NULL);
ec503733
KB
2896 res = nvme_trans_status_code(hdr, nvme_sc);
2897
2898 dma_free_coherent(&dev->pci_dev->dev, ndesc * sizeof(*range),
2899 range, dma_addr);
2900 out:
2901 kfree(plist);
2902 return res;
2903}
2904
5d0f6131
VV
2905static int nvme_scsi_translate(struct nvme_ns *ns, struct sg_io_hdr *hdr)
2906{
2907 u8 cmd[BLK_MAX_CDB];
2908 int retcode;
2909 unsigned int opcode;
2910
2911 if (hdr->cmdp == NULL)
2912 return -EMSGSIZE;
2913 if (copy_from_user(cmd, hdr->cmdp, hdr->cmd_len))
2914 return -EFAULT;
2915
2916 opcode = cmd[0];
2917
2918 switch (opcode) {
2919 case READ_6:
2920 case READ_10:
2921 case READ_12:
2922 case READ_16:
2923 retcode = nvme_trans_io(ns, hdr, 0, cmd);
2924 break;
2925 case WRITE_6:
2926 case WRITE_10:
2927 case WRITE_12:
2928 case WRITE_16:
2929 retcode = nvme_trans_io(ns, hdr, 1, cmd);
2930 break;
2931 case INQUIRY:
2932 retcode = nvme_trans_inquiry(ns, hdr, cmd);
2933 break;
2934 case LOG_SENSE:
2935 retcode = nvme_trans_log_sense(ns, hdr, cmd);
2936 break;
2937 case MODE_SELECT:
2938 case MODE_SELECT_10:
2939 retcode = nvme_trans_mode_select(ns, hdr, cmd);
2940 break;
2941 case MODE_SENSE:
2942 case MODE_SENSE_10:
2943 retcode = nvme_trans_mode_sense(ns, hdr, cmd);
2944 break;
2945 case READ_CAPACITY:
2946 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2947 break;
2948 case SERVICE_ACTION_IN:
2949 if (IS_READ_CAP_16(cmd))
2950 retcode = nvme_trans_read_capacity(ns, hdr, cmd);
2951 else
2952 goto out;
2953 break;
2954 case REPORT_LUNS:
2955 retcode = nvme_trans_report_luns(ns, hdr, cmd);
2956 break;
2957 case REQUEST_SENSE:
2958 retcode = nvme_trans_request_sense(ns, hdr, cmd);
2959 break;
2960 case SECURITY_PROTOCOL_IN:
2961 case SECURITY_PROTOCOL_OUT:
2962 retcode = nvme_trans_security_protocol(ns, hdr, cmd);
2963 break;
2964 case START_STOP:
2965 retcode = nvme_trans_start_stop(ns, hdr, cmd);
2966 break;
2967 case SYNCHRONIZE_CACHE:
2968 retcode = nvme_trans_synchronize_cache(ns, hdr, cmd);
2969 break;
2970 case FORMAT_UNIT:
2971 retcode = nvme_trans_format_unit(ns, hdr, cmd);
2972 break;
2973 case TEST_UNIT_READY:
2974 retcode = nvme_trans_test_unit_ready(ns, hdr, cmd);
2975 break;
2976 case WRITE_BUFFER:
2977 retcode = nvme_trans_write_buffer(ns, hdr, cmd);
2978 break;
ec503733
KB
2979 case UNMAP:
2980 retcode = nvme_trans_unmap(ns, hdr, cmd);
2981 break;
5d0f6131
VV
2982 default:
2983 out:
2984 retcode = nvme_trans_completion(hdr, SAM_STAT_CHECK_CONDITION,
2985 ILLEGAL_REQUEST, SCSI_ASC_ILLEGAL_COMMAND,
2986 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
2987 break;
2988 }
2989 return retcode;
2990}
2991
2992int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr)
2993{
2994 struct sg_io_hdr hdr;
2995 int retcode;
2996
2997 if (!capable(CAP_SYS_ADMIN))
2998 return -EACCES;
2999 if (copy_from_user(&hdr, u_hdr, sizeof(hdr)))
3000 return -EFAULT;
3001 if (hdr.interface_id != 'S')
3002 return -EINVAL;
3003 if (hdr.cmd_len > BLK_MAX_CDB)
3004 return -EINVAL;
3005
3006 retcode = nvme_scsi_translate(ns, &hdr);
3007 if (retcode < 0)
3008 return retcode;
3009 if (retcode > 0)
3010 retcode = SNTI_TRANSLATION_SUCCESS;
8741ee4c 3011 if (copy_to_user(u_hdr, &hdr, sizeof(sg_io_hdr_t)) > 0)
5d0f6131
VV
3012 return -EFAULT;
3013
3014 return retcode;
3015}
3016
320a3827
KB
3017#ifdef CONFIG_COMPAT
3018typedef struct sg_io_hdr32 {
3019 compat_int_t interface_id; /* [i] 'S' for SCSI generic (required) */
3020 compat_int_t dxfer_direction; /* [i] data transfer direction */
3021 unsigned char cmd_len; /* [i] SCSI command length ( <= 16 bytes) */
3022 unsigned char mx_sb_len; /* [i] max length to write to sbp */
3023 unsigned short iovec_count; /* [i] 0 implies no scatter gather */
3024 compat_uint_t dxfer_len; /* [i] byte count of data transfer */
3025 compat_uint_t dxferp; /* [i], [*io] points to data transfer memory
3026 or scatter gather list */
3027 compat_uptr_t cmdp; /* [i], [*i] points to command to perform */
3028 compat_uptr_t sbp; /* [i], [*o] points to sense_buffer memory */
3029 compat_uint_t timeout; /* [i] MAX_UINT->no timeout (unit: millisec) */
3030 compat_uint_t flags; /* [i] 0 -> default, see SG_FLAG... */
3031 compat_int_t pack_id; /* [i->o] unused internally (normally) */
3032 compat_uptr_t usr_ptr; /* [i->o] unused internally */
3033 unsigned char status; /* [o] scsi status */
3034 unsigned char masked_status; /* [o] shifted, masked scsi status */
3035 unsigned char msg_status; /* [o] messaging level data (optional) */
3036 unsigned char sb_len_wr; /* [o] byte count actually written to sbp */
3037 unsigned short host_status; /* [o] errors from host adapter */
3038 unsigned short driver_status; /* [o] errors from software driver */
3039 compat_int_t resid; /* [o] dxfer_len - actual_transferred */
3040 compat_uint_t duration; /* [o] time taken by cmd (unit: millisec) */
3041 compat_uint_t info; /* [o] auxiliary information */
3042} sg_io_hdr32_t; /* 64 bytes long (on sparc32) */
3043
3044typedef struct sg_iovec32 {
3045 compat_uint_t iov_base;
3046 compat_uint_t iov_len;
3047} sg_iovec32_t;
3048
3049static int sg_build_iovec(sg_io_hdr_t __user *sgio, void __user *dxferp, u16 iovec_count)
3050{
3051 sg_iovec_t __user *iov = (sg_iovec_t __user *) (sgio + 1);
3052 sg_iovec32_t __user *iov32 = dxferp;
3053 int i;
3054
3055 for (i = 0; i < iovec_count; i++) {
3056 u32 base, len;
3057
3058 if (get_user(base, &iov32[i].iov_base) ||
3059 get_user(len, &iov32[i].iov_len) ||
3060 put_user(compat_ptr(base), &iov[i].iov_base) ||
3061 put_user(len, &iov[i].iov_len))
3062 return -EFAULT;
3063 }
3064
3065 if (put_user(iov, &sgio->dxferp))
3066 return -EFAULT;
3067 return 0;
3068}
3069
3070int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg)
3071{
3072 sg_io_hdr32_t __user *sgio32 = (sg_io_hdr32_t __user *)arg;
3073 sg_io_hdr_t __user *sgio;
3074 u16 iovec_count;
3075 u32 data;
3076 void __user *dxferp;
3077 int err;
3078 int interface_id;
3079
3080 if (get_user(interface_id, &sgio32->interface_id))
3081 return -EFAULT;
3082 if (interface_id != 'S')
3083 return -EINVAL;
3084
3085 if (get_user(iovec_count, &sgio32->iovec_count))
3086 return -EFAULT;
3087
3088 {
3089 void __user *top = compat_alloc_user_space(0);
3090 void __user *new = compat_alloc_user_space(sizeof(sg_io_hdr_t) +
3091 (iovec_count * sizeof(sg_iovec_t)));
3092 if (new > top)
3093 return -EINVAL;
3094
3095 sgio = new;
3096 }
3097
3098 /* Ok, now construct. */
3099 if (copy_in_user(&sgio->interface_id, &sgio32->interface_id,
3100 (2 * sizeof(int)) +
3101 (2 * sizeof(unsigned char)) +
3102 (1 * sizeof(unsigned short)) +
3103 (1 * sizeof(unsigned int))))
3104 return -EFAULT;
3105
3106 if (get_user(data, &sgio32->dxferp))
3107 return -EFAULT;
3108 dxferp = compat_ptr(data);
3109 if (iovec_count) {
3110 if (sg_build_iovec(sgio, dxferp, iovec_count))
3111 return -EFAULT;
3112 } else {
3113 if (put_user(dxferp, &sgio->dxferp))
3114 return -EFAULT;
3115 }
3116
3117 {
3118 unsigned char __user *cmdp;
3119 unsigned char __user *sbp;
3120
3121 if (get_user(data, &sgio32->cmdp))
3122 return -EFAULT;
3123 cmdp = compat_ptr(data);
3124
3125 if (get_user(data, &sgio32->sbp))
3126 return -EFAULT;
3127 sbp = compat_ptr(data);
3128
3129 if (put_user(cmdp, &sgio->cmdp) ||
3130 put_user(sbp, &sgio->sbp))
3131 return -EFAULT;
3132 }
3133
3134 if (copy_in_user(&sgio->timeout, &sgio32->timeout,
3135 3 * sizeof(int)))
3136 return -EFAULT;
3137
3138 if (get_user(data, &sgio32->usr_ptr))
3139 return -EFAULT;
3140 if (put_user(compat_ptr(data), &sgio->usr_ptr))
3141 return -EFAULT;
3142
3143 err = nvme_sg_io(ns, sgio);
3144 if (err >= 0) {
3145 void __user *datap;
3146
3147 if (copy_in_user(&sgio32->pack_id, &sgio->pack_id,
3148 sizeof(int)) ||
3149 get_user(datap, &sgio->usr_ptr) ||
3150 put_user((u32)(unsigned long)datap,
3151 &sgio32->usr_ptr) ||
3152 copy_in_user(&sgio32->status, &sgio->status,
3153 (4 * sizeof(unsigned char)) +
3154 (2 * sizeof(unsigned short)) +
3155 (3 * sizeof(int))))
3156 err = -EFAULT;
3157 }
3158
3159 return err;
3160}
3161#endif
3162
5d0f6131
VV
3163int nvme_sg_get_version_num(int __user *ip)
3164{
3165 return put_user(sg_version_num, ip);
3166}