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ARM: SAMSUNG: Move s3c64xx dev-ts.c to plat-samsung and rename configuration
[linux-2.6-block.git] / drivers / block / DAC960.c
CommitLineData
1da177e4
LT		 1/*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
5b76ffd5 6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
1da177e4
LT		 7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17*/
18
19
868047fc
MW		 20#define DAC960_DriverVersion "2.5.49"
21#define DAC960_DriverDate "21 Aug 2007"
1da177e4
LT		 22
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/bio.h>
29#include <linux/completion.h>
30#include <linux/delay.h>
31#include <linux/genhd.h>
32#include <linux/hdreg.h>
33#include <linux/blkpg.h>
3558c9b3 34#include <linux/dma-mapping.h>
1da177e4
LT		 35#include <linux/interrupt.h>
36#include <linux/ioport.h>
37#include <linux/mm.h>
38#include <linux/slab.h>
405f5571 39#include <linux/smp_lock.h>
1da177e4 40#include <linux/proc_fs.h>
d5d03eec 41#include <linux/seq_file.h>
1da177e4
LT		 42#include <linux/reboot.h>
43#include <linux/spinlock.h>
44#include <linux/timer.h>
45#include <linux/pci.h>
46#include <linux/init.h>
50297cbf 47#include <linux/jiffies.h>
62287fbb 48#include <linux/random.h>
11763609 49#include <linux/scatterlist.h>
1da177e4
LT		 50#include <asm/io.h>
51#include <asm/uaccess.h>
52#include "DAC960.h"
53
54#define DAC960_GAM_MINOR 252
55
56
57static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
58static int DAC960_ControllerCount;
59static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
60
61static long disk_size(DAC960_Controller_T *p, int drive_nr)
62{
63 if (p->FirmwareType == DAC960_V1_Controller) {
64 if (drive_nr >= p->LogicalDriveCount)
65 return 0;
66 return p->V1.LogicalDriveInformation[drive_nr].
67 LogicalDriveSize;
68 } else {
69 DAC960_V2_LogicalDeviceInfo_T *i =
70 p->V2.LogicalDeviceInformation[drive_nr];
71 if (i == NULL)
72 return 0;
73 return i->ConfigurableDeviceSize;
74 }
75}
76
b564f027 77static int DAC960_open(struct block_device *bdev, fmode_t mode)
1da177e4 78{
b564f027 79 struct gendisk *disk = bdev->bd_disk;
1da177e4
LT		 80 DAC960_Controller_T *p = disk->queue->queuedata;
81 int drive_nr = (long)disk->private_data;
82
83 if (p->FirmwareType == DAC960_V1_Controller) {
84 if (p->V1.LogicalDriveInformation[drive_nr].
85 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
86 return -ENXIO;
87 } else {
88 DAC960_V2_LogicalDeviceInfo_T *i =
89 p->V2.LogicalDeviceInformation[drive_nr];
90 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
91 return -ENXIO;
92 }
93
b564f027 94 check_disk_change(bdev);
1da177e4
LT		 95
96 if (!get_capacity(p->disks[drive_nr]))
97 return -ENXIO;
98 return 0;
99}
100
a885c8c4 101static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1da177e4 102{
a885c8c4 103 struct gendisk *disk = bdev->bd_disk;
1da177e4
LT		 104 DAC960_Controller_T *p = disk->queue->queuedata;
105 int drive_nr = (long)disk->private_data;
1da177e4
LT		 106
107 if (p->FirmwareType == DAC960_V1_Controller) {
a885c8c4
CH		 108 geo->heads = p->V1.GeometryTranslationHeads;
109 geo->sectors = p->V1.GeometryTranslationSectors;
110 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
111 LogicalDriveSize / (geo->heads * geo->sectors);
1da177e4
LT		 112 } else {
113 DAC960_V2_LogicalDeviceInfo_T *i =
114 p->V2.LogicalDeviceInformation[drive_nr];
115 switch (i->DriveGeometry) {
116 case DAC960_V2_Geometry_128_32:
a885c8c4
CH		 117 geo->heads = 128;
118 geo->sectors = 32;
1da177e4
LT		 119 break;
120 case DAC960_V2_Geometry_255_63:
a885c8c4
CH		 121 geo->heads = 255;
122 geo->sectors = 63;
1da177e4
LT		 123 break;
124 default:
125 DAC960_Error("Illegal Logical Device Geometry %d\n",
126 p, i->DriveGeometry);
127 return -EINVAL;
128 }
129
a885c8c4
CH		 130 geo->cylinders = i->ConfigurableDeviceSize /
131 (geo->heads * geo->sectors);
1da177e4
LT		 132 }
133
a885c8c4 134 return 0;
1da177e4
LT		 135}
136
137static int DAC960_media_changed(struct gendisk *disk)
138{
139 DAC960_Controller_T *p = disk->queue->queuedata;
140 int drive_nr = (long)disk->private_data;
141
142 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
143 return 1;
144 return 0;
145}
146
147static int DAC960_revalidate_disk(struct gendisk *disk)
148{
149 DAC960_Controller_T *p = disk->queue->queuedata;
150 int unit = (long)disk->private_data;
151
152 set_capacity(disk, disk_size(p, unit));
153 return 0;
154}
155
83d5cde4 156static const struct block_device_operations DAC960_BlockDeviceOperations = {
1da177e4 157 .owner = THIS_MODULE,
b564f027 158 .open = DAC960_open,
a885c8c4 159 .getgeo = DAC960_getgeo,
1da177e4
LT		 160 .media_changed = DAC960_media_changed,
161 .revalidate_disk = DAC960_revalidate_disk,
162};
163
164
165/*
166 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
167 Copyright Notice, and Electronic Mail Address.
168*/
169
170static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
171{
172 DAC960_Announce("***** DAC960 RAID Driver Version "
173 DAC960_DriverVersion " of "
174 DAC960_DriverDate " *****\n", Controller);
175 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
176 "<lnz@dandelion.com>\n", Controller);
177}
178
179
180/*
181 DAC960_Failure prints a standardized error message, and then returns false.
182*/
183
87d156bf 184static bool DAC960_Failure(DAC960_Controller_T *Controller,
1da177e4
LT		 185 unsigned char *ErrorMessage)
186{
187 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
188 Controller);
189 if (Controller->IO_Address == 0)
190 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
191 "PCI Address 0x%X\n", Controller,
192 Controller->Bus, Controller->Device,
193 Controller->Function, Controller->PCI_Address);
194 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
195 "0x%X PCI Address 0x%X\n", Controller,
196 Controller->Bus, Controller->Device,
197 Controller->Function, Controller->IO_Address,
198 Controller->PCI_Address);
199 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
200 return false;
201}
202
203/*
204 init_dma_loaf() and slice_dma_loaf() are helper functions for
205 aggregating the dma-mapped memory for a well-known collection of
206 data structures that are of different lengths.
207
208 These routines don't guarantee any alignment. The caller must
209 include any space needed for alignment in the sizes of the structures
210 that are passed in.
211 */
212
87d156bf 213static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
1da177e4
LT		 214 size_t len)
215{
216 void *cpu_addr;
217 dma_addr_t dma_handle;
218
219 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
220 if (cpu_addr == NULL)
221 return false;
222
223 loaf->cpu_free = loaf->cpu_base = cpu_addr;
224 loaf->dma_free =loaf->dma_base = dma_handle;
225 loaf->length = len;
226 memset(cpu_addr, 0, len);
227 return true;
228}
229
230static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
231 dma_addr_t *dma_handle)
232{
233 void *cpu_end = loaf->cpu_free + len;
234 void *cpu_addr = loaf->cpu_free;
235
089fe1b2 236 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
1da177e4
LT		 237 *dma_handle = loaf->dma_free;
238 loaf->cpu_free = cpu_end;
239 loaf->dma_free += len;
240 return cpu_addr;
241}
242
243static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
244{
245 if (loaf_handle->cpu_base != NULL)
246 pci_free_consistent(dev, loaf_handle->length,
247 loaf_handle->cpu_base, loaf_handle->dma_base);
248}
249
250
251/*
252 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
253 data structures for Controller. It returns true on success and false on
254 failure.
255*/
256
87d156bf 257static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
1da177e4
LT		 258{
259 int CommandAllocationLength, CommandAllocationGroupSize;
260 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
261 void *AllocationPointer = NULL;
262 void *ScatterGatherCPU = NULL;
263 dma_addr_t ScatterGatherDMA;
264 struct pci_pool *ScatterGatherPool;
265 void *RequestSenseCPU = NULL;
266 dma_addr_t RequestSenseDMA;
267 struct pci_pool *RequestSensePool = NULL;
268
269 if (Controller->FirmwareType == DAC960_V1_Controller)
270 {
271 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
272 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
273 ScatterGatherPool = pci_pool_create("DAC960_V1_ScatterGather",
274 Controller->PCIDevice,
275 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
276 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
277 if (ScatterGatherPool == NULL)
278 return DAC960_Failure(Controller,
279 "AUXILIARY STRUCTURE CREATION (SG)");
280 Controller->ScatterGatherPool = ScatterGatherPool;
281 }
282 else
283 {
284 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
285 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
286 ScatterGatherPool = pci_pool_create("DAC960_V2_ScatterGather",
287 Controller->PCIDevice,
288 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
289 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
290 if (ScatterGatherPool == NULL)
291 return DAC960_Failure(Controller,
292 "AUXILIARY STRUCTURE CREATION (SG)");
293 RequestSensePool = pci_pool_create("DAC960_V2_RequestSense",
294 Controller->PCIDevice, sizeof(DAC960_SCSI_RequestSense_T),
295 sizeof(int), 0);
296 if (RequestSensePool == NULL) {
297 pci_pool_destroy(ScatterGatherPool);
298 return DAC960_Failure(Controller,
299 "AUXILIARY STRUCTURE CREATION (SG)");
300 }
301 Controller->ScatterGatherPool = ScatterGatherPool;
302 Controller->V2.RequestSensePool = RequestSensePool;
303 }
304 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
305 Controller->FreeCommands = NULL;
306 for (CommandIdentifier = 1;
307 CommandIdentifier <= Controller->DriverQueueDepth;
308 CommandIdentifier++)
309 {
310 DAC960_Command_T *Command;
311 if (--CommandsRemaining <= 0)
312 {
313 CommandsRemaining =
314 Controller->DriverQueueDepth - CommandIdentifier + 1;
315 if (CommandsRemaining > CommandAllocationGroupSize)
316 CommandsRemaining = CommandAllocationGroupSize;
317 CommandGroupByteCount =
318 CommandsRemaining * CommandAllocationLength;
06ff37ff 319 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
1da177e4
LT		 320 if (AllocationPointer == NULL)
321 return DAC960_Failure(Controller,
322 "AUXILIARY STRUCTURE CREATION");
1da177e4
LT		 323 }
324 Command = (DAC960_Command_T *) AllocationPointer;
325 AllocationPointer += CommandAllocationLength;
326 Command->CommandIdentifier = CommandIdentifier;
327 Command->Controller = Controller;
328 Command->Next = Controller->FreeCommands;
329 Controller->FreeCommands = Command;
330 Controller->Commands[CommandIdentifier-1] = Command;
54e6ecb2 331 ScatterGatherCPU = pci_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
1da177e4
LT		 332 &ScatterGatherDMA);
333 if (ScatterGatherCPU == NULL)
334 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
335
336 if (RequestSensePool != NULL) {
54e6ecb2 337 RequestSenseCPU = pci_pool_alloc(RequestSensePool, GFP_ATOMIC,
1da177e4
LT		 338 &RequestSenseDMA);
339 if (RequestSenseCPU == NULL) {
340 pci_pool_free(ScatterGatherPool, ScatterGatherCPU,
341 ScatterGatherDMA);
342 return DAC960_Failure(Controller,
343 "AUXILIARY STRUCTURE CREATION");
344 }
345 }
346 if (Controller->FirmwareType == DAC960_V1_Controller) {
347 Command->cmd_sglist = Command->V1.ScatterList;
348 Command->V1.ScatterGatherList =
349 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
350 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
45711f1a 351 sg_init_table(Command->cmd_sglist, DAC960_V1_ScatterGatherLimit);
1da177e4
LT		 352 } else {
353 Command->cmd_sglist = Command->V2.ScatterList;
354 Command->V2.ScatterGatherList =
355 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
356 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
357 Command->V2.RequestSense =
358 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
359 Command->V2.RequestSenseDMA = RequestSenseDMA;
45711f1a 360 sg_init_table(Command->cmd_sglist, DAC960_V2_ScatterGatherLimit);
1da177e4
LT		 361 }
362 }
363 return true;
364}
365
366
367/*
368 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
369 structures for Controller.
370*/
371
372static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
373{
374 int i;
375 struct pci_pool *ScatterGatherPool = Controller->ScatterGatherPool;
376 struct pci_pool *RequestSensePool = NULL;
377 void *ScatterGatherCPU;
378 dma_addr_t ScatterGatherDMA;
379 void *RequestSenseCPU;
380 dma_addr_t RequestSenseDMA;
381 DAC960_Command_T *CommandGroup = NULL;
382
383
384 if (Controller->FirmwareType == DAC960_V2_Controller)
385 RequestSensePool = Controller->V2.RequestSensePool;
386
387 Controller->FreeCommands = NULL;
388 for (i = 0; i < Controller->DriverQueueDepth; i++)
389 {
390 DAC960_Command_T *Command = Controller->Commands[i];
391
392 if (Command == NULL)
393 continue;
394
395 if (Controller->FirmwareType == DAC960_V1_Controller) {
396 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
397 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
398 RequestSenseCPU = NULL;
399 RequestSenseDMA = (dma_addr_t)0;
400 } else {
401 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
402 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
403 RequestSenseCPU = (void *)Command->V2.RequestSense;
404 RequestSenseDMA = Command->V2.RequestSenseDMA;
405 }
406 if (ScatterGatherCPU != NULL)
407 pci_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
408 if (RequestSenseCPU != NULL)
409 pci_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
410
411 if ((Command->CommandIdentifier
412 % Controller->CommandAllocationGroupSize) == 1) {
413 /*
414 * We can't free the group of commands until all of the
415 * request sense and scatter gather dma structures are free.
416 * Remember the beginning of the group, but don't free it
417 * until we've reached the beginning of the next group.
418 */
6044ec88
JJ		 419 kfree(CommandGroup);
420 CommandGroup = Command;
1da177e4
LT		 421 }
422 Controller->Commands[i] = NULL;
423 }
6044ec88 424 kfree(CommandGroup);
1da177e4
LT		 425
426 if (Controller->CombinedStatusBuffer != NULL)
427 {
428 kfree(Controller->CombinedStatusBuffer);
429 Controller->CombinedStatusBuffer = NULL;
430 Controller->CurrentStatusBuffer = NULL;
431 }
432
433 if (ScatterGatherPool != NULL)
434 pci_pool_destroy(ScatterGatherPool);
6044ec88
JJ		 435 if (Controller->FirmwareType == DAC960_V1_Controller)
436 return;
1da177e4
LT		 437
438 if (RequestSensePool != NULL)
439 pci_pool_destroy(RequestSensePool);
440
6044ec88 441 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
1da177e4
LT		 442 kfree(Controller->V2.LogicalDeviceInformation[i]);
443 Controller->V2.LogicalDeviceInformation[i] = NULL;
6044ec88 444 }
1da177e4
LT		 445
446 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
447 {
6044ec88
JJ		 448 kfree(Controller->V2.PhysicalDeviceInformation[i]);
449 Controller->V2.PhysicalDeviceInformation[i] = NULL;
450 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
451 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
1da177e4
LT		 452 }
453}
454
455
456/*
457 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
458 Firmware Controllers.
459*/
460
461static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
462{
463 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
464 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
465 Command->V1.CommandStatus = 0;
466}
467
468
469/*
470 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
471 Firmware Controllers.
472*/
473
474static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
475{
476 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
477 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
478 Command->V2.CommandStatus = 0;
479}
480
481
482/*
483 DAC960_AllocateCommand allocates a Command structure from Controller's
484 free list. During driver initialization, a special initialization command
485 has been placed on the free list to guarantee that command allocation can
486 never fail.
487*/
488
489static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
490 *Controller)
491{
492 DAC960_Command_T *Command = Controller->FreeCommands;
493 if (Command == NULL) return NULL;
494 Controller->FreeCommands = Command->Next;
495 Command->Next = NULL;
496 return Command;
497}
498
499
500/*
501 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
502 free list.
503*/
504
505static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
506{
507 DAC960_Controller_T *Controller = Command->Controller;
508
509 Command->Request = NULL;
510 Command->Next = Controller->FreeCommands;
511 Controller->FreeCommands = Command;
512}
513
514
515/*
516 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
517*/
518
519static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
520{
521 spin_unlock_irq(&Controller->queue_lock);
522 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
523 spin_lock_irq(&Controller->queue_lock);
524}
525
5b76ffd5
CH		 526/*
527 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
528*/
529
530static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
531{
532 DAC960_Controller_T *Controller = Command->Controller;
533 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
534 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
535 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
536 Controller->V2.NextCommandMailbox;
537
538 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
539 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
540
541 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
542 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
543 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
544
545 Controller->V2.PreviousCommandMailbox2 =
546 Controller->V2.PreviousCommandMailbox1;
547 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
548
549 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
550 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
551
552 Controller->V2.NextCommandMailbox = NextCommandMailbox;
553}
1da177e4
LT		 554
555/*
556 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
557*/
558
559static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
560{
561 DAC960_Controller_T *Controller = Command->Controller;
562 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
563 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
564 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
565 Controller->V2.NextCommandMailbox;
566 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
567 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
568 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
569 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
570 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
571 Controller->V2.PreviousCommandMailbox2 =
572 Controller->V2.PreviousCommandMailbox1;
573 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
574 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
575 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
576 Controller->V2.NextCommandMailbox = NextCommandMailbox;
577}
578
579
580/*
581 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
582*/
583
584static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
585{
586 DAC960_Controller_T *Controller = Command->Controller;
587 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
588 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
589 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
590 Controller->V2.NextCommandMailbox;
591 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
592 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
593 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
594 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
595 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
596 Controller->V2.PreviousCommandMailbox2 =
597 Controller->V2.PreviousCommandMailbox1;
598 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
599 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
600 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
601 Controller->V2.NextCommandMailbox = NextCommandMailbox;
602}
603
604
605/*
606 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
607 Controllers with Dual Mode Firmware.
608*/
609
610static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
611{
612 DAC960_Controller_T *Controller = Command->Controller;
613 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
614 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
615 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
616 Controller->V1.NextCommandMailbox;
617 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
618 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
619 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
620 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
621 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
622 Controller->V1.PreviousCommandMailbox2 =
623 Controller->V1.PreviousCommandMailbox1;
624 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
625 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
626 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
627 Controller->V1.NextCommandMailbox = NextCommandMailbox;
628}
629
630
631/*
632 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
633 Controllers with Single Mode Firmware.
634*/
635
636static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
637{
638 DAC960_Controller_T *Controller = Command->Controller;
639 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
640 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
641 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
642 Controller->V1.NextCommandMailbox;
643 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
644 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
645 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
646 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
647 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
648 Controller->V1.PreviousCommandMailbox2 =
649 Controller->V1.PreviousCommandMailbox1;
650 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
651 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
652 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
653 Controller->V1.NextCommandMailbox = NextCommandMailbox;
654}
655
656
657/*
658 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
659 Controllers with Dual Mode Firmware.
660*/
661
662static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
663{
664 DAC960_Controller_T *Controller = Command->Controller;
665 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
666 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
667 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
668 Controller->V1.NextCommandMailbox;
669 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
670 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
671 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
672 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
673 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
674 Controller->V1.PreviousCommandMailbox2 =
675 Controller->V1.PreviousCommandMailbox1;
676 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
677 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
678 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
679 Controller->V1.NextCommandMailbox = NextCommandMailbox;
680}
681
682
683/*
684 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
685 Controllers with Single Mode Firmware.
686*/
687
688static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
689{
690 DAC960_Controller_T *Controller = Command->Controller;
691 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
692 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
693 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
694 Controller->V1.NextCommandMailbox;
695 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
696 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
697 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
698 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
699 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
700 Controller->V1.PreviousCommandMailbox2 =
701 Controller->V1.PreviousCommandMailbox1;
702 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
703 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
704 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
705 Controller->V1.NextCommandMailbox = NextCommandMailbox;
706}
707
708
709/*
710 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
711*/
712
713static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
714{
715 DAC960_Controller_T *Controller = Command->Controller;
716 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
717 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
718 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
719 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
720 udelay(1);
721 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
722 DAC960_PD_NewCommand(ControllerBaseAddress);
723}
724
725
726/*
727 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
728*/
729
730static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
731{
732 DAC960_Controller_T *Controller = Command->Controller;
733 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
734 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
735 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
736 switch (CommandMailbox->Common.CommandOpcode)
737 {
738 case DAC960_V1_Enquiry:
739 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
740 break;
741 case DAC960_V1_GetDeviceState:
742 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
743 break;
744 case DAC960_V1_Read:
745 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
746 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
747 break;
748 case DAC960_V1_Write:
749 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
750 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
751 break;
752 case DAC960_V1_ReadWithScatterGather:
753 CommandMailbox->Common.CommandOpcode =
754 DAC960_V1_ReadWithScatterGather_Old;
755 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
756 break;
757 case DAC960_V1_WriteWithScatterGather:
758 CommandMailbox->Common.CommandOpcode =
759 DAC960_V1_WriteWithScatterGather_Old;
760 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
761 break;
762 default:
763 break;
764 }
765 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
766 udelay(1);
767 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
768 DAC960_PD_NewCommand(ControllerBaseAddress);
769}
770
771
772/*
773 DAC960_ExecuteCommand executes Command and waits for completion.
774*/
775
776static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
777{
778 DAC960_Controller_T *Controller = Command->Controller;
6e9a4738 779 DECLARE_COMPLETION_ONSTACK(Completion);
1da177e4
LT		 780 unsigned long flags;
781 Command->Completion = &Completion;
782
783 spin_lock_irqsave(&Controller->queue_lock, flags);
784 DAC960_QueueCommand(Command);
785 spin_unlock_irqrestore(&Controller->queue_lock, flags);
786
787 if (in_interrupt())
788 return;
789 wait_for_completion(&Completion);
790}
791
792
793/*
794 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
795 Command and waits for completion. It returns true on success and false
796 on failure.
797*/
798
87d156bf 799static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
1da177e4
LT		 800 DAC960_V1_CommandOpcode_T CommandOpcode,
801 dma_addr_t DataDMA)
802{
803 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
804 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
805 DAC960_V1_CommandStatus_T CommandStatus;
806 DAC960_V1_ClearCommand(Command);
807 Command->CommandType = DAC960_ImmediateCommand;
808 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
809 CommandMailbox->Type3.BusAddress = DataDMA;
810 DAC960_ExecuteCommand(Command);
811 CommandStatus = Command->V1.CommandStatus;
812 DAC960_DeallocateCommand(Command);
813 return (CommandStatus == DAC960_V1_NormalCompletion);
814}
815
816
817/*
818 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
819 Command and waits for completion. It returns true on success and false
820 on failure.
821*/
822
87d156bf 823static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
1da177e4
LT		 824 DAC960_V1_CommandOpcode_T CommandOpcode,
825 unsigned char CommandOpcode2,
826 dma_addr_t DataDMA)
827{
828 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
829 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
830 DAC960_V1_CommandStatus_T CommandStatus;
831 DAC960_V1_ClearCommand(Command);
832 Command->CommandType = DAC960_ImmediateCommand;
833 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
834 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
835 CommandMailbox->Type3B.BusAddress = DataDMA;
836 DAC960_ExecuteCommand(Command);
837 CommandStatus = Command->V1.CommandStatus;
838 DAC960_DeallocateCommand(Command);
839 return (CommandStatus == DAC960_V1_NormalCompletion);
840}
841
842
843/*
844 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
845 Command and waits for completion. It returns true on success and false
846 on failure.
847*/
848
87d156bf 849static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
1da177e4
LT		 850 DAC960_V1_CommandOpcode_T CommandOpcode,
851 unsigned char Channel,
852 unsigned char TargetID,
853 dma_addr_t DataDMA)
854{
855 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
856 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
857 DAC960_V1_CommandStatus_T CommandStatus;
858 DAC960_V1_ClearCommand(Command);
859 Command->CommandType = DAC960_ImmediateCommand;
860 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
861 CommandMailbox->Type3D.Channel = Channel;
862 CommandMailbox->Type3D.TargetID = TargetID;
863 CommandMailbox->Type3D.BusAddress = DataDMA;
864 DAC960_ExecuteCommand(Command);
865 CommandStatus = Command->V1.CommandStatus;
866 DAC960_DeallocateCommand(Command);
867 return (CommandStatus == DAC960_V1_NormalCompletion);
868}
869
870
871/*
872 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
873 Reading IOCTL Command and waits for completion. It returns true on success
874 and false on failure.
875
876 Return data in The controller's HealthStatusBuffer, which is dma-able memory
877*/
878
87d156bf 879static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 880{
881 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
882 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
883 DAC960_V2_CommandStatus_T CommandStatus;
884 DAC960_V2_ClearCommand(Command);
885 Command->CommandType = DAC960_ImmediateCommand;
886 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
887 CommandMailbox->Common.CommandControlBits
888 .DataTransferControllerToHost = true;
889 CommandMailbox->Common.CommandControlBits
890 .NoAutoRequestSense = true;
891 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
892 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
893 CommandMailbox->Common.DataTransferMemoryAddress
894 .ScatterGatherSegments[0]
895 .SegmentDataPointer =
896 Controller->V2.HealthStatusBufferDMA;
897 CommandMailbox->Common.DataTransferMemoryAddress
898 .ScatterGatherSegments[0]
899 .SegmentByteCount =
900 CommandMailbox->Common.DataTransferSize;
901 DAC960_ExecuteCommand(Command);
902 CommandStatus = Command->V2.CommandStatus;
903 DAC960_DeallocateCommand(Command);
904 return (CommandStatus == DAC960_V2_NormalCompletion);
905}
906
907
908/*
909 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
910 Information Reading IOCTL Command and waits for completion. It returns
911 true on success and false on failure.
912
913 Data is returned in the controller's V2.NewControllerInformation dma-able
914 memory buffer.
915*/
916
87d156bf 917static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 918{
919 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
920 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
921 DAC960_V2_CommandStatus_T CommandStatus;
922 DAC960_V2_ClearCommand(Command);
923 Command->CommandType = DAC960_ImmediateCommand;
924 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
925 CommandMailbox->ControllerInfo.CommandControlBits
926 .DataTransferControllerToHost = true;
927 CommandMailbox->ControllerInfo.CommandControlBits
928 .NoAutoRequestSense = true;
929 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
930 CommandMailbox->ControllerInfo.ControllerNumber = 0;
931 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
932 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
933 .ScatterGatherSegments[0]
934 .SegmentDataPointer =
935 Controller->V2.NewControllerInformationDMA;
936 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
937 .ScatterGatherSegments[0]
938 .SegmentByteCount =
939 CommandMailbox->ControllerInfo.DataTransferSize;
940 DAC960_ExecuteCommand(Command);
941 CommandStatus = Command->V2.CommandStatus;
942 DAC960_DeallocateCommand(Command);
943 return (CommandStatus == DAC960_V2_NormalCompletion);
944}
945
946
947/*
948 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
949 Device Information Reading IOCTL Command and waits for completion. It
950 returns true on success and false on failure.
951
952 Data is returned in the controller's V2.NewLogicalDeviceInformation
953*/
954
87d156bf 955static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 956 unsigned short LogicalDeviceNumber)
957{
958 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
959 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
960 DAC960_V2_CommandStatus_T CommandStatus;
961
962 DAC960_V2_ClearCommand(Command);
963 Command->CommandType = DAC960_ImmediateCommand;
964 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
965 DAC960_V2_IOCTL;
966 CommandMailbox->LogicalDeviceInfo.CommandControlBits
967 .DataTransferControllerToHost = true;
968 CommandMailbox->LogicalDeviceInfo.CommandControlBits
969 .NoAutoRequestSense = true;
970 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
971 sizeof(DAC960_V2_LogicalDeviceInfo_T);
972 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
973 LogicalDeviceNumber;
974 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
975 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
976 .ScatterGatherSegments[0]
977 .SegmentDataPointer =
978 Controller->V2.NewLogicalDeviceInformationDMA;
979 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
980 .ScatterGatherSegments[0]
981 .SegmentByteCount =
982 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
983 DAC960_ExecuteCommand(Command);
984 CommandStatus = Command->V2.CommandStatus;
985 DAC960_DeallocateCommand(Command);
986 return (CommandStatus == DAC960_V2_NormalCompletion);
987}
988
989
990/*
991 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
992 Physical Device Information" IOCTL Command and waits for completion. It
993 returns true on success and false on failure.
994
995 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
996 this function is called for a given controller. This will return data
997 for the "first" device on that controller. The returned data includes a
998 Channel, TargetID, LogicalUnit that can be passed in to this routine to
999 get data for the NEXT device on that controller.
1000
1001 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1002 memory buffer.
1003
1004*/
1005
87d156bf 1006static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 1007 unsigned char Channel,
1008 unsigned char TargetID,
1009 unsigned char LogicalUnit)
1010{
1011 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1012 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1013 DAC960_V2_CommandStatus_T CommandStatus;
1014
1015 DAC960_V2_ClearCommand(Command);
1016 Command->CommandType = DAC960_ImmediateCommand;
1017 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1018 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1019 .DataTransferControllerToHost = true;
1020 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1021 .NoAutoRequestSense = true;
1022 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1023 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1024 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1025 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1026 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1027 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1028 DAC960_V2_GetPhysicalDeviceInfoValid;
1029 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1030 .ScatterGatherSegments[0]
1031 .SegmentDataPointer =
1032 Controller->V2.NewPhysicalDeviceInformationDMA;
1033 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1034 .ScatterGatherSegments[0]
1035 .SegmentByteCount =
1036 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1037 DAC960_ExecuteCommand(Command);
1038 CommandStatus = Command->V2.CommandStatus;
1039 DAC960_DeallocateCommand(Command);
1040 return (CommandStatus == DAC960_V2_NormalCompletion);
1041}
1042
1043
1044static void DAC960_V2_ConstructNewUnitSerialNumber(
1045 DAC960_Controller_T *Controller,
1046 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1047 int LogicalUnit)
1048{
1049 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1050 CommandMailbox->SCSI_10.CommandControlBits
1051 .DataTransferControllerToHost = true;
1052 CommandMailbox->SCSI_10.CommandControlBits
1053 .NoAutoRequestSense = true;
1054 CommandMailbox->SCSI_10.DataTransferSize =
1055 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1056 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1057 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1058 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1059 CommandMailbox->SCSI_10.CDBLength = 6;
1060 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1061 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1062 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1063 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1064 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1065 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1066 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1067 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1068 .ScatterGatherSegments[0]
1069 .SegmentDataPointer =
1070 Controller->V2.NewInquiryUnitSerialNumberDMA;
1071 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1072 .ScatterGatherSegments[0]
1073 .SegmentByteCount =
1074 CommandMailbox->SCSI_10.DataTransferSize;
1075}
1076
1077
1078/*
1079 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1080 Inquiry command to a SCSI device identified by Channel number,
1081 Target id, Logical Unit Number. This function Waits for completion
1082 of the command.
1083
1084 The return data includes Unit Serial Number information for the
1085 specified device.
1086
1087 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1088 memory buffer.
1089*/
1090
87d156bf 1091static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1da177e4
LT		 1092 int Channel, int TargetID, int LogicalUnit)
1093{
1094 DAC960_Command_T *Command;
1095 DAC960_V2_CommandMailbox_T *CommandMailbox;
1096 DAC960_V2_CommandStatus_T CommandStatus;
1097
1098 Command = DAC960_AllocateCommand(Controller);
1099 CommandMailbox = &Command->V2.CommandMailbox;
1100 DAC960_V2_ClearCommand(Command);
1101 Command->CommandType = DAC960_ImmediateCommand;
1102
1103 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1104 Channel, TargetID, LogicalUnit);
1105
1106 DAC960_ExecuteCommand(Command);
1107 CommandStatus = Command->V2.CommandStatus;
1108 DAC960_DeallocateCommand(Command);
1109 return (CommandStatus == DAC960_V2_NormalCompletion);
1110}
1111
1112
1113/*
1114 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1115 Operation IOCTL Command and waits for completion. It returns true on
1116 success and false on failure.
1117*/
1118
87d156bf 1119static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1da177e4
LT		 1120 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1121 DAC960_V2_OperationDevice_T
1122 OperationDevice)
1123{
1124 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1125 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1126 DAC960_V2_CommandStatus_T CommandStatus;
1127 DAC960_V2_ClearCommand(Command);
1128 Command->CommandType = DAC960_ImmediateCommand;
1129 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1130 CommandMailbox->DeviceOperation.CommandControlBits
1131 .DataTransferControllerToHost = true;
1132 CommandMailbox->DeviceOperation.CommandControlBits
1133 .NoAutoRequestSense = true;
1134 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1135 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1136 DAC960_ExecuteCommand(Command);
1137 CommandStatus = Command->V2.CommandStatus;
1138 DAC960_DeallocateCommand(Command);
1139 return (CommandStatus == DAC960_V2_NormalCompletion);
1140}
1141
1142
1143/*
1144 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1145 for DAC960 V1 Firmware Controllers.
1146
1147 PD and P controller types have no memory mailbox, but still need the
1148 other dma mapped memory.
1149*/
1150
87d156bf 1151static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1152 *Controller)
1153{
1154 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1155 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1156 struct pci_dev *PCI_Device = Controller->PCIDevice;
1157 struct dma_loaf *DmaPages = &Controller->DmaPages;
1158 size_t DmaPagesSize;
1159 size_t CommandMailboxesSize;
1160 size_t StatusMailboxesSize;
1161
1162 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1163 dma_addr_t CommandMailboxesMemoryDMA;
1164
1165 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1166 dma_addr_t StatusMailboxesMemoryDMA;
1167
1168 DAC960_V1_CommandMailbox_T CommandMailbox;
1169 DAC960_V1_CommandStatus_T CommandStatus;
1170 int TimeoutCounter;
1171 int i;
1172
1173
284901a9 1174 if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1da177e4 1175 return DAC960_Failure(Controller, "DMA mask out of range");
284901a9 1176 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
1da177e4
LT		 1177
1178 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1179 CommandMailboxesSize = 0;
1180 StatusMailboxesSize = 0;
1181 } else {
1182 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1183 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1184 }
1185 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1186 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1187 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1188 sizeof(DAC960_V1_RebuildProgress_T) +
1189 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1190 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1191 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1192 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1193
1194 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1195 return false;
1196
1197
1198 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1199 goto skip_mailboxes;
1200
1201 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1202 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1203
1204 /* These are the base addresses for the command memory mailbox array */
1205 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1206 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1207
1208 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1209 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1210 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1211 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1212 Controller->V1.PreviousCommandMailbox2 =
1213 Controller->V1.LastCommandMailbox - 1;
1214
1215 /* These are the base addresses for the status memory mailbox array */
1216 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1217 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1218
1219 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1220 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1221 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1222 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1223 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1224
1225skip_mailboxes:
1226 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1227 sizeof(DAC960_V1_DCDB_T),
1228 &Controller->V1.MonitoringDCDB_DMA);
1229
1230 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1231 sizeof(DAC960_V1_Enquiry_T),
1232 &Controller->V1.NewEnquiryDMA);
1233
1234 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1235 sizeof(DAC960_V1_ErrorTable_T),
1236 &Controller->V1.NewErrorTableDMA);
1237
1238 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1239 sizeof(DAC960_V1_EventLogEntry_T),
1240 &Controller->V1.EventLogEntryDMA);
1241
1242 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1243 sizeof(DAC960_V1_RebuildProgress_T),
1244 &Controller->V1.RebuildProgressDMA);
1245
1246 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1247 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1248 &Controller->V1.NewLogicalDriveInformationDMA);
1249
1250 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1251 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1252 &Controller->V1.BackgroundInitializationStatusDMA);
1253
1254 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1255 sizeof(DAC960_V1_DeviceState_T),
1256 &Controller->V1.NewDeviceStateDMA);
1257
1258 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1259 sizeof(DAC960_SCSI_Inquiry_T),
1260 &Controller->V1.NewInquiryStandardDataDMA);
1261
1262 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1263 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1264 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1265
1266 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1267 return true;
1268
1269 /* Enable the Memory Mailbox Interface. */
1270 Controller->V1.DualModeMemoryMailboxInterface = true;
1271 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1272 CommandMailbox.TypeX.CommandIdentifier = 0;
1273 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1274 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1275 Controller->V1.FirstCommandMailboxDMA;
1276 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1277 Controller->V1.FirstStatusMailboxDMA;
1278#define TIMEOUT_COUNT 1000000
1279
1280 for (i = 0; i < 2; i++)
1281 switch (Controller->HardwareType)
1282 {
1283 case DAC960_LA_Controller:
1284 TimeoutCounter = TIMEOUT_COUNT;
1285 while (--TimeoutCounter >= 0)
1286 {
1287 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1288 break;
1289 udelay(10);
1290 }
1291 if (TimeoutCounter < 0) return false;
1292 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1293 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1294 TimeoutCounter = TIMEOUT_COUNT;
1295 while (--TimeoutCounter >= 0)
1296 {
1297 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1298 ControllerBaseAddress))
1299 break;
1300 udelay(10);
1301 }
1302 if (TimeoutCounter < 0) return false;
1303 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1304 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1305 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1306 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1307 Controller->V1.DualModeMemoryMailboxInterface = false;
1308 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1309 break;
1310 case DAC960_PG_Controller:
1311 TimeoutCounter = TIMEOUT_COUNT;
1312 while (--TimeoutCounter >= 0)
1313 {
1314 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1315 break;
1316 udelay(10);
1317 }
1318 if (TimeoutCounter < 0) return false;
1319 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1320 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1321
1322 TimeoutCounter = TIMEOUT_COUNT;
1323 while (--TimeoutCounter >= 0)
1324 {
1325 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1326 ControllerBaseAddress))
1327 break;
1328 udelay(10);
1329 }
1330 if (TimeoutCounter < 0) return false;
1331 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1332 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1333 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1334 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1335 Controller->V1.DualModeMemoryMailboxInterface = false;
1336 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1337 break;
1338 default:
1339 DAC960_Failure(Controller, "Unknown Controller Type\n");
1340 break;
1341 }
1342 return false;
1343}
1344
1345
1346/*
1347 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1348 for DAC960 V2 Firmware Controllers.
1349
1350 Aggregate the space needed for the controller's memory mailbox and
1351 the other data structures that will be targets of dma transfers with
1352 the controller. Allocate a dma-mapped region of memory to hold these
1353 structures. Then, save CPU pointers and dma_addr_t values to reference
1354 the structures that are contained in that region.
1355*/
1356
87d156bf 1357static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1358 *Controller)
1359{
1360 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1361 struct pci_dev *PCI_Device = Controller->PCIDevice;
1362 struct dma_loaf *DmaPages = &Controller->DmaPages;
1363 size_t DmaPagesSize;
1364 size_t CommandMailboxesSize;
1365 size_t StatusMailboxesSize;
1366
1367 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1368 dma_addr_t CommandMailboxesMemoryDMA;
1369
1370 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1371 dma_addr_t StatusMailboxesMemoryDMA;
1372
1373 DAC960_V2_CommandMailbox_T *CommandMailbox;
1374 dma_addr_t CommandMailboxDMA;
1375 DAC960_V2_CommandStatus_T CommandStatus;
1376
6a35528a
YH		 1377 if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(64)))
1378 Controller->BounceBufferLimit = DMA_BIT_MASK(64);
284901a9
YH		 1379 else if (!pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1380 Controller->BounceBufferLimit = DMA_BIT_MASK(32);
868047fc
MW		 1381 else
1382 return DAC960_Failure(Controller, "DMA mask out of range");
1da177e4
LT		 1383
1384 /* This is a temporary dma mapping, used only in the scope of this function */
0a361e31 1385 CommandMailbox = pci_alloc_consistent(PCI_Device,
1da177e4
LT		 1386 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1387 if (CommandMailbox == NULL)
1388 return false;
1389
1390 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1391 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1392 DmaPagesSize =
1393 CommandMailboxesSize + StatusMailboxesSize +
1394 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1395 sizeof(DAC960_V2_ControllerInfo_T) +
1396 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1397 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1398 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1399 sizeof(DAC960_V2_Event_T) +
1400 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1401
1402 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1403 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1404 CommandMailbox, CommandMailboxDMA);
1405 return false;
1406 }
1407
1408 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1409 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1410
1411 /* These are the base addresses for the command memory mailbox array */
1412 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1413 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1414
1415 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1416 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1417 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1418 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1419 Controller->V2.PreviousCommandMailbox2 =
1420 Controller->V2.LastCommandMailbox - 1;
1421
1422 /* These are the base addresses for the status memory mailbox array */
1423 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1424 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1425
1426 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1427 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1428 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1429 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1430 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1431
1432 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1433 sizeof(DAC960_V2_HealthStatusBuffer_T),
1434 &Controller->V2.HealthStatusBufferDMA);
1435
1436 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1437 sizeof(DAC960_V2_ControllerInfo_T),
1438 &Controller->V2.NewControllerInformationDMA);
1439
1440 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1441 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1442 &Controller->V2.NewLogicalDeviceInformationDMA);
1443
1444 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1445 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1446 &Controller->V2.NewPhysicalDeviceInformationDMA);
1447
1448 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1449 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1450 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1451
1452 Controller->V2.Event = slice_dma_loaf(DmaPages,
1453 sizeof(DAC960_V2_Event_T),
1454 &Controller->V2.EventDMA);
1455
1456 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1457 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1458 &Controller->V2.PhysicalToLogicalDeviceDMA);
1459
1460 /*
1461 Enable the Memory Mailbox Interface.
1462
1463 I don't know why we can't just use one of the memory mailboxes
1464 we just allocated to do this, instead of using this temporary one.
1465 Try this change later.
1466 */
1467 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1468 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1469 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1470 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1471 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1472 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1473 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1474 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1475 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1476 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1477 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1478 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1479 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1480 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1481 Controller->V2.HealthStatusBufferDMA;
1482 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1483 Controller->V2.FirstCommandMailboxDMA;
1484 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1485 Controller->V2.FirstStatusMailboxDMA;
1486 switch (Controller->HardwareType)
1487 {
5b76ffd5
CH		 1488 case DAC960_GEM_Controller:
1489 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1490 udelay(1);
1491 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1492 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1493 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1494 udelay(1);
1495 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1496 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1497 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1498 break;
1da177e4
LT		 1499 case DAC960_BA_Controller:
1500 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1501 udelay(1);
1502 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1503 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1504 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1505 udelay(1);
1506 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1507 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1508 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1509 break;
1510 case DAC960_LP_Controller:
1511 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1512 udelay(1);
1513 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1514 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1515 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1516 udelay(1);
1517 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1518 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1519 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1520 break;
1521 default:
1522 DAC960_Failure(Controller, "Unknown Controller Type\n");
1523 CommandStatus = DAC960_V2_AbormalCompletion;
1524 break;
1525 }
1526 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1527 CommandMailbox, CommandMailboxDMA);
1528 return (CommandStatus == DAC960_V2_NormalCompletion);
1529}
1530
1531
1532/*
1533 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1534 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1535*/
1536
87d156bf 1537static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1538 *Controller)
1539{
1540 DAC960_V1_Enquiry2_T *Enquiry2;
1541 dma_addr_t Enquiry2DMA;
1542 DAC960_V1_Config2_T *Config2;
1543 dma_addr_t Config2DMA;
1544 int LogicalDriveNumber, Channel, TargetID;
1545 struct dma_loaf local_dma;
1546
1547 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1548 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1549 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1550
1551 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1552 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1553
1554 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1555 Controller->V1.NewEnquiryDMA)) {
1556 free_dma_loaf(Controller->PCIDevice, &local_dma);
1557 return DAC960_Failure(Controller, "ENQUIRY");
1558 }
1559 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1560 sizeof(DAC960_V1_Enquiry_T));
1561
1562 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1563 free_dma_loaf(Controller->PCIDevice, &local_dma);
1564 return DAC960_Failure(Controller, "ENQUIRY2");
1565 }
1566
1567 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1568 free_dma_loaf(Controller->PCIDevice, &local_dma);
1569 return DAC960_Failure(Controller, "READ CONFIG2");
1570 }
1571
1572 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1573 Controller->V1.NewLogicalDriveInformationDMA)) {
1574 free_dma_loaf(Controller->PCIDevice, &local_dma);
1575 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1576 }
1577 memcpy(&Controller->V1.LogicalDriveInformation,
1578 Controller->V1.NewLogicalDriveInformation,
1579 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1580
1581 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1582 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1583 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1584 Channel, TargetID,
1585 Controller->V1.NewDeviceStateDMA)) {
1586 free_dma_loaf(Controller->PCIDevice, &local_dma);
1587 return DAC960_Failure(Controller, "GET DEVICE STATE");
1588 }
1589 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1590 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1591 }
1592 /*
1593 Initialize the Controller Model Name and Full Model Name fields.
1594 */
1595 switch (Enquiry2->HardwareID.SubModel)
1596 {
1597 case DAC960_V1_P_PD_PU:
1598 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1599 strcpy(Controller->ModelName, "DAC960PU");
1600 else strcpy(Controller->ModelName, "DAC960PD");
1601 break;
1602 case DAC960_V1_PL:
1603 strcpy(Controller->ModelName, "DAC960PL");
1604 break;
1605 case DAC960_V1_PG:
1606 strcpy(Controller->ModelName, "DAC960PG");
1607 break;
1608 case DAC960_V1_PJ:
1609 strcpy(Controller->ModelName, "DAC960PJ");
1610 break;
1611 case DAC960_V1_PR:
1612 strcpy(Controller->ModelName, "DAC960PR");
1613 break;
1614 case DAC960_V1_PT:
1615 strcpy(Controller->ModelName, "DAC960PT");
1616 break;
1617 case DAC960_V1_PTL0:
1618 strcpy(Controller->ModelName, "DAC960PTL0");
1619 break;
1620 case DAC960_V1_PRL:
1621 strcpy(Controller->ModelName, "DAC960PRL");
1622 break;
1623 case DAC960_V1_PTL1:
1624 strcpy(Controller->ModelName, "DAC960PTL1");
1625 break;
1626 case DAC960_V1_1164P:
1627 strcpy(Controller->ModelName, "DAC1164P");
1628 break;
1629 default:
1630 free_dma_loaf(Controller->PCIDevice, &local_dma);
1631 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1632 }
1633 strcpy(Controller->FullModelName, "Mylex ");
1634 strcat(Controller->FullModelName, Controller->ModelName);
1635 /*
1636 Initialize the Controller Firmware Version field and verify that it
1637 is a supported firmware version. The supported firmware versions are:
1638
1639 DAC1164P 5.06 and above
1640 DAC960PTL/PRL/PJ/PG 4.06 and above
1641 DAC960PU/PD/PL 3.51 and above
1642 DAC960PU/PD/PL/P 2.73 and above
1643 */
1644#if defined(CONFIG_ALPHA)
1645 /*
1646 DEC Alpha machines were often equipped with DAC960 cards that were
1647 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1648 the last custom FW revision to be released by DEC for these older
1649 controllers, appears to work quite well with this driver.
1650
1651 Cards tested successfully were several versions each of the PD and
1652 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1653 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1654 back of the board, of:
1655
1656 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1657 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1658 */
1659# define FIRMWARE_27X "2.70"
1660#else
1661# define FIRMWARE_27X "2.73"
1662#endif
1663
1664 if (Enquiry2->FirmwareID.MajorVersion == 0)
1665 {
1666 Enquiry2->FirmwareID.MajorVersion =
1667 Controller->V1.Enquiry.MajorFirmwareVersion;
1668 Enquiry2->FirmwareID.MinorVersion =
1669 Controller->V1.Enquiry.MinorFirmwareVersion;
1670 Enquiry2->FirmwareID.FirmwareType = '0';
1671 Enquiry2->FirmwareID.TurnID = 0;
1672 }
1673 sprintf(Controller->FirmwareVersion, "%d.%02d-%c-%02d",
1674 Enquiry2->FirmwareID.MajorVersion, Enquiry2->FirmwareID.MinorVersion,
1675 Enquiry2->FirmwareID.FirmwareType, Enquiry2->FirmwareID.TurnID);
1676 if (!((Controller->FirmwareVersion[0] == '5' &&
1677 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1678 (Controller->FirmwareVersion[0] == '4' &&
1679 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1680 (Controller->FirmwareVersion[0] == '3' &&
1681 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1682 (Controller->FirmwareVersion[0] == '2' &&
1683 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1684 {
1685 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1686 DAC960_Error("Firmware Version = '%s'\n", Controller,
1687 Controller->FirmwareVersion);
1688 free_dma_loaf(Controller->PCIDevice, &local_dma);
1689 return false;
1690 }
1691 /*
1692 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1693 Enclosure Management Enabled fields.
1694 */
1695 Controller->Channels = Enquiry2->ActualChannels;
1696 Controller->Targets = Enquiry2->MaxTargets;
1697 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1698 Controller->V1.SAFTE_EnclosureManagementEnabled =
1699 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1700 /*
1701 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1702 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1703 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1704 less than the Controller Queue Depth to allow for an automatic drive
1705 rebuild operation.
1706 */
1707 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1708 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1709 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1710 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1711 Controller->LogicalDriveCount =
1712 Controller->V1.Enquiry.NumberOfLogicalDrives;
1713 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1714 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1715 Controller->DriverScatterGatherLimit =
1716 Controller->ControllerScatterGatherLimit;
1717 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1718 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1719 /*
1720 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1721 */
1722 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1723 >> (10 - DAC960_BlockSizeBits);
1724 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1725 >> (10 - DAC960_BlockSizeBits);
1726 switch (Config2->DriveGeometry)
1727 {
1728 case DAC960_V1_Geometry_128_32:
1729 Controller->V1.GeometryTranslationHeads = 128;
1730 Controller->V1.GeometryTranslationSectors = 32;
1731 break;
1732 case DAC960_V1_Geometry_255_63:
1733 Controller->V1.GeometryTranslationHeads = 255;
1734 Controller->V1.GeometryTranslationSectors = 63;
1735 break;
1736 default:
1737 free_dma_loaf(Controller->PCIDevice, &local_dma);
1738 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1739 }
1740 /*
1741 Initialize the Background Initialization Status.
1742 */
1743 if ((Controller->FirmwareVersion[0] == '4' &&
1744 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1745 (Controller->FirmwareVersion[0] == '5' &&
1746 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1747 {
1748 Controller->V1.BackgroundInitializationStatusSupported = true;
1749 DAC960_V1_ExecuteType3B(Controller,
1750 DAC960_V1_BackgroundInitializationControl, 0x20,
1751 Controller->
1752 V1.BackgroundInitializationStatusDMA);
1753 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1754 Controller->V1.BackgroundInitializationStatus,
1755 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1756 }
1757 /*
1758 Initialize the Logical Drive Initially Accessible flag.
1759 */
1760 for (LogicalDriveNumber = 0;
1761 LogicalDriveNumber < Controller->LogicalDriveCount;
1762 LogicalDriveNumber++)
1763 if (Controller->V1.LogicalDriveInformation
1764 [LogicalDriveNumber].LogicalDriveState !=
1765 DAC960_V1_LogicalDrive_Offline)
1766 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1767 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1768 free_dma_loaf(Controller->PCIDevice, &local_dma);
1769 return true;
1770}
1771
1772
1773/*
1774 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1775 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1776*/
1777
87d156bf 1778static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1779 *Controller)
1780{
1781 DAC960_V2_ControllerInfo_T *ControllerInfo =
1782 &Controller->V2.ControllerInformation;
1783 unsigned short LogicalDeviceNumber = 0;
1784 int ModelNameLength;
1785
1786 /* Get data into dma-able area, then copy into permanant location */
1787 if (!DAC960_V2_NewControllerInfo(Controller))
1788 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1789 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1790 sizeof(DAC960_V2_ControllerInfo_T));
1791
1792
1793 if (!DAC960_V2_GeneralInfo(Controller))
1794 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1795
1796 /*
1797 Initialize the Controller Model Name and Full Model Name fields.
1798 */
1799 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1800 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1801 ModelNameLength = sizeof(Controller->ModelName)-1;
1802 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1803 ModelNameLength);
1804 ModelNameLength--;
1805 while (Controller->ModelName[ModelNameLength] == ' ' ||
1806 Controller->ModelName[ModelNameLength] == '\0')
1807 ModelNameLength--;
1808 Controller->ModelName[++ModelNameLength] = '\0';
1809 strcpy(Controller->FullModelName, "Mylex ");
1810 strcat(Controller->FullModelName, Controller->ModelName);
1811 /*
1812 Initialize the Controller Firmware Version field.
1813 */
1814 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1815 ControllerInfo->FirmwareMajorVersion,
1816 ControllerInfo->FirmwareMinorVersion,
1817 ControllerInfo->FirmwareTurnNumber);
1818 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1819 ControllerInfo->FirmwareMinorVersion == 0 &&
1820 ControllerInfo->FirmwareTurnNumber < 1)
1821 {
1822 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1823 Controller, Controller->FirmwareVersion);
1824 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1825 Controller);
1826 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1827 Controller);
1828 }
1829 /*
1830 Initialize the Controller Channels, Targets, and Memory Size.
1831 */
1832 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1833 Controller->Targets =
1834 ControllerInfo->MaximumTargetsPerChannel
1835 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1836 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1837 /*
1838 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1839 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1840 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1841 less than the Controller Queue Depth to allow for an automatic drive
1842 rebuild operation.
1843 */
1844 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1845 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1846 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1847 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1848 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1849 Controller->MaxBlocksPerCommand =
1850 ControllerInfo->MaximumDataTransferSizeInBlocks;
1851 Controller->ControllerScatterGatherLimit =
1852 ControllerInfo->MaximumScatterGatherEntries;
1853 Controller->DriverScatterGatherLimit =
1854 Controller->ControllerScatterGatherLimit;
1855 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1856 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1857 /*
1858 Initialize the Logical Device Information.
1859 */
1860 while (true)
1861 {
1862 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1863 Controller->V2.NewLogicalDeviceInformation;
1864 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1865 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1866
1867 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1868 break;
1869 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1870 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1871 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1872 Controller, LogicalDeviceNumber);
1873 break;
1874 }
1875 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1876 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1877 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1878 LogicalDeviceNumber++;
1879 continue;
1880 }
1881 PhysicalDevice.Controller = 0;
1882 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1883 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1884 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1885 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1886 PhysicalDevice;
1887 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1888 DAC960_V2_LogicalDevice_Offline)
1889 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
0a361e31
AD		 1890 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1891 GFP_ATOMIC);
1da177e4
LT		 1892 if (LogicalDeviceInfo == NULL)
1893 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1894 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1895 LogicalDeviceInfo;
1896 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1897 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1898 LogicalDeviceNumber++;
1899 }
1900 return true;
1901}
1902
1903
1904/*
1905 DAC960_ReportControllerConfiguration reports the Configuration Information
1906 for Controller.
1907*/
1908
87d156bf 1909static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1910 *Controller)
1911{
1912 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1913 Controller, Controller->ModelName);
1914 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1915 Controller, Controller->FirmwareVersion,
1916 Controller->Channels, Controller->MemorySize);
1917 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1918 Controller, Controller->Bus,
1919 Controller->Device, Controller->Function);
1920 if (Controller->IO_Address == 0)
1921 DAC960_Info("Unassigned\n", Controller);
1922 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1923 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1924 Controller, Controller->PCI_Address,
1925 (unsigned long) Controller->BaseAddress,
1926 Controller->IRQ_Channel);
1927 DAC960_Info(" Controller Queue Depth: %d, "
1928 "Maximum Blocks per Command: %d\n",
1929 Controller, Controller->ControllerQueueDepth,
1930 Controller->MaxBlocksPerCommand);
1931 DAC960_Info(" Driver Queue Depth: %d, "
1932 "Scatter/Gather Limit: %d of %d Segments\n",
1933 Controller, Controller->DriverQueueDepth,
1934 Controller->DriverScatterGatherLimit,
1935 Controller->ControllerScatterGatherLimit);
1936 if (Controller->FirmwareType == DAC960_V1_Controller)
1937 {
1938 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1939 "BIOS Geometry: %d/%d\n", Controller,
1940 Controller->V1.StripeSize,
1941 Controller->V1.SegmentSize,
1942 Controller->V1.GeometryTranslationHeads,
1943 Controller->V1.GeometryTranslationSectors);
1944 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1945 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1946 }
1947 return true;
1948}
1949
1950
1951/*
1952 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1953 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1954 Inquiry Unit Serial Number information for each device connected to
1955 Controller.
1956*/
1957
87d156bf 1958static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 1959 *Controller)
1960{
1961 struct dma_loaf local_dma;
1962
1963 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1964 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1965
1966 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1967 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1968
1969 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1970 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1971
1972 struct completion Completions[DAC960_V1_MaxChannels];
1973 unsigned long flags;
1974 int Channel, TargetID;
1975
1976 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1977 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1978 sizeof(DAC960_SCSI_Inquiry_T) +
1979 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1980 return DAC960_Failure(Controller,
1981 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1982
1983 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1984 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1985 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1986 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1987 sizeof(DAC960_SCSI_Inquiry_T),
1988 SCSI_Inquiry_dma + Channel);
1989 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1990 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1991 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1992 }
1993
1994 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
1995 {
1996 /*
1997 * For each channel, submit a probe for a device on that channel.
1998 * The timeout interval for a device that is present is 10 seconds.
1999 * With this approach, the timeout periods can elapse in parallel
2000 * on each channel.
2001 */
2002 for (Channel = 0; Channel < Controller->Channels; Channel++)
2003 {
2004 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
2005 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2006 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2007 DAC960_Command_T *Command = Controller->Commands[Channel];
2008 struct completion *Completion = &Completions[Channel];
2009
2010 init_completion(Completion);
2011 DAC960_V1_ClearCommand(Command);
2012 Command->CommandType = DAC960_ImmediateCommand;
2013 Command->Completion = Completion;
2014 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2015 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2016 DCDB->Channel = Channel;
2017 DCDB->TargetID = TargetID;
2018 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2019 DCDB->EarlyStatus = false;
2020 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2021 DCDB->NoAutomaticRequestSense = false;
2022 DCDB->DisconnectPermitted = true;
2023 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2024 DCDB->BusAddress = NewInquiryStandardDataDMA;
2025 DCDB->CDBLength = 6;
2026 DCDB->TransferLengthHigh4 = 0;
2027 DCDB->SenseLength = sizeof(DCDB->SenseData);
2028 DCDB->CDB[0] = 0x12; /* INQUIRY */
2029 DCDB->CDB[1] = 0; /* EVPD = 0 */
2030 DCDB->CDB[2] = 0; /* Page Code */
2031 DCDB->CDB[3] = 0; /* Reserved */
2032 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2033 DCDB->CDB[5] = 0; /* Control */
2034
2035 spin_lock_irqsave(&Controller->queue_lock, flags);
2036 DAC960_QueueCommand(Command);
2037 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2038 }
2039 /*
2040 * Wait for the problems submitted in the previous loop
2041 * to complete. On the probes that are successful,
2042 * get the serial number of the device that was found.
2043 */
2044 for (Channel = 0; Channel < Controller->Channels; Channel++)
2045 {
2046 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2047 &Controller->V1.InquiryStandardData[Channel][TargetID];
2048 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2049 dma_addr_t NewInquiryUnitSerialNumberDMA =
2050 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2051 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2052 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2053 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2054 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2055 DAC960_Command_T *Command = Controller->Commands[Channel];
2056 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2057 struct completion *Completion = &Completions[Channel];
2058
2059 wait_for_completion(Completion);
2060
2061 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2062 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2063 InquiryStandardData->PeripheralDeviceType = 0x1F;
2064 continue;
2065 } else
2066 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2067
2068 /* Preserve Channel and TargetID values from the previous loop */
2069 Command->Completion = Completion;
2070 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2071 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2072 DCDB->SenseLength = sizeof(DCDB->SenseData);
2073 DCDB->CDB[0] = 0x12; /* INQUIRY */
2074 DCDB->CDB[1] = 1; /* EVPD = 1 */
2075 DCDB->CDB[2] = 0x80; /* Page Code */
2076 DCDB->CDB[3] = 0; /* Reserved */
2077 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2078 DCDB->CDB[5] = 0; /* Control */
2079
2080 spin_lock_irqsave(&Controller->queue_lock, flags);
2081 DAC960_QueueCommand(Command);
2082 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2083 wait_for_completion(Completion);
2084
2085 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2086 memset(InquiryUnitSerialNumber, 0,
2087 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2088 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2089 } else
2090 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2091 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2092 }
2093 }
2094 free_dma_loaf(Controller->PCIDevice, &local_dma);
2095 return true;
2096}
2097
2098
2099/*
2100 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2101 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2102 Information and SCSI Inquiry Unit Serial Number information for each
2103 device connected to Controller.
2104*/
2105
87d156bf 2106static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2107 *Controller)
2108{
2109 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2110 unsigned short PhysicalDeviceIndex = 0;
2111
2112 while (true)
2113 {
2114 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2115 Controller->V2.NewPhysicalDeviceInformation;
2116 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2117 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2118 Controller->V2.NewInquiryUnitSerialNumber;
2119 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2120
2121 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2122 break;
2123
0a361e31
AD		 2124 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2125 GFP_ATOMIC);
1da177e4
LT		 2126 if (PhysicalDeviceInfo == NULL)
2127 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2128 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2129 PhysicalDeviceInfo;
2130 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2131 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2132
0a361e31
AD		 2133 InquiryUnitSerialNumber = kmalloc(
2134 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
1da177e4
LT		 2135 if (InquiryUnitSerialNumber == NULL) {
2136 kfree(PhysicalDeviceInfo);
2137 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2138 }
2139 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2140 InquiryUnitSerialNumber;
2141
2142 Channel = NewPhysicalDeviceInfo->Channel;
2143 TargetID = NewPhysicalDeviceInfo->TargetID;
2144 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2145
2146 /*
2147 Some devices do NOT have Unit Serial Numbers.
2148 This command fails for them. But, we still want to
2149 remember those devices are there. Construct a
2150 UnitSerialNumber structure for the failure case.
2151 */
2152 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2153 memset(InquiryUnitSerialNumber, 0,
2154 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2155 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2156 } else
2157 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2158 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2159
2160 PhysicalDeviceIndex++;
2161 LogicalUnit++;
2162 }
2163 return true;
2164}
2165
2166
2167/*
2168 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2169 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2170 Unit Serial Number structures.
2171*/
2172
2173static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2174 *InquiryStandardData,
2175 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2176 *InquiryUnitSerialNumber,
2177 unsigned char *Vendor,
2178 unsigned char *Model,
2179 unsigned char *Revision,
2180 unsigned char *SerialNumber)
2181{
2182 int SerialNumberLength, i;
2183 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2184 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2185 {
2186 unsigned char VendorCharacter =
2187 InquiryStandardData->VendorIdentification[i];
2188 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2189 ? VendorCharacter : ' ');
2190 }
2191 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2192 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2193 {
2194 unsigned char ModelCharacter =
2195 InquiryStandardData->ProductIdentification[i];
2196 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2197 ? ModelCharacter : ' ');
2198 }
2199 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2200 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2201 {
2202 unsigned char RevisionCharacter =
2203 InquiryStandardData->ProductRevisionLevel[i];
2204 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2205 ? RevisionCharacter : ' ');
2206 }
2207 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2208 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2209 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2210 if (SerialNumberLength >
2211 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2212 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2213 for (i = 0; i < SerialNumberLength; i++)
2214 {
2215 unsigned char SerialNumberCharacter =
2216 InquiryUnitSerialNumber->ProductSerialNumber[i];
2217 SerialNumber[i] =
2218 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2219 ? SerialNumberCharacter : ' ');
2220 }
2221 SerialNumber[SerialNumberLength] = '\0';
2222}
2223
2224
2225/*
2226 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2227 Information for DAC960 V1 Firmware Controllers.
2228*/
2229
87d156bf 2230static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2231 *Controller)
2232{
2233 int LogicalDriveNumber, Channel, TargetID;
2234 DAC960_Info(" Physical Devices:\n", Controller);
2235 for (Channel = 0; Channel < Controller->Channels; Channel++)
2236 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2237 {
2238 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2239 &Controller->V1.InquiryStandardData[Channel][TargetID];
2240 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2241 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2242 DAC960_V1_DeviceState_T *DeviceState =
2243 &Controller->V1.DeviceState[Channel][TargetID];
2244 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2245 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2246 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2247 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2248 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2249 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2250 ->ProductSerialNumber)];
2251 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2252 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2253 Vendor, Model, Revision, SerialNumber);
2254 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2255 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2256 Vendor, Model, Revision);
2257 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2258 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2259 if (DeviceState->Present &&
2260 DeviceState->DeviceType == DAC960_V1_DiskType)
2261 {
2262 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2263 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2264 Controller,
2265 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2266 ? "Dead"
2267 : DeviceState->DeviceState
2268 == DAC960_V1_Device_WriteOnly
2269 ? "Write-Only"
2270 : DeviceState->DeviceState
2271 == DAC960_V1_Device_Online
2272 ? "Online" : "Standby"),
2273 DeviceState->DiskSize,
2274 Controller->V1.DeviceResetCount[Channel][TargetID]);
2275 else
2276 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2277 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2278 ? "Dead"
2279 : DeviceState->DeviceState
2280 == DAC960_V1_Device_WriteOnly
2281 ? "Write-Only"
2282 : DeviceState->DeviceState
2283 == DAC960_V1_Device_Online
2284 ? "Online" : "Standby"),
2285 DeviceState->DiskSize);
2286 }
2287 if (ErrorEntry->ParityErrorCount > 0 ||
2288 ErrorEntry->SoftErrorCount > 0 ||
2289 ErrorEntry->HardErrorCount > 0 ||
2290 ErrorEntry->MiscErrorCount > 0)
2291 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2292 "Hard: %d, Misc: %d\n", Controller,
2293 ErrorEntry->ParityErrorCount,
2294 ErrorEntry->SoftErrorCount,
2295 ErrorEntry->HardErrorCount,
2296 ErrorEntry->MiscErrorCount);
2297 }
2298 DAC960_Info(" Logical Drives:\n", Controller);
2299 for (LogicalDriveNumber = 0;
2300 LogicalDriveNumber < Controller->LogicalDriveCount;
2301 LogicalDriveNumber++)
2302 {
2303 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2304 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2305 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2306 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2307 LogicalDriveInformation->RAIDLevel,
2308 (LogicalDriveInformation->LogicalDriveState
2309 == DAC960_V1_LogicalDrive_Online
2310 ? "Online"
2311 : LogicalDriveInformation->LogicalDriveState
2312 == DAC960_V1_LogicalDrive_Critical
2313 ? "Critical" : "Offline"),
2314 LogicalDriveInformation->LogicalDriveSize,
2315 (LogicalDriveInformation->WriteBack
2316 ? "Write Back" : "Write Thru"));
2317 }
2318 return true;
2319}
2320
2321
2322/*
2323 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2324 Information for DAC960 V2 Firmware Controllers.
2325*/
2326
87d156bf 2327static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2328 *Controller)
2329{
2330 int PhysicalDeviceIndex, LogicalDriveNumber;
2331 DAC960_Info(" Physical Devices:\n", Controller);
2332 for (PhysicalDeviceIndex = 0;
2333 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2334 PhysicalDeviceIndex++)
2335 {
2336 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2337 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2338 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2339 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2340 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2341 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2342 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2343 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2344 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2345 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2346 if (PhysicalDeviceInfo == NULL) break;
2347 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2348 Vendor, Model, Revision, SerialNumber);
2349 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2350 Controller,
2351 PhysicalDeviceInfo->Channel,
2352 PhysicalDeviceInfo->TargetID,
2353 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2354 Vendor, Model, Revision);
2355 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2356 DAC960_Info(" %sAsynchronous\n", Controller,
2357 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2358 ? "Wide " :""));
2359 else
2360 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2361 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2362 ? "Wide " :""),
2363 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2364 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2365 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2366 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2367 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2368 DAC960_V2_Device_Unconfigured)
2369 continue;
2370 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2371 (PhysicalDeviceInfo->PhysicalDeviceState
2372 == DAC960_V2_Device_Online
2373 ? "Online"
2374 : PhysicalDeviceInfo->PhysicalDeviceState
2375 == DAC960_V2_Device_Rebuild
2376 ? "Rebuild"
2377 : PhysicalDeviceInfo->PhysicalDeviceState
2378 == DAC960_V2_Device_Missing
2379 ? "Missing"
2380 : PhysicalDeviceInfo->PhysicalDeviceState
2381 == DAC960_V2_Device_Critical
2382 ? "Critical"
2383 : PhysicalDeviceInfo->PhysicalDeviceState
2384 == DAC960_V2_Device_Dead
2385 ? "Dead"
2386 : PhysicalDeviceInfo->PhysicalDeviceState
2387 == DAC960_V2_Device_SuspectedDead
2388 ? "Suspected-Dead"
2389 : PhysicalDeviceInfo->PhysicalDeviceState
2390 == DAC960_V2_Device_CommandedOffline
2391 ? "Commanded-Offline"
2392 : PhysicalDeviceInfo->PhysicalDeviceState
2393 == DAC960_V2_Device_Standby
2394 ? "Standby" : "Unknown"),
2395 PhysicalDeviceInfo->ConfigurableDeviceSize);
2396 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2397 PhysicalDeviceInfo->SoftErrors == 0 &&
2398 PhysicalDeviceInfo->HardErrors == 0 &&
2399 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2400 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2401 PhysicalDeviceInfo->Retries == 0 &&
2402 PhysicalDeviceInfo->Aborts == 0 &&
2403 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2404 continue;
2405 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2406 "Hard: %d, Misc: %d\n", Controller,
2407 PhysicalDeviceInfo->ParityErrors,
2408 PhysicalDeviceInfo->SoftErrors,
2409 PhysicalDeviceInfo->HardErrors,
2410 PhysicalDeviceInfo->MiscellaneousErrors);
2411 DAC960_Info(" Timeouts: %d, Retries: %d, "
2412 "Aborts: %d, Predicted: %d\n", Controller,
2413 PhysicalDeviceInfo->CommandTimeouts,
2414 PhysicalDeviceInfo->Retries,
2415 PhysicalDeviceInfo->Aborts,
2416 PhysicalDeviceInfo->PredictedFailuresDetected);
2417 }
2418 DAC960_Info(" Logical Drives:\n", Controller);
2419 for (LogicalDriveNumber = 0;
2420 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2421 LogicalDriveNumber++)
2422 {
2423 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2424 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2425 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2426 "Read Cache Enabled",
2427 "Read Ahead Enabled",
2428 "Intelligent Read Ahead Enabled",
2429 "-", "-", "-", "-" };
2430 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2431 "Logical Device Read Only",
2432 "Write Cache Enabled",
2433 "Intelligent Write Cache Enabled",
2434 "-", "-", "-", "-" };
2435 unsigned char *GeometryTranslation;
2436 if (LogicalDeviceInfo == NULL) continue;
2437 switch (LogicalDeviceInfo->DriveGeometry)
2438 {
2439 case DAC960_V2_Geometry_128_32:
2440 GeometryTranslation = "128/32";
2441 break;
2442 case DAC960_V2_Geometry_255_63:
2443 GeometryTranslation = "255/63";
2444 break;
2445 default:
2446 GeometryTranslation = "Invalid";
2447 DAC960_Error("Illegal Logical Device Geometry %d\n",
2448 Controller, LogicalDeviceInfo->DriveGeometry);
2449 break;
2450 }
2451 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2452 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2453 LogicalDeviceInfo->RAIDLevel,
2454 (LogicalDeviceInfo->LogicalDeviceState
2455 == DAC960_V2_LogicalDevice_Online
2456 ? "Online"
2457 : LogicalDeviceInfo->LogicalDeviceState
2458 == DAC960_V2_LogicalDevice_Critical
2459 ? "Critical" : "Offline"),
2460 LogicalDeviceInfo->ConfigurableDeviceSize);
2461 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2462 Controller,
2463 (LogicalDeviceInfo->LogicalDeviceControl
2464 .LogicalDeviceInitialized
2465 ? "Initialized" : "Uninitialized"),
2466 GeometryTranslation);
2467 if (LogicalDeviceInfo->StripeSize == 0)
2468 {
2469 if (LogicalDeviceInfo->CacheLineSize == 0)
2470 DAC960_Info(" Stripe Size: N/A, "
2471 "Segment Size: N/A\n", Controller);
2472 else
2473 DAC960_Info(" Stripe Size: N/A, "
2474 "Segment Size: %dKB\n", Controller,
2475 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2476 }
2477 else
2478 {
2479 if (LogicalDeviceInfo->CacheLineSize == 0)
2480 DAC960_Info(" Stripe Size: %dKB, "
2481 "Segment Size: N/A\n", Controller,
2482 1 << (LogicalDeviceInfo->StripeSize - 2));
2483 else
2484 DAC960_Info(" Stripe Size: %dKB, "
2485 "Segment Size: %dKB\n", Controller,
2486 1 << (LogicalDeviceInfo->StripeSize - 2),
2487 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2488 }
2489 DAC960_Info(" %s, %s\n", Controller,
2490 ReadCacheStatus[
2491 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2492 WriteCacheStatus[
2493 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2494 if (LogicalDeviceInfo->SoftErrors > 0 ||
2495 LogicalDeviceInfo->CommandsFailed > 0 ||
2496 LogicalDeviceInfo->DeferredWriteErrors)
2497 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2498 "Deferred Write: %d\n", Controller,
2499 LogicalDeviceInfo->SoftErrors,
2500 LogicalDeviceInfo->CommandsFailed,
2501 LogicalDeviceInfo->DeferredWriteErrors);
2502
2503 }
2504 return true;
2505}
2506
2507/*
2508 DAC960_RegisterBlockDevice registers the Block Device structures
2509 associated with Controller.
2510*/
2511
87d156bf 2512static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
1da177e4
LT		 2513{
2514 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2515 int n;
2516
2517 /*
2518 Register the Block Device Major Number for this DAC960 Controller.
2519 */
2520 if (register_blkdev(MajorNumber, "dac960") < 0)
2521 return false;
2522
2523 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2524 struct gendisk *disk = Controller->disks[n];
2525 struct request_queue *RequestQueue;
2526
2527 /* for now, let all request queues share controller's lock */
2528 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2529 if (!RequestQueue) {
2530 printk("DAC960: failure to allocate request queue\n");
2531 continue;
2532 }
2533 Controller->RequestQueue[n] = RequestQueue;
2534 blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit);
2535 RequestQueue->queuedata = Controller;
8a78362c 2536 blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit);
086fa5ff 2537 blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
1da177e4
LT		 2538 disk->queue = RequestQueue;
2539 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
1da177e4
LT		 2540 disk->major = MajorNumber;
2541 disk->first_minor = n << DAC960_MaxPartitionsBits;
2542 disk->fops = &DAC960_BlockDeviceOperations;
2543 }
2544 /*
2545 Indicate the Block Device Registration completed successfully,
2546 */
2547 return true;
2548}
2549
2550
2551/*
2552 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2553 associated with Controller.
2554*/
2555
2556static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2557{
2558 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2559 int disk;
2560
2561 /* does order matter when deleting gendisk and cleanup in request queue? */
2562 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2563 del_gendisk(Controller->disks[disk]);
2564 blk_cleanup_queue(Controller->RequestQueue[disk]);
2565 Controller->RequestQueue[disk] = NULL;
2566 }
2567
2568 /*
2569 Unregister the Block Device Major Number for this DAC960 Controller.
2570 */
2571 unregister_blkdev(MajorNumber, "dac960");
2572}
2573
2574/*
2575 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2576 Information Partition Sector Counts and Block Sizes.
2577*/
2578
2579static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2580{
2581 int disk;
2582 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2583 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2584}
2585
2586/*
2587 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2588 the Error Status Register when the driver performs the BIOS handshaking.
2589 It returns true for fatal errors and false otherwise.
2590*/
2591
87d156bf 2592static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
1da177e4
LT		 2593 unsigned char ErrorStatus,
2594 unsigned char Parameter0,
2595 unsigned char Parameter1)
2596{
2597 switch (ErrorStatus)
2598 {
2599 case 0x00:
2600 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2601 Controller, Parameter1, Parameter0);
2602 break;
2603 case 0x08:
2604 if (Controller->DriveSpinUpMessageDisplayed) break;
2605 DAC960_Notice("Spinning Up Drives\n", Controller);
2606 Controller->DriveSpinUpMessageDisplayed = true;
2607 break;
2608 case 0x30:
2609 DAC960_Notice("Configuration Checksum Error\n", Controller);
2610 break;
2611 case 0x60:
2612 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2613 break;
2614 case 0x70:
2615 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2616 break;
2617 case 0x90:
2618 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2619 Controller, Parameter1, Parameter0);
2620 break;
2621 case 0xA0:
2622 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2623 break;
2624 case 0xB0:
2625 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2626 break;
2627 case 0xD0:
2628 DAC960_Notice("New Controller Configuration Found\n", Controller);
2629 break;
2630 case 0xF0:
2631 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2632 return true;
2633 default:
2634 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2635 Controller, ErrorStatus);
2636 return true;
2637 }
2638 return false;
2639}
2640
2641
2642/*
2643 * DAC960_DetectCleanup releases the resources that were allocated
2644 * during DAC960_DetectController(). DAC960_DetectController can
2645 * has several internal failure points, so not ALL resources may
2646 * have been allocated. It's important to free only
2647 * resources that HAVE been allocated. The code below always
2648 * tests that the resource has been allocated before attempting to
2649 * free it.
2650 */
2651static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2652{
2653 int i;
2654
2655 /* Free the memory mailbox, status, and related structures */
2656 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2657 if (Controller->MemoryMappedAddress) {
2658 switch(Controller->HardwareType)
2659 {
5b76ffd5
CH		 2660 case DAC960_GEM_Controller:
2661 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2662 break;
1da177e4
LT		 2663 case DAC960_BA_Controller:
2664 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2665 break;
2666 case DAC960_LP_Controller:
2667 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2668 break;
2669 case DAC960_LA_Controller:
2670 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2671 break;
2672 case DAC960_PG_Controller:
2673 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2674 break;
2675 case DAC960_PD_Controller:
2676 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2677 break;
2678 case DAC960_P_Controller:
2679 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2680 break;
2681 }
2682 iounmap(Controller->MemoryMappedAddress);
2683 }
2684 if (Controller->IRQ_Channel)
2685 free_irq(Controller->IRQ_Channel, Controller);
2686 if (Controller->IO_Address)
2687 release_region(Controller->IO_Address, 0x80);
2688 pci_disable_device(Controller->PCIDevice);
2689 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2690 put_disk(Controller->disks[i]);
2691 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2692 kfree(Controller);
2693}
2694
2695
2696/*
2697 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2698 PCI RAID Controllers by interrogating the PCI Configuration Space for
2699 Controller Type.
2700*/
2701
2702static DAC960_Controller_T *
2703DAC960_DetectController(struct pci_dev *PCI_Device,
2704 const struct pci_device_id *entry)
2705{
2706 struct DAC960_privdata *privdata =
2707 (struct DAC960_privdata *)entry->driver_data;
7d12e780 2708 irq_handler_t InterruptHandler = privdata->InterruptHandler;
1da177e4
LT		 2709 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2710 DAC960_Controller_T *Controller = NULL;
2711 unsigned char DeviceFunction = PCI_Device->devfn;
2712 unsigned char ErrorStatus, Parameter0, Parameter1;
2713 unsigned int IRQ_Channel;
2714 void __iomem *BaseAddress;
2715 int i;
2716
06ff37ff 2717 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
1da177e4
LT		 2718 if (Controller == NULL) {
2719 DAC960_Error("Unable to allocate Controller structure for "
2720 "Controller at\n", NULL);
2721 return NULL;
2722 }
1da177e4
LT		 2723 Controller->ControllerNumber = DAC960_ControllerCount;
2724 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2725 Controller->Bus = PCI_Device->bus->number;
2726 Controller->FirmwareType = privdata->FirmwareType;
2727 Controller->HardwareType = privdata->HardwareType;
2728 Controller->Device = DeviceFunction >> 3;
2729 Controller->Function = DeviceFunction & 0x7;
2730 Controller->PCIDevice = PCI_Device;
2731 strcpy(Controller->FullModelName, "DAC960");
2732
2733 if (pci_enable_device(PCI_Device))
2734 goto Failure;
2735
2736 switch (Controller->HardwareType)
2737 {
5b76ffd5
CH		 2738 case DAC960_GEM_Controller:
2739 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2740 break;
1da177e4
LT		 2741 case DAC960_BA_Controller:
2742 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2743 break;
2744 case DAC960_LP_Controller:
2745 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2746 break;
2747 case DAC960_LA_Controller:
2748 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2749 break;
2750 case DAC960_PG_Controller:
2751 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2752 break;
2753 case DAC960_PD_Controller:
2754 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2755 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2756 break;
2757 case DAC960_P_Controller:
2758 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2759 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2760 break;
2761 }
2762
2763 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2764 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2765 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2766 if (!Controller->disks[i])
2767 goto Failure;
2768 Controller->disks[i]->private_data = (void *)((long)i);
2769 }
2770 init_waitqueue_head(&Controller->CommandWaitQueue);
2771 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2772 spin_lock_init(&Controller->queue_lock);
2773 DAC960_AnnounceDriver(Controller);
2774 /*
2775 Map the Controller Register Window.
2776 */
2777 if (MemoryWindowSize < PAGE_SIZE)
2778 MemoryWindowSize = PAGE_SIZE;
2779 Controller->MemoryMappedAddress =
2780 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2781 Controller->BaseAddress =
2782 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2783 if (Controller->MemoryMappedAddress == NULL)
2784 {
2785 DAC960_Error("Unable to map Controller Register Window for "
2786 "Controller at\n", Controller);
2787 goto Failure;
2788 }
2789 BaseAddress = Controller->BaseAddress;
2790 switch (Controller->HardwareType)
2791 {
5b76ffd5
CH		 2792 case DAC960_GEM_Controller:
2793 DAC960_GEM_DisableInterrupts(BaseAddress);
2794 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2795 udelay(1000);
2796 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2797 {
2798 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2799 &Parameter0, &Parameter1) &&
2800 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2801 Parameter0, Parameter1))
2802 goto Failure;
2803 udelay(10);
2804 }
2805 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2806 {
2807 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2808 "for Controller at\n", Controller);
2809 goto Failure;
2810 }
2811 DAC960_GEM_EnableInterrupts(BaseAddress);
2812 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2813 Controller->ReadControllerConfiguration =
2814 DAC960_V2_ReadControllerConfiguration;
2815 Controller->ReadDeviceConfiguration =
2816 DAC960_V2_ReadDeviceConfiguration;
2817 Controller->ReportDeviceConfiguration =
2818 DAC960_V2_ReportDeviceConfiguration;
2819 Controller->QueueReadWriteCommand =
2820 DAC960_V2_QueueReadWriteCommand;
2821 break;
1da177e4
LT		 2822 case DAC960_BA_Controller:
2823 DAC960_BA_DisableInterrupts(BaseAddress);
2824 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2825 udelay(1000);
2826 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2827 {
2828 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2829 &Parameter0, &Parameter1) &&
2830 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2831 Parameter0, Parameter1))
2832 goto Failure;
2833 udelay(10);
2834 }
2835 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2836 {
2837 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2838 "for Controller at\n", Controller);
2839 goto Failure;
2840 }
2841 DAC960_BA_EnableInterrupts(BaseAddress);
2842 Controller->QueueCommand = DAC960_BA_QueueCommand;
2843 Controller->ReadControllerConfiguration =
2844 DAC960_V2_ReadControllerConfiguration;
2845 Controller->ReadDeviceConfiguration =
2846 DAC960_V2_ReadDeviceConfiguration;
2847 Controller->ReportDeviceConfiguration =
2848 DAC960_V2_ReportDeviceConfiguration;
2849 Controller->QueueReadWriteCommand =
2850 DAC960_V2_QueueReadWriteCommand;
2851 break;
2852 case DAC960_LP_Controller:
2853 DAC960_LP_DisableInterrupts(BaseAddress);
2854 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2855 udelay(1000);
2856 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2857 {
2858 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2859 &Parameter0, &Parameter1) &&
2860 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2861 Parameter0, Parameter1))
2862 goto Failure;
2863 udelay(10);
2864 }
2865 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2866 {
2867 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2868 "for Controller at\n", Controller);
2869 goto Failure;
2870 }
2871 DAC960_LP_EnableInterrupts(BaseAddress);
2872 Controller->QueueCommand = DAC960_LP_QueueCommand;
2873 Controller->ReadControllerConfiguration =
2874 DAC960_V2_ReadControllerConfiguration;
2875 Controller->ReadDeviceConfiguration =
2876 DAC960_V2_ReadDeviceConfiguration;
2877 Controller->ReportDeviceConfiguration =
2878 DAC960_V2_ReportDeviceConfiguration;
2879 Controller->QueueReadWriteCommand =
2880 DAC960_V2_QueueReadWriteCommand;
2881 break;
2882 case DAC960_LA_Controller:
2883 DAC960_LA_DisableInterrupts(BaseAddress);
2884 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2885 udelay(1000);
2886 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2887 {
2888 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2889 &Parameter0, &Parameter1) &&
2890 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2891 Parameter0, Parameter1))
2892 goto Failure;
2893 udelay(10);
2894 }
2895 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2896 {
2897 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2898 "for Controller at\n", Controller);
2899 goto Failure;
2900 }
2901 DAC960_LA_EnableInterrupts(BaseAddress);
2902 if (Controller->V1.DualModeMemoryMailboxInterface)
2903 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2904 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2905 Controller->ReadControllerConfiguration =
2906 DAC960_V1_ReadControllerConfiguration;
2907 Controller->ReadDeviceConfiguration =
2908 DAC960_V1_ReadDeviceConfiguration;
2909 Controller->ReportDeviceConfiguration =
2910 DAC960_V1_ReportDeviceConfiguration;
2911 Controller->QueueReadWriteCommand =
2912 DAC960_V1_QueueReadWriteCommand;
2913 break;
2914 case DAC960_PG_Controller:
2915 DAC960_PG_DisableInterrupts(BaseAddress);
2916 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2917 udelay(1000);
2918 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2919 {
2920 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2921 &Parameter0, &Parameter1) &&
2922 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2923 Parameter0, Parameter1))
2924 goto Failure;
2925 udelay(10);
2926 }
2927 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2928 {
2929 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2930 "for Controller at\n", Controller);
2931 goto Failure;
2932 }
2933 DAC960_PG_EnableInterrupts(BaseAddress);
2934 if (Controller->V1.DualModeMemoryMailboxInterface)
2935 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2936 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2937 Controller->ReadControllerConfiguration =
2938 DAC960_V1_ReadControllerConfiguration;
2939 Controller->ReadDeviceConfiguration =
2940 DAC960_V1_ReadDeviceConfiguration;
2941 Controller->ReportDeviceConfiguration =
2942 DAC960_V1_ReportDeviceConfiguration;
2943 Controller->QueueReadWriteCommand =
2944 DAC960_V1_QueueReadWriteCommand;
2945 break;
2946 case DAC960_PD_Controller:
2947 if (!request_region(Controller->IO_Address, 0x80,
2948 Controller->FullModelName)) {
2949 DAC960_Error("IO port 0x%d busy for Controller at\n",
2950 Controller, Controller->IO_Address);
2951 goto Failure;
2952 }
2953 DAC960_PD_DisableInterrupts(BaseAddress);
2954 DAC960_PD_AcknowledgeStatus(BaseAddress);
2955 udelay(1000);
2956 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2957 {
2958 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2959 &Parameter0, &Parameter1) &&
2960 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2961 Parameter0, Parameter1))
2962 goto Failure;
2963 udelay(10);
2964 }
2965 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2966 {
2967 DAC960_Error("Unable to allocate DMA mapped memory "
2968 "for Controller at\n", Controller);
2969 goto Failure;
2970 }
2971 DAC960_PD_EnableInterrupts(BaseAddress);
2972 Controller->QueueCommand = DAC960_PD_QueueCommand;
2973 Controller->ReadControllerConfiguration =
2974 DAC960_V1_ReadControllerConfiguration;
2975 Controller->ReadDeviceConfiguration =
2976 DAC960_V1_ReadDeviceConfiguration;
2977 Controller->ReportDeviceConfiguration =
2978 DAC960_V1_ReportDeviceConfiguration;
2979 Controller->QueueReadWriteCommand =
2980 DAC960_V1_QueueReadWriteCommand;
2981 break;
2982 case DAC960_P_Controller:
2983 if (!request_region(Controller->IO_Address, 0x80,
2984 Controller->FullModelName)){
2985 DAC960_Error("IO port 0x%d busy for Controller at\n",
2986 Controller, Controller->IO_Address);
2987 goto Failure;
2988 }
2989 DAC960_PD_DisableInterrupts(BaseAddress);
2990 DAC960_PD_AcknowledgeStatus(BaseAddress);
2991 udelay(1000);
2992 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2993 {
2994 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2995 &Parameter0, &Parameter1) &&
2996 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2997 Parameter0, Parameter1))
2998 goto Failure;
2999 udelay(10);
3000 }
3001 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
3002 {
3003 DAC960_Error("Unable to allocate DMA mapped memory"
3004 "for Controller at\n", Controller);
3005 goto Failure;
3006 }
3007 DAC960_PD_EnableInterrupts(BaseAddress);
3008 Controller->QueueCommand = DAC960_P_QueueCommand;
3009 Controller->ReadControllerConfiguration =
3010 DAC960_V1_ReadControllerConfiguration;
3011 Controller->ReadDeviceConfiguration =
3012 DAC960_V1_ReadDeviceConfiguration;
3013 Controller->ReportDeviceConfiguration =
3014 DAC960_V1_ReportDeviceConfiguration;
3015 Controller->QueueReadWriteCommand =
3016 DAC960_V1_QueueReadWriteCommand;
3017 break;
3018 }
3019 /*
3020 Acquire shared access to the IRQ Channel.
3021 */
3022 IRQ_Channel = PCI_Device->irq;
69ab3912 3023 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
1da177e4
LT		 3024 Controller->FullModelName, Controller) < 0)
3025 {
3026 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3027 Controller, Controller->IRQ_Channel);
3028 goto Failure;
3029 }
3030 Controller->IRQ_Channel = IRQ_Channel;
3031 Controller->InitialCommand.CommandIdentifier = 1;
3032 Controller->InitialCommand.Controller = Controller;
3033 Controller->Commands[0] = &Controller->InitialCommand;
3034 Controller->FreeCommands = &Controller->InitialCommand;
3035 return Controller;
3036
3037Failure:
3038 if (Controller->IO_Address == 0)
3039 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3040 "PCI Address 0x%X\n", Controller,
3041 Controller->Bus, Controller->Device,
3042 Controller->Function, Controller->PCI_Address);
3043 else
3044 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3045 "0x%X PCI Address 0x%X\n", Controller,
3046 Controller->Bus, Controller->Device,
3047 Controller->Function, Controller->IO_Address,
3048 Controller->PCI_Address);
3049 DAC960_DetectCleanup(Controller);
3050 DAC960_ControllerCount--;
3051 return NULL;
3052}
3053
3054/*
3055 DAC960_InitializeController initializes Controller.
3056*/
3057
87d156bf 3058static bool
1da177e4
LT		 3059DAC960_InitializeController(DAC960_Controller_T *Controller)
3060{
3061 if (DAC960_ReadControllerConfiguration(Controller) &&
3062 DAC960_ReportControllerConfiguration(Controller) &&
3063 DAC960_CreateAuxiliaryStructures(Controller) &&
3064 DAC960_ReadDeviceConfiguration(Controller) &&
3065 DAC960_ReportDeviceConfiguration(Controller) &&
3066 DAC960_RegisterBlockDevice(Controller))
3067 {
3068 /*
3069 Initialize the Monitoring Timer.
3070 */
3071 init_timer(&Controller->MonitoringTimer);
3072 Controller->MonitoringTimer.expires =
3073 jiffies + DAC960_MonitoringTimerInterval;
3074 Controller->MonitoringTimer.data = (unsigned long) Controller;
3075 Controller->MonitoringTimer.function = DAC960_MonitoringTimerFunction;
3076 add_timer(&Controller->MonitoringTimer);
3077 Controller->ControllerInitialized = true;
3078 return true;
3079 }
3080 return false;
3081}
3082
3083
3084/*
3085 DAC960_FinalizeController finalizes Controller.
3086*/
3087
3088static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3089{
3090 if (Controller->ControllerInitialized)
3091 {
3092 unsigned long flags;
3093
3094 /*
3095 * Acquiring and releasing lock here eliminates
3096 * a very low probability race.
3097 *
3098 * The code below allocates controller command structures
3099 * from the free list without holding the controller lock.
3100 * This is safe assuming there is no other activity on
3101 * the controller at the time.
3102 *
3103 * But, there might be a monitoring command still
3104 * in progress. Setting the Shutdown flag while holding
3105 * the lock ensures that there is no monitoring command
3106 * in the interrupt handler currently, and any monitoring
3107 * commands that complete from this time on will NOT return
3108 * their command structure to the free list.
3109 */
3110
3111 spin_lock_irqsave(&Controller->queue_lock, flags);
3112 Controller->ShutdownMonitoringTimer = 1;
3113 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3114
3115 del_timer_sync(&Controller->MonitoringTimer);
3116 if (Controller->FirmwareType == DAC960_V1_Controller)
3117 {
3118 DAC960_Notice("Flushing Cache...", Controller);
3119 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3120 DAC960_Notice("done\n", Controller);
3121
3122 if (Controller->HardwareType == DAC960_PD_Controller)
3123 release_region(Controller->IO_Address, 0x80);
3124 }
3125 else
3126 {
3127 DAC960_Notice("Flushing Cache...", Controller);
3128 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3129 DAC960_V2_RAID_Controller);
3130 DAC960_Notice("done\n", Controller);
3131 }
3132 }
3133 DAC960_UnregisterBlockDevice(Controller);
3134 DAC960_DestroyAuxiliaryStructures(Controller);
3135 DAC960_DestroyProcEntries(Controller);
3136 DAC960_DetectCleanup(Controller);
3137}
3138
3139
3140/*
3141 DAC960_Probe verifies controller's existence and
3142 initializes the DAC960 Driver for that controller.
3143*/
3144
3145static int
3146DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3147{
3148 int disk;
3149 DAC960_Controller_T *Controller;
3150
3151 if (DAC960_ControllerCount == DAC960_MaxControllers)
3152 {
3153 DAC960_Error("More than %d DAC960 Controllers detected - "
3154 "ignoring from Controller at\n",
3155 NULL, DAC960_MaxControllers);
3156 return -ENODEV;
3157 }
3158
3159 Controller = DAC960_DetectController(dev, entry);
3160 if (!Controller)
3161 return -ENODEV;
3162
3163 if (!DAC960_InitializeController(Controller)) {
3164 DAC960_FinalizeController(Controller);
3165 return -ENODEV;
3166 }
3167
3168 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3169 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3170 add_disk(Controller->disks[disk]);
3171 }
3172 DAC960_CreateProcEntries(Controller);
3173 return 0;
3174}
3175
3176
3177/*
3178 DAC960_Finalize finalizes the DAC960 Driver.
3179*/
3180
3181static void DAC960_Remove(struct pci_dev *PCI_Device)
3182{
3183 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3184 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3185 if (Controller != NULL)
3186 DAC960_FinalizeController(Controller);
3187}
3188
3189
3190/*
3191 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3192 DAC960 V1 Firmware Controllers.
3193*/
3194
3195static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3196{
3197 DAC960_Controller_T *Controller = Command->Controller;
3198 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3199 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3200 Command->V1.ScatterGatherList;
3201 struct scatterlist *ScatterList = Command->V1.ScatterList;
3202
3203 DAC960_V1_ClearCommand(Command);
3204
3205 if (Command->SegmentCount == 1)
3206 {
3207 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3208 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3209 else
3210 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3211
3212 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3213 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3214 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3215 CommandMailbox->Type5.BusAddress =
3216 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3217 }
3218 else
3219 {
3220 int i;
3221
3222 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3223 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3224 else
3225 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3226
3227 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3228 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3229 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3230 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3231
3232 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3233
3234 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3235 ScatterGatherList->SegmentDataPointer =
3236 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3237 ScatterGatherList->SegmentByteCount =
3238 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3239 }
3240 }
3241 DAC960_QueueCommand(Command);
3242}
3243
3244
3245/*
3246 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3247 DAC960 V2 Firmware Controllers.
3248*/
3249
3250static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3251{
3252 DAC960_Controller_T *Controller = Command->Controller;
3253 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3254 struct scatterlist *ScatterList = Command->V2.ScatterList;
3255
3256 DAC960_V2_ClearCommand(Command);
3257
3258 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3259 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3260 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3261 CommandMailbox->SCSI_10.DataTransferSize =
3262 Command->BlockCount << DAC960_BlockSizeBits;
3263 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3264 CommandMailbox->SCSI_10.PhysicalDevice =
3265 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3266 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3267 CommandMailbox->SCSI_10.CDBLength = 10;
3268 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3269 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3270 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3271 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3272 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3273 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3274 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3275 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3276
3277 if (Command->SegmentCount == 1)
3278 {
3279 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3280 .ScatterGatherSegments[0]
3281 .SegmentDataPointer =
3282 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3283 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3284 .ScatterGatherSegments[0]
3285 .SegmentByteCount =
3286 CommandMailbox->SCSI_10.DataTransferSize;
3287 }
3288 else
3289 {
3290 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3291 int i;
3292
3293 if (Command->SegmentCount > 2)
3294 {
3295 ScatterGatherList = Command->V2.ScatterGatherList;
3296 CommandMailbox->SCSI_10.CommandControlBits
3297 .AdditionalScatterGatherListMemory = true;
3298 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3299 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3300 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3301 .ExtendedScatterGather.ScatterGatherList0Address =
3302 Command->V2.ScatterGatherListDMA;
3303 }
3304 else
3305 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3306 .ScatterGatherSegments;
3307
3308 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3309 ScatterGatherList->SegmentDataPointer =
3310 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3311 ScatterGatherList->SegmentByteCount =
3312 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3313 }
3314 }
3315 DAC960_QueueCommand(Command);
3316}
3317
3318
3319static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3320{
3321 struct request *Request;
3322 DAC960_Command_T *Command;
3323
3324 while(1) {
9934c8c0 3325 Request = blk_peek_request(req_q);
1da177e4
LT		 3326 if (!Request)
3327 return 1;
3328
3329 Command = DAC960_AllocateCommand(Controller);
3330 if (Command == NULL)
3331 return 0;
3332
3333 if (rq_data_dir(Request) == READ) {
3334 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3335 Command->CommandType = DAC960_ReadCommand;
3336 } else {
3337 Command->DmaDirection = PCI_DMA_TODEVICE;
3338 Command->CommandType = DAC960_WriteCommand;
3339 }
c00895ab 3340 Command->Completion = Request->end_io_data;
1da177e4 3341 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
83096ebf
TH		 3342 Command->BlockNumber = blk_rq_pos(Request);
3343 Command->BlockCount = blk_rq_sectors(Request);
1da177e4 3344 Command->Request = Request;
9934c8c0 3345 blk_start_request(Request);
1da177e4
LT		 3346 Command->SegmentCount = blk_rq_map_sg(req_q,
3347 Command->Request, Command->cmd_sglist);
3348 /* pci_map_sg MAY change the value of SegCount */
3349 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3350 Command->SegmentCount, Command->DmaDirection);
3351
3352 DAC960_QueueReadWriteCommand(Command);
3353 }
3354}
3355
3356/*
3357 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3358 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3359 this function should wait for a Command to become available if necessary.
3360 This function returns true if an I/O Request was queued and false otherwise.
3361*/
3362static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3363{
3364 int i;
3365
3366 if (!controller->ControllerInitialized)
3367 return;
3368
3369 /* Do this better later! */
3370 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3371 struct request_queue *req_q = controller->RequestQueue[i];
3372
3373 if (req_q == NULL)
3374 continue;
3375
3376 if (!DAC960_process_queue(controller, req_q)) {
3377 controller->req_q_index = i;
3378 return;
3379 }
3380 }
3381
3382 if (controller->req_q_index == 0)
3383 return;
3384
3385 for (i = 0; i < controller->req_q_index; i++) {
3386 struct request_queue *req_q = controller->RequestQueue[i];
3387
3388 if (req_q == NULL)
3389 continue;
3390
3391 if (!DAC960_process_queue(controller, req_q)) {
3392 controller->req_q_index = i;
3393 return;
3394 }
3395 }
3396}
3397
3398
3399/*
3400 DAC960_queue_partial_rw extracts one bio from the request already
3401 associated with argument command, and construct a new command block to retry I/O
3402 only on that bio. Queue that command to the controller.
3403
3404 This function re-uses a previously-allocated Command,
3405 there is no failure mode from trying to allocate a command.
3406*/
3407
3408static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3409{
3410 DAC960_Controller_T *Controller = Command->Controller;
3411 struct request *Request = Command->Request;
3412 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3413
3414 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3415 Command->CommandType = DAC960_ReadRetryCommand;
3416 else
3417 Command->CommandType = DAC960_WriteRetryCommand;
3418
3419 /*
3420 * We could be more efficient with these mapping requests
3421 * and map only the portions that we need. But since this
3422 * code should almost never be called, just go with a
3423 * simple coding.
3424 */
3425 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3426
3427 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3428 /*
3429 * Resubmitting the request sector at a time is really tedious.
3430 * But, this should almost never happen. So, we're willing to pay
3431 * this price so that in the end, as much of the transfer is completed
3432 * successfully as possible.
3433 */
3434 Command->SegmentCount = 1;
83096ebf 3435 Command->BlockNumber = blk_rq_pos(Request);
1da177e4
LT		 3436 Command->BlockCount = 1;
3437 DAC960_QueueReadWriteCommand(Command);
3438 return;
3439}
3440
3441/*
3442 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3443*/
3444
3445static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3446{
3447 DAC960_ProcessRequest(RequestQueue->queuedata);
3448}
3449
3450/*
3451 DAC960_ProcessCompletedBuffer performs completion processing for an
3452 individual Buffer.
3453*/
3454
87d156bf
RK		 3455static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3456 bool SuccessfulIO)
1da177e4
LT		 3457{
3458 struct request *Request = Command->Request;
0156c254 3459 int Error = SuccessfulIO ? 0 : -EIO;
1da177e4
LT		 3460
3461 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3462 Command->SegmentCount, Command->DmaDirection);
3463
0156c254 3464 if (!__blk_end_request(Request, Error, Command->BlockCount << 9)) {
1da177e4
LT		 3465 if (Command->Completion) {
3466 complete(Command->Completion);
3467 Command->Completion = NULL;
3468 }
3469 return true;
3470 }
3471 return false;
3472}
3473
3474/*
3475 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3476 when an error occurs on a Read or Write operation.
3477*/
3478
3479static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3480{
3481 DAC960_Controller_T *Controller = Command->Controller;
3482 unsigned char *CommandName = "UNKNOWN";
3483 switch (Command->CommandType)
3484 {
3485 case DAC960_ReadCommand:
3486 case DAC960_ReadRetryCommand:
3487 CommandName = "READ";
3488 break;
3489 case DAC960_WriteCommand:
3490 case DAC960_WriteRetryCommand:
3491 CommandName = "WRITE";
3492 break;
3493 case DAC960_MonitoringCommand:
3494 case DAC960_ImmediateCommand:
3495 case DAC960_QueuedCommand:
3496 break;
3497 }
3498 switch (Command->V1.CommandStatus)
3499 {
3500 case DAC960_V1_IrrecoverableDataError:
3501 DAC960_Error("Irrecoverable Data Error on %s:\n",
3502 Controller, CommandName);
3503 break;
3504 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3505 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3506 Controller, CommandName);
3507 break;
3508 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3509 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3510 "on %s:\n", Controller, CommandName);
3511 break;
3512 case DAC960_V1_BadDataEncountered:
3513 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3514 break;
3515 default:
3516 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3517 Controller, Command->V1.CommandStatus, CommandName);
3518 break;
3519 }
3520 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3521 Controller, Controller->ControllerNumber,
3522 Command->LogicalDriveNumber, Command->BlockNumber,
3523 Command->BlockNumber + Command->BlockCount - 1);
3524}
3525
3526
3527/*
3528 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3529 for DAC960 V1 Firmware Controllers.
3530*/
3531
3532static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3533{
3534 DAC960_Controller_T *Controller = Command->Controller;
3535 DAC960_CommandType_T CommandType = Command->CommandType;
3536 DAC960_V1_CommandOpcode_T CommandOpcode =
3537 Command->V1.CommandMailbox.Common.CommandOpcode;
3538 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3539
3540 if (CommandType == DAC960_ReadCommand ||
3541 CommandType == DAC960_WriteCommand)
3542 {
3543
3544#ifdef FORCE_RETRY_DEBUG
3545 CommandStatus = DAC960_V1_IrrecoverableDataError;
3546#endif
3547
3548 if (CommandStatus == DAC960_V1_NormalCompletion) {
3549
3550 if (!DAC960_ProcessCompletedRequest(Command, true))
3551 BUG();
3552
3553 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3554 CommandStatus == DAC960_V1_BadDataEncountered)
3555 {
3556 /*
3557 * break the command down into pieces and resubmit each
3558 * piece, hoping that some of them will succeed.
3559 */
3560 DAC960_queue_partial_rw(Command);
3561 return;
3562 }
3563 else
3564 {
3565 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3566 DAC960_V1_ReadWriteError(Command);
3567
3568 if (!DAC960_ProcessCompletedRequest(Command, false))
3569 BUG();
3570 }
3571 }
3572 else if (CommandType == DAC960_ReadRetryCommand ||
3573 CommandType == DAC960_WriteRetryCommand)
3574 {
87d156bf 3575 bool normal_completion;
1da177e4
LT		 3576#ifdef FORCE_RETRY_FAILURE_DEBUG
3577 static int retry_count = 1;
3578#endif
3579 /*
3580 Perform completion processing for the portion that was
3581 retried, and submit the next portion, if any.
3582 */
3583 normal_completion = true;
3584 if (CommandStatus != DAC960_V1_NormalCompletion) {
3585 normal_completion = false;
3586 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3587 DAC960_V1_ReadWriteError(Command);
3588 }
3589
3590#ifdef FORCE_RETRY_FAILURE_DEBUG
3591 if (!(++retry_count % 10000)) {
3592 printk("V1 error retry failure test\n");
3593 normal_completion = false;
3594 DAC960_V1_ReadWriteError(Command);
3595 }
3596#endif
3597
3598 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3599 DAC960_queue_partial_rw(Command);
3600 return;
3601 }
3602 }
3603
3604 else if (CommandType == DAC960_MonitoringCommand)
3605 {
3606 if (Controller->ShutdownMonitoringTimer)
3607 return;
3608 if (CommandOpcode == DAC960_V1_Enquiry)
3609 {
3610 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3611 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3612 unsigned int OldCriticalLogicalDriveCount =
3613 OldEnquiry->CriticalLogicalDriveCount;
3614 unsigned int NewCriticalLogicalDriveCount =
3615 NewEnquiry->CriticalLogicalDriveCount;
3616 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3617 {
3618 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3619 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3620 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3621 "Now Exists\n", Controller,
3622 LogicalDriveNumber,
3623 Controller->ControllerNumber,
3624 LogicalDriveNumber);
3625 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3626 DAC960_ComputeGenericDiskInfo(Controller);
3627 }
3628 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3629 {
3630 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3631 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3632 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3633 "No Longer Exists\n", Controller,
3634 LogicalDriveNumber,
3635 Controller->ControllerNumber,
3636 LogicalDriveNumber);
3637 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3638 DAC960_ComputeGenericDiskInfo(Controller);
3639 }
3640 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3641 OldEnquiry->StatusFlags.DeferredWriteError)
3642 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3643 (NewEnquiry->StatusFlags.DeferredWriteError
3644 ? "TRUE" : "FALSE"));
3645 if ((NewCriticalLogicalDriveCount > 0 ||
3646 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3647 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3648 NewEnquiry->OfflineLogicalDriveCount !=
3649 OldEnquiry->OfflineLogicalDriveCount) ||
3650 (NewEnquiry->DeadDriveCount > 0 ||
3651 NewEnquiry->DeadDriveCount !=
3652 OldEnquiry->DeadDriveCount) ||
3653 (NewEnquiry->EventLogSequenceNumber !=
3654 OldEnquiry->EventLogSequenceNumber) ||
3655 Controller->MonitoringTimerCount == 0 ||
50297cbf
MFP		 3656 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3657 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 3658 {
3659 Controller->V1.NeedLogicalDriveInformation = true;
3660 Controller->V1.NewEventLogSequenceNumber =
3661 NewEnquiry->EventLogSequenceNumber;
3662 Controller->V1.NeedErrorTableInformation = true;
3663 Controller->V1.NeedDeviceStateInformation = true;
3664 Controller->V1.StartDeviceStateScan = true;
3665 Controller->V1.NeedBackgroundInitializationStatus =
3666 Controller->V1.BackgroundInitializationStatusSupported;
3667 Controller->SecondaryMonitoringTime = jiffies;
3668 }
3669 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3670 NewEnquiry->RebuildFlag
3671 == DAC960_V1_BackgroundRebuildInProgress ||
3672 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3673 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3674 {
3675 Controller->V1.NeedRebuildProgress = true;
3676 Controller->V1.RebuildProgressFirst =
3677 (NewEnquiry->CriticalLogicalDriveCount <
3678 OldEnquiry->CriticalLogicalDriveCount);
3679 }
3680 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3681 switch (NewEnquiry->RebuildFlag)
3682 {
3683 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3684 DAC960_Progress("Consistency Check Completed Successfully\n",
3685 Controller);
3686 break;
3687 case DAC960_V1_StandbyRebuildInProgress:
3688 case DAC960_V1_BackgroundRebuildInProgress:
3689 break;
3690 case DAC960_V1_BackgroundCheckInProgress:
3691 Controller->V1.NeedConsistencyCheckProgress = true;
3692 break;
3693 case DAC960_V1_StandbyRebuildCompletedWithError:
3694 DAC960_Progress("Consistency Check Completed with Error\n",
3695 Controller);
3696 break;
3697 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3698 DAC960_Progress("Consistency Check Failed - "
3699 "Physical Device Failed\n", Controller);
3700 break;
3701 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3702 DAC960_Progress("Consistency Check Failed - "
3703 "Logical Drive Failed\n", Controller);
3704 break;
3705 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3706 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3707 Controller);
3708 break;
3709 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3710 DAC960_Progress("Consistency Check Successfully Terminated\n",
3711 Controller);
3712 break;
3713 }
3714 else if (NewEnquiry->RebuildFlag
3715 == DAC960_V1_BackgroundCheckInProgress)
3716 Controller->V1.NeedConsistencyCheckProgress = true;
3717 Controller->MonitoringAlertMode =
3718 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3719 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3720 NewEnquiry->DeadDriveCount > 0);
3721 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3722 {
3723 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3724 Controller->V1.RebuildFlagPending = true;
3725 }
3726 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3727 sizeof(DAC960_V1_Enquiry_T));
3728 }
3729 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3730 {
3731 static char
3732 *DAC960_EventMessages[] =
3733 { "killed because write recovery failed",
3734 "killed because of SCSI bus reset failure",
3735 "killed because of double check condition",
3736 "killed because it was removed",
3737 "killed because of gross error on SCSI chip",
3738 "killed because of bad tag returned from drive",
3739 "killed because of timeout on SCSI command",
3740 "killed because of reset SCSI command issued from system",
3741 "killed because busy or parity error count exceeded limit",
3742 "killed because of 'kill drive' command from system",
3743 "killed because of selection timeout",
3744 "killed due to SCSI phase sequence error",
3745 "killed due to unknown status" };
3746 DAC960_V1_EventLogEntry_T *EventLogEntry =
3747 Controller->V1.EventLogEntry;
3748 if (EventLogEntry->SequenceNumber ==
3749 Controller->V1.OldEventLogSequenceNumber)
3750 {
3751 unsigned char SenseKey = EventLogEntry->SenseKey;
3752 unsigned char AdditionalSenseCode =
3753 EventLogEntry->AdditionalSenseCode;
3754 unsigned char AdditionalSenseCodeQualifier =
3755 EventLogEntry->AdditionalSenseCodeQualifier;
3756 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3757 AdditionalSenseCode == 0x80 &&
3758 AdditionalSenseCodeQualifier <
945f390f 3759 ARRAY_SIZE(DAC960_EventMessages))
1da177e4
LT		 3760 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3761 EventLogEntry->Channel,
3762 EventLogEntry->TargetID,
3763 DAC960_EventMessages[
3764 AdditionalSenseCodeQualifier]);
3765 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3766 AdditionalSenseCode == 0x29)
3767 {
3768 if (Controller->MonitoringTimerCount > 0)
3769 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3770 [EventLogEntry->TargetID]++;
3771 }
3772 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3773 (SenseKey == DAC960_SenseKey_NotReady &&
3774 AdditionalSenseCode == 0x04 &&
3775 (AdditionalSenseCodeQualifier == 0x01 ||
3776 AdditionalSenseCodeQualifier == 0x02))))
3777 {
3778 DAC960_Critical("Physical Device %d:%d Error Log: "
3779 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3780 Controller,
3781 EventLogEntry->Channel,
3782 EventLogEntry->TargetID,
3783 SenseKey,
3784 AdditionalSenseCode,
3785 AdditionalSenseCodeQualifier);
3786 DAC960_Critical("Physical Device %d:%d Error Log: "
3787 "Information = %02X%02X%02X%02X "
3788 "%02X%02X%02X%02X\n",
3789 Controller,
3790 EventLogEntry->Channel,
3791 EventLogEntry->TargetID,
3792 EventLogEntry->Information[0],
3793 EventLogEntry->Information[1],
3794 EventLogEntry->Information[2],
3795 EventLogEntry->Information[3],
3796 EventLogEntry->CommandSpecificInformation[0],
3797 EventLogEntry->CommandSpecificInformation[1],
3798 EventLogEntry->CommandSpecificInformation[2],
3799 EventLogEntry->CommandSpecificInformation[3]);
3800 }
3801 }
3802 Controller->V1.OldEventLogSequenceNumber++;
3803 }
3804 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3805 {
3806 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3807 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3808 int Channel, TargetID;
3809 for (Channel = 0; Channel < Controller->Channels; Channel++)
3810 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3811 {
3812 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3813 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3814 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3815 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3816 if ((NewErrorEntry->ParityErrorCount !=
3817 OldErrorEntry->ParityErrorCount) ||
3818 (NewErrorEntry->SoftErrorCount !=
3819 OldErrorEntry->SoftErrorCount) ||
3820 (NewErrorEntry->HardErrorCount !=
3821 OldErrorEntry->HardErrorCount) ||
3822 (NewErrorEntry->MiscErrorCount !=
3823 OldErrorEntry->MiscErrorCount))
3824 DAC960_Critical("Physical Device %d:%d Errors: "
3825 "Parity = %d, Soft = %d, "
3826 "Hard = %d, Misc = %d\n",
3827 Controller, Channel, TargetID,
3828 NewErrorEntry->ParityErrorCount,
3829 NewErrorEntry->SoftErrorCount,
3830 NewErrorEntry->HardErrorCount,
3831 NewErrorEntry->MiscErrorCount);
3832 }
3833 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3834 sizeof(DAC960_V1_ErrorTable_T));
3835 }
3836 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3837 {
3838 DAC960_V1_DeviceState_T *OldDeviceState =
3839 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3840 [Controller->V1.DeviceStateTargetID];
3841 DAC960_V1_DeviceState_T *NewDeviceState =
3842 Controller->V1.NewDeviceState;
3843 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3844 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3845 Controller->V1.DeviceStateChannel,
3846 Controller->V1.DeviceStateTargetID,
3847 (NewDeviceState->DeviceState
3848 == DAC960_V1_Device_Dead
3849 ? "DEAD"
3850 : NewDeviceState->DeviceState
3851 == DAC960_V1_Device_WriteOnly
3852 ? "WRITE-ONLY"
3853 : NewDeviceState->DeviceState
3854 == DAC960_V1_Device_Online
3855 ? "ONLINE" : "STANDBY"));
3856 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3857 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3858 {
3859 Controller->V1.NeedDeviceInquiryInformation = true;
3860 Controller->V1.NeedDeviceSerialNumberInformation = true;
3861 Controller->V1.DeviceResetCount
3862 [Controller->V1.DeviceStateChannel]
3863 [Controller->V1.DeviceStateTargetID] = 0;
3864 }
3865 memcpy(OldDeviceState, NewDeviceState,
3866 sizeof(DAC960_V1_DeviceState_T));
3867 }
3868 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3869 {
3870 int LogicalDriveNumber;
3871 for (LogicalDriveNumber = 0;
3872 LogicalDriveNumber < Controller->LogicalDriveCount;
3873 LogicalDriveNumber++)
3874 {
3875 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3876 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3877 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3878 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3879 if (NewLogicalDriveInformation->LogicalDriveState !=
3880 OldLogicalDriveInformation->LogicalDriveState)
3881 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3882 "is now %s\n", Controller,
3883 LogicalDriveNumber,
3884 Controller->ControllerNumber,
3885 LogicalDriveNumber,
3886 (NewLogicalDriveInformation->LogicalDriveState
3887 == DAC960_V1_LogicalDrive_Online
3888 ? "ONLINE"
3889 : NewLogicalDriveInformation->LogicalDriveState
3890 == DAC960_V1_LogicalDrive_Critical
3891 ? "CRITICAL" : "OFFLINE"));
3892 if (NewLogicalDriveInformation->WriteBack !=
3893 OldLogicalDriveInformation->WriteBack)
3894 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3895 "is now %s\n", Controller,
3896 LogicalDriveNumber,
3897 Controller->ControllerNumber,
3898 LogicalDriveNumber,
3899 (NewLogicalDriveInformation->WriteBack
3900 ? "WRITE BACK" : "WRITE THRU"));
3901 }
3902 memcpy(&Controller->V1.LogicalDriveInformation,
3903 Controller->V1.NewLogicalDriveInformation,
3904 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3905 }
3906 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3907 {
3908 unsigned int LogicalDriveNumber =
3909 Controller->V1.RebuildProgress->LogicalDriveNumber;
3910 unsigned int LogicalDriveSize =
3911 Controller->V1.RebuildProgress->LogicalDriveSize;
3912 unsigned int BlocksCompleted =
3913 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3914 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3915 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3916 CommandStatus = DAC960_V1_RebuildSuccessful;
3917 switch (CommandStatus)
3918 {
3919 case DAC960_V1_NormalCompletion:
3920 Controller->EphemeralProgressMessage = true;
3921 DAC960_Progress("Rebuild in Progress: "
3922 "Logical Drive %d (/dev/rd/c%dd%d) "
3923 "%d%% completed\n",
3924 Controller, LogicalDriveNumber,
3925 Controller->ControllerNumber,
3926 LogicalDriveNumber,
3927 (100 * (BlocksCompleted >> 7))
3928 / (LogicalDriveSize >> 7));
3929 Controller->EphemeralProgressMessage = false;
3930 break;
3931 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3932 DAC960_Progress("Rebuild Failed due to "
3933 "Logical Drive Failure\n", Controller);
3934 break;
3935 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3936 DAC960_Progress("Rebuild Failed due to "
3937 "Bad Blocks on Other Drives\n", Controller);
3938 break;
3939 case DAC960_V1_RebuildFailed_NewDriveFailed:
3940 DAC960_Progress("Rebuild Failed due to "
3941 "Failure of Drive Being Rebuilt\n", Controller);
3942 break;
3943 case DAC960_V1_NoRebuildOrCheckInProgress:
3944 break;
3945 case DAC960_V1_RebuildSuccessful:
3946 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3947 break;
3948 case DAC960_V1_RebuildSuccessfullyTerminated:
3949 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3950 break;
3951 }
3952 Controller->V1.LastRebuildStatus = CommandStatus;
3953 if (CommandType != DAC960_MonitoringCommand &&
3954 Controller->V1.RebuildStatusPending)
3955 {
3956 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3957 Controller->V1.RebuildStatusPending = false;
3958 }
3959 else if (CommandType == DAC960_MonitoringCommand &&
3960 CommandStatus != DAC960_V1_NormalCompletion &&
3961 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3962 {
3963 Controller->V1.PendingRebuildStatus = CommandStatus;
3964 Controller->V1.RebuildStatusPending = true;
3965 }
3966 }
3967 else if (CommandOpcode == DAC960_V1_RebuildStat)
3968 {
3969 unsigned int LogicalDriveNumber =
3970 Controller->V1.RebuildProgress->LogicalDriveNumber;
3971 unsigned int LogicalDriveSize =
3972 Controller->V1.RebuildProgress->LogicalDriveSize;
3973 unsigned int BlocksCompleted =
3974 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3975 if (CommandStatus == DAC960_V1_NormalCompletion)
3976 {
3977 Controller->EphemeralProgressMessage = true;
3978 DAC960_Progress("Consistency Check in Progress: "
3979 "Logical Drive %d (/dev/rd/c%dd%d) "
3980 "%d%% completed\n",
3981 Controller, LogicalDriveNumber,
3982 Controller->ControllerNumber,
3983 LogicalDriveNumber,
3984 (100 * (BlocksCompleted >> 7))
3985 / (LogicalDriveSize >> 7));
3986 Controller->EphemeralProgressMessage = false;
3987 }
3988 }
3989 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3990 {
3991 unsigned int LogicalDriveNumber =
3992 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
3993 unsigned int LogicalDriveSize =
3994 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
3995 unsigned int BlocksCompleted =
3996 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
3997 switch (CommandStatus)
3998 {
3999 case DAC960_V1_NormalCompletion:
4000 switch (Controller->V1.BackgroundInitializationStatus->Status)
4001 {
4002 case DAC960_V1_BackgroundInitializationInvalid:
4003 break;
4004 case DAC960_V1_BackgroundInitializationStarted:
4005 DAC960_Progress("Background Initialization Started\n",
4006 Controller);
4007 break;
4008 case DAC960_V1_BackgroundInitializationInProgress:
4009 if (BlocksCompleted ==
4010 Controller->V1.LastBackgroundInitializationStatus.
4011 BlocksCompleted &&
4012 LogicalDriveNumber ==
4013 Controller->V1.LastBackgroundInitializationStatus.
4014 LogicalDriveNumber)
4015 break;
4016 Controller->EphemeralProgressMessage = true;
4017 DAC960_Progress("Background Initialization in Progress: "
4018 "Logical Drive %d (/dev/rd/c%dd%d) "
4019 "%d%% completed\n",
4020 Controller, LogicalDriveNumber,
4021 Controller->ControllerNumber,
4022 LogicalDriveNumber,
4023 (100 * (BlocksCompleted >> 7))
4024 / (LogicalDriveSize >> 7));
4025 Controller->EphemeralProgressMessage = false;
4026 break;
4027 case DAC960_V1_BackgroundInitializationSuspended:
4028 DAC960_Progress("Background Initialization Suspended\n",
4029 Controller);
4030 break;
4031 case DAC960_V1_BackgroundInitializationCancelled:
4032 DAC960_Progress("Background Initialization Cancelled\n",
4033 Controller);
4034 break;
4035 }
4036 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4037 Controller->V1.BackgroundInitializationStatus,
4038 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4039 break;
4040 case DAC960_V1_BackgroundInitSuccessful:
4041 if (Controller->V1.BackgroundInitializationStatus->Status ==
4042 DAC960_V1_BackgroundInitializationInProgress)
4043 DAC960_Progress("Background Initialization "
4044 "Completed Successfully\n", Controller);
4045 Controller->V1.BackgroundInitializationStatus->Status =
4046 DAC960_V1_BackgroundInitializationInvalid;
4047 break;
4048 case DAC960_V1_BackgroundInitAborted:
4049 if (Controller->V1.BackgroundInitializationStatus->Status ==
4050 DAC960_V1_BackgroundInitializationInProgress)
4051 DAC960_Progress("Background Initialization Aborted\n",
4052 Controller);
4053 Controller->V1.BackgroundInitializationStatus->Status =
4054 DAC960_V1_BackgroundInitializationInvalid;
4055 break;
4056 case DAC960_V1_NoBackgroundInitInProgress:
4057 break;
4058 }
4059 }
4060 else if (CommandOpcode == DAC960_V1_DCDB)
4061 {
4062 /*
4063 This is a bit ugly.
4064
4065 The InquiryStandardData and
4066 the InquiryUntitSerialNumber information
4067 retrieval operations BOTH use the DAC960_V1_DCDB
4068 commands. the test above can't distinguish between
4069 these two cases.
4070
4071 Instead, we rely on the order of code later in this
4072 function to ensure that DeviceInquiryInformation commands
4073 are submitted before DeviceSerialNumber commands.
4074 */
4075 if (Controller->V1.NeedDeviceInquiryInformation)
4076 {
4077 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4078 &Controller->V1.InquiryStandardData
4079 [Controller->V1.DeviceStateChannel]
4080 [Controller->V1.DeviceStateTargetID];
4081 if (CommandStatus != DAC960_V1_NormalCompletion)
4082 {
4083 memset(InquiryStandardData, 0,
4084 sizeof(DAC960_SCSI_Inquiry_T));
4085 InquiryStandardData->PeripheralDeviceType = 0x1F;
4086 }
4087 else
4088 memcpy(InquiryStandardData,
4089 Controller->V1.NewInquiryStandardData,
4090 sizeof(DAC960_SCSI_Inquiry_T));
4091 Controller->V1.NeedDeviceInquiryInformation = false;
4092 }
4093 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4094 {
4095 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4096 &Controller->V1.InquiryUnitSerialNumber
4097 [Controller->V1.DeviceStateChannel]
4098 [Controller->V1.DeviceStateTargetID];
4099 if (CommandStatus != DAC960_V1_NormalCompletion)
4100 {
4101 memset(InquiryUnitSerialNumber, 0,
4102 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4103 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4104 }
4105 else
4106 memcpy(InquiryUnitSerialNumber,
4107 Controller->V1.NewInquiryUnitSerialNumber,
4108 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4109 Controller->V1.NeedDeviceSerialNumberInformation = false;
4110 }
4111 }
4112 /*
4113 Begin submitting new monitoring commands.
4114 */
4115 if (Controller->V1.NewEventLogSequenceNumber
4116 - Controller->V1.OldEventLogSequenceNumber > 0)
4117 {
4118 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4119 DAC960_V1_PerformEventLogOperation;
4120 Command->V1.CommandMailbox.Type3E.OperationType =
4121 DAC960_V1_GetEventLogEntry;
4122 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4123 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4124 Controller->V1.OldEventLogSequenceNumber;
4125 Command->V1.CommandMailbox.Type3E.BusAddress =
4126 Controller->V1.EventLogEntryDMA;
4127 DAC960_QueueCommand(Command);
4128 return;
4129 }
4130 if (Controller->V1.NeedErrorTableInformation)
4131 {
4132 Controller->V1.NeedErrorTableInformation = false;
4133 Command->V1.CommandMailbox.Type3.CommandOpcode =
4134 DAC960_V1_GetErrorTable;
4135 Command->V1.CommandMailbox.Type3.BusAddress =
4136 Controller->V1.NewErrorTableDMA;
4137 DAC960_QueueCommand(Command);
4138 return;
4139 }
4140 if (Controller->V1.NeedRebuildProgress &&
4141 Controller->V1.RebuildProgressFirst)
4142 {
4143 Controller->V1.NeedRebuildProgress = false;
4144 Command->V1.CommandMailbox.Type3.CommandOpcode =
4145 DAC960_V1_GetRebuildProgress;
4146 Command->V1.CommandMailbox.Type3.BusAddress =
4147 Controller->V1.RebuildProgressDMA;
4148 DAC960_QueueCommand(Command);
4149 return;
4150 }
4151 if (Controller->V1.NeedDeviceStateInformation)
4152 {
4153 if (Controller->V1.NeedDeviceInquiryInformation)
4154 {
4155 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4156 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4157
4158 dma_addr_t NewInquiryStandardDataDMA =
4159 Controller->V1.NewInquiryStandardDataDMA;
4160
4161 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4162 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4163 DCDB->Channel = Controller->V1.DeviceStateChannel;
4164 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4165 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4166 DCDB->EarlyStatus = false;
4167 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4168 DCDB->NoAutomaticRequestSense = false;
4169 DCDB->DisconnectPermitted = true;
4170 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4171 DCDB->BusAddress = NewInquiryStandardDataDMA;
4172 DCDB->CDBLength = 6;
4173 DCDB->TransferLengthHigh4 = 0;
4174 DCDB->SenseLength = sizeof(DCDB->SenseData);
4175 DCDB->CDB[0] = 0x12; /* INQUIRY */
4176 DCDB->CDB[1] = 0; /* EVPD = 0 */
4177 DCDB->CDB[2] = 0; /* Page Code */
4178 DCDB->CDB[3] = 0; /* Reserved */
4179 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4180 DCDB->CDB[5] = 0; /* Control */
4181 DAC960_QueueCommand(Command);
4182 return;
4183 }
4184 if (Controller->V1.NeedDeviceSerialNumberInformation)
4185 {
4186 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4187 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4188 dma_addr_t NewInquiryUnitSerialNumberDMA =
4189 Controller->V1.NewInquiryUnitSerialNumberDMA;
4190
4191 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4192 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4193 DCDB->Channel = Controller->V1.DeviceStateChannel;
4194 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4195 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4196 DCDB->EarlyStatus = false;
4197 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4198 DCDB->NoAutomaticRequestSense = false;
4199 DCDB->DisconnectPermitted = true;
4200 DCDB->TransferLength =
4201 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4202 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4203 DCDB->CDBLength = 6;
4204 DCDB->TransferLengthHigh4 = 0;
4205 DCDB->SenseLength = sizeof(DCDB->SenseData);
4206 DCDB->CDB[0] = 0x12; /* INQUIRY */
4207 DCDB->CDB[1] = 1; /* EVPD = 1 */
4208 DCDB->CDB[2] = 0x80; /* Page Code */
4209 DCDB->CDB[3] = 0; /* Reserved */
4210 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4211 DCDB->CDB[5] = 0; /* Control */
4212 DAC960_QueueCommand(Command);
4213 return;
4214 }
4215 if (Controller->V1.StartDeviceStateScan)
4216 {
4217 Controller->V1.DeviceStateChannel = 0;
4218 Controller->V1.DeviceStateTargetID = 0;
4219 Controller->V1.StartDeviceStateScan = false;
4220 }
4221 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4222 {
4223 Controller->V1.DeviceStateChannel++;
4224 Controller->V1.DeviceStateTargetID = 0;
4225 }
4226 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4227 {
4228 Controller->V1.NewDeviceState->DeviceState =
4229 DAC960_V1_Device_Dead;
4230 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4231 DAC960_V1_GetDeviceState;
4232 Command->V1.CommandMailbox.Type3D.Channel =
4233 Controller->V1.DeviceStateChannel;
4234 Command->V1.CommandMailbox.Type3D.TargetID =
4235 Controller->V1.DeviceStateTargetID;
4236 Command->V1.CommandMailbox.Type3D.BusAddress =
4237 Controller->V1.NewDeviceStateDMA;
4238 DAC960_QueueCommand(Command);
4239 return;
4240 }
4241 Controller->V1.NeedDeviceStateInformation = false;
4242 }
4243 if (Controller->V1.NeedLogicalDriveInformation)
4244 {
4245 Controller->V1.NeedLogicalDriveInformation = false;
4246 Command->V1.CommandMailbox.Type3.CommandOpcode =
4247 DAC960_V1_GetLogicalDriveInformation;
4248 Command->V1.CommandMailbox.Type3.BusAddress =
4249 Controller->V1.NewLogicalDriveInformationDMA;
4250 DAC960_QueueCommand(Command);
4251 return;
4252 }
4253 if (Controller->V1.NeedRebuildProgress)
4254 {
4255 Controller->V1.NeedRebuildProgress = false;
4256 Command->V1.CommandMailbox.Type3.CommandOpcode =
4257 DAC960_V1_GetRebuildProgress;
4258 Command->V1.CommandMailbox.Type3.BusAddress =
4259 Controller->V1.RebuildProgressDMA;
4260 DAC960_QueueCommand(Command);
4261 return;
4262 }
4263 if (Controller->V1.NeedConsistencyCheckProgress)
4264 {
4265 Controller->V1.NeedConsistencyCheckProgress = false;
4266 Command->V1.CommandMailbox.Type3.CommandOpcode =
4267 DAC960_V1_RebuildStat;
4268 Command->V1.CommandMailbox.Type3.BusAddress =
4269 Controller->V1.RebuildProgressDMA;
4270 DAC960_QueueCommand(Command);
4271 return;
4272 }
4273 if (Controller->V1.NeedBackgroundInitializationStatus)
4274 {
4275 Controller->V1.NeedBackgroundInitializationStatus = false;
4276 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4277 DAC960_V1_BackgroundInitializationControl;
4278 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4279 Command->V1.CommandMailbox.Type3B.BusAddress =
4280 Controller->V1.BackgroundInitializationStatusDMA;
4281 DAC960_QueueCommand(Command);
4282 return;
4283 }
4284 Controller->MonitoringTimerCount++;
4285 Controller->MonitoringTimer.expires =
4286 jiffies + DAC960_MonitoringTimerInterval;
4287 add_timer(&Controller->MonitoringTimer);
4288 }
4289 if (CommandType == DAC960_ImmediateCommand)
4290 {
4291 complete(Command->Completion);
4292 Command->Completion = NULL;
4293 return;
4294 }
4295 if (CommandType == DAC960_QueuedCommand)
4296 {
4297 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4298 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4299 Command->V1.KernelCommand = NULL;
4300 if (CommandOpcode == DAC960_V1_DCDB)
4301 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4302 [KernelCommand->DCDB->TargetID] =
4303 false;
4304 DAC960_DeallocateCommand(Command);
4305 KernelCommand->CompletionFunction(KernelCommand);
4306 return;
4307 }
4308 /*
4309 Queue a Status Monitoring Command to the Controller using the just
4310 completed Command if one was deferred previously due to lack of a
4311 free Command when the Monitoring Timer Function was called.
4312 */
4313 if (Controller->MonitoringCommandDeferred)
4314 {
4315 Controller->MonitoringCommandDeferred = false;
4316 DAC960_V1_QueueMonitoringCommand(Command);
4317 return;
4318 }
4319 /*
4320 Deallocate the Command.
4321 */
4322 DAC960_DeallocateCommand(Command);
4323 /*
4324 Wake up any processes waiting on a free Command.
4325 */
4326 wake_up(&Controller->CommandWaitQueue);
4327}
4328
4329
4330/*
4331 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4332 when an error occurs on a Read or Write operation.
4333*/
4334
4335static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4336{
4337 DAC960_Controller_T *Controller = Command->Controller;
4338 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4339 "NOT READY", "MEDIUM ERROR",
4340 "HARDWARE ERROR", "ILLEGAL REQUEST",
4341 "UNIT ATTENTION", "DATA PROTECT",
4342 "BLANK CHECK", "VENDOR-SPECIFIC",
4343 "COPY ABORTED", "ABORTED COMMAND",
4344 "EQUAL", "VOLUME OVERFLOW",
4345 "MISCOMPARE", "RESERVED" };
4346 unsigned char *CommandName = "UNKNOWN";
4347 switch (Command->CommandType)
4348 {
4349 case DAC960_ReadCommand:
4350 case DAC960_ReadRetryCommand:
4351 CommandName = "READ";
4352 break;
4353 case DAC960_WriteCommand:
4354 case DAC960_WriteRetryCommand:
4355 CommandName = "WRITE";
4356 break;
4357 case DAC960_MonitoringCommand:
4358 case DAC960_ImmediateCommand:
4359 case DAC960_QueuedCommand:
4360 break;
4361 }
4362 DAC960_Error("Error Condition %s on %s:\n", Controller,
4363 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4364 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4365 Controller, Controller->ControllerNumber,
4366 Command->LogicalDriveNumber, Command->BlockNumber,
4367 Command->BlockNumber + Command->BlockCount - 1);
4368}
4369
4370
4371/*
4372 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4373 occurs.
4374*/
4375
4376static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4377 DAC960_V2_Event_T *Event)
4378{
4379 DAC960_SCSI_RequestSense_T *RequestSense =
4380 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4381 unsigned char MessageBuffer[DAC960_LineBufferSize];
4382 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4383 { /* Physical Device Events (0x0000 - 0x007F) */
4384 { 0x0001, "P Online" },
4385 { 0x0002, "P Standby" },
4386 { 0x0005, "P Automatic Rebuild Started" },
4387 { 0x0006, "P Manual Rebuild Started" },
4388 { 0x0007, "P Rebuild Completed" },
4389 { 0x0008, "P Rebuild Cancelled" },
4390 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4391 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4392 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4393 { 0x000C, "S Offline" },
4394 { 0x000D, "P Found" },
4395 { 0x000E, "P Removed" },
4396 { 0x000F, "P Unconfigured" },
4397 { 0x0010, "P Expand Capacity Started" },
4398 { 0x0011, "P Expand Capacity Completed" },
4399 { 0x0012, "P Expand Capacity Failed" },
4400 { 0x0013, "P Command Timed Out" },
4401 { 0x0014, "P Command Aborted" },
4402 { 0x0015, "P Command Retried" },
4403 { 0x0016, "P Parity Error" },
4404 { 0x0017, "P Soft Error" },
4405 { 0x0018, "P Miscellaneous Error" },
4406 { 0x0019, "P Reset" },
4407 { 0x001A, "P Active Spare Found" },
4408 { 0x001B, "P Warm Spare Found" },
4409 { 0x001C, "S Sense Data Received" },
4410 { 0x001D, "P Initialization Started" },
4411 { 0x001E, "P Initialization Completed" },
4412 { 0x001F, "P Initialization Failed" },
4413 { 0x0020, "P Initialization Cancelled" },
4414 { 0x0021, "P Failed because Write Recovery Failed" },
4415 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4416 { 0x0023, "P Failed because of Double Check Condition" },
4417 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4418 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4419 { 0x0026, "P Failed because of Bad Tag from Device" },
4420 { 0x0027, "P Failed because of Command Timeout" },
4421 { 0x0028, "P Failed because of System Reset" },
4422 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4423 { 0x002A, "P Failed because Host Set Device to Failed State" },
4424 { 0x002B, "P Failed because of Selection Timeout" },
4425 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4426 { 0x002D, "P Failed because Device Returned Unknown Status" },
4427 { 0x002E, "P Failed because Device Not Ready" },
4428 { 0x002F, "P Failed because Device Not Found at Startup" },
4429 { 0x0030, "P Failed because COD Write Operation Failed" },
4430 { 0x0031, "P Failed because BDT Write Operation Failed" },
4431 { 0x0039, "P Missing at Startup" },
4432 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4433 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4434 { 0x003D, "P Standby Rebuild Started" },
4435 /* Logical Device Events (0x0080 - 0x00FF) */
4436 { 0x0080, "M Consistency Check Started" },
4437 { 0x0081, "M Consistency Check Completed" },
4438 { 0x0082, "M Consistency Check Cancelled" },
4439 { 0x0083, "M Consistency Check Completed With Errors" },
4440 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4441 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4442 { 0x0086, "L Offline" },
4443 { 0x0087, "L Critical" },
4444 { 0x0088, "L Online" },
4445 { 0x0089, "M Automatic Rebuild Started" },
4446 { 0x008A, "M Manual Rebuild Started" },
4447 { 0x008B, "M Rebuild Completed" },
4448 { 0x008C, "M Rebuild Cancelled" },
4449 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4450 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4451 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4452 { 0x0090, "M Initialization Started" },
4453 { 0x0091, "M Initialization Completed" },
4454 { 0x0092, "M Initialization Cancelled" },
4455 { 0x0093, "M Initialization Failed" },
4456 { 0x0094, "L Found" },
4457 { 0x0095, "L Deleted" },
4458 { 0x0096, "M Expand Capacity Started" },
4459 { 0x0097, "M Expand Capacity Completed" },
4460 { 0x0098, "M Expand Capacity Failed" },
4461 { 0x0099, "L Bad Block Found" },
4462 { 0x009A, "L Size Changed" },
4463 { 0x009B, "L Type Changed" },
4464 { 0x009C, "L Bad Data Block Found" },
4465 { 0x009E, "L Read of Data Block in BDT" },
4466 { 0x009F, "L Write Back Data for Disk Block Lost" },
4467 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4468 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4469 { 0x00A2, "L Standby Rebuild Started" },
4470 /* Fault Management Events (0x0100 - 0x017F) */
4471 { 0x0140, "E Fan %d Failed" },
4472 { 0x0141, "E Fan %d OK" },
4473 { 0x0142, "E Fan %d Not Present" },
4474 { 0x0143, "E Power Supply %d Failed" },
4475 { 0x0144, "E Power Supply %d OK" },
4476 { 0x0145, "E Power Supply %d Not Present" },
4477 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4478 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4479 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4480 { 0x0149, "E Temperature Sensor %d Not Present" },
4481 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4482 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4483 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4484 /* Controller Events (0x0180 - 0x01FF) */
4485 { 0x0181, "C Cache Write Back Error" },
4486 { 0x0188, "C Battery Backup Unit Found" },
4487 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4488 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4489 { 0x0193, "C Installation Aborted" },
4490 { 0x0195, "C Battery Backup Unit Physically Removed" },
4491 { 0x0196, "C Memory Error During Warm Boot" },
4492 { 0x019E, "C Memory Soft ECC Error Corrected" },
4493 { 0x019F, "C Memory Hard ECC Error Corrected" },
4494 { 0x01A2, "C Battery Backup Unit Failed" },
4495 { 0x01AB, "C Mirror Race Recovery Failed" },
4496 { 0x01AC, "C Mirror Race on Critical Drive" },
4497 /* Controller Internal Processor Events */
4498 { 0x0380, "C Internal Controller Hung" },
4499 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4500 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4501 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4502 { 0, "" } };
4503 int EventListIndex = 0, EventCode;
4504 unsigned char EventType, *EventMessage;
4505 if (Event->EventCode == 0x1C &&
4506 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4507 (RequestSense->AdditionalSenseCode == 0x80 ||
4508 RequestSense->AdditionalSenseCode == 0x81))
4509 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4510 RequestSense->AdditionalSenseCodeQualifier;
4511 while (true)
4512 {
4513 EventCode = EventList[EventListIndex].EventCode;
4514 if (EventCode == Event->EventCode || EventCode == 0) break;
4515 EventListIndex++;
4516 }
4517 EventType = EventList[EventListIndex].EventMessage[0];
4518 EventMessage = &EventList[EventListIndex].EventMessage[2];
4519 if (EventCode == 0)
4520 {
4521 DAC960_Critical("Unknown Controller Event Code %04X\n",
4522 Controller, Event->EventCode);
4523 return;
4524 }
4525 switch (EventType)
4526 {
4527 case 'P':
4528 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4529 Event->Channel, Event->TargetID, EventMessage);
4530 break;
4531 case 'L':
4532 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4533 Event->LogicalUnit, Controller->ControllerNumber,
4534 Event->LogicalUnit, EventMessage);
4535 break;
4536 case 'M':
4537 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4538 Event->LogicalUnit, Controller->ControllerNumber,
4539 Event->LogicalUnit, EventMessage);
4540 break;
4541 case 'S':
4542 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4543 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4544 RequestSense->AdditionalSenseCode == 0x04 &&
4545 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4546 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4547 break;
4548 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4549 Event->Channel, Event->TargetID, EventMessage);
4550 DAC960_Critical("Physical Device %d:%d Request Sense: "
4551 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4552 Controller,
4553 Event->Channel,
4554 Event->TargetID,
4555 RequestSense->SenseKey,
4556 RequestSense->AdditionalSenseCode,
4557 RequestSense->AdditionalSenseCodeQualifier);
4558 DAC960_Critical("Physical Device %d:%d Request Sense: "
4559 "Information = %02X%02X%02X%02X "
4560 "%02X%02X%02X%02X\n",
4561 Controller,
4562 Event->Channel,
4563 Event->TargetID,
4564 RequestSense->Information[0],
4565 RequestSense->Information[1],
4566 RequestSense->Information[2],
4567 RequestSense->Information[3],
4568 RequestSense->CommandSpecificInformation[0],
4569 RequestSense->CommandSpecificInformation[1],
4570 RequestSense->CommandSpecificInformation[2],
4571 RequestSense->CommandSpecificInformation[3]);
4572 break;
4573 case 'E':
4574 if (Controller->SuppressEnclosureMessages) break;
4575 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4576 DAC960_Critical("Enclosure %d %s\n", Controller,
4577 Event->TargetID, MessageBuffer);
4578 break;
4579 case 'C':
4580 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4581 break;
4582 default:
4583 DAC960_Critical("Unknown Controller Event Code %04X\n",
4584 Controller, Event->EventCode);
4585 break;
4586 }
4587}
4588
4589
4590/*
4591 DAC960_V2_ReportProgress prints an appropriate progress message for
4592 Logical Device Long Operations.
4593*/
4594
4595static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4596 unsigned char *MessageString,
4597 unsigned int LogicalDeviceNumber,
4598 unsigned long BlocksCompleted,
4599 unsigned long LogicalDeviceSize)
4600{
4601 Controller->EphemeralProgressMessage = true;
4602 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4603 "%d%% completed\n", Controller,
4604 MessageString,
4605 LogicalDeviceNumber,
4606 Controller->ControllerNumber,
4607 LogicalDeviceNumber,
4608 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4609 Controller->EphemeralProgressMessage = false;
4610}
4611
4612
4613/*
4614 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4615 for DAC960 V2 Firmware Controllers.
4616*/
4617
4618static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4619{
4620 DAC960_Controller_T *Controller = Command->Controller;
4621 DAC960_CommandType_T CommandType = Command->CommandType;
4622 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
4623 DAC960_V2_IOCTL_Opcode_T CommandOpcode = CommandMailbox->Common.IOCTL_Opcode;
4624 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4625
4626 if (CommandType == DAC960_ReadCommand ||
4627 CommandType == DAC960_WriteCommand)
4628 {
4629
4630#ifdef FORCE_RETRY_DEBUG
4631 CommandStatus = DAC960_V2_AbormalCompletion;
4632#endif
4633 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4634
4635 if (CommandStatus == DAC960_V2_NormalCompletion) {
4636
4637 if (!DAC960_ProcessCompletedRequest(Command, true))
4638 BUG();
4639
4640 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4641 {
4642 /*
4643 * break the command down into pieces and resubmit each
4644 * piece, hoping that some of them will succeed.
4645 */
4646 DAC960_queue_partial_rw(Command);
4647 return;
4648 }
4649 else
4650 {
4651 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4652 DAC960_V2_ReadWriteError(Command);
4653 /*
4654 Perform completion processing for all buffers in this I/O Request.
4655 */
4656 (void)DAC960_ProcessCompletedRequest(Command, false);
4657 }
4658 }
4659 else if (CommandType == DAC960_ReadRetryCommand ||
4660 CommandType == DAC960_WriteRetryCommand)
4661 {
87d156bf 4662 bool normal_completion;
1da177e4
LT		 4663
4664#ifdef FORCE_RETRY_FAILURE_DEBUG
4665 static int retry_count = 1;
4666#endif
4667 /*
4668 Perform completion processing for the portion that was
4669 retried, and submit the next portion, if any.
4670 */
4671 normal_completion = true;
4672 if (CommandStatus != DAC960_V2_NormalCompletion) {
4673 normal_completion = false;
4674 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4675 DAC960_V2_ReadWriteError(Command);
4676 }
4677
4678#ifdef FORCE_RETRY_FAILURE_DEBUG
4679 if (!(++retry_count % 10000)) {
4680 printk("V2 error retry failure test\n");
4681 normal_completion = false;
4682 DAC960_V2_ReadWriteError(Command);
4683 }
4684#endif
4685
4686 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4687 DAC960_queue_partial_rw(Command);
4688 return;
4689 }
4690 }
4691 else if (CommandType == DAC960_MonitoringCommand)
4692 {
4693 if (Controller->ShutdownMonitoringTimer)
4694 return;
4695 if (CommandOpcode == DAC960_V2_GetControllerInfo)
4696 {
4697 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4698 Controller->V2.NewControllerInformation;
4699 DAC960_V2_ControllerInfo_T *ControllerInfo =
4700 &Controller->V2.ControllerInformation;
4701 Controller->LogicalDriveCount =
4702 NewControllerInfo->LogicalDevicesPresent;
4703 Controller->V2.NeedLogicalDeviceInformation = true;
4704 Controller->V2.NeedPhysicalDeviceInformation = true;
4705 Controller->V2.StartLogicalDeviceInformationScan = true;
4706 Controller->V2.StartPhysicalDeviceInformationScan = true;
4707 Controller->MonitoringAlertMode =
4708 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4709 NewControllerInfo->LogicalDevicesOffline > 0 ||
4710 NewControllerInfo->PhysicalDisksCritical > 0 ||
4711 NewControllerInfo->PhysicalDisksOffline > 0);
4712 memcpy(ControllerInfo, NewControllerInfo,
4713 sizeof(DAC960_V2_ControllerInfo_T));
4714 }
4715 else if (CommandOpcode == DAC960_V2_GetEvent)
4716 {
4717 if (CommandStatus == DAC960_V2_NormalCompletion) {
4718 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4719 }
4720 Controller->V2.NextEventSequenceNumber++;
4721 }
4722 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
4723 CommandStatus == DAC960_V2_NormalCompletion)
4724 {
4725 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4726 Controller->V2.NewPhysicalDeviceInformation;
4727 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4728 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4729 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4730 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4731 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4732 unsigned int DeviceIndex;
4733 while (PhysicalDeviceInfo != NULL &&
4734 (NewPhysicalDeviceInfo->Channel >
4735 PhysicalDeviceInfo->Channel ||
4736 (NewPhysicalDeviceInfo->Channel ==
4737 PhysicalDeviceInfo->Channel &&
4738 (NewPhysicalDeviceInfo->TargetID >
4739 PhysicalDeviceInfo->TargetID ||
4740 (NewPhysicalDeviceInfo->TargetID ==
4741 PhysicalDeviceInfo->TargetID &&
4742 NewPhysicalDeviceInfo->LogicalUnit >
4743 PhysicalDeviceInfo->LogicalUnit)))))
4744 {
4745 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4746 Controller,
4747 PhysicalDeviceInfo->Channel,
4748 PhysicalDeviceInfo->TargetID);
4749 Controller->V2.PhysicalDeviceInformation
4750 [PhysicalDeviceIndex] = NULL;
4751 Controller->V2.InquiryUnitSerialNumber
4752 [PhysicalDeviceIndex] = NULL;
4753 kfree(PhysicalDeviceInfo);
4754 kfree(InquiryUnitSerialNumber);
4755 for (DeviceIndex = PhysicalDeviceIndex;
4756 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4757 DeviceIndex++)
4758 {
4759 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4760 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4761 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4762 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4763 }
4764 Controller->V2.PhysicalDeviceInformation
4765 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4766 Controller->V2.InquiryUnitSerialNumber
4767 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4768 PhysicalDeviceInfo =
4769 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4770 InquiryUnitSerialNumber =
4771 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4772 }
4773 if (PhysicalDeviceInfo == NULL ||
4774 (NewPhysicalDeviceInfo->Channel !=
4775 PhysicalDeviceInfo->Channel) ||
4776 (NewPhysicalDeviceInfo->TargetID !=
4777 PhysicalDeviceInfo->TargetID) ||
4778 (NewPhysicalDeviceInfo->LogicalUnit !=
4779 PhysicalDeviceInfo->LogicalUnit))
4780 {
07fb75a5 4781 PhysicalDeviceInfo =
1da177e4
LT		 4782 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4783 InquiryUnitSerialNumber =
1da177e4
LT		 4784 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4785 GFP_ATOMIC);
07fb75a5
JJ		 4786 if (InquiryUnitSerialNumber == NULL ||
4787 PhysicalDeviceInfo == NULL)
1da177e4 4788 {
07fb75a5
JJ		 4789 kfree(InquiryUnitSerialNumber);
4790 InquiryUnitSerialNumber = NULL;
1da177e4
LT		 4791 kfree(PhysicalDeviceInfo);
4792 PhysicalDeviceInfo = NULL;
4793 }
4794 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4795 Controller,
4796 NewPhysicalDeviceInfo->Channel,
4797 NewPhysicalDeviceInfo->TargetID,
4798 (PhysicalDeviceInfo != NULL
4799 ? "" : " - Allocation Failed"));
4800 if (PhysicalDeviceInfo != NULL)
4801 {
4802 memset(PhysicalDeviceInfo, 0,
4803 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4804 PhysicalDeviceInfo->PhysicalDeviceState =
4805 DAC960_V2_Device_InvalidState;
4806 memset(InquiryUnitSerialNumber, 0,
4807 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4808 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4809 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4810 DeviceIndex > PhysicalDeviceIndex;
4811 DeviceIndex--)
4812 {
4813 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4814 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4815 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4816 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4817 }
4818 Controller->V2.PhysicalDeviceInformation
4819 [PhysicalDeviceIndex] =
4820 PhysicalDeviceInfo;
4821 Controller->V2.InquiryUnitSerialNumber
4822 [PhysicalDeviceIndex] =
4823 InquiryUnitSerialNumber;
4824 Controller->V2.NeedDeviceSerialNumberInformation = true;
4825 }
4826 }
4827 if (PhysicalDeviceInfo != NULL)
4828 {
4829 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4830 PhysicalDeviceInfo->PhysicalDeviceState)
4831 DAC960_Critical(
4832 "Physical Device %d:%d is now %s\n", Controller,
4833 NewPhysicalDeviceInfo->Channel,
4834 NewPhysicalDeviceInfo->TargetID,
4835 (NewPhysicalDeviceInfo->PhysicalDeviceState
4836 == DAC960_V2_Device_Online
4837 ? "ONLINE"
4838 : NewPhysicalDeviceInfo->PhysicalDeviceState
4839 == DAC960_V2_Device_Rebuild
4840 ? "REBUILD"
4841 : NewPhysicalDeviceInfo->PhysicalDeviceState
4842 == DAC960_V2_Device_Missing
4843 ? "MISSING"
4844 : NewPhysicalDeviceInfo->PhysicalDeviceState
4845 == DAC960_V2_Device_Critical
4846 ? "CRITICAL"
4847 : NewPhysicalDeviceInfo->PhysicalDeviceState
4848 == DAC960_V2_Device_Dead
4849 ? "DEAD"
4850 : NewPhysicalDeviceInfo->PhysicalDeviceState
4851 == DAC960_V2_Device_SuspectedDead
4852 ? "SUSPECTED-DEAD"
4853 : NewPhysicalDeviceInfo->PhysicalDeviceState
4854 == DAC960_V2_Device_CommandedOffline
4855 ? "COMMANDED-OFFLINE"
4856 : NewPhysicalDeviceInfo->PhysicalDeviceState
4857 == DAC960_V2_Device_Standby
4858 ? "STANDBY" : "UNKNOWN"));
4859 if ((NewPhysicalDeviceInfo->ParityErrors !=
4860 PhysicalDeviceInfo->ParityErrors) ||
4861 (NewPhysicalDeviceInfo->SoftErrors !=
4862 PhysicalDeviceInfo->SoftErrors) ||
4863 (NewPhysicalDeviceInfo->HardErrors !=
4864 PhysicalDeviceInfo->HardErrors) ||
4865 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4866 PhysicalDeviceInfo->MiscellaneousErrors) ||
4867 (NewPhysicalDeviceInfo->CommandTimeouts !=
4868 PhysicalDeviceInfo->CommandTimeouts) ||
4869 (NewPhysicalDeviceInfo->Retries !=
4870 PhysicalDeviceInfo->Retries) ||
4871 (NewPhysicalDeviceInfo->Aborts !=
4872 PhysicalDeviceInfo->Aborts) ||
4873 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4874 PhysicalDeviceInfo->PredictedFailuresDetected))
4875 {
4876 DAC960_Critical("Physical Device %d:%d Errors: "
4877 "Parity = %d, Soft = %d, "
4878 "Hard = %d, Misc = %d\n",
4879 Controller,
4880 NewPhysicalDeviceInfo->Channel,
4881 NewPhysicalDeviceInfo->TargetID,
4882 NewPhysicalDeviceInfo->ParityErrors,
4883 NewPhysicalDeviceInfo->SoftErrors,
4884 NewPhysicalDeviceInfo->HardErrors,
4885 NewPhysicalDeviceInfo->MiscellaneousErrors);
4886 DAC960_Critical("Physical Device %d:%d Errors: "
4887 "Timeouts = %d, Retries = %d, "
4888 "Aborts = %d, Predicted = %d\n",
4889 Controller,
4890 NewPhysicalDeviceInfo->Channel,
4891 NewPhysicalDeviceInfo->TargetID,
4892 NewPhysicalDeviceInfo->CommandTimeouts,
4893 NewPhysicalDeviceInfo->Retries,
4894 NewPhysicalDeviceInfo->Aborts,
4895 NewPhysicalDeviceInfo
4896 ->PredictedFailuresDetected);
4897 }
4898 if ((PhysicalDeviceInfo->PhysicalDeviceState
4899 == DAC960_V2_Device_Dead ||
4900 PhysicalDeviceInfo->PhysicalDeviceState
4901 == DAC960_V2_Device_InvalidState) &&
4902 NewPhysicalDeviceInfo->PhysicalDeviceState
4903 != DAC960_V2_Device_Dead)
4904 Controller->V2.NeedDeviceSerialNumberInformation = true;
4905 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4906 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4907 }
4908 NewPhysicalDeviceInfo->LogicalUnit++;
4909 Controller->V2.PhysicalDeviceIndex++;
4910 }
4911 else if (CommandOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
4912 {
4913 unsigned int DeviceIndex;
4914 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4915 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4916 DeviceIndex++)
4917 {
4918 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4919 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4920 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4921 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4922 if (PhysicalDeviceInfo == NULL) break;
4923 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4924 Controller,
4925 PhysicalDeviceInfo->Channel,
4926 PhysicalDeviceInfo->TargetID);
4927 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4928 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4929 kfree(PhysicalDeviceInfo);
4930 kfree(InquiryUnitSerialNumber);
4931 }
4932 Controller->V2.NeedPhysicalDeviceInformation = false;
4933 }
4934 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
4935 CommandStatus == DAC960_V2_NormalCompletion)
4936 {
4937 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4938 Controller->V2.NewLogicalDeviceInformation;
4939 unsigned short LogicalDeviceNumber =
4940 NewLogicalDeviceInfo->LogicalDeviceNumber;
4941 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4942 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4943 if (LogicalDeviceInfo == NULL)
4944 {
4945 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4946 PhysicalDevice.Controller = 0;
4947 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4948 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4949 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4950 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4951 PhysicalDevice;
0a361e31
AD		 4952 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4953 GFP_ATOMIC);
1da177e4
LT		 4954 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4955 LogicalDeviceInfo;
4956 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4957 "Now Exists%s\n", Controller,
4958 LogicalDeviceNumber,
4959 Controller->ControllerNumber,
4960 LogicalDeviceNumber,
4961 (LogicalDeviceInfo != NULL
4962 ? "" : " - Allocation Failed"));
4963 if (LogicalDeviceInfo != NULL)
4964 {
4965 memset(LogicalDeviceInfo, 0,
4966 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4967 DAC960_ComputeGenericDiskInfo(Controller);
4968 }
4969 }
4970 if (LogicalDeviceInfo != NULL)
4971 {
4972 unsigned long LogicalDeviceSize =
4973 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4974 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4975 LogicalDeviceInfo->LogicalDeviceState)
4976 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4977 "is now %s\n", Controller,
4978 LogicalDeviceNumber,
4979 Controller->ControllerNumber,
4980 LogicalDeviceNumber,
4981 (NewLogicalDeviceInfo->LogicalDeviceState
4982 == DAC960_V2_LogicalDevice_Online
4983 ? "ONLINE"
4984 : NewLogicalDeviceInfo->LogicalDeviceState
4985 == DAC960_V2_LogicalDevice_Critical
4986 ? "CRITICAL" : "OFFLINE"));
4987 if ((NewLogicalDeviceInfo->SoftErrors !=
4988 LogicalDeviceInfo->SoftErrors) ||
4989 (NewLogicalDeviceInfo->CommandsFailed !=
4990 LogicalDeviceInfo->CommandsFailed) ||
4991 (NewLogicalDeviceInfo->DeferredWriteErrors !=
4992 LogicalDeviceInfo->DeferredWriteErrors))
4993 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
4994 "Soft = %d, Failed = %d, Deferred Write = %d\n",
4995 Controller, LogicalDeviceNumber,
4996 Controller->ControllerNumber,
4997 LogicalDeviceNumber,
4998 NewLogicalDeviceInfo->SoftErrors,
4999 NewLogicalDeviceInfo->CommandsFailed,
5000 NewLogicalDeviceInfo->DeferredWriteErrors);
5001 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5002 DAC960_V2_ReportProgress(Controller,
5003 "Consistency Check",
5004 LogicalDeviceNumber,
5005 NewLogicalDeviceInfo
5006 ->ConsistencyCheckBlockNumber,
5007 LogicalDeviceSize);
5008 else if (NewLogicalDeviceInfo->RebuildInProgress)
5009 DAC960_V2_ReportProgress(Controller,
5010 "Rebuild",
5011 LogicalDeviceNumber,
5012 NewLogicalDeviceInfo
5013 ->RebuildBlockNumber,
5014 LogicalDeviceSize);
5015 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5016 DAC960_V2_ReportProgress(Controller,
5017 "Background Initialization",
5018 LogicalDeviceNumber,
5019 NewLogicalDeviceInfo
5020 ->BackgroundInitializationBlockNumber,
5021 LogicalDeviceSize);
5022 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5023 DAC960_V2_ReportProgress(Controller,
5024 "Foreground Initialization",
5025 LogicalDeviceNumber,
5026 NewLogicalDeviceInfo
5027 ->ForegroundInitializationBlockNumber,
5028 LogicalDeviceSize);
5029 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5030 DAC960_V2_ReportProgress(Controller,
5031 "Data Migration",
5032 LogicalDeviceNumber,
5033 NewLogicalDeviceInfo
5034 ->DataMigrationBlockNumber,
5035 LogicalDeviceSize);
5036 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5037 DAC960_V2_ReportProgress(Controller,
5038 "Patrol Operation",
5039 LogicalDeviceNumber,
5040 NewLogicalDeviceInfo
5041 ->PatrolOperationBlockNumber,
5042 LogicalDeviceSize);
5043 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5044 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5045 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5046 "Background Initialization %s\n",
5047 Controller,
5048 LogicalDeviceNumber,
5049 Controller->ControllerNumber,
5050 LogicalDeviceNumber,
5051 (NewLogicalDeviceInfo->LogicalDeviceControl
5052 .LogicalDeviceInitialized
5053 ? "Completed" : "Failed"));
5054 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5055 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5056 }
5057 Controller->V2.LogicalDriveFoundDuringScan
5058 [LogicalDeviceNumber] = true;
5059 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5060 }
5061 else if (CommandOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
5062 {
5063 int LogicalDriveNumber;
5064 for (LogicalDriveNumber = 0;
5065 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5066 LogicalDriveNumber++)
5067 {
5068 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5069 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5070 if (LogicalDeviceInfo == NULL ||
5071 Controller->V2.LogicalDriveFoundDuringScan
5072 [LogicalDriveNumber])
5073 continue;
5074 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5075 "No Longer Exists\n", Controller,
5076 LogicalDriveNumber,
5077 Controller->ControllerNumber,
5078 LogicalDriveNumber);
5079 Controller->V2.LogicalDeviceInformation
5080 [LogicalDriveNumber] = NULL;
5081 kfree(LogicalDeviceInfo);
5082 Controller->LogicalDriveInitiallyAccessible
5083 [LogicalDriveNumber] = false;
5084 DAC960_ComputeGenericDiskInfo(Controller);
5085 }
5086 Controller->V2.NeedLogicalDeviceInformation = false;
5087 }
5088 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5089 {
5090 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5091 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5092
5093 if (CommandStatus != DAC960_V2_NormalCompletion) {
5094 memset(InquiryUnitSerialNumber,
5095 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5096 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5097 } else
5098 memcpy(InquiryUnitSerialNumber,
5099 Controller->V2.NewInquiryUnitSerialNumber,
5100 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5101
5102 Controller->V2.NeedDeviceSerialNumberInformation = false;
5103 }
5104
5105 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5106 - Controller->V2.NextEventSequenceNumber > 0)
5107 {
5108 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5109 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5110 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5111 Controller->V2.NextEventSequenceNumber >> 16;
5112 CommandMailbox->GetEvent.ControllerNumber = 0;
5113 CommandMailbox->GetEvent.IOCTL_Opcode =
5114 DAC960_V2_GetEvent;
5115 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5116 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5117 CommandMailbox->GetEvent.DataTransferMemoryAddress
5118 .ScatterGatherSegments[0]
5119 .SegmentDataPointer =
5120 Controller->V2.EventDMA;
5121 CommandMailbox->GetEvent.DataTransferMemoryAddress
5122 .ScatterGatherSegments[0]
5123 .SegmentByteCount =
5124 CommandMailbox->GetEvent.DataTransferSize;
5125 DAC960_QueueCommand(Command);
5126 return;
5127 }
5128 if (Controller->V2.NeedPhysicalDeviceInformation)
5129 {
5130 if (Controller->V2.NeedDeviceSerialNumberInformation)
5131 {
5132 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5133 Controller->V2.NewInquiryUnitSerialNumber;
5134 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5135
5136 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5137 Controller->V2.NewPhysicalDeviceInformation->Channel,
5138 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5139 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5140
5141
5142 DAC960_QueueCommand(Command);
5143 return;
5144 }
5145 if (Controller->V2.StartPhysicalDeviceInformationScan)
5146 {
5147 Controller->V2.PhysicalDeviceIndex = 0;
5148 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5149 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5150 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5151 Controller->V2.StartPhysicalDeviceInformationScan = false;
5152 }
5153 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5154 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5155 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5156 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5157 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5158 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5159 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5160 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5161 Controller->V2.NewPhysicalDeviceInformation->Channel;
5162 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5163 DAC960_V2_GetPhysicalDeviceInfoValid;
5164 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5165 .ScatterGatherSegments[0]
5166 .SegmentDataPointer =
5167 Controller->V2.NewPhysicalDeviceInformationDMA;
5168 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5169 .ScatterGatherSegments[0]
5170 .SegmentByteCount =
5171 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5172 DAC960_QueueCommand(Command);
5173 return;
5174 }
5175 if (Controller->V2.NeedLogicalDeviceInformation)
5176 {
5177 if (Controller->V2.StartLogicalDeviceInformationScan)
5178 {
5179 int LogicalDriveNumber;
5180 for (LogicalDriveNumber = 0;
5181 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5182 LogicalDriveNumber++)
5183 Controller->V2.LogicalDriveFoundDuringScan
5184 [LogicalDriveNumber] = false;
5185 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5186 Controller->V2.StartLogicalDeviceInformationScan = false;
5187 }
5188 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5189 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5190 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5191 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5192 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5193 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5194 DAC960_V2_GetLogicalDeviceInfoValid;
5195 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5196 .ScatterGatherSegments[0]
5197 .SegmentDataPointer =
5198 Controller->V2.NewLogicalDeviceInformationDMA;
5199 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5200 .ScatterGatherSegments[0]
5201 .SegmentByteCount =
5202 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5203 DAC960_QueueCommand(Command);
5204 return;
5205 }
5206 Controller->MonitoringTimerCount++;
5207 Controller->MonitoringTimer.expires =
5208 jiffies + DAC960_HealthStatusMonitoringInterval;
5209 add_timer(&Controller->MonitoringTimer);
5210 }
5211 if (CommandType == DAC960_ImmediateCommand)
5212 {
5213 complete(Command->Completion);
5214 Command->Completion = NULL;
5215 return;
5216 }
5217 if (CommandType == DAC960_QueuedCommand)
5218 {
5219 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5220 KernelCommand->CommandStatus = CommandStatus;
5221 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5222 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5223 Command->V2.KernelCommand = NULL;
5224 DAC960_DeallocateCommand(Command);
5225 KernelCommand->CompletionFunction(KernelCommand);
5226 return;
5227 }
5228 /*
5229 Queue a Status Monitoring Command to the Controller using the just
5230 completed Command if one was deferred previously due to lack of a
5231 free Command when the Monitoring Timer Function was called.
5232 */
5233 if (Controller->MonitoringCommandDeferred)
5234 {
5235 Controller->MonitoringCommandDeferred = false;
5236 DAC960_V2_QueueMonitoringCommand(Command);
5237 return;
5238 }
5239 /*
5240 Deallocate the Command.
5241 */
5242 DAC960_DeallocateCommand(Command);
5243 /*
5244 Wake up any processes waiting on a free Command.
5245 */
5246 wake_up(&Controller->CommandWaitQueue);
5247}
5248
5b76ffd5
CH		 5249/*
5250 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5251 Controllers.
5252*/
5253
5254static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
7d12e780 5255 void *DeviceIdentifier)
5b76ffd5 5256{
c7bec5ab 5257 DAC960_Controller_T *Controller = DeviceIdentifier;
5b76ffd5
CH		 5258 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5259 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5260 unsigned long flags;
5261
5262 spin_lock_irqsave(&Controller->queue_lock, flags);
5263 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5264 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5265 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5266 {
5267 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5268 NextStatusMailbox->Fields.CommandIdentifier;
5269 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5270 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5271 Command->V2.RequestSenseLength =
5272 NextStatusMailbox->Fields.RequestSenseLength;
5273 Command->V2.DataTransferResidue =
5274 NextStatusMailbox->Fields.DataTransferResidue;
5275 NextStatusMailbox->Words[0] = 0;
5276 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5277 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5278 DAC960_V2_ProcessCompletedCommand(Command);
5279 }
5280 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5281 /*
5282 Attempt to remove additional I/O Requests from the Controller's
5283 I/O Request Queue and queue them to the Controller.
5284 */
5285 DAC960_ProcessRequest(Controller);
5286 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5287 return IRQ_HANDLED;
5288}
1da177e4
LT		 5289
5290/*
5291 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5292 Controllers.
5293*/
5294
5295static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
7d12e780 5296 void *DeviceIdentifier)
1da177e4 5297{
c7bec5ab 5298 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5299 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5300 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5301 unsigned long flags;
5302
5303 spin_lock_irqsave(&Controller->queue_lock, flags);
5304 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5305 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5306 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5307 {
5308 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5309 NextStatusMailbox->Fields.CommandIdentifier;
5310 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5311 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5312 Command->V2.RequestSenseLength =
5313 NextStatusMailbox->Fields.RequestSenseLength;
5314 Command->V2.DataTransferResidue =
5315 NextStatusMailbox->Fields.DataTransferResidue;
5316 NextStatusMailbox->Words[0] = 0;
5317 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5318 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5319 DAC960_V2_ProcessCompletedCommand(Command);
5320 }
5321 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5322 /*
5323 Attempt to remove additional I/O Requests from the Controller's
5324 I/O Request Queue and queue them to the Controller.
5325 */
5326 DAC960_ProcessRequest(Controller);
5327 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5328 return IRQ_HANDLED;
5329}
5330
5331
5332/*
5333 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5334 Controllers.
5335*/
5336
5337static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
7d12e780 5338 void *DeviceIdentifier)
1da177e4 5339{
c7bec5ab 5340 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5341 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5342 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5343 unsigned long flags;
5344
5345 spin_lock_irqsave(&Controller->queue_lock, flags);
5346 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5347 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5348 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5349 {
5350 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5351 NextStatusMailbox->Fields.CommandIdentifier;
5352 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5353 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5354 Command->V2.RequestSenseLength =
5355 NextStatusMailbox->Fields.RequestSenseLength;
5356 Command->V2.DataTransferResidue =
5357 NextStatusMailbox->Fields.DataTransferResidue;
5358 NextStatusMailbox->Words[0] = 0;
5359 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5360 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5361 DAC960_V2_ProcessCompletedCommand(Command);
5362 }
5363 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5364 /*
5365 Attempt to remove additional I/O Requests from the Controller's
5366 I/O Request Queue and queue them to the Controller.
5367 */
5368 DAC960_ProcessRequest(Controller);
5369 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5370 return IRQ_HANDLED;
5371}
5372
5373
5374/*
5375 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5376 Controllers.
5377*/
5378
5379static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
7d12e780 5380 void *DeviceIdentifier)
1da177e4 5381{
c7bec5ab 5382 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5383 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5384 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5385 unsigned long flags;
5386
5387 spin_lock_irqsave(&Controller->queue_lock, flags);
5388 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5389 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5390 while (NextStatusMailbox->Fields.Valid)
5391 {
5392 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5393 NextStatusMailbox->Fields.CommandIdentifier;
5394 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5395 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5396 NextStatusMailbox->Word = 0;
5397 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5398 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5399 DAC960_V1_ProcessCompletedCommand(Command);
5400 }
5401 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5402 /*
5403 Attempt to remove additional I/O Requests from the Controller's
5404 I/O Request Queue and queue them to the Controller.
5405 */
5406 DAC960_ProcessRequest(Controller);
5407 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5408 return IRQ_HANDLED;
5409}
5410
5411
5412/*
5413 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5414 Controllers.
5415*/
5416
5417static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
7d12e780 5418 void *DeviceIdentifier)
1da177e4 5419{
c7bec5ab 5420 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5421 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5422 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5423 unsigned long flags;
5424
5425 spin_lock_irqsave(&Controller->queue_lock, flags);
5426 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5427 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5428 while (NextStatusMailbox->Fields.Valid)
5429 {
5430 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5431 NextStatusMailbox->Fields.CommandIdentifier;
5432 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5433 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5434 NextStatusMailbox->Word = 0;
5435 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5436 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5437 DAC960_V1_ProcessCompletedCommand(Command);
5438 }
5439 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5440 /*
5441 Attempt to remove additional I/O Requests from the Controller's
5442 I/O Request Queue and queue them to the Controller.
5443 */
5444 DAC960_ProcessRequest(Controller);
5445 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5446 return IRQ_HANDLED;
5447}
5448
5449
5450/*
5451 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5452 Controllers.
5453*/
5454
5455static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
7d12e780 5456 void *DeviceIdentifier)
1da177e4 5457{
c7bec5ab 5458 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5459 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5460 unsigned long flags;
5461
5462 spin_lock_irqsave(&Controller->queue_lock, flags);
5463 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5464 {
5465 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5466 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5467 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5468 Command->V1.CommandStatus =
5469 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5470 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5471 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5472 DAC960_V1_ProcessCompletedCommand(Command);
5473 }
5474 /*
5475 Attempt to remove additional I/O Requests from the Controller's
5476 I/O Request Queue and queue them to the Controller.
5477 */
5478 DAC960_ProcessRequest(Controller);
5479 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5480 return IRQ_HANDLED;
5481}
5482
5483
5484/*
5485 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5486 Controllers.
5487
5488 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5489 on the data having been placed into DAC960_Controller_T, rather than
5490 an arbitrary buffer.
5491*/
5492
5493static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
7d12e780 5494 void *DeviceIdentifier)
1da177e4 5495{
c7bec5ab 5496 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5497 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5498 unsigned long flags;
5499
5500 spin_lock_irqsave(&Controller->queue_lock, flags);
5501 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5502 {
5503 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5504 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5505 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5506 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5507 DAC960_V1_CommandOpcode_T CommandOpcode =
5508 CommandMailbox->Common.CommandOpcode;
5509 Command->V1.CommandStatus =
5510 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5511 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5512 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5513 switch (CommandOpcode)
5514 {
5515 case DAC960_V1_Enquiry_Old:
5516 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5517 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5518 break;
5519 case DAC960_V1_GetDeviceState_Old:
5520 Command->V1.CommandMailbox.Common.CommandOpcode =
5521 DAC960_V1_GetDeviceState;
5522 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5523 break;
5524 case DAC960_V1_Read_Old:
5525 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5526 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5527 break;
5528 case DAC960_V1_Write_Old:
5529 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5530 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5531 break;
5532 case DAC960_V1_ReadWithScatterGather_Old:
5533 Command->V1.CommandMailbox.Common.CommandOpcode =
5534 DAC960_V1_ReadWithScatterGather;
5535 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5536 break;
5537 case DAC960_V1_WriteWithScatterGather_Old:
5538 Command->V1.CommandMailbox.Common.CommandOpcode =
5539 DAC960_V1_WriteWithScatterGather;
5540 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5541 break;
5542 default:
5543 break;
5544 }
5545 DAC960_V1_ProcessCompletedCommand(Command);
5546 }
5547 /*
5548 Attempt to remove additional I/O Requests from the Controller's
5549 I/O Request Queue and queue them to the Controller.
5550 */
5551 DAC960_ProcessRequest(Controller);
5552 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5553 return IRQ_HANDLED;
5554}
5555
5556
5557/*
5558 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5559 Firmware Controllers.
5560*/
5561
5562static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5563{
5564 DAC960_Controller_T *Controller = Command->Controller;
5565 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5566 DAC960_V1_ClearCommand(Command);
5567 Command->CommandType = DAC960_MonitoringCommand;
5568 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5569 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5570 DAC960_QueueCommand(Command);
5571}
5572
5573
5574/*
5575 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5576 Firmware Controllers.
5577*/
5578
5579static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5580{
5581 DAC960_Controller_T *Controller = Command->Controller;
5582 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5583 DAC960_V2_ClearCommand(Command);
5584 Command->CommandType = DAC960_MonitoringCommand;
5585 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5586 CommandMailbox->ControllerInfo.CommandControlBits
5587 .DataTransferControllerToHost = true;
5588 CommandMailbox->ControllerInfo.CommandControlBits
5589 .NoAutoRequestSense = true;
5590 CommandMailbox->ControllerInfo.DataTransferSize =
5591 sizeof(DAC960_V2_ControllerInfo_T);
5592 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5593 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5594 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5595 .ScatterGatherSegments[0]
5596 .SegmentDataPointer =
5597 Controller->V2.NewControllerInformationDMA;
5598 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5599 .ScatterGatherSegments[0]
5600 .SegmentByteCount =
5601 CommandMailbox->ControllerInfo.DataTransferSize;
5602 DAC960_QueueCommand(Command);
5603}
5604
5605
5606/*
5607 DAC960_MonitoringTimerFunction is the timer function for monitoring
5608 the status of DAC960 Controllers.
5609*/
5610
5611static void DAC960_MonitoringTimerFunction(unsigned long TimerData)
5612{
5613 DAC960_Controller_T *Controller = (DAC960_Controller_T *) TimerData;
5614 DAC960_Command_T *Command;
5615 unsigned long flags;
5616
5617 if (Controller->FirmwareType == DAC960_V1_Controller)
5618 {
5619 spin_lock_irqsave(&Controller->queue_lock, flags);
5620 /*
5621 Queue a Status Monitoring Command to Controller.
5622 */
5623 Command = DAC960_AllocateCommand(Controller);
5624 if (Command != NULL)
5625 DAC960_V1_QueueMonitoringCommand(Command);
5626 else Controller->MonitoringCommandDeferred = true;
5627 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5628 }
5629 else
5630 {
5631 DAC960_V2_ControllerInfo_T *ControllerInfo =
5632 &Controller->V2.ControllerInformation;
5633 unsigned int StatusChangeCounter =
5634 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
87d156bf 5635 bool ForceMonitoringCommand = false;
50297cbf
MFP		 5636 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5637 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 5638 {
5639 int LogicalDriveNumber;
5640 for (LogicalDriveNumber = 0;
5641 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5642 LogicalDriveNumber++)
5643 {
5644 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5645 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5646 if (LogicalDeviceInfo == NULL) continue;
5647 if (!LogicalDeviceInfo->LogicalDeviceControl
5648 .LogicalDeviceInitialized)
5649 {
5650 ForceMonitoringCommand = true;
5651 break;
5652 }
5653 }
5654 Controller->SecondaryMonitoringTime = jiffies;
5655 }
5656 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5657 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5658 == Controller->V2.NextEventSequenceNumber &&
5659 (ControllerInfo->BackgroundInitializationsActive +
5660 ControllerInfo->LogicalDeviceInitializationsActive +
5661 ControllerInfo->PhysicalDeviceInitializationsActive +
5662 ControllerInfo->ConsistencyChecksActive +
5663 ControllerInfo->RebuildsActive +
5664 ControllerInfo->OnlineExpansionsActive == 0 ||
50297cbf
MFP		 5665 time_before(jiffies, Controller->PrimaryMonitoringTime
5666 + DAC960_MonitoringTimerInterval)) &&
1da177e4
LT		 5667 !ForceMonitoringCommand)
5668 {
5669 Controller->MonitoringTimer.expires =
5670 jiffies + DAC960_HealthStatusMonitoringInterval;
5671 add_timer(&Controller->MonitoringTimer);
5672 return;
5673 }
5674 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5675 Controller->PrimaryMonitoringTime = jiffies;
5676
5677 spin_lock_irqsave(&Controller->queue_lock, flags);
5678 /*
5679 Queue a Status Monitoring Command to Controller.
5680 */
5681 Command = DAC960_AllocateCommand(Controller);
5682 if (Command != NULL)
5683 DAC960_V2_QueueMonitoringCommand(Command);
5684 else Controller->MonitoringCommandDeferred = true;
5685 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5686 /*
5687 Wake up any processes waiting on a Health Status Buffer change.
5688 */
5689 wake_up(&Controller->HealthStatusWaitQueue);
5690 }
5691}
5692
5693/*
5694 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5695 additional bytes in the Combined Status Buffer and grows the buffer if
5696 necessary. It returns true if there is enough room and false otherwise.
5697*/
5698
87d156bf 5699static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
1da177e4
LT		 5700 unsigned int ByteCount)
5701{
5702 unsigned char *NewStatusBuffer;
5703 if (Controller->InitialStatusLength + 1 +
5704 Controller->CurrentStatusLength + ByteCount + 1 <=
5705 Controller->CombinedStatusBufferLength)
5706 return true;
5707 if (Controller->CombinedStatusBufferLength == 0)
5708 {
5709 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5710 while (NewStatusBufferLength < ByteCount)
5711 NewStatusBufferLength *= 2;
0a361e31
AD		 5712 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5713 GFP_ATOMIC);
1da177e4
LT		 5714 if (Controller->CombinedStatusBuffer == NULL) return false;
5715 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5716 return true;
5717 }
0a361e31
AD		 5718 NewStatusBuffer = kmalloc(2 * Controller->CombinedStatusBufferLength,
5719 GFP_ATOMIC);
1da177e4
LT		 5720 if (NewStatusBuffer == NULL)
5721 {
5722 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5723 Controller);
5724 return false;
5725 }
5726 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5727 Controller->CombinedStatusBufferLength);
5728 kfree(Controller->CombinedStatusBuffer);
5729 Controller->CombinedStatusBuffer = NewStatusBuffer;
5730 Controller->CombinedStatusBufferLength *= 2;
5731 Controller->CurrentStatusBuffer =
5732 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5733 return true;
5734}
5735
5736
5737/*
5738 DAC960_Message prints Driver Messages.
5739*/
5740
5741static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5742 unsigned char *Format,
5743 DAC960_Controller_T *Controller,
5744 ...)
5745{
5746 static unsigned char Buffer[DAC960_LineBufferSize];
87d156bf 5747 static bool BeginningOfLine = true;
1da177e4
LT		 5748 va_list Arguments;
5749 int Length = 0;
5750 va_start(Arguments, Controller);
5751 Length = vsprintf(Buffer, Format, Arguments);
5752 va_end(Arguments);
5753 if (Controller == NULL)
5754 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5755 DAC960_ControllerCount, Buffer);
5756 else if (MessageLevel == DAC960_AnnounceLevel ||
5757 MessageLevel == DAC960_InfoLevel)
5758 {
5759 if (!Controller->ControllerInitialized)
5760 {
5761 if (DAC960_CheckStatusBuffer(Controller, Length))
5762 {
5763 strcpy(&Controller->CombinedStatusBuffer
5764 [Controller->InitialStatusLength],
5765 Buffer);
5766 Controller->InitialStatusLength += Length;
5767 Controller->CurrentStatusBuffer =
5768 &Controller->CombinedStatusBuffer
5769 [Controller->InitialStatusLength + 1];
5770 }
5771 if (MessageLevel == DAC960_AnnounceLevel)
5772 {
5773 static int AnnouncementLines = 0;
5774 if (++AnnouncementLines <= 2)
5775 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5776 Buffer);
5777 }
5778 else
5779 {
5780 if (BeginningOfLine)
5781 {
5782 if (Buffer[0] != '\n' || Length > 1)
5783 printk("%sDAC960#%d: %s",
5784 DAC960_MessageLevelMap[MessageLevel],
5785 Controller->ControllerNumber, Buffer);
5786 }
5787 else printk("%s", Buffer);
5788 }
5789 }
5790 else if (DAC960_CheckStatusBuffer(Controller, Length))
5791 {
5792 strcpy(&Controller->CurrentStatusBuffer[
5793 Controller->CurrentStatusLength], Buffer);
5794 Controller->CurrentStatusLength += Length;
5795 }
5796 }
5797 else if (MessageLevel == DAC960_ProgressLevel)
5798 {
5799 strcpy(Controller->ProgressBuffer, Buffer);
5800 Controller->ProgressBufferLength = Length;
5801 if (Controller->EphemeralProgressMessage)
5802 {
50297cbf
MFP		 5803 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5804 + DAC960_ProgressReportingInterval))
1da177e4
LT		 5805 {
5806 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5807 Controller->ControllerNumber, Buffer);
5808 Controller->LastProgressReportTime = jiffies;
5809 }
5810 }
5811 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5812 Controller->ControllerNumber, Buffer);
5813 }
5814 else if (MessageLevel == DAC960_UserCriticalLevel)
5815 {
5816 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5817 Buffer);
5818 Controller->UserStatusLength += Length;
5819 if (Buffer[0] != '\n' || Length > 1)
5820 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5821 Controller->ControllerNumber, Buffer);
5822 }
5823 else
5824 {
5825 if (BeginningOfLine)
5826 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5827 Controller->ControllerNumber, Buffer);
5828 else printk("%s", Buffer);
5829 }
5830 BeginningOfLine = (Buffer[Length-1] == '\n');
5831}
5832
5833
5834/*
5835 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5836 Channel:TargetID specification from a User Command string. It updates
5837 Channel and TargetID and returns true on success and false on failure.
5838*/
5839
87d156bf 5840static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
1da177e4
LT		 5841 char *UserCommandString,
5842 unsigned char *Channel,
5843 unsigned char *TargetID)
5844{
5845 char *NewUserCommandString = UserCommandString;
5846 unsigned long XChannel, XTargetID;
5847 while (*UserCommandString == ' ') UserCommandString++;
5848 if (UserCommandString == NewUserCommandString)
5849 return false;
5850 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5851 if (NewUserCommandString == UserCommandString ||
5852 *NewUserCommandString != ':' ||
5853 XChannel >= Controller->Channels)
5854 return false;
5855 UserCommandString = ++NewUserCommandString;
5856 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5857 if (NewUserCommandString == UserCommandString ||
5858 *NewUserCommandString != '\0' ||
5859 XTargetID >= Controller->Targets)
5860 return false;
5861 *Channel = XChannel;
5862 *TargetID = XTargetID;
5863 return true;
5864}
5865
5866
5867/*
5868 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5869 specification from a User Command string. It updates LogicalDriveNumber and
5870 returns true on success and false on failure.
5871*/
5872
87d156bf 5873static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
1da177e4
LT		 5874 char *UserCommandString,
5875 unsigned char *LogicalDriveNumber)
5876{
5877 char *NewUserCommandString = UserCommandString;
5878 unsigned long XLogicalDriveNumber;
5879 while (*UserCommandString == ' ') UserCommandString++;
5880 if (UserCommandString == NewUserCommandString)
5881 return false;
5882 XLogicalDriveNumber =
5883 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5884 if (NewUserCommandString == UserCommandString ||
5885 *NewUserCommandString != '\0' ||
5886 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5887 return false;
5888 *LogicalDriveNumber = XLogicalDriveNumber;
5889 return true;
5890}
5891
5892
5893/*
5894 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5895 DAC960 V1 Firmware Controllers.
5896*/
5897
5898static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5899 DAC960_Command_T *Command,
5900 unsigned char Channel,
5901 unsigned char TargetID,
5902 DAC960_V1_PhysicalDeviceState_T
5903 DeviceState,
5904 const unsigned char *DeviceStateString)
5905{
5906 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5907 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5908 CommandMailbox->Type3D.Channel = Channel;
5909 CommandMailbox->Type3D.TargetID = TargetID;
5910 CommandMailbox->Type3D.DeviceState = DeviceState;
5911 CommandMailbox->Type3D.Modifier = 0;
5912 DAC960_ExecuteCommand(Command);
5913 switch (Command->V1.CommandStatus)
5914 {
5915 case DAC960_V1_NormalCompletion:
5916 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5917 DeviceStateString, Channel, TargetID);
5918 break;
5919 case DAC960_V1_UnableToStartDevice:
5920 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5921 "Unable to Start Device\n", Controller,
5922 DeviceStateString, Channel, TargetID);
5923 break;
5924 case DAC960_V1_NoDeviceAtAddress:
5925 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5926 "No Device at Address\n", Controller,
5927 DeviceStateString, Channel, TargetID);
5928 break;
5929 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5930 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5931 "Invalid Channel or Target or Modifier\n",
5932 Controller, DeviceStateString, Channel, TargetID);
5933 break;
5934 case DAC960_V1_ChannelBusy:
5935 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5936 "Channel Busy\n", Controller,
5937 DeviceStateString, Channel, TargetID);
5938 break;
5939 default:
5940 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5941 "Unexpected Status %04X\n", Controller,
5942 DeviceStateString, Channel, TargetID,
5943 Command->V1.CommandStatus);
5944 break;
5945 }
5946}
5947
5948
5949/*
5950 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5951 Controllers.
5952*/
5953
87d156bf 5954static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 5955 unsigned char *UserCommand)
5956{
5957 DAC960_Command_T *Command;
5958 DAC960_V1_CommandMailbox_T *CommandMailbox;
5959 unsigned long flags;
5960 unsigned char Channel, TargetID, LogicalDriveNumber;
5961
5962 spin_lock_irqsave(&Controller->queue_lock, flags);
5963 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5964 DAC960_WaitForCommand(Controller);
5965 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5966 Controller->UserStatusLength = 0;
5967 DAC960_V1_ClearCommand(Command);
5968 Command->CommandType = DAC960_ImmediateCommand;
5969 CommandMailbox = &Command->V1.CommandMailbox;
5970 if (strcmp(UserCommand, "flush-cache") == 0)
5971 {
5972 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5973 DAC960_ExecuteCommand(Command);
5974 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5975 }
5976 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5977 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5978 &Channel, &TargetID))
5979 {
5980 DAC960_V1_DeviceState_T *DeviceState =
5981 &Controller->V1.DeviceState[Channel][TargetID];
5982 if (DeviceState->Present &&
5983 DeviceState->DeviceType == DAC960_V1_DiskType &&
5984 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5985 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5986 DAC960_V1_Device_Dead, "Kill");
5987 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5988 Controller, Channel, TargetID);
5989 }
5990 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
5991 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
5992 &Channel, &TargetID))
5993 {
5994 DAC960_V1_DeviceState_T *DeviceState =
5995 &Controller->V1.DeviceState[Channel][TargetID];
5996 if (DeviceState->Present &&
5997 DeviceState->DeviceType == DAC960_V1_DiskType &&
5998 DeviceState->DeviceState == DAC960_V1_Device_Dead)
5999 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6000 DAC960_V1_Device_Online, "Make Online");
6001 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6002 Controller, Channel, TargetID);
6003
6004 }
6005 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6006 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6007 &Channel, &TargetID))
6008 {
6009 DAC960_V1_DeviceState_T *DeviceState =
6010 &Controller->V1.DeviceState[Channel][TargetID];
6011 if (DeviceState->Present &&
6012 DeviceState->DeviceType == DAC960_V1_DiskType &&
6013 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6014 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6015 DAC960_V1_Device_Standby, "Make Standby");
6016 else DAC960_UserCritical("Make Standby of Physical "
6017 "Device %d:%d Illegal\n",
6018 Controller, Channel, TargetID);
6019 }
6020 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6021 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6022 &Channel, &TargetID))
6023 {
6024 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6025 CommandMailbox->Type3D.Channel = Channel;
6026 CommandMailbox->Type3D.TargetID = TargetID;
6027 DAC960_ExecuteCommand(Command);
6028 switch (Command->V1.CommandStatus)
6029 {
6030 case DAC960_V1_NormalCompletion:
6031 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6032 Controller, Channel, TargetID);
6033 break;
6034 case DAC960_V1_AttemptToRebuildOnlineDrive:
6035 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6036 "Attempt to Rebuild Online or "
6037 "Unresponsive Drive\n",
6038 Controller, Channel, TargetID);
6039 break;
6040 case DAC960_V1_NewDiskFailedDuringRebuild:
6041 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6042 "New Disk Failed During Rebuild\n",
6043 Controller, Channel, TargetID);
6044 break;
6045 case DAC960_V1_InvalidDeviceAddress:
6046 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6047 "Invalid Device Address\n",
6048 Controller, Channel, TargetID);
6049 break;
6050 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6051 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6052 "Rebuild or Consistency Check Already "
6053 "in Progress\n", Controller, Channel, TargetID);
6054 break;
6055 default:
6056 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6057 "Unexpected Status %04X\n", Controller,
6058 Channel, TargetID, Command->V1.CommandStatus);
6059 break;
6060 }
6061 }
6062 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6063 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6064 &LogicalDriveNumber))
6065 {
6066 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6067 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6068 CommandMailbox->Type3C.AutoRestore = true;
6069 DAC960_ExecuteCommand(Command);
6070 switch (Command->V1.CommandStatus)
6071 {
6072 case DAC960_V1_NormalCompletion:
6073 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6074 "(/dev/rd/c%dd%d) Initiated\n",
6075 Controller, LogicalDriveNumber,
6076 Controller->ControllerNumber,
6077 LogicalDriveNumber);
6078 break;
6079 case DAC960_V1_DependentDiskIsDead:
6080 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6081 "(/dev/rd/c%dd%d) Failed - "
6082 "Dependent Physical Device is DEAD\n",
6083 Controller, LogicalDriveNumber,
6084 Controller->ControllerNumber,
6085 LogicalDriveNumber);
6086 break;
6087 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6088 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6089 "(/dev/rd/c%dd%d) Failed - "
6090 "Invalid or Nonredundant Logical Drive\n",
6091 Controller, LogicalDriveNumber,
6092 Controller->ControllerNumber,
6093 LogicalDriveNumber);
6094 break;
6095 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6096 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6097 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6098 "Consistency Check Already in Progress\n",
6099 Controller, LogicalDriveNumber,
6100 Controller->ControllerNumber,
6101 LogicalDriveNumber);
6102 break;
6103 default:
6104 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6105 "(/dev/rd/c%dd%d) Failed - "
6106 "Unexpected Status %04X\n",
6107 Controller, LogicalDriveNumber,
6108 Controller->ControllerNumber,
6109 LogicalDriveNumber, Command->V1.CommandStatus);
6110 break;
6111 }
6112 }
6113 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6114 strcmp(UserCommand, "cancel-consistency-check") == 0)
6115 {
6116 /*
6117 the OldRebuildRateConstant is never actually used
6118 once its value is retrieved from the controller.
6119 */
6120 unsigned char *OldRebuildRateConstant;
6121 dma_addr_t OldRebuildRateConstantDMA;
6122
6123 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6124 sizeof(char), &OldRebuildRateConstantDMA);
6125 if (OldRebuildRateConstant == NULL) {
6126 DAC960_UserCritical("Cancellation of Rebuild or "
6127 "Consistency Check Failed - "
6128 "Out of Memory",
6129 Controller);
6130 goto failure;
6131 }
6132 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6133 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6134 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6135 DAC960_ExecuteCommand(Command);
6136 switch (Command->V1.CommandStatus)
6137 {
6138 case DAC960_V1_NormalCompletion:
6139 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6140 Controller);
6141 break;
6142 default:
6143 DAC960_UserCritical("Cancellation of Rebuild or "
6144 "Consistency Check Failed - "
6145 "Unexpected Status %04X\n",
6146 Controller, Command->V1.CommandStatus);
6147 break;
6148 }
6149failure:
6150 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6151 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6152 }
6153 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6154 Controller, UserCommand);
6155
6156 spin_lock_irqsave(&Controller->queue_lock, flags);
6157 DAC960_DeallocateCommand(Command);
6158 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6159 return true;
6160}
6161
6162
6163/*
6164 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6165 TargetID into a Logical Device. It returns true on success and false
6166 on failure.
6167*/
6168
87d156bf 6169static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
1da177e4
LT		 6170 unsigned char Channel,
6171 unsigned char TargetID,
6172 unsigned short
6173 *LogicalDeviceNumber)
6174{
6175 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6176 DAC960_Controller_T *Controller = Command->Controller;
6177
6178 CommandMailbox = &Command->V2.CommandMailbox;
6179 memcpy(&SavedCommandMailbox, CommandMailbox,
6180 sizeof(DAC960_V2_CommandMailbox_T));
6181
6182 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6183 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6184 .DataTransferControllerToHost = true;
6185 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6186 .NoAutoRequestSense = true;
6187 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6188 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6189 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6190 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6191 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6192 DAC960_V2_TranslatePhysicalToLogicalDevice;
6193 CommandMailbox->Common.DataTransferMemoryAddress
6194 .ScatterGatherSegments[0]
6195 .SegmentDataPointer =
6196 Controller->V2.PhysicalToLogicalDeviceDMA;
6197 CommandMailbox->Common.DataTransferMemoryAddress
6198 .ScatterGatherSegments[0]
6199 .SegmentByteCount =
6200 CommandMailbox->Common.DataTransferSize;
6201
6202 DAC960_ExecuteCommand(Command);
6203 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6204
6205 memcpy(CommandMailbox, &SavedCommandMailbox,
6206 sizeof(DAC960_V2_CommandMailbox_T));
6207 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6208}
6209
6210
6211/*
6212 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6213 Controllers.
6214*/
6215
87d156bf 6216static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 6217 unsigned char *UserCommand)
6218{
6219 DAC960_Command_T *Command;
6220 DAC960_V2_CommandMailbox_T *CommandMailbox;
6221 unsigned long flags;
6222 unsigned char Channel, TargetID, LogicalDriveNumber;
6223 unsigned short LogicalDeviceNumber;
6224
6225 spin_lock_irqsave(&Controller->queue_lock, flags);
6226 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6227 DAC960_WaitForCommand(Controller);
6228 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6229 Controller->UserStatusLength = 0;
6230 DAC960_V2_ClearCommand(Command);
6231 Command->CommandType = DAC960_ImmediateCommand;
6232 CommandMailbox = &Command->V2.CommandMailbox;
6233 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6234 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6235 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6236 if (strcmp(UserCommand, "flush-cache") == 0)
6237 {
6238 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6239 CommandMailbox->DeviceOperation.OperationDevice =
6240 DAC960_V2_RAID_Controller;
6241 DAC960_ExecuteCommand(Command);
6242 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6243 }
6244 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6245 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6246 &Channel, &TargetID) &&
6247 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6248 &LogicalDeviceNumber))
6249 {
6250 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6251 LogicalDeviceNumber;
6252 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6253 DAC960_V2_SetDeviceState;
6254 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6255 DAC960_V2_Device_Dead;
6256 DAC960_ExecuteCommand(Command);
6257 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6258 Controller, Channel, TargetID,
6259 (Command->V2.CommandStatus
6260 == DAC960_V2_NormalCompletion
6261 ? "Succeeded" : "Failed"));
6262 }
6263 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6264 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6265 &Channel, &TargetID) &&
6266 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6267 &LogicalDeviceNumber))
6268 {
6269 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6270 LogicalDeviceNumber;
6271 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6272 DAC960_V2_SetDeviceState;
6273 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6274 DAC960_V2_Device_Online;
6275 DAC960_ExecuteCommand(Command);
6276 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6277 Controller, Channel, TargetID,
6278 (Command->V2.CommandStatus
6279 == DAC960_V2_NormalCompletion
6280 ? "Succeeded" : "Failed"));
6281 }
6282 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6283 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6284 &Channel, &TargetID) &&
6285 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6286 &LogicalDeviceNumber))
6287 {
6288 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6289 LogicalDeviceNumber;
6290 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6291 DAC960_V2_SetDeviceState;
6292 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6293 DAC960_V2_Device_Standby;
6294 DAC960_ExecuteCommand(Command);
6295 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6296 Controller, Channel, TargetID,
6297 (Command->V2.CommandStatus
6298 == DAC960_V2_NormalCompletion
6299 ? "Succeeded" : "Failed"));
6300 }
6301 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6302 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6303 &Channel, &TargetID) &&
6304 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6305 &LogicalDeviceNumber))
6306 {
6307 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6308 LogicalDeviceNumber;
6309 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6310 DAC960_V2_RebuildDeviceStart;
6311 DAC960_ExecuteCommand(Command);
6312 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6313 Controller, Channel, TargetID,
6314 (Command->V2.CommandStatus
6315 == DAC960_V2_NormalCompletion
6316 ? "Initiated" : "Not Initiated"));
6317 }
6318 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6319 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6320 &Channel, &TargetID) &&
6321 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6322 &LogicalDeviceNumber))
6323 {
6324 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6325 LogicalDeviceNumber;
6326 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6327 DAC960_V2_RebuildDeviceStop;
6328 DAC960_ExecuteCommand(Command);
6329 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6330 Controller, Channel, TargetID,
6331 (Command->V2.CommandStatus
6332 == DAC960_V2_NormalCompletion
6333 ? "Cancelled" : "Not Cancelled"));
6334 }
6335 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6336 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6337 &LogicalDriveNumber))
6338 {
6339 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6340 LogicalDriveNumber;
6341 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6342 DAC960_V2_ConsistencyCheckStart;
6343 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6344 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6345 DAC960_ExecuteCommand(Command);
6346 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6347 "(/dev/rd/c%dd%d) %s\n",
6348 Controller, LogicalDriveNumber,
6349 Controller->ControllerNumber,
6350 LogicalDriveNumber,
6351 (Command->V2.CommandStatus
6352 == DAC960_V2_NormalCompletion
6353 ? "Initiated" : "Not Initiated"));
6354 }
6355 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6356 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6357 &LogicalDriveNumber))
6358 {
6359 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6360 LogicalDriveNumber;
6361 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6362 DAC960_V2_ConsistencyCheckStop;
6363 DAC960_ExecuteCommand(Command);
6364 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6365 "(/dev/rd/c%dd%d) %s\n",
6366 Controller, LogicalDriveNumber,
6367 Controller->ControllerNumber,
6368 LogicalDriveNumber,
6369 (Command->V2.CommandStatus
6370 == DAC960_V2_NormalCompletion
6371 ? "Cancelled" : "Not Cancelled"));
6372 }
6373 else if (strcmp(UserCommand, "perform-discovery") == 0)
6374 {
6375 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6376 DAC960_ExecuteCommand(Command);
6377 DAC960_UserCritical("Discovery %s\n", Controller,
6378 (Command->V2.CommandStatus
6379 == DAC960_V2_NormalCompletion
6380 ? "Initiated" : "Not Initiated"));
6381 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6382 {
6383 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6384 CommandMailbox->ControllerInfo.CommandControlBits
6385 .DataTransferControllerToHost = true;
6386 CommandMailbox->ControllerInfo.CommandControlBits
6387 .NoAutoRequestSense = true;
6388 CommandMailbox->ControllerInfo.DataTransferSize =
6389 sizeof(DAC960_V2_ControllerInfo_T);
6390 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6391 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6392 DAC960_V2_GetControllerInfo;
6393 /*
6394 * How does this NOT race with the queued Monitoring
6395 * usage of this structure?
6396 */
6397 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6398 .ScatterGatherSegments[0]
6399 .SegmentDataPointer =
6400 Controller->V2.NewControllerInformationDMA;
6401 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6402 .ScatterGatherSegments[0]
6403 .SegmentByteCount =
6404 CommandMailbox->ControllerInfo.DataTransferSize;
6405 DAC960_ExecuteCommand(Command);
6406 while (Controller->V2.NewControllerInformation->PhysicalScanActive)
6407 {
6408 DAC960_ExecuteCommand(Command);
6409 sleep_on_timeout(&Controller->CommandWaitQueue, HZ);
6410 }
6411 DAC960_UserCritical("Discovery Completed\n", Controller);
6412 }
6413 }
6414 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6415 Controller->SuppressEnclosureMessages = true;
6416 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6417 Controller, UserCommand);
6418
6419 spin_lock_irqsave(&Controller->queue_lock, flags);
6420 DAC960_DeallocateCommand(Command);
6421 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6422 return true;
6423}
6424
d5d03eec 6425static int dac960_proc_show(struct seq_file *m, void *v)
1da177e4
LT		 6426{
6427 unsigned char *StatusMessage = "OK\n";
d5d03eec 6428 int ControllerNumber;
1da177e4
LT		 6429 for (ControllerNumber = 0;
6430 ControllerNumber < DAC960_ControllerCount;
6431 ControllerNumber++)
6432 {
6433 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6434 if (Controller == NULL) continue;
6435 if (Controller->MonitoringAlertMode)
6436 {
6437 StatusMessage = "ALERT\n";
6438 break;
6439 }
6440 }
d5d03eec
AD		 6441 seq_puts(m, StatusMessage);
6442 return 0;
1da177e4
LT		 6443}
6444
d5d03eec
AD		 6445static int dac960_proc_open(struct inode *inode, struct file *file)
6446{
6447 return single_open(file, dac960_proc_show, NULL);
6448}
1da177e4 6449
d5d03eec
AD		 6450static const struct file_operations dac960_proc_fops = {
6451 .owner = THIS_MODULE,
6452 .open = dac960_proc_open,
6453 .read = seq_read,
6454 .llseek = seq_lseek,
6455 .release = single_release,
6456};
1da177e4 6457
d5d03eec 6458static int dac960_initial_status_proc_show(struct seq_file *m, void *v)
1da177e4 6459{
d5d03eec
AD		 6460 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6461 seq_printf(m, "%.*s", Controller->InitialStatusLength, Controller->CombinedStatusBuffer);
6462 return 0;
1da177e4
LT		 6463}
6464
d5d03eec
AD		 6465static int dac960_initial_status_proc_open(struct inode *inode, struct file *file)
6466{
6467 return single_open(file, dac960_initial_status_proc_show, PDE(inode)->data);
6468}
1da177e4 6469
d5d03eec
AD		 6470static const struct file_operations dac960_initial_status_proc_fops = {
6471 .owner = THIS_MODULE,
6472 .open = dac960_initial_status_proc_open,
6473 .read = seq_read,
6474 .llseek = seq_lseek,
6475 .release = single_release,
6476};
1da177e4 6477
d5d03eec 6478static int dac960_current_status_proc_show(struct seq_file *m, void *v)
1da177e4 6479{
d5d03eec 6480 DAC960_Controller_T *Controller = (DAC960_Controller_T *) m->private;
1da177e4
LT		 6481 unsigned char *StatusMessage =
6482 "No Rebuild or Consistency Check in Progress\n";
6483 int ProgressMessageLength = strlen(StatusMessage);
1da177e4
LT		 6484 if (jiffies != Controller->LastCurrentStatusTime)
6485 {
6486 Controller->CurrentStatusLength = 0;
6487 DAC960_AnnounceDriver(Controller);
6488 DAC960_ReportControllerConfiguration(Controller);
6489 DAC960_ReportDeviceConfiguration(Controller);
6490 if (Controller->ProgressBufferLength > 0)
6491 ProgressMessageLength = Controller->ProgressBufferLength;
6492 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6493 {
6494 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6495 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6496 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6497 if (Controller->ProgressBufferLength > 0)
6498 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6499 Controller->ProgressBuffer);
6500 else
6501 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6502 StatusMessage);
6503 Controller->CurrentStatusLength += ProgressMessageLength;
6504 }
6505 Controller->LastCurrentStatusTime = jiffies;
6506 }
d5d03eec
AD		 6507 seq_printf(m, "%.*s", Controller->CurrentStatusLength, Controller->CurrentStatusBuffer);
6508 return 0;
1da177e4
LT		 6509}
6510
d5d03eec
AD		 6511static int dac960_current_status_proc_open(struct inode *inode, struct file *file)
6512{
6513 return single_open(file, dac960_current_status_proc_show, PDE(inode)->data);
6514}
1da177e4 6515
d5d03eec
AD		 6516static const struct file_operations dac960_current_status_proc_fops = {
6517 .owner = THIS_MODULE,
6518 .open = dac960_current_status_proc_open,
6519 .read = seq_read,
6520 .llseek = seq_lseek,
6521 .release = single_release,
6522};
1da177e4 6523
d5d03eec 6524static int dac960_user_command_proc_show(struct seq_file *m, void *v)
1da177e4 6525{
d5d03eec 6526 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
1da177e4 6527
d5d03eec
AD		 6528 seq_printf(m, "%.*s", Controller->UserStatusLength, Controller->UserStatusBuffer);
6529 return 0;
6530}
1da177e4 6531
d5d03eec
AD		 6532static int dac960_user_command_proc_open(struct inode *inode, struct file *file)
6533{
6534 return single_open(file, dac960_user_command_proc_show, PDE(inode)->data);
6535}
1da177e4 6536
d5d03eec 6537static ssize_t dac960_user_command_proc_write(struct file *file,
1da177e4 6538 const char __user *Buffer,
d5d03eec 6539 size_t Count, loff_t *pos)
1da177e4 6540{
d5d03eec 6541 DAC960_Controller_T *Controller = (DAC960_Controller_T *) PDE(file->f_path.dentry->d_inode)->data;
1da177e4
LT		 6542 unsigned char CommandBuffer[80];
6543 int Length;
6544 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6545 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6546 CommandBuffer[Count] = '\0';
6547 Length = strlen(CommandBuffer);
e8988933 6548 if (Length > 0 && CommandBuffer[Length-1] == '\n')
1da177e4
LT		 6549 CommandBuffer[--Length] = '\0';
6550 if (Controller->FirmwareType == DAC960_V1_Controller)
6551 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6552 ? Count : -EBUSY);
6553 else
6554 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6555 ? Count : -EBUSY);
6556}
6557
d5d03eec
AD		 6558static const struct file_operations dac960_user_command_proc_fops = {
6559 .owner = THIS_MODULE,
6560 .open = dac960_user_command_proc_open,
6561 .read = seq_read,
6562 .llseek = seq_lseek,
6563 .release = single_release,
6564 .write = dac960_user_command_proc_write,
6565};
1da177e4
LT		 6566
6567/*
6568 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6569 DAC960 Driver.
6570*/
6571
6572static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6573{
6574 struct proc_dir_entry *StatusProcEntry;
6575 struct proc_dir_entry *ControllerProcEntry;
6576 struct proc_dir_entry *UserCommandProcEntry;
6577
6578 if (DAC960_ProcDirectoryEntry == NULL) {
6579 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
d5d03eec 6580 StatusProcEntry = proc_create("status", 0,
1da177e4 6581 DAC960_ProcDirectoryEntry,
d5d03eec 6582 &dac960_proc_fops);
1da177e4
LT		 6583 }
6584
6585 sprintf(Controller->ControllerName, "c%d", Controller->ControllerNumber);
6586 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6587 DAC960_ProcDirectoryEntry);
d5d03eec
AD		 6588 proc_create_data("initial_status", 0, ControllerProcEntry, &dac960_initial_status_proc_fops, Controller);
6589 proc_create_data("current_status", 0, ControllerProcEntry, &dac960_current_status_proc_fops, Controller);
6590 UserCommandProcEntry = proc_create_data("user_command", S_IWUSR | S_IRUSR, ControllerProcEntry, &dac960_user_command_proc_fops, Controller);
1da177e4
LT		 6591 Controller->ControllerProcEntry = ControllerProcEntry;
6592}
6593
6594
6595/*
6596 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6597 DAC960 Driver.
6598*/
6599
6600static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6601{
6602 if (Controller->ControllerProcEntry == NULL)
6603 return;
6604 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6605 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6606 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6607 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6608 Controller->ControllerProcEntry = NULL;
6609}
6610
6611#ifdef DAC960_GAM_MINOR
6612
6613/*
6614 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
6615*/
6616
2610324f
AC		 6617static long DAC960_gam_ioctl(struct file *file, unsigned int Request,
6618 unsigned long Argument)
1da177e4 6619{
2610324f 6620 long ErrorCode = 0;
1da177e4 6621 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
2610324f
AC		 6622
6623 lock_kernel();
1da177e4
LT		 6624 switch (Request)
6625 {
6626 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
2610324f
AC		 6627 ErrorCode = DAC960_ControllerCount;
6628 break;
1da177e4
LT		 6629 case DAC960_IOCTL_GET_CONTROLLER_INFO:
6630 {
6631 DAC960_ControllerInfo_T __user *UserSpaceControllerInfo =
6632 (DAC960_ControllerInfo_T __user *) Argument;
6633 DAC960_ControllerInfo_T ControllerInfo;
6634 DAC960_Controller_T *Controller;
6635 int ControllerNumber;
2610324f
AC		 6636 if (UserSpaceControllerInfo == NULL)
6637 ErrorCode = -EINVAL;
6638 else ErrorCode = get_user(ControllerNumber,
1da177e4 6639 &UserSpaceControllerInfo->ControllerNumber);
2610324f 6640 if (ErrorCode != 0)
a419aef8 6641 break;
2610324f 6642 ErrorCode = -ENXIO;
1da177e4 6643 if (ControllerNumber < 0 ||
2610324f
AC		 6644 ControllerNumber > DAC960_ControllerCount - 1) {
6645 break;
6646 }
1da177e4 6647 Controller = DAC960_Controllers[ControllerNumber];
2610324f 6648 if (Controller == NULL)
a419aef8 6649 break;
1da177e4
LT		 6650 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6651 ControllerInfo.ControllerNumber = ControllerNumber;
6652 ControllerInfo.FirmwareType = Controller->FirmwareType;
6653 ControllerInfo.Channels = Controller->Channels;
6654 ControllerInfo.Targets = Controller->Targets;
6655 ControllerInfo.PCI_Bus = Controller->Bus;
6656 ControllerInfo.PCI_Device = Controller->Device;
6657 ControllerInfo.PCI_Function = Controller->Function;
6658 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6659 ControllerInfo.PCI_Address = Controller->PCI_Address;
6660 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6661 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
2610324f 6662 ErrorCode = (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
1da177e4 6663 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
2610324f 6664 break;
1da177e4
LT		 6665 }
6666 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
6667 {
6668 DAC960_V1_UserCommand_T __user *UserSpaceUserCommand =
6669 (DAC960_V1_UserCommand_T __user *) Argument;
6670 DAC960_V1_UserCommand_T UserCommand;
6671 DAC960_Controller_T *Controller;
6672 DAC960_Command_T *Command = NULL;
6673 DAC960_V1_CommandOpcode_T CommandOpcode;
6674 DAC960_V1_CommandStatus_T CommandStatus;
6675 DAC960_V1_DCDB_T DCDB;
6676 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6677 dma_addr_t DCDB_IOBUFDMA;
6678 unsigned long flags;
6679 int ControllerNumber, DataTransferLength;
6680 unsigned char *DataTransferBuffer = NULL;
6681 dma_addr_t DataTransferBufferDMA;
2610324f
AC		 6682 if (UserSpaceUserCommand == NULL) {
6683 ErrorCode = -EINVAL;
6684 break;
6685 }
1da177e4
LT		 6686 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6687 sizeof(DAC960_V1_UserCommand_T))) {
6688 ErrorCode = -EFAULT;
2610324f 6689 break;
1da177e4
LT		 6690 }
6691 ControllerNumber = UserCommand.ControllerNumber;
2610324f 6692 ErrorCode = -ENXIO;
1da177e4
LT		 6693 if (ControllerNumber < 0 ||
6694 ControllerNumber > DAC960_ControllerCount - 1)
2610324f 6695 break;
1da177e4 6696 Controller = DAC960_Controllers[ControllerNumber];
2610324f
AC		 6697 if (Controller == NULL)
6698 break;
6699 ErrorCode = -EINVAL;
6700 if (Controller->FirmwareType != DAC960_V1_Controller)
6701 break;
1da177e4
LT		 6702 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6703 DataTransferLength = UserCommand.DataTransferLength;
2610324f
AC		 6704 if (CommandOpcode & 0x80)
6705 break;
1da177e4
LT		 6706 if (CommandOpcode == DAC960_V1_DCDB)
6707 {
6708 if (copy_from_user(&DCDB, UserCommand.DCDB,
6709 sizeof(DAC960_V1_DCDB_T))) {
6710 ErrorCode = -EFAULT;
2610324f 6711 break;
1da177e4 6712 }
2610324f
AC		 6713 if (DCDB.Channel >= DAC960_V1_MaxChannels)
6714 break;
1da177e4
LT		 6715 if (!((DataTransferLength == 0 &&
6716 DCDB.Direction
6717 == DAC960_V1_DCDB_NoDataTransfer) ||
6718 (DataTransferLength > 0 &&
6719 DCDB.Direction
6720 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6721 (DataTransferLength < 0 &&
6722 DCDB.Direction
6723 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
2610324f 6724 break;
1da177e4
LT		 6725 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6726 != abs(DataTransferLength))
2610324f 6727 break;
1da177e4
LT		 6728 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6729 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
2610324f
AC		 6730 if (DCDB_IOBUF == NULL) {
6731 ErrorCode = -ENOMEM;
6732 break;
6733 }
1da177e4 6734 }
2610324f 6735 ErrorCode = -ENOMEM;
1da177e4
LT		 6736 if (DataTransferLength > 0)
6737 {
6738 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6739 DataTransferLength, &DataTransferBufferDMA);
2610324f
AC		 6740 if (DataTransferBuffer == NULL)
6741 break;
1da177e4
LT		 6742 memset(DataTransferBuffer, 0, DataTransferLength);
6743 }
6744 else if (DataTransferLength < 0)
6745 {
6746 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6747 -DataTransferLength, &DataTransferBufferDMA);
2610324f
AC		 6748 if (DataTransferBuffer == NULL)
6749 break;
1da177e4
LT		 6750 if (copy_from_user(DataTransferBuffer,
6751 UserCommand.DataTransferBuffer,
6752 -DataTransferLength)) {
6753 ErrorCode = -EFAULT;
2610324f 6754 break;
1da177e4
LT		 6755 }
6756 }
6757 if (CommandOpcode == DAC960_V1_DCDB)
6758 {
6759 spin_lock_irqsave(&Controller->queue_lock, flags);
6760 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6761 DAC960_WaitForCommand(Controller);
6762 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6763 [DCDB.TargetID])
6764 {
6765 spin_unlock_irq(&Controller->queue_lock);
6766 __wait_event(Controller->CommandWaitQueue,
6767 !Controller->V1.DirectCommandActive
6768 [DCDB.Channel][DCDB.TargetID]);
6769 spin_lock_irq(&Controller->queue_lock);
6770 }
6771 Controller->V1.DirectCommandActive[DCDB.Channel]
6772 [DCDB.TargetID] = true;
6773 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6774 DAC960_V1_ClearCommand(Command);
6775 Command->CommandType = DAC960_ImmediateCommand;
6776 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6777 sizeof(DAC960_V1_CommandMailbox_T));
6778 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6779 DCDB.BusAddress = DataTransferBufferDMA;
6780 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6781 }
6782 else
6783 {
6784 spin_lock_irqsave(&Controller->queue_lock, flags);
6785 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6786 DAC960_WaitForCommand(Controller);
6787 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6788 DAC960_V1_ClearCommand(Command);
6789 Command->CommandType = DAC960_ImmediateCommand;
6790 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6791 sizeof(DAC960_V1_CommandMailbox_T));
6792 if (DataTransferBuffer != NULL)
6793 Command->V1.CommandMailbox.Type3.BusAddress =
6794 DataTransferBufferDMA;
6795 }
6796 DAC960_ExecuteCommand(Command);
6797 CommandStatus = Command->V1.CommandStatus;
6798 spin_lock_irqsave(&Controller->queue_lock, flags);
6799 DAC960_DeallocateCommand(Command);
6800 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6801 if (DataTransferLength > 0)
6802 {
6803 if (copy_to_user(UserCommand.DataTransferBuffer,
6804 DataTransferBuffer, DataTransferLength)) {
6805 ErrorCode = -EFAULT;
6806 goto Failure1;
6807 }
6808 }
6809 if (CommandOpcode == DAC960_V1_DCDB)
6810 {
6811 /*
6812 I don't believe Target or Channel in the DCDB_IOBUF
6813 should be any different from the contents of DCDB.
6814 */
6815 Controller->V1.DirectCommandActive[DCDB.Channel]
6816 [DCDB.TargetID] = false;
6817 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6818 sizeof(DAC960_V1_DCDB_T))) {
6819 ErrorCode = -EFAULT;
6820 goto Failure1;
6821 }
6822 }
6823 ErrorCode = CommandStatus;
6824 Failure1:
6825 if (DataTransferBuffer != NULL)
6826 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6827 DataTransferBuffer, DataTransferBufferDMA);
6828 if (DCDB_IOBUF != NULL)
6829 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6830 DCDB_IOBUF, DCDB_IOBUFDMA);
2610324f 6831 break;
1da177e4
LT		 6832 }
6833 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
6834 {
6835 DAC960_V2_UserCommand_T __user *UserSpaceUserCommand =
6836 (DAC960_V2_UserCommand_T __user *) Argument;
6837 DAC960_V2_UserCommand_T UserCommand;
6838 DAC960_Controller_T *Controller;
6839 DAC960_Command_T *Command = NULL;
6840 DAC960_V2_CommandMailbox_T *CommandMailbox;
6841 DAC960_V2_CommandStatus_T CommandStatus;
6842 unsigned long flags;
6843 int ControllerNumber, DataTransferLength;
6844 int DataTransferResidue, RequestSenseLength;
6845 unsigned char *DataTransferBuffer = NULL;
6846 dma_addr_t DataTransferBufferDMA;
6847 unsigned char *RequestSenseBuffer = NULL;
6848 dma_addr_t RequestSenseBufferDMA;
2610324f
AC		 6849
6850 ErrorCode = -EINVAL;
6851 if (UserSpaceUserCommand == NULL)
6852 break;
1da177e4
LT		 6853 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6854 sizeof(DAC960_V2_UserCommand_T))) {
6855 ErrorCode = -EFAULT;
2610324f 6856 break;
1da177e4 6857 }
2610324f 6858 ErrorCode = -ENXIO;
1da177e4
LT		 6859 ControllerNumber = UserCommand.ControllerNumber;
6860 if (ControllerNumber < 0 ||
6861 ControllerNumber > DAC960_ControllerCount - 1)
2610324f 6862 break;
1da177e4 6863 Controller = DAC960_Controllers[ControllerNumber];
2610324f
AC		 6864 if (Controller == NULL)
6865 break;
6866 if (Controller->FirmwareType != DAC960_V2_Controller){
6867 ErrorCode = -EINVAL;
6868 break;
6869 }
1da177e4 6870 DataTransferLength = UserCommand.DataTransferLength;
2610324f 6871 ErrorCode = -ENOMEM;
1da177e4
LT		 6872 if (DataTransferLength > 0)
6873 {
6874 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6875 DataTransferLength, &DataTransferBufferDMA);
2610324f
AC		 6876 if (DataTransferBuffer == NULL)
6877 break;
1da177e4
LT		 6878 memset(DataTransferBuffer, 0, DataTransferLength);
6879 }
6880 else if (DataTransferLength < 0)
6881 {
6882 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6883 -DataTransferLength, &DataTransferBufferDMA);
2610324f
AC		 6884 if (DataTransferBuffer == NULL)
6885 break;
1da177e4
LT		 6886 if (copy_from_user(DataTransferBuffer,
6887 UserCommand.DataTransferBuffer,
6888 -DataTransferLength)) {
6889 ErrorCode = -EFAULT;
6890 goto Failure2;
6891 }
6892 }
6893 RequestSenseLength = UserCommand.RequestSenseLength;
6894 if (RequestSenseLength > 0)
6895 {
6896 RequestSenseBuffer = pci_alloc_consistent(Controller->PCIDevice,
6897 RequestSenseLength, &RequestSenseBufferDMA);
6898 if (RequestSenseBuffer == NULL)
6899 {
6900 ErrorCode = -ENOMEM;
6901 goto Failure2;
6902 }
6903 memset(RequestSenseBuffer, 0, RequestSenseLength);
6904 }
6905 spin_lock_irqsave(&Controller->queue_lock, flags);
6906 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6907 DAC960_WaitForCommand(Controller);
6908 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6909 DAC960_V2_ClearCommand(Command);
6910 Command->CommandType = DAC960_ImmediateCommand;
6911 CommandMailbox = &Command->V2.CommandMailbox;
6912 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6913 sizeof(DAC960_V2_CommandMailbox_T));
6914 CommandMailbox->Common.CommandControlBits
6915 .AdditionalScatterGatherListMemory = false;
6916 CommandMailbox->Common.CommandControlBits
6917 .NoAutoRequestSense = true;
6918 CommandMailbox->Common.DataTransferSize = 0;
6919 CommandMailbox->Common.DataTransferPageNumber = 0;
6920 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6921 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6922 if (DataTransferLength != 0)
6923 {
6924 if (DataTransferLength > 0)
6925 {
6926 CommandMailbox->Common.CommandControlBits
6927 .DataTransferControllerToHost = true;
6928 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6929 }
6930 else
6931 {
6932 CommandMailbox->Common.CommandControlBits
6933 .DataTransferControllerToHost = false;
6934 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6935 }
6936 CommandMailbox->Common.DataTransferMemoryAddress
6937 .ScatterGatherSegments[0]
6938 .SegmentDataPointer = DataTransferBufferDMA;
6939 CommandMailbox->Common.DataTransferMemoryAddress
6940 .ScatterGatherSegments[0]
6941 .SegmentByteCount =
6942 CommandMailbox->Common.DataTransferSize;
6943 }
6944 if (RequestSenseLength > 0)
6945 {
6946 CommandMailbox->Common.CommandControlBits
6947 .NoAutoRequestSense = false;
6948 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6949 CommandMailbox->Common.RequestSenseBusAddress =
6950 RequestSenseBufferDMA;
6951 }
6952 DAC960_ExecuteCommand(Command);
6953 CommandStatus = Command->V2.CommandStatus;
6954 RequestSenseLength = Command->V2.RequestSenseLength;
6955 DataTransferResidue = Command->V2.DataTransferResidue;
6956 spin_lock_irqsave(&Controller->queue_lock, flags);
6957 DAC960_DeallocateCommand(Command);
6958 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6959 if (RequestSenseLength > UserCommand.RequestSenseLength)
6960 RequestSenseLength = UserCommand.RequestSenseLength;
6961 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6962 &DataTransferResidue,
6963 sizeof(DataTransferResidue))) {
6964 ErrorCode = -EFAULT;
6965 goto Failure2;
6966 }
6967 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6968 &RequestSenseLength, sizeof(RequestSenseLength))) {
6969 ErrorCode = -EFAULT;
6970 goto Failure2;
6971 }
6972 if (DataTransferLength > 0)
6973 {
6974 if (copy_to_user(UserCommand.DataTransferBuffer,
6975 DataTransferBuffer, DataTransferLength)) {
6976 ErrorCode = -EFAULT;
6977 goto Failure2;
6978 }
6979 }
6980 if (RequestSenseLength > 0)
6981 {
6982 if (copy_to_user(UserCommand.RequestSenseBuffer,
6983 RequestSenseBuffer, RequestSenseLength)) {
6984 ErrorCode = -EFAULT;
6985 goto Failure2;
6986 }
6987 }
6988 ErrorCode = CommandStatus;
6989 Failure2:
6990 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6991 DataTransferBuffer, DataTransferBufferDMA);
6992 if (RequestSenseBuffer != NULL)
6993 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
6994 RequestSenseBuffer, RequestSenseBufferDMA);
2610324f 6995 break;
1da177e4
LT		 6996 }
6997 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
6998 {
6999 DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus =
7000 (DAC960_V2_GetHealthStatus_T __user *) Argument;
7001 DAC960_V2_GetHealthStatus_T GetHealthStatus;
7002 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
7003 DAC960_Controller_T *Controller;
7004 int ControllerNumber;
2610324f
AC		 7005 if (UserSpaceGetHealthStatus == NULL) {
7006 ErrorCode = -EINVAL;
7007 break;
7008 }
1da177e4 7009 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
2610324f
AC		 7010 sizeof(DAC960_V2_GetHealthStatus_T))) {
7011 ErrorCode = -EFAULT;
7012 break;
7013 }
7014 ErrorCode = -ENXIO;
1da177e4
LT		 7015 ControllerNumber = GetHealthStatus.ControllerNumber;
7016 if (ControllerNumber < 0 ||
7017 ControllerNumber > DAC960_ControllerCount - 1)
2610324f 7018 break;
1da177e4 7019 Controller = DAC960_Controllers[ControllerNumber];
2610324f
AC		 7020 if (Controller == NULL)
7021 break;
7022 if (Controller->FirmwareType != DAC960_V2_Controller) {
7023 ErrorCode = -EINVAL;
7024 break;
7025 }
1da177e4
LT		 7026 if (copy_from_user(&HealthStatusBuffer,
7027 GetHealthStatus.HealthStatusBuffer,
2610324f
AC		 7028 sizeof(DAC960_V2_HealthStatusBuffer_T))) {
7029 ErrorCode = -EFAULT;
7030 break;
7031 }
1da177e4
LT		 7032 while (Controller->V2.HealthStatusBuffer->StatusChangeCounter
7033 == HealthStatusBuffer.StatusChangeCounter &&
7034 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
7035 == HealthStatusBuffer.NextEventSequenceNumber)
7036 {
7037 interruptible_sleep_on_timeout(&Controller->HealthStatusWaitQueue,
7038 DAC960_MonitoringTimerInterval);
2610324f
AC		 7039 if (signal_pending(current)) {
7040 ErrorCode = -EINTR;
7041 break;
7042 }
1da177e4
LT		 7043 }
7044 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
7045 Controller->V2.HealthStatusBuffer,
7046 sizeof(DAC960_V2_HealthStatusBuffer_T)))
2610324f
AC		 7047 ErrorCode = -EFAULT;
7048 else
7049 ErrorCode = 0;
1da177e4 7050 }
2610324f
AC		 7051 default:
7052 ErrorCode = -ENOTTY;
1da177e4 7053 }
2610324f
AC		 7054 unlock_kernel();
7055 return ErrorCode;
1da177e4
LT		 7056}
7057
2b8693c0 7058static const struct file_operations DAC960_gam_fops = {
1da177e4 7059 .owner = THIS_MODULE,
2610324f 7060 .unlocked_ioctl = DAC960_gam_ioctl
1da177e4
LT		 7061};
7062
7063static struct miscdevice DAC960_gam_dev = {
7064 DAC960_GAM_MINOR,
7065 "dac960_gam",
7066 &DAC960_gam_fops
7067};
7068
7069static int DAC960_gam_init(void)
7070{
7071 int ret;
7072
7073 ret = misc_register(&DAC960_gam_dev);
7074 if (ret)
7075 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7076 return ret;
7077}
7078
7079static void DAC960_gam_cleanup(void)
7080{
7081 misc_deregister(&DAC960_gam_dev);
7082}
7083
7084#endif /* DAC960_GAM_MINOR */
7085
5b76ffd5
CH		 7086static struct DAC960_privdata DAC960_GEM_privdata = {
7087 .HardwareType = DAC960_GEM_Controller,
7088 .FirmwareType = DAC960_V2_Controller,
7089 .InterruptHandler = DAC960_GEM_InterruptHandler,
7090 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7091};
7092
7093
1da177e4
LT		 7094static struct DAC960_privdata DAC960_BA_privdata = {
7095 .HardwareType = DAC960_BA_Controller,
7096 .FirmwareType = DAC960_V2_Controller,
7097 .InterruptHandler = DAC960_BA_InterruptHandler,
7098 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7099};
7100
7101static struct DAC960_privdata DAC960_LP_privdata = {
7102 .HardwareType = DAC960_LP_Controller,
df9dc83d 7103 .FirmwareType = DAC960_V2_Controller,
1da177e4
LT		 7104 .InterruptHandler = DAC960_LP_InterruptHandler,
7105 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7106};
7107
7108static struct DAC960_privdata DAC960_LA_privdata = {
7109 .HardwareType = DAC960_LA_Controller,
7110 .FirmwareType = DAC960_V1_Controller,
7111 .InterruptHandler = DAC960_LA_InterruptHandler,
7112 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7113};
7114
7115static struct DAC960_privdata DAC960_PG_privdata = {
7116 .HardwareType = DAC960_PG_Controller,
7117 .FirmwareType = DAC960_V1_Controller,
7118 .InterruptHandler = DAC960_PG_InterruptHandler,
7119 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7120};
7121
7122static struct DAC960_privdata DAC960_PD_privdata = {
7123 .HardwareType = DAC960_PD_Controller,
7124 .FirmwareType = DAC960_V1_Controller,
7125 .InterruptHandler = DAC960_PD_InterruptHandler,
7126 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7127};
7128
7129static struct DAC960_privdata DAC960_P_privdata = {
7130 .HardwareType = DAC960_P_Controller,
7131 .FirmwareType = DAC960_V1_Controller,
7132 .InterruptHandler = DAC960_P_InterruptHandler,
7133 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7134};
7135
3d447ec0 7136static const struct pci_device_id DAC960_id_table[] = {
5b76ffd5
CH		 7137 {
7138 .vendor = PCI_VENDOR_ID_MYLEX,
7139 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
fddafd3d 7140 .subvendor = PCI_VENDOR_ID_MYLEX,
5b76ffd5
CH		 7141 .subdevice = PCI_ANY_ID,
7142 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7143 },
1da177e4
LT		 7144 {
7145 .vendor = PCI_VENDOR_ID_MYLEX,
7146 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7147 .subvendor = PCI_ANY_ID,
7148 .subdevice = PCI_ANY_ID,
7149 .driver_data = (unsigned long) &DAC960_BA_privdata,
7150 },
7151 {
7152 .vendor = PCI_VENDOR_ID_MYLEX,
7153 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7154 .subvendor = PCI_ANY_ID,
7155 .subdevice = PCI_ANY_ID,
7156 .driver_data = (unsigned long) &DAC960_LP_privdata,
7157 },
7158 {
7159 .vendor = PCI_VENDOR_ID_DEC,
7160 .device = PCI_DEVICE_ID_DEC_21285,
7161 .subvendor = PCI_VENDOR_ID_MYLEX,
7162 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7163 .driver_data = (unsigned long) &DAC960_LA_privdata,
7164 },
7165 {
7166 .vendor = PCI_VENDOR_ID_MYLEX,
7167 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7168 .subvendor = PCI_ANY_ID,
7169 .subdevice = PCI_ANY_ID,
7170 .driver_data = (unsigned long) &DAC960_PG_privdata,
7171 },
7172 {
7173 .vendor = PCI_VENDOR_ID_MYLEX,
7174 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7175 .subvendor = PCI_ANY_ID,
7176 .subdevice = PCI_ANY_ID,
7177 .driver_data = (unsigned long) &DAC960_PD_privdata,
7178 },
7179 {
7180 .vendor = PCI_VENDOR_ID_MYLEX,
7181 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7182 .subvendor = PCI_ANY_ID,
7183 .subdevice = PCI_ANY_ID,
7184 .driver_data = (unsigned long) &DAC960_P_privdata,
7185 },
7186 {0, },
7187};
7188
7189MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7190
7191static struct pci_driver DAC960_pci_driver = {
7192 .name = "DAC960",
7193 .id_table = DAC960_id_table,
7194 .probe = DAC960_Probe,
7195 .remove = DAC960_Remove,
7196};
7197
3c36543a 7198static int __init DAC960_init_module(void)
1da177e4
LT		 7199{
7200 int ret;
7201
9bfab8ce 7202 ret = pci_register_driver(&DAC960_pci_driver);
1da177e4
LT		 7203#ifdef DAC960_GAM_MINOR
7204 if (!ret)
7205 DAC960_gam_init();
7206#endif
7207 return ret;
7208}
7209
3c36543a 7210static void __exit DAC960_cleanup_module(void)
1da177e4
LT		 7211{
7212 int i;
7213
7214#ifdef DAC960_GAM_MINOR
7215 DAC960_gam_cleanup();
7216#endif
7217
7218 for (i = 0; i < DAC960_ControllerCount; i++) {
7219 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7220 if (Controller == NULL)
7221 continue;
7222 DAC960_FinalizeController(Controller);
7223 }
7224 if (DAC960_ProcDirectoryEntry != NULL) {
7225 remove_proc_entry("rd/status", NULL);
7226 remove_proc_entry("rd", NULL);
7227 }
7228 DAC960_ControllerCount = 0;
7229 pci_unregister_driver(&DAC960_pci_driver);
7230}
7231
7232module_init(DAC960_init_module);
7233module_exit(DAC960_cleanup_module);
7234
7235MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)