pata_of_platform: remove direct dependency on OF_IRQ
[linux-2.6-block.git] / drivers / ata / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG
2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
92c52c52
AC
33 * Standards documents from:
34 * http://www.t13.org (ATA standards, PCI DMA IDE spec)
35 * http://www.t10.org (SCSI MMC - for ATAPI MMC)
36 * http://www.sata-io.org (SATA)
37 * http://www.compactflash.org (CF)
38 * http://www.qic.org (QIC157 - Tape and DSC)
39 * http://www.ce-ata.org (CE-ATA: not supported)
40 *
1da177e4
LT
41 */
42
1da177e4
LT
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/pci.h>
46#include <linux/init.h>
47#include <linux/list.h>
48#include <linux/mm.h>
1da177e4
LT
49#include <linux/spinlock.h>
50#include <linux/blkdev.h>
51#include <linux/delay.h>
52#include <linux/timer.h>
53#include <linux/interrupt.h>
54#include <linux/completion.h>
55#include <linux/suspend.h>
56#include <linux/workqueue.h>
378f058c 57#include <linux/scatterlist.h>
2dcb407e 58#include <linux/io.h>
79318057 59#include <linux/async.h>
e18086d6 60#include <linux/log2.h>
5a0e3ad6 61#include <linux/slab.h>
1da177e4 62#include <scsi/scsi.h>
193515d5 63#include <scsi/scsi_cmnd.h>
1da177e4
LT
64#include <scsi/scsi_host.h>
65#include <linux/libata.h>
1da177e4 66#include <asm/byteorder.h>
140b5e59 67#include <linux/cdrom.h>
9990b6f3 68#include <linux/ratelimit.h>
9ee4f393 69#include <linux/pm_runtime.h>
1da177e4
LT
70
71#include "libata.h"
d9027470 72#include "libata-transport.h"
fda0efc5 73
d7bb4cc7 74/* debounce timing parameters in msecs { interval, duration, timeout } */
e9c83914
TH
75const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
76const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
77const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
d7bb4cc7 78
029cfd6b 79const struct ata_port_operations ata_base_port_ops = {
0aa1113d 80 .prereset = ata_std_prereset,
203c75b8 81 .postreset = ata_std_postreset,
a1efdaba 82 .error_handler = ata_std_error_handler,
029cfd6b
TH
83};
84
85const struct ata_port_operations sata_port_ops = {
86 .inherits = &ata_base_port_ops,
87
88 .qc_defer = ata_std_qc_defer,
57c9efdf 89 .hardreset = sata_std_hardreset,
029cfd6b
TH
90};
91
3373efd8
TH
92static unsigned int ata_dev_init_params(struct ata_device *dev,
93 u16 heads, u16 sectors);
94static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
95static void ata_dev_xfermask(struct ata_device *dev);
75683fe7 96static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
1da177e4 97
f3187195 98unsigned int ata_print_id = 1;
1da177e4 99
33267325
TH
100struct ata_force_param {
101 const char *name;
102 unsigned int cbl;
103 int spd_limit;
104 unsigned long xfer_mask;
105 unsigned int horkage_on;
106 unsigned int horkage_off;
05944bdf 107 unsigned int lflags;
33267325
TH
108};
109
110struct ata_force_ent {
111 int port;
112 int device;
113 struct ata_force_param param;
114};
115
116static struct ata_force_ent *ata_force_tbl;
117static int ata_force_tbl_size;
118
119static char ata_force_param_buf[PAGE_SIZE] __initdata;
7afb4222
TH
120/* param_buf is thrown away after initialization, disallow read */
121module_param_string(force, ata_force_param_buf, sizeof(ata_force_param_buf), 0);
33267325
TH
122MODULE_PARM_DESC(force, "Force ATA configurations including cable type, link speed and transfer mode (see Documentation/kernel-parameters.txt for details)");
123
2486fa56 124static int atapi_enabled = 1;
1623c81e 125module_param(atapi_enabled, int, 0444);
ad5d8eac 126MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on [default])");
1623c81e 127
c5c61bda 128static int atapi_dmadir = 0;
95de719a 129module_param(atapi_dmadir, int, 0444);
ad5d8eac 130MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off [default], 1=on)");
95de719a 131
baf4fdfa
ML
132int atapi_passthru16 = 1;
133module_param(atapi_passthru16, int, 0444);
ad5d8eac 134MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices (0=off, 1=on [default])");
baf4fdfa 135
c3c013a2
JG
136int libata_fua = 0;
137module_param_named(fua, libata_fua, int, 0444);
ad5d8eac 138MODULE_PARM_DESC(fua, "FUA support (0=off [default], 1=on)");
c3c013a2 139
2dcb407e 140static int ata_ignore_hpa;
1e999736
AC
141module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
142MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
143
b3a70601
AC
144static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
145module_param_named(dma, libata_dma_mask, int, 0444);
146MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
147
87fbc5a0 148static int ata_probe_timeout;
a8601e5f
AM
149module_param(ata_probe_timeout, int, 0444);
150MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
151
6ebe9d86 152int libata_noacpi = 0;
d7d0dad6 153module_param_named(noacpi, libata_noacpi, int, 0444);
ad5d8eac 154MODULE_PARM_DESC(noacpi, "Disable the use of ACPI in probe/suspend/resume (0=off [default], 1=on)");
11ef697b 155
ae8d4ee7
AC
156int libata_allow_tpm = 0;
157module_param_named(allow_tpm, libata_allow_tpm, int, 0444);
ad5d8eac 158MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands (0=off [default], 1=on)");
ae8d4ee7 159
e7ecd435
TH
160static int atapi_an;
161module_param(atapi_an, int, 0444);
162MODULE_PARM_DESC(atapi_an, "Enable ATAPI AN media presence notification (0=0ff [default], 1=on)");
163
1da177e4
LT
164MODULE_AUTHOR("Jeff Garzik");
165MODULE_DESCRIPTION("Library module for ATA devices");
166MODULE_LICENSE("GPL");
167MODULE_VERSION(DRV_VERSION);
168
0baab86b 169
9913ff8a
TH
170static bool ata_sstatus_online(u32 sstatus)
171{
172 return (sstatus & 0xf) == 0x3;
173}
174
1eca4365
TH
175/**
176 * ata_link_next - link iteration helper
177 * @link: the previous link, NULL to start
178 * @ap: ATA port containing links to iterate
179 * @mode: iteration mode, one of ATA_LITER_*
180 *
181 * LOCKING:
182 * Host lock or EH context.
aadffb68 183 *
1eca4365
TH
184 * RETURNS:
185 * Pointer to the next link.
aadffb68 186 */
1eca4365
TH
187struct ata_link *ata_link_next(struct ata_link *link, struct ata_port *ap,
188 enum ata_link_iter_mode mode)
aadffb68 189{
1eca4365
TH
190 BUG_ON(mode != ATA_LITER_EDGE &&
191 mode != ATA_LITER_PMP_FIRST && mode != ATA_LITER_HOST_FIRST);
192
aadffb68 193 /* NULL link indicates start of iteration */
1eca4365
TH
194 if (!link)
195 switch (mode) {
196 case ATA_LITER_EDGE:
197 case ATA_LITER_PMP_FIRST:
198 if (sata_pmp_attached(ap))
199 return ap->pmp_link;
200 /* fall through */
201 case ATA_LITER_HOST_FIRST:
202 return &ap->link;
203 }
aadffb68 204
1eca4365
TH
205 /* we just iterated over the host link, what's next? */
206 if (link == &ap->link)
207 switch (mode) {
208 case ATA_LITER_HOST_FIRST:
209 if (sata_pmp_attached(ap))
210 return ap->pmp_link;
211 /* fall through */
212 case ATA_LITER_PMP_FIRST:
213 if (unlikely(ap->slave_link))
b1c72916 214 return ap->slave_link;
1eca4365
TH
215 /* fall through */
216 case ATA_LITER_EDGE:
aadffb68 217 return NULL;
b1c72916 218 }
aadffb68 219
b1c72916
TH
220 /* slave_link excludes PMP */
221 if (unlikely(link == ap->slave_link))
222 return NULL;
223
1eca4365 224 /* we were over a PMP link */
aadffb68
TH
225 if (++link < ap->pmp_link + ap->nr_pmp_links)
226 return link;
1eca4365
TH
227
228 if (mode == ATA_LITER_PMP_FIRST)
229 return &ap->link;
230
aadffb68
TH
231 return NULL;
232}
233
1eca4365
TH
234/**
235 * ata_dev_next - device iteration helper
236 * @dev: the previous device, NULL to start
237 * @link: ATA link containing devices to iterate
238 * @mode: iteration mode, one of ATA_DITER_*
239 *
240 * LOCKING:
241 * Host lock or EH context.
242 *
243 * RETURNS:
244 * Pointer to the next device.
245 */
246struct ata_device *ata_dev_next(struct ata_device *dev, struct ata_link *link,
247 enum ata_dev_iter_mode mode)
248{
249 BUG_ON(mode != ATA_DITER_ENABLED && mode != ATA_DITER_ENABLED_REVERSE &&
250 mode != ATA_DITER_ALL && mode != ATA_DITER_ALL_REVERSE);
251
252 /* NULL dev indicates start of iteration */
253 if (!dev)
254 switch (mode) {
255 case ATA_DITER_ENABLED:
256 case ATA_DITER_ALL:
257 dev = link->device;
258 goto check;
259 case ATA_DITER_ENABLED_REVERSE:
260 case ATA_DITER_ALL_REVERSE:
261 dev = link->device + ata_link_max_devices(link) - 1;
262 goto check;
263 }
264
265 next:
266 /* move to the next one */
267 switch (mode) {
268 case ATA_DITER_ENABLED:
269 case ATA_DITER_ALL:
270 if (++dev < link->device + ata_link_max_devices(link))
271 goto check;
272 return NULL;
273 case ATA_DITER_ENABLED_REVERSE:
274 case ATA_DITER_ALL_REVERSE:
275 if (--dev >= link->device)
276 goto check;
277 return NULL;
278 }
279
280 check:
281 if ((mode == ATA_DITER_ENABLED || mode == ATA_DITER_ENABLED_REVERSE) &&
282 !ata_dev_enabled(dev))
283 goto next;
284 return dev;
285}
286
b1c72916
TH
287/**
288 * ata_dev_phys_link - find physical link for a device
289 * @dev: ATA device to look up physical link for
290 *
291 * Look up physical link which @dev is attached to. Note that
292 * this is different from @dev->link only when @dev is on slave
293 * link. For all other cases, it's the same as @dev->link.
294 *
295 * LOCKING:
296 * Don't care.
297 *
298 * RETURNS:
299 * Pointer to the found physical link.
300 */
301struct ata_link *ata_dev_phys_link(struct ata_device *dev)
302{
303 struct ata_port *ap = dev->link->ap;
304
305 if (!ap->slave_link)
306 return dev->link;
307 if (!dev->devno)
308 return &ap->link;
309 return ap->slave_link;
310}
311
33267325
TH
312/**
313 * ata_force_cbl - force cable type according to libata.force
4cdfa1b3 314 * @ap: ATA port of interest
33267325
TH
315 *
316 * Force cable type according to libata.force and whine about it.
317 * The last entry which has matching port number is used, so it
318 * can be specified as part of device force parameters. For
319 * example, both "a:40c,1.00:udma4" and "1.00:40c,udma4" have the
320 * same effect.
321 *
322 * LOCKING:
323 * EH context.
324 */
325void ata_force_cbl(struct ata_port *ap)
326{
327 int i;
328
329 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
330 const struct ata_force_ent *fe = &ata_force_tbl[i];
331
332 if (fe->port != -1 && fe->port != ap->print_id)
333 continue;
334
335 if (fe->param.cbl == ATA_CBL_NONE)
336 continue;
337
338 ap->cbl = fe->param.cbl;
a9a79dfe 339 ata_port_notice(ap, "FORCE: cable set to %s\n", fe->param.name);
33267325
TH
340 return;
341 }
342}
343
344/**
05944bdf 345 * ata_force_link_limits - force link limits according to libata.force
33267325
TH
346 * @link: ATA link of interest
347 *
05944bdf
TH
348 * Force link flags and SATA spd limit according to libata.force
349 * and whine about it. When only the port part is specified
350 * (e.g. 1:), the limit applies to all links connected to both
351 * the host link and all fan-out ports connected via PMP. If the
352 * device part is specified as 0 (e.g. 1.00:), it specifies the
353 * first fan-out link not the host link. Device number 15 always
b1c72916
TH
354 * points to the host link whether PMP is attached or not. If the
355 * controller has slave link, device number 16 points to it.
33267325
TH
356 *
357 * LOCKING:
358 * EH context.
359 */
05944bdf 360static void ata_force_link_limits(struct ata_link *link)
33267325 361{
05944bdf 362 bool did_spd = false;
b1c72916
TH
363 int linkno = link->pmp;
364 int i;
33267325
TH
365
366 if (ata_is_host_link(link))
b1c72916 367 linkno += 15;
33267325
TH
368
369 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
370 const struct ata_force_ent *fe = &ata_force_tbl[i];
371
372 if (fe->port != -1 && fe->port != link->ap->print_id)
373 continue;
374
375 if (fe->device != -1 && fe->device != linkno)
376 continue;
377
05944bdf
TH
378 /* only honor the first spd limit */
379 if (!did_spd && fe->param.spd_limit) {
380 link->hw_sata_spd_limit = (1 << fe->param.spd_limit) - 1;
a9a79dfe 381 ata_link_notice(link, "FORCE: PHY spd limit set to %s\n",
05944bdf
TH
382 fe->param.name);
383 did_spd = true;
384 }
33267325 385
05944bdf
TH
386 /* let lflags stack */
387 if (fe->param.lflags) {
388 link->flags |= fe->param.lflags;
a9a79dfe 389 ata_link_notice(link,
05944bdf
TH
390 "FORCE: link flag 0x%x forced -> 0x%x\n",
391 fe->param.lflags, link->flags);
392 }
33267325
TH
393 }
394}
395
396/**
397 * ata_force_xfermask - force xfermask according to libata.force
398 * @dev: ATA device of interest
399 *
400 * Force xfer_mask according to libata.force and whine about it.
401 * For consistency with link selection, device number 15 selects
402 * the first device connected to the host link.
403 *
404 * LOCKING:
405 * EH context.
406 */
407static void ata_force_xfermask(struct ata_device *dev)
408{
409 int devno = dev->link->pmp + dev->devno;
410 int alt_devno = devno;
411 int i;
412
b1c72916
TH
413 /* allow n.15/16 for devices attached to host port */
414 if (ata_is_host_link(dev->link))
415 alt_devno += 15;
33267325
TH
416
417 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
418 const struct ata_force_ent *fe = &ata_force_tbl[i];
419 unsigned long pio_mask, mwdma_mask, udma_mask;
420
421 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
422 continue;
423
424 if (fe->device != -1 && fe->device != devno &&
425 fe->device != alt_devno)
426 continue;
427
428 if (!fe->param.xfer_mask)
429 continue;
430
431 ata_unpack_xfermask(fe->param.xfer_mask,
432 &pio_mask, &mwdma_mask, &udma_mask);
433 if (udma_mask)
434 dev->udma_mask = udma_mask;
435 else if (mwdma_mask) {
436 dev->udma_mask = 0;
437 dev->mwdma_mask = mwdma_mask;
438 } else {
439 dev->udma_mask = 0;
440 dev->mwdma_mask = 0;
441 dev->pio_mask = pio_mask;
442 }
443
a9a79dfe
JP
444 ata_dev_notice(dev, "FORCE: xfer_mask set to %s\n",
445 fe->param.name);
33267325
TH
446 return;
447 }
448}
449
450/**
451 * ata_force_horkage - force horkage according to libata.force
452 * @dev: ATA device of interest
453 *
454 * Force horkage according to libata.force and whine about it.
455 * For consistency with link selection, device number 15 selects
456 * the first device connected to the host link.
457 *
458 * LOCKING:
459 * EH context.
460 */
461static void ata_force_horkage(struct ata_device *dev)
462{
463 int devno = dev->link->pmp + dev->devno;
464 int alt_devno = devno;
465 int i;
466
b1c72916
TH
467 /* allow n.15/16 for devices attached to host port */
468 if (ata_is_host_link(dev->link))
469 alt_devno += 15;
33267325
TH
470
471 for (i = 0; i < ata_force_tbl_size; i++) {
472 const struct ata_force_ent *fe = &ata_force_tbl[i];
473
474 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
475 continue;
476
477 if (fe->device != -1 && fe->device != devno &&
478 fe->device != alt_devno)
479 continue;
480
481 if (!(~dev->horkage & fe->param.horkage_on) &&
482 !(dev->horkage & fe->param.horkage_off))
483 continue;
484
485 dev->horkage |= fe->param.horkage_on;
486 dev->horkage &= ~fe->param.horkage_off;
487
a9a79dfe
JP
488 ata_dev_notice(dev, "FORCE: horkage modified (%s)\n",
489 fe->param.name);
33267325
TH
490 }
491}
492
436d34b3
TH
493/**
494 * atapi_cmd_type - Determine ATAPI command type from SCSI opcode
495 * @opcode: SCSI opcode
496 *
497 * Determine ATAPI command type from @opcode.
498 *
499 * LOCKING:
500 * None.
501 *
502 * RETURNS:
503 * ATAPI_{READ|WRITE|READ_CD|PASS_THRU|MISC}
504 */
505int atapi_cmd_type(u8 opcode)
506{
507 switch (opcode) {
508 case GPCMD_READ_10:
509 case GPCMD_READ_12:
510 return ATAPI_READ;
511
512 case GPCMD_WRITE_10:
513 case GPCMD_WRITE_12:
514 case GPCMD_WRITE_AND_VERIFY_10:
515 return ATAPI_WRITE;
516
517 case GPCMD_READ_CD:
518 case GPCMD_READ_CD_MSF:
519 return ATAPI_READ_CD;
520
e52dcc48
TH
521 case ATA_16:
522 case ATA_12:
523 if (atapi_passthru16)
524 return ATAPI_PASS_THRU;
525 /* fall thru */
436d34b3
TH
526 default:
527 return ATAPI_MISC;
528 }
529}
530
1da177e4
LT
531/**
532 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
533 * @tf: Taskfile to convert
1da177e4 534 * @pmp: Port multiplier port
9977126c
TH
535 * @is_cmd: This FIS is for command
536 * @fis: Buffer into which data will output
1da177e4
LT
537 *
538 * Converts a standard ATA taskfile to a Serial ATA
539 * FIS structure (Register - Host to Device).
540 *
541 * LOCKING:
542 * Inherited from caller.
543 */
9977126c 544void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
1da177e4 545{
9977126c
TH
546 fis[0] = 0x27; /* Register - Host to Device FIS */
547 fis[1] = pmp & 0xf; /* Port multiplier number*/
548 if (is_cmd)
549 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
550
1da177e4
LT
551 fis[2] = tf->command;
552 fis[3] = tf->feature;
553
554 fis[4] = tf->lbal;
555 fis[5] = tf->lbam;
556 fis[6] = tf->lbah;
557 fis[7] = tf->device;
558
559 fis[8] = tf->hob_lbal;
560 fis[9] = tf->hob_lbam;
561 fis[10] = tf->hob_lbah;
562 fis[11] = tf->hob_feature;
563
564 fis[12] = tf->nsect;
565 fis[13] = tf->hob_nsect;
566 fis[14] = 0;
567 fis[15] = tf->ctl;
568
569 fis[16] = 0;
570 fis[17] = 0;
571 fis[18] = 0;
572 fis[19] = 0;
573}
574
575/**
576 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
577 * @fis: Buffer from which data will be input
578 * @tf: Taskfile to output
579 *
e12a1be6 580 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT
581 *
582 * LOCKING:
583 * Inherited from caller.
584 */
585
057ace5e 586void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT
587{
588 tf->command = fis[2]; /* status */
589 tf->feature = fis[3]; /* error */
590
591 tf->lbal = fis[4];
592 tf->lbam = fis[5];
593 tf->lbah = fis[6];
594 tf->device = fis[7];
595
596 tf->hob_lbal = fis[8];
597 tf->hob_lbam = fis[9];
598 tf->hob_lbah = fis[10];
599
600 tf->nsect = fis[12];
601 tf->hob_nsect = fis[13];
602}
603
8cbd6df1
AL
604static const u8 ata_rw_cmds[] = {
605 /* pio multi */
606 ATA_CMD_READ_MULTI,
607 ATA_CMD_WRITE_MULTI,
608 ATA_CMD_READ_MULTI_EXT,
609 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH
610 0,
611 0,
612 0,
613 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL
614 /* pio */
615 ATA_CMD_PIO_READ,
616 ATA_CMD_PIO_WRITE,
617 ATA_CMD_PIO_READ_EXT,
618 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH
619 0,
620 0,
621 0,
622 0,
8cbd6df1
AL
623 /* dma */
624 ATA_CMD_READ,
625 ATA_CMD_WRITE,
626 ATA_CMD_READ_EXT,
9a3dccc4
TH
627 ATA_CMD_WRITE_EXT,
628 0,
629 0,
630 0,
631 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 632};
1da177e4
LT
633
634/**
8cbd6df1 635 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
bd056d7e
TH
636 * @tf: command to examine and configure
637 * @dev: device tf belongs to
1da177e4 638 *
2e9edbf8 639 * Examine the device configuration and tf->flags to calculate
8cbd6df1 640 * the proper read/write commands and protocol to use.
1da177e4
LT
641 *
642 * LOCKING:
643 * caller.
644 */
bd056d7e 645static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
1da177e4 646{
9a3dccc4 647 u8 cmd;
1da177e4 648
9a3dccc4 649 int index, fua, lba48, write;
2e9edbf8 650
9a3dccc4 651 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL
652 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
653 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 654
8cbd6df1
AL
655 if (dev->flags & ATA_DFLAG_PIO) {
656 tf->protocol = ATA_PROT_PIO;
9a3dccc4 657 index = dev->multi_count ? 0 : 8;
9af5c9c9 658 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
8d238e01
AC
659 /* Unable to use DMA due to host limitation */
660 tf->protocol = ATA_PROT_PIO;
0565c26d 661 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL
662 } else {
663 tf->protocol = ATA_PROT_DMA;
9a3dccc4 664 index = 16;
8cbd6df1 665 }
1da177e4 666
9a3dccc4
TH
667 cmd = ata_rw_cmds[index + fua + lba48 + write];
668 if (cmd) {
669 tf->command = cmd;
670 return 0;
671 }
672 return -1;
1da177e4
LT
673}
674
35b649fe
TH
675/**
676 * ata_tf_read_block - Read block address from ATA taskfile
677 * @tf: ATA taskfile of interest
678 * @dev: ATA device @tf belongs to
679 *
680 * LOCKING:
681 * None.
682 *
683 * Read block address from @tf. This function can handle all
684 * three address formats - LBA, LBA48 and CHS. tf->protocol and
685 * flags select the address format to use.
686 *
687 * RETURNS:
688 * Block address read from @tf.
689 */
690u64 ata_tf_read_block(struct ata_taskfile *tf, struct ata_device *dev)
691{
692 u64 block = 0;
693
694 if (tf->flags & ATA_TFLAG_LBA) {
695 if (tf->flags & ATA_TFLAG_LBA48) {
696 block |= (u64)tf->hob_lbah << 40;
697 block |= (u64)tf->hob_lbam << 32;
44901a96 698 block |= (u64)tf->hob_lbal << 24;
35b649fe
TH
699 } else
700 block |= (tf->device & 0xf) << 24;
701
702 block |= tf->lbah << 16;
703 block |= tf->lbam << 8;
704 block |= tf->lbal;
705 } else {
706 u32 cyl, head, sect;
707
708 cyl = tf->lbam | (tf->lbah << 8);
709 head = tf->device & 0xf;
710 sect = tf->lbal;
711
ac8672ea 712 if (!sect) {
a9a79dfe
JP
713 ata_dev_warn(dev,
714 "device reported invalid CHS sector 0\n");
ac8672ea
TH
715 sect = 1; /* oh well */
716 }
717
718 block = (cyl * dev->heads + head) * dev->sectors + sect - 1;
35b649fe
TH
719 }
720
721 return block;
722}
723
bd056d7e
TH
724/**
725 * ata_build_rw_tf - Build ATA taskfile for given read/write request
726 * @tf: Target ATA taskfile
727 * @dev: ATA device @tf belongs to
728 * @block: Block address
729 * @n_block: Number of blocks
730 * @tf_flags: RW/FUA etc...
731 * @tag: tag
732 *
733 * LOCKING:
734 * None.
735 *
736 * Build ATA taskfile @tf for read/write request described by
737 * @block, @n_block, @tf_flags and @tag on @dev.
738 *
739 * RETURNS:
740 *
741 * 0 on success, -ERANGE if the request is too large for @dev,
742 * -EINVAL if the request is invalid.
743 */
744int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
745 u64 block, u32 n_block, unsigned int tf_flags,
746 unsigned int tag)
747{
748 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
749 tf->flags |= tf_flags;
750
6d1245bf 751 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
bd056d7e
TH
752 /* yay, NCQ */
753 if (!lba_48_ok(block, n_block))
754 return -ERANGE;
755
756 tf->protocol = ATA_PROT_NCQ;
757 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
758
759 if (tf->flags & ATA_TFLAG_WRITE)
760 tf->command = ATA_CMD_FPDMA_WRITE;
761 else
762 tf->command = ATA_CMD_FPDMA_READ;
763
764 tf->nsect = tag << 3;
765 tf->hob_feature = (n_block >> 8) & 0xff;
766 tf->feature = n_block & 0xff;
767
768 tf->hob_lbah = (block >> 40) & 0xff;
769 tf->hob_lbam = (block >> 32) & 0xff;
770 tf->hob_lbal = (block >> 24) & 0xff;
771 tf->lbah = (block >> 16) & 0xff;
772 tf->lbam = (block >> 8) & 0xff;
773 tf->lbal = block & 0xff;
774
775 tf->device = 1 << 6;
776 if (tf->flags & ATA_TFLAG_FUA)
777 tf->device |= 1 << 7;
778 } else if (dev->flags & ATA_DFLAG_LBA) {
779 tf->flags |= ATA_TFLAG_LBA;
780
781 if (lba_28_ok(block, n_block)) {
782 /* use LBA28 */
783 tf->device |= (block >> 24) & 0xf;
784 } else if (lba_48_ok(block, n_block)) {
785 if (!(dev->flags & ATA_DFLAG_LBA48))
786 return -ERANGE;
787
788 /* use LBA48 */
789 tf->flags |= ATA_TFLAG_LBA48;
790
791 tf->hob_nsect = (n_block >> 8) & 0xff;
792
793 tf->hob_lbah = (block >> 40) & 0xff;
794 tf->hob_lbam = (block >> 32) & 0xff;
795 tf->hob_lbal = (block >> 24) & 0xff;
796 } else
797 /* request too large even for LBA48 */
798 return -ERANGE;
799
800 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
801 return -EINVAL;
802
803 tf->nsect = n_block & 0xff;
804
805 tf->lbah = (block >> 16) & 0xff;
806 tf->lbam = (block >> 8) & 0xff;
807 tf->lbal = block & 0xff;
808
809 tf->device |= ATA_LBA;
810 } else {
811 /* CHS */
812 u32 sect, head, cyl, track;
813
814 /* The request -may- be too large for CHS addressing. */
815 if (!lba_28_ok(block, n_block))
816 return -ERANGE;
817
818 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
819 return -EINVAL;
820
821 /* Convert LBA to CHS */
822 track = (u32)block / dev->sectors;
823 cyl = track / dev->heads;
824 head = track % dev->heads;
825 sect = (u32)block % dev->sectors + 1;
826
827 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
828 (u32)block, track, cyl, head, sect);
829
830 /* Check whether the converted CHS can fit.
831 Cylinder: 0-65535
832 Head: 0-15
833 Sector: 1-255*/
834 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
835 return -ERANGE;
836
837 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
838 tf->lbal = sect;
839 tf->lbam = cyl;
840 tf->lbah = cyl >> 8;
841 tf->device |= head;
842 }
843
844 return 0;
845}
846
cb95d562
TH
847/**
848 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
849 * @pio_mask: pio_mask
850 * @mwdma_mask: mwdma_mask
851 * @udma_mask: udma_mask
852 *
853 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
854 * unsigned int xfer_mask.
855 *
856 * LOCKING:
857 * None.
858 *
859 * RETURNS:
860 * Packed xfer_mask.
861 */
7dc951ae
TH
862unsigned long ata_pack_xfermask(unsigned long pio_mask,
863 unsigned long mwdma_mask,
864 unsigned long udma_mask)
cb95d562
TH
865{
866 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
867 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
868 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
869}
870
c0489e4e
TH
871/**
872 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
873 * @xfer_mask: xfer_mask to unpack
874 * @pio_mask: resulting pio_mask
875 * @mwdma_mask: resulting mwdma_mask
876 * @udma_mask: resulting udma_mask
877 *
878 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
879 * Any NULL distination masks will be ignored.
880 */
7dc951ae
TH
881void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask,
882 unsigned long *mwdma_mask, unsigned long *udma_mask)
c0489e4e
TH
883{
884 if (pio_mask)
885 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
886 if (mwdma_mask)
887 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
888 if (udma_mask)
889 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
890}
891
cb95d562 892static const struct ata_xfer_ent {
be9a50c8 893 int shift, bits;
cb95d562
TH
894 u8 base;
895} ata_xfer_tbl[] = {
70cd071e
TH
896 { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 },
897 { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 },
898 { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 },
cb95d562
TH
899 { -1, },
900};
901
902/**
903 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
904 * @xfer_mask: xfer_mask of interest
905 *
906 * Return matching XFER_* value for @xfer_mask. Only the highest
907 * bit of @xfer_mask is considered.
908 *
909 * LOCKING:
910 * None.
911 *
912 * RETURNS:
70cd071e 913 * Matching XFER_* value, 0xff if no match found.
cb95d562 914 */
7dc951ae 915u8 ata_xfer_mask2mode(unsigned long xfer_mask)
cb95d562
TH
916{
917 int highbit = fls(xfer_mask) - 1;
918 const struct ata_xfer_ent *ent;
919
920 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
921 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
922 return ent->base + highbit - ent->shift;
70cd071e 923 return 0xff;
cb95d562
TH
924}
925
926/**
927 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
928 * @xfer_mode: XFER_* of interest
929 *
930 * Return matching xfer_mask for @xfer_mode.
931 *
932 * LOCKING:
933 * None.
934 *
935 * RETURNS:
936 * Matching xfer_mask, 0 if no match found.
937 */
7dc951ae 938unsigned long ata_xfer_mode2mask(u8 xfer_mode)
cb95d562
TH
939{
940 const struct ata_xfer_ent *ent;
941
942 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
943 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
70cd071e
TH
944 return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)
945 & ~((1 << ent->shift) - 1);
cb95d562
TH
946 return 0;
947}
948
949/**
950 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
951 * @xfer_mode: XFER_* of interest
952 *
953 * Return matching xfer_shift for @xfer_mode.
954 *
955 * LOCKING:
956 * None.
957 *
958 * RETURNS:
959 * Matching xfer_shift, -1 if no match found.
960 */
7dc951ae 961int ata_xfer_mode2shift(unsigned long xfer_mode)
cb95d562
TH
962{
963 const struct ata_xfer_ent *ent;
964
965 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
966 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
967 return ent->shift;
968 return -1;
969}
970
1da177e4 971/**
1da7b0d0
TH
972 * ata_mode_string - convert xfer_mask to string
973 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT
974 *
975 * Determine string which represents the highest speed
1da7b0d0 976 * (highest bit in @modemask).
1da177e4
LT
977 *
978 * LOCKING:
979 * None.
980 *
981 * RETURNS:
982 * Constant C string representing highest speed listed in
1da7b0d0 983 * @mode_mask, or the constant C string "<n/a>".
1da177e4 984 */
7dc951ae 985const char *ata_mode_string(unsigned long xfer_mask)
1da177e4 986{
75f554bc
TH
987 static const char * const xfer_mode_str[] = {
988 "PIO0",
989 "PIO1",
990 "PIO2",
991 "PIO3",
992 "PIO4",
b352e57d
AC
993 "PIO5",
994 "PIO6",
75f554bc
TH
995 "MWDMA0",
996 "MWDMA1",
997 "MWDMA2",
b352e57d
AC
998 "MWDMA3",
999 "MWDMA4",
75f554bc
TH
1000 "UDMA/16",
1001 "UDMA/25",
1002 "UDMA/33",
1003 "UDMA/44",
1004 "UDMA/66",
1005 "UDMA/100",
1006 "UDMA/133",
1007 "UDMA7",
1008 };
1da7b0d0 1009 int highbit;
1da177e4 1010
1da7b0d0
TH
1011 highbit = fls(xfer_mask) - 1;
1012 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
1013 return xfer_mode_str[highbit];
1da177e4 1014 return "<n/a>";
1da177e4
LT
1015}
1016
d9027470 1017const char *sata_spd_string(unsigned int spd)
4c360c81
TH
1018{
1019 static const char * const spd_str[] = {
1020 "1.5 Gbps",
1021 "3.0 Gbps",
8522ee25 1022 "6.0 Gbps",
4c360c81
TH
1023 };
1024
1025 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
1026 return "<unknown>";
1027 return spd_str[spd - 1];
1028}
1029
1da177e4
LT
1030/**
1031 * ata_dev_classify - determine device type based on ATA-spec signature
1032 * @tf: ATA taskfile register set for device to be identified
1033 *
1034 * Determine from taskfile register contents whether a device is
1035 * ATA or ATAPI, as per "Signature and persistence" section
1036 * of ATA/PI spec (volume 1, sect 5.14).
1037 *
1038 * LOCKING:
1039 * None.
1040 *
1041 * RETURNS:
633273a3
TH
1042 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP or
1043 * %ATA_DEV_UNKNOWN the event of failure.
1da177e4 1044 */
057ace5e 1045unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT
1046{
1047 /* Apple's open source Darwin code hints that some devices only
1048 * put a proper signature into the LBA mid/high registers,
1049 * So, we only check those. It's sufficient for uniqueness.
633273a3
TH
1050 *
1051 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
1052 * signatures for ATA and ATAPI devices attached on SerialATA,
1053 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
1054 * spec has never mentioned about using different signatures
1055 * for ATA/ATAPI devices. Then, Serial ATA II: Port
1056 * Multiplier specification began to use 0x69/0x96 to identify
1057 * port multpliers and 0x3c/0xc3 to identify SEMB device.
1058 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
1059 * 0x69/0x96 shortly and described them as reserved for
1060 * SerialATA.
1061 *
1062 * We follow the current spec and consider that 0x69/0x96
1063 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
79b42bab
TH
1064 * Unfortunately, WDC WD1600JS-62MHB5 (a hard drive) reports
1065 * SEMB signature. This is worked around in
1066 * ata_dev_read_id().
1da177e4 1067 */
633273a3 1068 if ((tf->lbam == 0) && (tf->lbah == 0)) {
1da177e4
LT
1069 DPRINTK("found ATA device by sig\n");
1070 return ATA_DEV_ATA;
1071 }
1072
633273a3 1073 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
1da177e4
LT
1074 DPRINTK("found ATAPI device by sig\n");
1075 return ATA_DEV_ATAPI;
1076 }
1077
633273a3
TH
1078 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
1079 DPRINTK("found PMP device by sig\n");
1080 return ATA_DEV_PMP;
1081 }
1082
1083 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
79b42bab
TH
1084 DPRINTK("found SEMB device by sig (could be ATA device)\n");
1085 return ATA_DEV_SEMB;
633273a3
TH
1086 }
1087
1da177e4
LT
1088 DPRINTK("unknown device\n");
1089 return ATA_DEV_UNKNOWN;
1090}
1091
1da177e4 1092/**
6a62a04d 1093 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT
1094 * @id: IDENTIFY DEVICE results we will examine
1095 * @s: string into which data is output
1096 * @ofs: offset into identify device page
1097 * @len: length of string to return. must be an even number.
1098 *
1099 * The strings in the IDENTIFY DEVICE page are broken up into
1100 * 16-bit chunks. Run through the string, and output each
1101 * 8-bit chunk linearly, regardless of platform.
1102 *
1103 * LOCKING:
1104 * caller.
1105 */
1106
6a62a04d
TH
1107void ata_id_string(const u16 *id, unsigned char *s,
1108 unsigned int ofs, unsigned int len)
1da177e4
LT
1109{
1110 unsigned int c;
1111
963e4975
AC
1112 BUG_ON(len & 1);
1113
1da177e4
LT
1114 while (len > 0) {
1115 c = id[ofs] >> 8;
1116 *s = c;
1117 s++;
1118
1119 c = id[ofs] & 0xff;
1120 *s = c;
1121 s++;
1122
1123 ofs++;
1124 len -= 2;
1125 }
1126}
1127
0e949ff3 1128/**
6a62a04d 1129 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH
1130 * @id: IDENTIFY DEVICE results we will examine
1131 * @s: string into which data is output
1132 * @ofs: offset into identify device page
1133 * @len: length of string to return. must be an odd number.
1134 *
6a62a04d 1135 * This function is identical to ata_id_string except that it
0e949ff3
TH
1136 * trims trailing spaces and terminates the resulting string with
1137 * null. @len must be actual maximum length (even number) + 1.
1138 *
1139 * LOCKING:
1140 * caller.
1141 */
6a62a04d
TH
1142void ata_id_c_string(const u16 *id, unsigned char *s,
1143 unsigned int ofs, unsigned int len)
0e949ff3
TH
1144{
1145 unsigned char *p;
1146
6a62a04d 1147 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH
1148
1149 p = s + strnlen(s, len - 1);
1150 while (p > s && p[-1] == ' ')
1151 p--;
1152 *p = '\0';
1153}
0baab86b 1154
db6f8759
TH
1155static u64 ata_id_n_sectors(const u16 *id)
1156{
1157 if (ata_id_has_lba(id)) {
1158 if (ata_id_has_lba48(id))
968e594a 1159 return ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
db6f8759 1160 else
968e594a 1161 return ata_id_u32(id, ATA_ID_LBA_CAPACITY);
db6f8759
TH
1162 } else {
1163 if (ata_id_current_chs_valid(id))
968e594a
RH
1164 return id[ATA_ID_CUR_CYLS] * id[ATA_ID_CUR_HEADS] *
1165 id[ATA_ID_CUR_SECTORS];
db6f8759 1166 else
968e594a
RH
1167 return id[ATA_ID_CYLS] * id[ATA_ID_HEADS] *
1168 id[ATA_ID_SECTORS];
db6f8759
TH
1169 }
1170}
1171
a5987e0a 1172u64 ata_tf_to_lba48(const struct ata_taskfile *tf)
1e999736
AC
1173{
1174 u64 sectors = 0;
1175
1176 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
1177 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
ba14a9c2 1178 sectors |= ((u64)(tf->hob_lbal & 0xff)) << 24;
1e999736
AC
1179 sectors |= (tf->lbah & 0xff) << 16;
1180 sectors |= (tf->lbam & 0xff) << 8;
1181 sectors |= (tf->lbal & 0xff);
1182
a5987e0a 1183 return sectors;
1e999736
AC
1184}
1185
a5987e0a 1186u64 ata_tf_to_lba(const struct ata_taskfile *tf)
1e999736
AC
1187{
1188 u64 sectors = 0;
1189
1190 sectors |= (tf->device & 0x0f) << 24;
1191 sectors |= (tf->lbah & 0xff) << 16;
1192 sectors |= (tf->lbam & 0xff) << 8;
1193 sectors |= (tf->lbal & 0xff);
1194
a5987e0a 1195 return sectors;
1e999736
AC
1196}
1197
1198/**
c728a914
TH
1199 * ata_read_native_max_address - Read native max address
1200 * @dev: target device
1201 * @max_sectors: out parameter for the result native max address
1e999736 1202 *
c728a914
TH
1203 * Perform an LBA48 or LBA28 native size query upon the device in
1204 * question.
1e999736 1205 *
c728a914
TH
1206 * RETURNS:
1207 * 0 on success, -EACCES if command is aborted by the drive.
1208 * -EIO on other errors.
1e999736 1209 */
c728a914 1210static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
1e999736 1211{
c728a914 1212 unsigned int err_mask;
1e999736 1213 struct ata_taskfile tf;
c728a914 1214 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1215
1216 ata_tf_init(dev, &tf);
1217
c728a914 1218 /* always clear all address registers */
1e999736 1219 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1e999736 1220
c728a914
TH
1221 if (lba48) {
1222 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
1223 tf.flags |= ATA_TFLAG_LBA48;
1224 } else
1225 tf.command = ATA_CMD_READ_NATIVE_MAX;
1e999736 1226
1e999736 1227 tf.protocol |= ATA_PROT_NODATA;
c728a914
TH
1228 tf.device |= ATA_LBA;
1229
2b789108 1230 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1231 if (err_mask) {
a9a79dfe
JP
1232 ata_dev_warn(dev,
1233 "failed to read native max address (err_mask=0x%x)\n",
1234 err_mask);
c728a914
TH
1235 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1236 return -EACCES;
1237 return -EIO;
1238 }
1e999736 1239
c728a914 1240 if (lba48)
a5987e0a 1241 *max_sectors = ata_tf_to_lba48(&tf) + 1;
c728a914 1242 else
a5987e0a 1243 *max_sectors = ata_tf_to_lba(&tf) + 1;
2dcb407e 1244 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
93328e11 1245 (*max_sectors)--;
c728a914 1246 return 0;
1e999736
AC
1247}
1248
1249/**
c728a914
TH
1250 * ata_set_max_sectors - Set max sectors
1251 * @dev: target device
6b38d1d1 1252 * @new_sectors: new max sectors value to set for the device
1e999736 1253 *
c728a914
TH
1254 * Set max sectors of @dev to @new_sectors.
1255 *
1256 * RETURNS:
1257 * 0 on success, -EACCES if command is aborted or denied (due to
1258 * previous non-volatile SET_MAX) by the drive. -EIO on other
1259 * errors.
1e999736 1260 */
05027adc 1261static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
1e999736 1262{
c728a914 1263 unsigned int err_mask;
1e999736 1264 struct ata_taskfile tf;
c728a914 1265 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1266
1267 new_sectors--;
1268
1269 ata_tf_init(dev, &tf);
1270
1e999736 1271 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
c728a914
TH
1272
1273 if (lba48) {
1274 tf.command = ATA_CMD_SET_MAX_EXT;
1275 tf.flags |= ATA_TFLAG_LBA48;
1276
1277 tf.hob_lbal = (new_sectors >> 24) & 0xff;
1278 tf.hob_lbam = (new_sectors >> 32) & 0xff;
1279 tf.hob_lbah = (new_sectors >> 40) & 0xff;
1e582ba4 1280 } else {
c728a914
TH
1281 tf.command = ATA_CMD_SET_MAX;
1282
1e582ba4
TH
1283 tf.device |= (new_sectors >> 24) & 0xf;
1284 }
1285
1e999736 1286 tf.protocol |= ATA_PROT_NODATA;
c728a914 1287 tf.device |= ATA_LBA;
1e999736
AC
1288
1289 tf.lbal = (new_sectors >> 0) & 0xff;
1290 tf.lbam = (new_sectors >> 8) & 0xff;
1291 tf.lbah = (new_sectors >> 16) & 0xff;
1e999736 1292
2b789108 1293 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1294 if (err_mask) {
a9a79dfe
JP
1295 ata_dev_warn(dev,
1296 "failed to set max address (err_mask=0x%x)\n",
1297 err_mask);
c728a914
TH
1298 if (err_mask == AC_ERR_DEV &&
1299 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1300 return -EACCES;
1301 return -EIO;
1302 }
1303
c728a914 1304 return 0;
1e999736
AC
1305}
1306
1307/**
1308 * ata_hpa_resize - Resize a device with an HPA set
1309 * @dev: Device to resize
1310 *
1311 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1312 * it if required to the full size of the media. The caller must check
1313 * the drive has the HPA feature set enabled.
05027adc
TH
1314 *
1315 * RETURNS:
1316 * 0 on success, -errno on failure.
1e999736 1317 */
05027adc 1318static int ata_hpa_resize(struct ata_device *dev)
1e999736 1319{
05027adc
TH
1320 struct ata_eh_context *ehc = &dev->link->eh_context;
1321 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
445d211b 1322 bool unlock_hpa = ata_ignore_hpa || dev->flags & ATA_DFLAG_UNLOCK_HPA;
05027adc
TH
1323 u64 sectors = ata_id_n_sectors(dev->id);
1324 u64 native_sectors;
c728a914 1325 int rc;
a617c09f 1326
05027adc
TH
1327 /* do we need to do it? */
1328 if (dev->class != ATA_DEV_ATA ||
1329 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1330 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
c728a914 1331 return 0;
1e999736 1332
05027adc
TH
1333 /* read native max address */
1334 rc = ata_read_native_max_address(dev, &native_sectors);
1335 if (rc) {
dda7aba1
TH
1336 /* If device aborted the command or HPA isn't going to
1337 * be unlocked, skip HPA resizing.
05027adc 1338 */
445d211b 1339 if (rc == -EACCES || !unlock_hpa) {
a9a79dfe
JP
1340 ata_dev_warn(dev,
1341 "HPA support seems broken, skipping HPA handling\n");
05027adc
TH
1342 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1343
1344 /* we can continue if device aborted the command */
1345 if (rc == -EACCES)
1346 rc = 0;
1e999736 1347 }
37301a55 1348
05027adc
TH
1349 return rc;
1350 }
5920dadf 1351 dev->n_native_sectors = native_sectors;
05027adc
TH
1352
1353 /* nothing to do? */
445d211b 1354 if (native_sectors <= sectors || !unlock_hpa) {
05027adc
TH
1355 if (!print_info || native_sectors == sectors)
1356 return 0;
1357
1358 if (native_sectors > sectors)
a9a79dfe 1359 ata_dev_info(dev,
05027adc
TH
1360 "HPA detected: current %llu, native %llu\n",
1361 (unsigned long long)sectors,
1362 (unsigned long long)native_sectors);
1363 else if (native_sectors < sectors)
a9a79dfe
JP
1364 ata_dev_warn(dev,
1365 "native sectors (%llu) is smaller than sectors (%llu)\n",
05027adc
TH
1366 (unsigned long long)native_sectors,
1367 (unsigned long long)sectors);
1368 return 0;
1369 }
1370
1371 /* let's unlock HPA */
1372 rc = ata_set_max_sectors(dev, native_sectors);
1373 if (rc == -EACCES) {
1374 /* if device aborted the command, skip HPA resizing */
a9a79dfe
JP
1375 ata_dev_warn(dev,
1376 "device aborted resize (%llu -> %llu), skipping HPA handling\n",
1377 (unsigned long long)sectors,
1378 (unsigned long long)native_sectors);
05027adc
TH
1379 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1380 return 0;
1381 } else if (rc)
1382 return rc;
1383
1384 /* re-read IDENTIFY data */
1385 rc = ata_dev_reread_id(dev, 0);
1386 if (rc) {
a9a79dfe
JP
1387 ata_dev_err(dev,
1388 "failed to re-read IDENTIFY data after HPA resizing\n");
05027adc
TH
1389 return rc;
1390 }
1391
1392 if (print_info) {
1393 u64 new_sectors = ata_id_n_sectors(dev->id);
a9a79dfe 1394 ata_dev_info(dev,
05027adc
TH
1395 "HPA unlocked: %llu -> %llu, native %llu\n",
1396 (unsigned long long)sectors,
1397 (unsigned long long)new_sectors,
1398 (unsigned long long)native_sectors);
1399 }
1400
1401 return 0;
1e999736
AC
1402}
1403
1da177e4
LT
1404/**
1405 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 1406 * @id: IDENTIFY DEVICE page to dump
1da177e4 1407 *
0bd3300a
TH
1408 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1409 * page.
1da177e4
LT
1410 *
1411 * LOCKING:
1412 * caller.
1413 */
1414
0bd3300a 1415static inline void ata_dump_id(const u16 *id)
1da177e4
LT
1416{
1417 DPRINTK("49==0x%04x "
1418 "53==0x%04x "
1419 "63==0x%04x "
1420 "64==0x%04x "
1421 "75==0x%04x \n",
0bd3300a
TH
1422 id[49],
1423 id[53],
1424 id[63],
1425 id[64],
1426 id[75]);
1da177e4
LT
1427 DPRINTK("80==0x%04x "
1428 "81==0x%04x "
1429 "82==0x%04x "
1430 "83==0x%04x "
1431 "84==0x%04x \n",
0bd3300a
TH
1432 id[80],
1433 id[81],
1434 id[82],
1435 id[83],
1436 id[84]);
1da177e4
LT
1437 DPRINTK("88==0x%04x "
1438 "93==0x%04x\n",
0bd3300a
TH
1439 id[88],
1440 id[93]);
1da177e4
LT
1441}
1442
cb95d562
TH
1443/**
1444 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1445 * @id: IDENTIFY data to compute xfer mask from
1446 *
1447 * Compute the xfermask for this device. This is not as trivial
1448 * as it seems if we must consider early devices correctly.
1449 *
1450 * FIXME: pre IDE drive timing (do we care ?).
1451 *
1452 * LOCKING:
1453 * None.
1454 *
1455 * RETURNS:
1456 * Computed xfermask
1457 */
7dc951ae 1458unsigned long ata_id_xfermask(const u16 *id)
cb95d562 1459{
7dc951ae 1460 unsigned long pio_mask, mwdma_mask, udma_mask;
cb95d562
TH
1461
1462 /* Usual case. Word 53 indicates word 64 is valid */
1463 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1464 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1465 pio_mask <<= 3;
1466 pio_mask |= 0x7;
1467 } else {
1468 /* If word 64 isn't valid then Word 51 high byte holds
1469 * the PIO timing number for the maximum. Turn it into
1470 * a mask.
1471 */
7a0f1c8a 1472 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
46767aeb 1473 if (mode < 5) /* Valid PIO range */
2dcb407e 1474 pio_mask = (2 << mode) - 1;
46767aeb
AC
1475 else
1476 pio_mask = 1;
cb95d562
TH
1477
1478 /* But wait.. there's more. Design your standards by
1479 * committee and you too can get a free iordy field to
1480 * process. However its the speeds not the modes that
1481 * are supported... Note drivers using the timing API
1482 * will get this right anyway
1483 */
1484 }
1485
1486 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0 1487
b352e57d
AC
1488 if (ata_id_is_cfa(id)) {
1489 /*
1490 * Process compact flash extended modes
1491 */
62afe5d7
SS
1492 int pio = (id[ATA_ID_CFA_MODES] >> 0) & 0x7;
1493 int dma = (id[ATA_ID_CFA_MODES] >> 3) & 0x7;
b352e57d
AC
1494
1495 if (pio)
1496 pio_mask |= (1 << 5);
1497 if (pio > 1)
1498 pio_mask |= (1 << 6);
1499 if (dma)
1500 mwdma_mask |= (1 << 3);
1501 if (dma > 1)
1502 mwdma_mask |= (1 << 4);
1503 }
1504
fb21f0d0
TH
1505 udma_mask = 0;
1506 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1507 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH
1508
1509 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1510}
1511
7102d230 1512static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 1513{
77853bf2 1514 struct completion *waiting = qc->private_data;
a2a7a662 1515
a2a7a662 1516 complete(waiting);
a2a7a662
TH
1517}
1518
1519/**
2432697b 1520 * ata_exec_internal_sg - execute libata internal command
a2a7a662
TH
1521 * @dev: Device to which the command is sent
1522 * @tf: Taskfile registers for the command and the result
d69cf37d 1523 * @cdb: CDB for packet command
a2a7a662 1524 * @dma_dir: Data tranfer direction of the command
5c1ad8b3 1525 * @sgl: sg list for the data buffer of the command
2432697b 1526 * @n_elem: Number of sg entries
2b789108 1527 * @timeout: Timeout in msecs (0 for default)
a2a7a662
TH
1528 *
1529 * Executes libata internal command with timeout. @tf contains
1530 * command on entry and result on return. Timeout and error
1531 * conditions are reported via return value. No recovery action
1532 * is taken after a command times out. It's caller's duty to
1533 * clean up after timeout.
1534 *
1535 * LOCKING:
1536 * None. Should be called with kernel context, might sleep.
551e8889
TH
1537 *
1538 * RETURNS:
1539 * Zero on success, AC_ERR_* mask on failure
a2a7a662 1540 */
2432697b
TH
1541unsigned ata_exec_internal_sg(struct ata_device *dev,
1542 struct ata_taskfile *tf, const u8 *cdb,
87260216 1543 int dma_dir, struct scatterlist *sgl,
2b789108 1544 unsigned int n_elem, unsigned long timeout)
a2a7a662 1545{
9af5c9c9
TH
1546 struct ata_link *link = dev->link;
1547 struct ata_port *ap = link->ap;
a2a7a662 1548 u8 command = tf->command;
87fbc5a0 1549 int auto_timeout = 0;
a2a7a662 1550 struct ata_queued_cmd *qc;
2ab7db1f 1551 unsigned int tag, preempted_tag;
dedaf2b0 1552 u32 preempted_sactive, preempted_qc_active;
da917d69 1553 int preempted_nr_active_links;
60be6b9a 1554 DECLARE_COMPLETION_ONSTACK(wait);
a2a7a662 1555 unsigned long flags;
77853bf2 1556 unsigned int err_mask;
d95a717f 1557 int rc;
a2a7a662 1558
ba6a1308 1559 spin_lock_irqsave(ap->lock, flags);
a2a7a662 1560
e3180499 1561 /* no internal command while frozen */
b51e9e5d 1562 if (ap->pflags & ATA_PFLAG_FROZEN) {
ba6a1308 1563 spin_unlock_irqrestore(ap->lock, flags);
e3180499
TH
1564 return AC_ERR_SYSTEM;
1565 }
1566
2ab7db1f 1567 /* initialize internal qc */
a2a7a662 1568
2ab7db1f
TH
1569 /* XXX: Tag 0 is used for drivers with legacy EH as some
1570 * drivers choke if any other tag is given. This breaks
1571 * ata_tag_internal() test for those drivers. Don't use new
1572 * EH stuff without converting to it.
1573 */
1574 if (ap->ops->error_handler)
1575 tag = ATA_TAG_INTERNAL;
1576 else
1577 tag = 0;
1578
8a8bc223
TH
1579 if (test_and_set_bit(tag, &ap->qc_allocated))
1580 BUG();
f69499f4 1581 qc = __ata_qc_from_tag(ap, tag);
2ab7db1f
TH
1582
1583 qc->tag = tag;
1584 qc->scsicmd = NULL;
1585 qc->ap = ap;
1586 qc->dev = dev;
1587 ata_qc_reinit(qc);
1588
9af5c9c9
TH
1589 preempted_tag = link->active_tag;
1590 preempted_sactive = link->sactive;
dedaf2b0 1591 preempted_qc_active = ap->qc_active;
da917d69 1592 preempted_nr_active_links = ap->nr_active_links;
9af5c9c9
TH
1593 link->active_tag = ATA_TAG_POISON;
1594 link->sactive = 0;
dedaf2b0 1595 ap->qc_active = 0;
da917d69 1596 ap->nr_active_links = 0;
2ab7db1f
TH
1597
1598 /* prepare & issue qc */
a2a7a662 1599 qc->tf = *tf;
d69cf37d
TH
1600 if (cdb)
1601 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
e61e0672 1602 qc->flags |= ATA_QCFLAG_RESULT_TF;
a2a7a662
TH
1603 qc->dma_dir = dma_dir;
1604 if (dma_dir != DMA_NONE) {
2432697b 1605 unsigned int i, buflen = 0;
87260216 1606 struct scatterlist *sg;
2432697b 1607
87260216
JA
1608 for_each_sg(sgl, sg, n_elem, i)
1609 buflen += sg->length;
2432697b 1610
87260216 1611 ata_sg_init(qc, sgl, n_elem);
49c80429 1612 qc->nbytes = buflen;
a2a7a662
TH
1613 }
1614
77853bf2 1615 qc->private_data = &wait;
a2a7a662
TH
1616 qc->complete_fn = ata_qc_complete_internal;
1617
8e0e694a 1618 ata_qc_issue(qc);
a2a7a662 1619
ba6a1308 1620 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662 1621
87fbc5a0
TH
1622 if (!timeout) {
1623 if (ata_probe_timeout)
1624 timeout = ata_probe_timeout * 1000;
1625 else {
1626 timeout = ata_internal_cmd_timeout(dev, command);
1627 auto_timeout = 1;
1628 }
1629 }
2b789108 1630
c0c362b6
TH
1631 if (ap->ops->error_handler)
1632 ata_eh_release(ap);
1633
2b789108 1634 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
d95a717f 1635
c0c362b6
TH
1636 if (ap->ops->error_handler)
1637 ata_eh_acquire(ap);
1638
c429137a 1639 ata_sff_flush_pio_task(ap);
41ade50c 1640
d95a717f 1641 if (!rc) {
ba6a1308 1642 spin_lock_irqsave(ap->lock, flags);
a2a7a662
TH
1643
1644 /* We're racing with irq here. If we lose, the
1645 * following test prevents us from completing the qc
d95a717f
TH
1646 * twice. If we win, the port is frozen and will be
1647 * cleaned up by ->post_internal_cmd().
a2a7a662 1648 */
77853bf2 1649 if (qc->flags & ATA_QCFLAG_ACTIVE) {
d95a717f
TH
1650 qc->err_mask |= AC_ERR_TIMEOUT;
1651
1652 if (ap->ops->error_handler)
1653 ata_port_freeze(ap);
1654 else
1655 ata_qc_complete(qc);
f15a1daf 1656
0dd4b21f 1657 if (ata_msg_warn(ap))
a9a79dfe
JP
1658 ata_dev_warn(dev, "qc timeout (cmd 0x%x)\n",
1659 command);
a2a7a662
TH
1660 }
1661
ba6a1308 1662 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662
TH
1663 }
1664
d95a717f
TH
1665 /* do post_internal_cmd */
1666 if (ap->ops->post_internal_cmd)
1667 ap->ops->post_internal_cmd(qc);
1668
a51d644a
TH
1669 /* perform minimal error analysis */
1670 if (qc->flags & ATA_QCFLAG_FAILED) {
1671 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1672 qc->err_mask |= AC_ERR_DEV;
1673
1674 if (!qc->err_mask)
1675 qc->err_mask |= AC_ERR_OTHER;
1676
1677 if (qc->err_mask & ~AC_ERR_OTHER)
1678 qc->err_mask &= ~AC_ERR_OTHER;
d95a717f
TH
1679 }
1680
15869303 1681 /* finish up */
ba6a1308 1682 spin_lock_irqsave(ap->lock, flags);
15869303 1683
e61e0672 1684 *tf = qc->result_tf;
77853bf2
TH
1685 err_mask = qc->err_mask;
1686
1687 ata_qc_free(qc);
9af5c9c9
TH
1688 link->active_tag = preempted_tag;
1689 link->sactive = preempted_sactive;
dedaf2b0 1690 ap->qc_active = preempted_qc_active;
da917d69 1691 ap->nr_active_links = preempted_nr_active_links;
77853bf2 1692
ba6a1308 1693 spin_unlock_irqrestore(ap->lock, flags);
15869303 1694
87fbc5a0
TH
1695 if ((err_mask & AC_ERR_TIMEOUT) && auto_timeout)
1696 ata_internal_cmd_timed_out(dev, command);
1697
77853bf2 1698 return err_mask;
a2a7a662
TH
1699}
1700
2432697b 1701/**
33480a0e 1702 * ata_exec_internal - execute libata internal command
2432697b
TH
1703 * @dev: Device to which the command is sent
1704 * @tf: Taskfile registers for the command and the result
1705 * @cdb: CDB for packet command
1706 * @dma_dir: Data tranfer direction of the command
1707 * @buf: Data buffer of the command
1708 * @buflen: Length of data buffer
2b789108 1709 * @timeout: Timeout in msecs (0 for default)
2432697b
TH
1710 *
1711 * Wrapper around ata_exec_internal_sg() which takes simple
1712 * buffer instead of sg list.
1713 *
1714 * LOCKING:
1715 * None. Should be called with kernel context, might sleep.
1716 *
1717 * RETURNS:
1718 * Zero on success, AC_ERR_* mask on failure
1719 */
1720unsigned ata_exec_internal(struct ata_device *dev,
1721 struct ata_taskfile *tf, const u8 *cdb,
2b789108
TH
1722 int dma_dir, void *buf, unsigned int buflen,
1723 unsigned long timeout)
2432697b 1724{
33480a0e
TH
1725 struct scatterlist *psg = NULL, sg;
1726 unsigned int n_elem = 0;
2432697b 1727
33480a0e
TH
1728 if (dma_dir != DMA_NONE) {
1729 WARN_ON(!buf);
1730 sg_init_one(&sg, buf, buflen);
1731 psg = &sg;
1732 n_elem++;
1733 }
2432697b 1734
2b789108
TH
1735 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
1736 timeout);
2432697b
TH
1737}
1738
977e6b9f
TH
1739/**
1740 * ata_do_simple_cmd - execute simple internal command
1741 * @dev: Device to which the command is sent
1742 * @cmd: Opcode to execute
1743 *
1744 * Execute a 'simple' command, that only consists of the opcode
1745 * 'cmd' itself, without filling any other registers
1746 *
1747 * LOCKING:
1748 * Kernel thread context (may sleep).
1749 *
1750 * RETURNS:
1751 * Zero on success, AC_ERR_* mask on failure
e58eb583 1752 */
77b08fb5 1753unsigned int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
e58eb583
TH
1754{
1755 struct ata_taskfile tf;
e58eb583
TH
1756
1757 ata_tf_init(dev, &tf);
1758
1759 tf.command = cmd;
1760 tf.flags |= ATA_TFLAG_DEVICE;
1761 tf.protocol = ATA_PROT_NODATA;
1762
2b789108 1763 return ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
e58eb583
TH
1764}
1765
1bc4ccff
AC
1766/**
1767 * ata_pio_need_iordy - check if iordy needed
1768 * @adev: ATA device
1769 *
1770 * Check if the current speed of the device requires IORDY. Used
1771 * by various controllers for chip configuration.
1772 */
1bc4ccff
AC
1773unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1774{
0d9e6659
TH
1775 /* Don't set IORDY if we're preparing for reset. IORDY may
1776 * lead to controller lock up on certain controllers if the
1777 * port is not occupied. See bko#11703 for details.
1778 */
1779 if (adev->link->ap->pflags & ATA_PFLAG_RESETTING)
1780 return 0;
1781 /* Controller doesn't support IORDY. Probably a pointless
1782 * check as the caller should know this.
1783 */
9af5c9c9 1784 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1bc4ccff 1785 return 0;
5c18c4d2
DD
1786 /* CF spec. r4.1 Table 22 says no iordy on PIO5 and PIO6. */
1787 if (ata_id_is_cfa(adev->id)
1788 && (adev->pio_mode == XFER_PIO_5 || adev->pio_mode == XFER_PIO_6))
1789 return 0;
432729f0
AC
1790 /* PIO3 and higher it is mandatory */
1791 if (adev->pio_mode > XFER_PIO_2)
1792 return 1;
1793 /* We turn it on when possible */
1794 if (ata_id_has_iordy(adev->id))
1bc4ccff 1795 return 1;
432729f0
AC
1796 return 0;
1797}
2e9edbf8 1798
432729f0
AC
1799/**
1800 * ata_pio_mask_no_iordy - Return the non IORDY mask
1801 * @adev: ATA device
1802 *
1803 * Compute the highest mode possible if we are not using iordy. Return
1804 * -1 if no iordy mode is available.
1805 */
432729f0
AC
1806static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1807{
1bc4ccff 1808 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1bc4ccff 1809 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
432729f0 1810 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1bc4ccff
AC
1811 /* Is the speed faster than the drive allows non IORDY ? */
1812 if (pio) {
1813 /* This is cycle times not frequency - watch the logic! */
1814 if (pio > 240) /* PIO2 is 240nS per cycle */
432729f0
AC
1815 return 3 << ATA_SHIFT_PIO;
1816 return 7 << ATA_SHIFT_PIO;
1bc4ccff
AC
1817 }
1818 }
432729f0 1819 return 3 << ATA_SHIFT_PIO;
1bc4ccff
AC
1820}
1821
963e4975
AC
1822/**
1823 * ata_do_dev_read_id - default ID read method
1824 * @dev: device
1825 * @tf: proposed taskfile
1826 * @id: data buffer
1827 *
1828 * Issue the identify taskfile and hand back the buffer containing
1829 * identify data. For some RAID controllers and for pre ATA devices
1830 * this function is wrapped or replaced by the driver
1831 */
1832unsigned int ata_do_dev_read_id(struct ata_device *dev,
1833 struct ata_taskfile *tf, u16 *id)
1834{
1835 return ata_exec_internal(dev, tf, NULL, DMA_FROM_DEVICE,
1836 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
1837}
1838
1da177e4 1839/**
49016aca 1840 * ata_dev_read_id - Read ID data from the specified device
49016aca
TH
1841 * @dev: target device
1842 * @p_class: pointer to class of the target device (may be changed)
bff04647 1843 * @flags: ATA_READID_* flags
fe635c7e 1844 * @id: buffer to read IDENTIFY data into
1da177e4 1845 *
49016aca
TH
1846 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1847 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH
1848 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1849 * for pre-ATA4 drives.
1da177e4 1850 *
50a99018 1851 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
2dcb407e 1852 * now we abort if we hit that case.
50a99018 1853 *
1da177e4 1854 * LOCKING:
49016aca
TH
1855 * Kernel thread context (may sleep)
1856 *
1857 * RETURNS:
1858 * 0 on success, -errno otherwise.
1da177e4 1859 */
a9beec95 1860int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
bff04647 1861 unsigned int flags, u16 *id)
1da177e4 1862{
9af5c9c9 1863 struct ata_port *ap = dev->link->ap;
49016aca 1864 unsigned int class = *p_class;
a0123703 1865 struct ata_taskfile tf;
49016aca
TH
1866 unsigned int err_mask = 0;
1867 const char *reason;
79b42bab 1868 bool is_semb = class == ATA_DEV_SEMB;
54936f8b 1869 int may_fallback = 1, tried_spinup = 0;
49016aca 1870 int rc;
1da177e4 1871
0dd4b21f 1872 if (ata_msg_ctl(ap))
a9a79dfe 1873 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 1874
963e4975 1875retry:
3373efd8 1876 ata_tf_init(dev, &tf);
a0123703 1877
49016aca 1878 switch (class) {
79b42bab
TH
1879 case ATA_DEV_SEMB:
1880 class = ATA_DEV_ATA; /* some hard drives report SEMB sig */
49016aca 1881 case ATA_DEV_ATA:
a0123703 1882 tf.command = ATA_CMD_ID_ATA;
49016aca
TH
1883 break;
1884 case ATA_DEV_ATAPI:
a0123703 1885 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH
1886 break;
1887 default:
1888 rc = -ENODEV;
1889 reason = "unsupported class";
1890 goto err_out;
1da177e4
LT
1891 }
1892
a0123703 1893 tf.protocol = ATA_PROT_PIO;
81afe893
TH
1894
1895 /* Some devices choke if TF registers contain garbage. Make
1896 * sure those are properly initialized.
1897 */
1898 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1899
1900 /* Device presence detection is unreliable on some
1901 * controllers. Always poll IDENTIFY if available.
1902 */
1903 tf.flags |= ATA_TFLAG_POLLING;
1da177e4 1904
963e4975
AC
1905 if (ap->ops->read_id)
1906 err_mask = ap->ops->read_id(dev, &tf, id);
1907 else
1908 err_mask = ata_do_dev_read_id(dev, &tf, id);
1909
a0123703 1910 if (err_mask) {
800b3996 1911 if (err_mask & AC_ERR_NODEV_HINT) {
a9a79dfe 1912 ata_dev_dbg(dev, "NODEV after polling detection\n");
55a8e2c8
TH
1913 return -ENOENT;
1914 }
1915
79b42bab 1916 if (is_semb) {
a9a79dfe
JP
1917 ata_dev_info(dev,
1918 "IDENTIFY failed on device w/ SEMB sig, disabled\n");
79b42bab
TH
1919 /* SEMB is not supported yet */
1920 *p_class = ATA_DEV_SEMB_UNSUP;
1921 return 0;
1922 }
1923
1ffc151f
TH
1924 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1925 /* Device or controller might have reported
1926 * the wrong device class. Give a shot at the
1927 * other IDENTIFY if the current one is
1928 * aborted by the device.
1929 */
1930 if (may_fallback) {
1931 may_fallback = 0;
1932
1933 if (class == ATA_DEV_ATA)
1934 class = ATA_DEV_ATAPI;
1935 else
1936 class = ATA_DEV_ATA;
1937 goto retry;
1938 }
1939
1940 /* Control reaches here iff the device aborted
1941 * both flavors of IDENTIFYs which happens
1942 * sometimes with phantom devices.
1943 */
a9a79dfe
JP
1944 ata_dev_dbg(dev,
1945 "both IDENTIFYs aborted, assuming NODEV\n");
1ffc151f 1946 return -ENOENT;
54936f8b
TH
1947 }
1948
49016aca
TH
1949 rc = -EIO;
1950 reason = "I/O error";
1da177e4
LT
1951 goto err_out;
1952 }
1953
43c9c591 1954 if (dev->horkage & ATA_HORKAGE_DUMP_ID) {
a9a79dfe
JP
1955 ata_dev_dbg(dev, "dumping IDENTIFY data, "
1956 "class=%d may_fallback=%d tried_spinup=%d\n",
1957 class, may_fallback, tried_spinup);
43c9c591
TH
1958 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET,
1959 16, 2, id, ATA_ID_WORDS * sizeof(*id), true);
1960 }
1961
54936f8b
TH
1962 /* Falling back doesn't make sense if ID data was read
1963 * successfully at least once.
1964 */
1965 may_fallback = 0;
1966
49016aca 1967 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1968
49016aca 1969 /* sanity check */
a4f5749b 1970 rc = -EINVAL;
6070068b 1971 reason = "device reports invalid type";
a4f5749b
TH
1972
1973 if (class == ATA_DEV_ATA) {
1974 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1975 goto err_out;
1976 } else {
1977 if (ata_id_is_ata(id))
1978 goto err_out;
49016aca
TH
1979 }
1980
169439c2
ML
1981 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1982 tried_spinup = 1;
1983 /*
1984 * Drive powered-up in standby mode, and requires a specific
1985 * SET_FEATURES spin-up subcommand before it will accept
1986 * anything other than the original IDENTIFY command.
1987 */
218f3d30 1988 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
fb0582f9 1989 if (err_mask && id[2] != 0x738c) {
169439c2
ML
1990 rc = -EIO;
1991 reason = "SPINUP failed";
1992 goto err_out;
1993 }
1994 /*
1995 * If the drive initially returned incomplete IDENTIFY info,
1996 * we now must reissue the IDENTIFY command.
1997 */
1998 if (id[2] == 0x37c8)
1999 goto retry;
2000 }
2001
bff04647 2002 if ((flags & ATA_READID_POSTRESET) && class == ATA_DEV_ATA) {
49016aca
TH
2003 /*
2004 * The exact sequence expected by certain pre-ATA4 drives is:
2005 * SRST RESET
50a99018
AC
2006 * IDENTIFY (optional in early ATA)
2007 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
49016aca
TH
2008 * anything else..
2009 * Some drives were very specific about that exact sequence.
50a99018
AC
2010 *
2011 * Note that ATA4 says lba is mandatory so the second check
c9404c9c 2012 * should never trigger.
49016aca
TH
2013 */
2014 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
3373efd8 2015 err_mask = ata_dev_init_params(dev, id[3], id[6]);
49016aca
TH
2016 if (err_mask) {
2017 rc = -EIO;
2018 reason = "INIT_DEV_PARAMS failed";
2019 goto err_out;
2020 }
2021
2022 /* current CHS translation info (id[53-58]) might be
2023 * changed. reread the identify device info.
2024 */
bff04647 2025 flags &= ~ATA_READID_POSTRESET;
49016aca
TH
2026 goto retry;
2027 }
2028 }
2029
2030 *p_class = class;
fe635c7e 2031
49016aca
TH
2032 return 0;
2033
2034 err_out:
88574551 2035 if (ata_msg_warn(ap))
a9a79dfe
JP
2036 ata_dev_warn(dev, "failed to IDENTIFY (%s, err_mask=0x%x)\n",
2037 reason, err_mask);
49016aca
TH
2038 return rc;
2039}
2040
9062712f
TH
2041static int ata_do_link_spd_horkage(struct ata_device *dev)
2042{
2043 struct ata_link *plink = ata_dev_phys_link(dev);
2044 u32 target, target_limit;
2045
2046 if (!sata_scr_valid(plink))
2047 return 0;
2048
2049 if (dev->horkage & ATA_HORKAGE_1_5_GBPS)
2050 target = 1;
2051 else
2052 return 0;
2053
2054 target_limit = (1 << target) - 1;
2055
2056 /* if already on stricter limit, no need to push further */
2057 if (plink->sata_spd_limit <= target_limit)
2058 return 0;
2059
2060 plink->sata_spd_limit = target_limit;
2061
2062 /* Request another EH round by returning -EAGAIN if link is
2063 * going faster than the target speed. Forward progress is
2064 * guaranteed by setting sata_spd_limit to target_limit above.
2065 */
2066 if (plink->sata_spd > target) {
a9a79dfe
JP
2067 ata_dev_info(dev, "applying link speed limit horkage to %s\n",
2068 sata_spd_string(target));
9062712f
TH
2069 return -EAGAIN;
2070 }
2071 return 0;
2072}
2073
3373efd8 2074static inline u8 ata_dev_knobble(struct ata_device *dev)
4b2f3ede 2075{
9af5c9c9 2076 struct ata_port *ap = dev->link->ap;
9ce8e307
JA
2077
2078 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_BRIDGE_OK)
2079 return 0;
2080
9af5c9c9 2081 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
4b2f3ede
TH
2082}
2083
388539f3 2084static int ata_dev_config_ncq(struct ata_device *dev,
a6e6ce8e
TH
2085 char *desc, size_t desc_sz)
2086{
9af5c9c9 2087 struct ata_port *ap = dev->link->ap;
a6e6ce8e 2088 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
388539f3
SL
2089 unsigned int err_mask;
2090 char *aa_desc = "";
a6e6ce8e
TH
2091
2092 if (!ata_id_has_ncq(dev->id)) {
2093 desc[0] = '\0';
388539f3 2094 return 0;
a6e6ce8e 2095 }
75683fe7 2096 if (dev->horkage & ATA_HORKAGE_NONCQ) {
6919a0a6 2097 snprintf(desc, desc_sz, "NCQ (not used)");
388539f3 2098 return 0;
6919a0a6 2099 }
a6e6ce8e 2100 if (ap->flags & ATA_FLAG_NCQ) {
cca3974e 2101 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
a6e6ce8e
TH
2102 dev->flags |= ATA_DFLAG_NCQ;
2103 }
2104
388539f3
SL
2105 if (!(dev->horkage & ATA_HORKAGE_BROKEN_FPDMA_AA) &&
2106 (ap->flags & ATA_FLAG_FPDMA_AA) &&
2107 ata_id_has_fpdma_aa(dev->id)) {
2108 err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_ENABLE,
2109 SATA_FPDMA_AA);
2110 if (err_mask) {
a9a79dfe
JP
2111 ata_dev_err(dev,
2112 "failed to enable AA (error_mask=0x%x)\n",
2113 err_mask);
388539f3
SL
2114 if (err_mask != AC_ERR_DEV) {
2115 dev->horkage |= ATA_HORKAGE_BROKEN_FPDMA_AA;
2116 return -EIO;
2117 }
2118 } else
2119 aa_desc = ", AA";
2120 }
2121
a6e6ce8e 2122 if (hdepth >= ddepth)
388539f3 2123 snprintf(desc, desc_sz, "NCQ (depth %d)%s", ddepth, aa_desc);
a6e6ce8e 2124 else
388539f3
SL
2125 snprintf(desc, desc_sz, "NCQ (depth %d/%d)%s", hdepth,
2126 ddepth, aa_desc);
2127 return 0;
a6e6ce8e
TH
2128}
2129
49016aca 2130/**
ffeae418 2131 * ata_dev_configure - Configure the specified ATA/ATAPI device
ffeae418
TH
2132 * @dev: Target device to configure
2133 *
2134 * Configure @dev according to @dev->id. Generic and low-level
2135 * driver specific fixups are also applied.
49016aca
TH
2136 *
2137 * LOCKING:
ffeae418
TH
2138 * Kernel thread context (may sleep)
2139 *
2140 * RETURNS:
2141 * 0 on success, -errno otherwise
49016aca 2142 */
efdaedc4 2143int ata_dev_configure(struct ata_device *dev)
49016aca 2144{
9af5c9c9
TH
2145 struct ata_port *ap = dev->link->ap;
2146 struct ata_eh_context *ehc = &dev->link->eh_context;
6746544c 2147 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1148c3a7 2148 const u16 *id = dev->id;
7dc951ae 2149 unsigned long xfer_mask;
b352e57d 2150 char revbuf[7]; /* XYZ-99\0 */
3f64f565
EM
2151 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
2152 char modelbuf[ATA_ID_PROD_LEN+1];
e6d902a3 2153 int rc;
49016aca 2154
0dd4b21f 2155 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
a9a79dfe 2156 ata_dev_info(dev, "%s: ENTER/EXIT -- nodev\n", __func__);
ffeae418 2157 return 0;
49016aca
TH
2158 }
2159
0dd4b21f 2160 if (ata_msg_probe(ap))
a9a79dfe 2161 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 2162
75683fe7
TH
2163 /* set horkage */
2164 dev->horkage |= ata_dev_blacklisted(dev);
33267325 2165 ata_force_horkage(dev);
75683fe7 2166
50af2fa1 2167 if (dev->horkage & ATA_HORKAGE_DISABLE) {
a9a79dfe 2168 ata_dev_info(dev, "unsupported device, disabling\n");
50af2fa1
TH
2169 ata_dev_disable(dev);
2170 return 0;
2171 }
2172
2486fa56
TH
2173 if ((!atapi_enabled || (ap->flags & ATA_FLAG_NO_ATAPI)) &&
2174 dev->class == ATA_DEV_ATAPI) {
a9a79dfe
JP
2175 ata_dev_warn(dev, "WARNING: ATAPI is %s, device ignored\n",
2176 atapi_enabled ? "not supported with this driver"
2177 : "disabled");
2486fa56
TH
2178 ata_dev_disable(dev);
2179 return 0;
2180 }
2181
9062712f
TH
2182 rc = ata_do_link_spd_horkage(dev);
2183 if (rc)
2184 return rc;
2185
6746544c
TH
2186 /* let ACPI work its magic */
2187 rc = ata_acpi_on_devcfg(dev);
2188 if (rc)
2189 return rc;
08573a86 2190
05027adc
TH
2191 /* massage HPA, do it early as it might change IDENTIFY data */
2192 rc = ata_hpa_resize(dev);
2193 if (rc)
2194 return rc;
2195
c39f5ebe 2196 /* print device capabilities */
0dd4b21f 2197 if (ata_msg_probe(ap))
a9a79dfe
JP
2198 ata_dev_dbg(dev,
2199 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
2200 "85:%04x 86:%04x 87:%04x 88:%04x\n",
2201 __func__,
2202 id[49], id[82], id[83], id[84],
2203 id[85], id[86], id[87], id[88]);
c39f5ebe 2204
208a9933 2205 /* initialize to-be-configured parameters */
ea1dd4e1 2206 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH
2207 dev->max_sectors = 0;
2208 dev->cdb_len = 0;
2209 dev->n_sectors = 0;
2210 dev->cylinders = 0;
2211 dev->heads = 0;
2212 dev->sectors = 0;
e18086d6 2213 dev->multi_count = 0;
208a9933 2214
1da177e4
LT
2215 /*
2216 * common ATA, ATAPI feature tests
2217 */
2218
ff8854b2 2219 /* find max transfer mode; for printk only */
1148c3a7 2220 xfer_mask = ata_id_xfermask(id);
1da177e4 2221
0dd4b21f
BP
2222 if (ata_msg_probe(ap))
2223 ata_dump_id(id);
1da177e4 2224
ef143d57
AL
2225 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
2226 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
2227 sizeof(fwrevbuf));
2228
2229 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
2230 sizeof(modelbuf));
2231
1da177e4
LT
2232 /* ATA-specific feature tests */
2233 if (dev->class == ATA_DEV_ATA) {
b352e57d 2234 if (ata_id_is_cfa(id)) {
62afe5d7
SS
2235 /* CPRM may make this media unusable */
2236 if (id[ATA_ID_CFA_KEY_MGMT] & 1)
a9a79dfe
JP
2237 ata_dev_warn(dev,
2238 "supports DRM functions and may not be fully accessible\n");
b352e57d 2239 snprintf(revbuf, 7, "CFA");
ae8d4ee7 2240 } else {
2dcb407e 2241 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
ae8d4ee7
AC
2242 /* Warn the user if the device has TPM extensions */
2243 if (ata_id_has_tpm(id))
a9a79dfe
JP
2244 ata_dev_warn(dev,
2245 "supports DRM functions and may not be fully accessible\n");
ae8d4ee7 2246 }
b352e57d 2247
1148c3a7 2248 dev->n_sectors = ata_id_n_sectors(id);
2940740b 2249
e18086d6
ML
2250 /* get current R/W Multiple count setting */
2251 if ((dev->id[47] >> 8) == 0x80 && (dev->id[59] & 0x100)) {
2252 unsigned int max = dev->id[47] & 0xff;
2253 unsigned int cnt = dev->id[59] & 0xff;
2254 /* only recognize/allow powers of two here */
2255 if (is_power_of_2(max) && is_power_of_2(cnt))
2256 if (cnt <= max)
2257 dev->multi_count = cnt;
2258 }
3f64f565 2259
1148c3a7 2260 if (ata_id_has_lba(id)) {
4c2d721a 2261 const char *lba_desc;
388539f3 2262 char ncq_desc[24];
8bf62ece 2263
4c2d721a
TH
2264 lba_desc = "LBA";
2265 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 2266 if (ata_id_has_lba48(id)) {
8bf62ece 2267 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a 2268 lba_desc = "LBA48";
6fc49adb
TH
2269
2270 if (dev->n_sectors >= (1UL << 28) &&
2271 ata_id_has_flush_ext(id))
2272 dev->flags |= ATA_DFLAG_FLUSH_EXT;
4c2d721a 2273 }
8bf62ece 2274
a6e6ce8e 2275 /* config NCQ */
388539f3
SL
2276 rc = ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2277 if (rc)
2278 return rc;
a6e6ce8e 2279
8bf62ece 2280 /* print device info to dmesg */
3f64f565 2281 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2282 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2283 revbuf, modelbuf, fwrevbuf,
2284 ata_mode_string(xfer_mask));
2285 ata_dev_info(dev,
2286 "%llu sectors, multi %u: %s %s\n",
f15a1daf 2287 (unsigned long long)dev->n_sectors,
3f64f565
EM
2288 dev->multi_count, lba_desc, ncq_desc);
2289 }
ffeae418 2290 } else {
8bf62ece
AL
2291 /* CHS */
2292
2293 /* Default translation */
1148c3a7
TH
2294 dev->cylinders = id[1];
2295 dev->heads = id[3];
2296 dev->sectors = id[6];
8bf62ece 2297
1148c3a7 2298 if (ata_id_current_chs_valid(id)) {
8bf62ece 2299 /* Current CHS translation is valid. */
1148c3a7
TH
2300 dev->cylinders = id[54];
2301 dev->heads = id[55];
2302 dev->sectors = id[56];
8bf62ece
AL
2303 }
2304
2305 /* print device info to dmesg */
3f64f565 2306 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2307 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2308 revbuf, modelbuf, fwrevbuf,
2309 ata_mode_string(xfer_mask));
2310 ata_dev_info(dev,
2311 "%llu sectors, multi %u, CHS %u/%u/%u\n",
2312 (unsigned long long)dev->n_sectors,
2313 dev->multi_count, dev->cylinders,
2314 dev->heads, dev->sectors);
3f64f565 2315 }
07f6f7d0
AL
2316 }
2317
6e7846e9 2318 dev->cdb_len = 16;
1da177e4
LT
2319 }
2320
2321 /* ATAPI-specific feature tests */
2c13b7ce 2322 else if (dev->class == ATA_DEV_ATAPI) {
854c73a2
TH
2323 const char *cdb_intr_string = "";
2324 const char *atapi_an_string = "";
91163006 2325 const char *dma_dir_string = "";
7d77b247 2326 u32 sntf;
08a556db 2327
1148c3a7 2328 rc = atapi_cdb_len(id);
1da177e4 2329 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
0dd4b21f 2330 if (ata_msg_warn(ap))
a9a79dfe 2331 ata_dev_warn(dev, "unsupported CDB len\n");
ffeae418 2332 rc = -EINVAL;
1da177e4
LT
2333 goto err_out_nosup;
2334 }
6e7846e9 2335 dev->cdb_len = (unsigned int) rc;
1da177e4 2336
7d77b247
TH
2337 /* Enable ATAPI AN if both the host and device have
2338 * the support. If PMP is attached, SNTF is required
2339 * to enable ATAPI AN to discern between PHY status
2340 * changed notifications and ATAPI ANs.
9f45cbd3 2341 */
e7ecd435
TH
2342 if (atapi_an &&
2343 (ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
071f44b1 2344 (!sata_pmp_attached(ap) ||
7d77b247 2345 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
854c73a2
TH
2346 unsigned int err_mask;
2347
9f45cbd3 2348 /* issue SET feature command to turn this on */
218f3d30
JG
2349 err_mask = ata_dev_set_feature(dev,
2350 SETFEATURES_SATA_ENABLE, SATA_AN);
854c73a2 2351 if (err_mask)
a9a79dfe
JP
2352 ata_dev_err(dev,
2353 "failed to enable ATAPI AN (err_mask=0x%x)\n",
2354 err_mask);
854c73a2 2355 else {
9f45cbd3 2356 dev->flags |= ATA_DFLAG_AN;
854c73a2
TH
2357 atapi_an_string = ", ATAPI AN";
2358 }
9f45cbd3
KCA
2359 }
2360
08a556db 2361 if (ata_id_cdb_intr(dev->id)) {
312f7da2 2362 dev->flags |= ATA_DFLAG_CDB_INTR;
08a556db
AL
2363 cdb_intr_string = ", CDB intr";
2364 }
312f7da2 2365
91163006
TH
2366 if (atapi_dmadir || atapi_id_dmadir(dev->id)) {
2367 dev->flags |= ATA_DFLAG_DMADIR;
2368 dma_dir_string = ", DMADIR";
2369 }
2370
1da177e4 2371 /* print device info to dmesg */
5afc8142 2372 if (ata_msg_drv(ap) && print_info)
a9a79dfe
JP
2373 ata_dev_info(dev,
2374 "ATAPI: %s, %s, max %s%s%s%s\n",
2375 modelbuf, fwrevbuf,
2376 ata_mode_string(xfer_mask),
2377 cdb_intr_string, atapi_an_string,
2378 dma_dir_string);
1da177e4
LT
2379 }
2380
914ed354
TH
2381 /* determine max_sectors */
2382 dev->max_sectors = ATA_MAX_SECTORS;
2383 if (dev->flags & ATA_DFLAG_LBA48)
2384 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2385
c5038fc0
AC
2386 /* Limit PATA drive on SATA cable bridge transfers to udma5,
2387 200 sectors */
3373efd8 2388 if (ata_dev_knobble(dev)) {
5afc8142 2389 if (ata_msg_drv(ap) && print_info)
a9a79dfe 2390 ata_dev_info(dev, "applying bridge limits\n");
5a529139 2391 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH
2392 dev->max_sectors = ATA_MAX_SECTORS;
2393 }
2394
f8d8e579 2395 if ((dev->class == ATA_DEV_ATAPI) &&
f442cd86 2396 (atapi_command_packet_set(id) == TYPE_TAPE)) {
f8d8e579 2397 dev->max_sectors = ATA_MAX_SECTORS_TAPE;
f442cd86
AL
2398 dev->horkage |= ATA_HORKAGE_STUCK_ERR;
2399 }
f8d8e579 2400
75683fe7 2401 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
03ec52de
TH
2402 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2403 dev->max_sectors);
18d6e9d5 2404
4b2f3ede 2405 if (ap->ops->dev_config)
cd0d3bbc 2406 ap->ops->dev_config(dev);
4b2f3ede 2407
c5038fc0
AC
2408 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2409 /* Let the user know. We don't want to disallow opens for
2410 rescue purposes, or in case the vendor is just a blithering
2411 idiot. Do this after the dev_config call as some controllers
2412 with buggy firmware may want to avoid reporting false device
2413 bugs */
2414
2415 if (print_info) {
a9a79dfe 2416 ata_dev_warn(dev,
c5038fc0 2417"Drive reports diagnostics failure. This may indicate a drive\n");
a9a79dfe 2418 ata_dev_warn(dev,
c5038fc0
AC
2419"fault or invalid emulation. Contact drive vendor for information.\n");
2420 }
2421 }
2422
ac70a964 2423 if ((dev->horkage & ATA_HORKAGE_FIRMWARE_WARN) && print_info) {
a9a79dfe
JP
2424 ata_dev_warn(dev, "WARNING: device requires firmware update to be fully functional\n");
2425 ata_dev_warn(dev, " contact the vendor or visit http://ata.wiki.kernel.org\n");
ac70a964
TH
2426 }
2427
ffeae418 2428 return 0;
1da177e4
LT
2429
2430err_out_nosup:
0dd4b21f 2431 if (ata_msg_probe(ap))
a9a79dfe 2432 ata_dev_dbg(dev, "%s: EXIT, err\n", __func__);
ffeae418 2433 return rc;
1da177e4
LT
2434}
2435
be0d18df 2436/**
2e41e8e6 2437 * ata_cable_40wire - return 40 wire cable type
be0d18df
AC
2438 * @ap: port
2439 *
2e41e8e6 2440 * Helper method for drivers which want to hardwire 40 wire cable
be0d18df
AC
2441 * detection.
2442 */
2443
2444int ata_cable_40wire(struct ata_port *ap)
2445{
2446 return ATA_CBL_PATA40;
2447}
2448
2449/**
2e41e8e6 2450 * ata_cable_80wire - return 80 wire cable type
be0d18df
AC
2451 * @ap: port
2452 *
2e41e8e6 2453 * Helper method for drivers which want to hardwire 80 wire cable
be0d18df
AC
2454 * detection.
2455 */
2456
2457int ata_cable_80wire(struct ata_port *ap)
2458{
2459 return ATA_CBL_PATA80;
2460}
2461
2462/**
2463 * ata_cable_unknown - return unknown PATA cable.
2464 * @ap: port
2465 *
2466 * Helper method for drivers which have no PATA cable detection.
2467 */
2468
2469int ata_cable_unknown(struct ata_port *ap)
2470{
2471 return ATA_CBL_PATA_UNK;
2472}
2473
c88f90c3
TH
2474/**
2475 * ata_cable_ignore - return ignored PATA cable.
2476 * @ap: port
2477 *
2478 * Helper method for drivers which don't use cable type to limit
2479 * transfer mode.
2480 */
2481int ata_cable_ignore(struct ata_port *ap)
2482{
2483 return ATA_CBL_PATA_IGN;
2484}
2485
be0d18df
AC
2486/**
2487 * ata_cable_sata - return SATA cable type
2488 * @ap: port
2489 *
2490 * Helper method for drivers which have SATA cables
2491 */
2492
2493int ata_cable_sata(struct ata_port *ap)
2494{
2495 return ATA_CBL_SATA;
2496}
2497
1da177e4
LT
2498/**
2499 * ata_bus_probe - Reset and probe ATA bus
2500 * @ap: Bus to probe
2501 *
0cba632b
JG
2502 * Master ATA bus probing function. Initiates a hardware-dependent
2503 * bus reset, then attempts to identify any devices found on
2504 * the bus.
2505 *
1da177e4 2506 * LOCKING:
0cba632b 2507 * PCI/etc. bus probe sem.
1da177e4
LT
2508 *
2509 * RETURNS:
96072e69 2510 * Zero on success, negative errno otherwise.
1da177e4
LT
2511 */
2512
80289167 2513int ata_bus_probe(struct ata_port *ap)
1da177e4 2514{
28ca5c57 2515 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1 2516 int tries[ATA_MAX_DEVICES];
f58229f8 2517 int rc;
e82cbdb9 2518 struct ata_device *dev;
1da177e4 2519
1eca4365 2520 ata_for_each_dev(dev, &ap->link, ALL)
f58229f8 2521 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
14d2bac1
TH
2522
2523 retry:
1eca4365 2524 ata_for_each_dev(dev, &ap->link, ALL) {
cdeab114
TH
2525 /* If we issue an SRST then an ATA drive (not ATAPI)
2526 * may change configuration and be in PIO0 timing. If
2527 * we do a hard reset (or are coming from power on)
2528 * this is true for ATA or ATAPI. Until we've set a
2529 * suitable controller mode we should not touch the
2530 * bus as we may be talking too fast.
2531 */
2532 dev->pio_mode = XFER_PIO_0;
2533
2534 /* If the controller has a pio mode setup function
2535 * then use it to set the chipset to rights. Don't
2536 * touch the DMA setup as that will be dealt with when
2537 * configuring devices.
2538 */
2539 if (ap->ops->set_piomode)
2540 ap->ops->set_piomode(ap, dev);
2541 }
2542
2044470c 2543 /* reset and determine device classes */
52783c5d 2544 ap->ops->phy_reset(ap);
2061a47a 2545
1eca4365 2546 ata_for_each_dev(dev, &ap->link, ALL) {
3e4ec344 2547 if (dev->class != ATA_DEV_UNKNOWN)
52783c5d
TH
2548 classes[dev->devno] = dev->class;
2549 else
2550 classes[dev->devno] = ATA_DEV_NONE;
2044470c 2551
52783c5d 2552 dev->class = ATA_DEV_UNKNOWN;
28ca5c57 2553 }
1da177e4 2554
f31f0cc2
JG
2555 /* read IDENTIFY page and configure devices. We have to do the identify
2556 specific sequence bass-ackwards so that PDIAG- is released by
2557 the slave device */
2558
1eca4365 2559 ata_for_each_dev(dev, &ap->link, ALL_REVERSE) {
f58229f8
TH
2560 if (tries[dev->devno])
2561 dev->class = classes[dev->devno];
ffeae418 2562
14d2bac1 2563 if (!ata_dev_enabled(dev))
ffeae418 2564 continue;
ffeae418 2565
bff04647
TH
2566 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2567 dev->id);
14d2bac1
TH
2568 if (rc)
2569 goto fail;
f31f0cc2
JG
2570 }
2571
be0d18df
AC
2572 /* Now ask for the cable type as PDIAG- should have been released */
2573 if (ap->ops->cable_detect)
2574 ap->cbl = ap->ops->cable_detect(ap);
2575
1eca4365
TH
2576 /* We may have SATA bridge glue hiding here irrespective of
2577 * the reported cable types and sensed types. When SATA
2578 * drives indicate we have a bridge, we don't know which end
2579 * of the link the bridge is which is a problem.
2580 */
2581 ata_for_each_dev(dev, &ap->link, ENABLED)
614fe29b
AC
2582 if (ata_id_is_sata(dev->id))
2583 ap->cbl = ATA_CBL_SATA;
614fe29b 2584
f31f0cc2
JG
2585 /* After the identify sequence we can now set up the devices. We do
2586 this in the normal order so that the user doesn't get confused */
2587
1eca4365 2588 ata_for_each_dev(dev, &ap->link, ENABLED) {
9af5c9c9 2589 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
efdaedc4 2590 rc = ata_dev_configure(dev);
9af5c9c9 2591 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
14d2bac1
TH
2592 if (rc)
2593 goto fail;
1da177e4
LT
2594 }
2595
e82cbdb9 2596 /* configure transfer mode */
0260731f 2597 rc = ata_set_mode(&ap->link, &dev);
4ae72a1e 2598 if (rc)
51713d35 2599 goto fail;
1da177e4 2600
1eca4365
TH
2601 ata_for_each_dev(dev, &ap->link, ENABLED)
2602 return 0;
1da177e4 2603
96072e69 2604 return -ENODEV;
14d2bac1
TH
2605
2606 fail:
4ae72a1e
TH
2607 tries[dev->devno]--;
2608
14d2bac1
TH
2609 switch (rc) {
2610 case -EINVAL:
4ae72a1e 2611 /* eeek, something went very wrong, give up */
14d2bac1
TH
2612 tries[dev->devno] = 0;
2613 break;
4ae72a1e
TH
2614
2615 case -ENODEV:
2616 /* give it just one more chance */
2617 tries[dev->devno] = min(tries[dev->devno], 1);
14d2bac1 2618 case -EIO:
4ae72a1e
TH
2619 if (tries[dev->devno] == 1) {
2620 /* This is the last chance, better to slow
2621 * down than lose it.
2622 */
a07d499b 2623 sata_down_spd_limit(&ap->link, 0);
4ae72a1e
TH
2624 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2625 }
14d2bac1
TH
2626 }
2627
4ae72a1e 2628 if (!tries[dev->devno])
3373efd8 2629 ata_dev_disable(dev);
ec573755 2630
14d2bac1 2631 goto retry;
1da177e4
LT
2632}
2633
3be680b7
TH
2634/**
2635 * sata_print_link_status - Print SATA link status
936fd732 2636 * @link: SATA link to printk link status about
3be680b7
TH
2637 *
2638 * This function prints link speed and status of a SATA link.
2639 *
2640 * LOCKING:
2641 * None.
2642 */
6bdb4fc9 2643static void sata_print_link_status(struct ata_link *link)
3be680b7 2644{
6d5f9732 2645 u32 sstatus, scontrol, tmp;
3be680b7 2646
936fd732 2647 if (sata_scr_read(link, SCR_STATUS, &sstatus))
3be680b7 2648 return;
936fd732 2649 sata_scr_read(link, SCR_CONTROL, &scontrol);
3be680b7 2650
b1c72916 2651 if (ata_phys_link_online(link)) {
3be680b7 2652 tmp = (sstatus >> 4) & 0xf;
a9a79dfe
JP
2653 ata_link_info(link, "SATA link up %s (SStatus %X SControl %X)\n",
2654 sata_spd_string(tmp), sstatus, scontrol);
3be680b7 2655 } else {
a9a79dfe
JP
2656 ata_link_info(link, "SATA link down (SStatus %X SControl %X)\n",
2657 sstatus, scontrol);
3be680b7
TH
2658 }
2659}
2660
ebdfca6e
AC
2661/**
2662 * ata_dev_pair - return other device on cable
ebdfca6e
AC
2663 * @adev: device
2664 *
2665 * Obtain the other device on the same cable, or if none is
2666 * present NULL is returned
2667 */
2e9edbf8 2668
3373efd8 2669struct ata_device *ata_dev_pair(struct ata_device *adev)
ebdfca6e 2670{
9af5c9c9
TH
2671 struct ata_link *link = adev->link;
2672 struct ata_device *pair = &link->device[1 - adev->devno];
e1211e3f 2673 if (!ata_dev_enabled(pair))
ebdfca6e
AC
2674 return NULL;
2675 return pair;
2676}
2677
1c3fae4d 2678/**
3c567b7d 2679 * sata_down_spd_limit - adjust SATA spd limit downward
936fd732 2680 * @link: Link to adjust SATA spd limit for
a07d499b 2681 * @spd_limit: Additional limit
1c3fae4d 2682 *
936fd732 2683 * Adjust SATA spd limit of @link downward. Note that this
1c3fae4d 2684 * function only adjusts the limit. The change must be applied
3c567b7d 2685 * using sata_set_spd().
1c3fae4d 2686 *
a07d499b
TH
2687 * If @spd_limit is non-zero, the speed is limited to equal to or
2688 * lower than @spd_limit if such speed is supported. If
2689 * @spd_limit is slower than any supported speed, only the lowest
2690 * supported speed is allowed.
2691 *
1c3fae4d
TH
2692 * LOCKING:
2693 * Inherited from caller.
2694 *
2695 * RETURNS:
2696 * 0 on success, negative errno on failure
2697 */
a07d499b 2698int sata_down_spd_limit(struct ata_link *link, u32 spd_limit)
1c3fae4d 2699{
81952c54 2700 u32 sstatus, spd, mask;
a07d499b 2701 int rc, bit;
1c3fae4d 2702
936fd732 2703 if (!sata_scr_valid(link))
008a7896
TH
2704 return -EOPNOTSUPP;
2705
2706 /* If SCR can be read, use it to determine the current SPD.
936fd732 2707 * If not, use cached value in link->sata_spd.
008a7896 2708 */
936fd732 2709 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
9913ff8a 2710 if (rc == 0 && ata_sstatus_online(sstatus))
008a7896
TH
2711 spd = (sstatus >> 4) & 0xf;
2712 else
936fd732 2713 spd = link->sata_spd;
1c3fae4d 2714
936fd732 2715 mask = link->sata_spd_limit;
1c3fae4d
TH
2716 if (mask <= 1)
2717 return -EINVAL;
008a7896
TH
2718
2719 /* unconditionally mask off the highest bit */
a07d499b
TH
2720 bit = fls(mask) - 1;
2721 mask &= ~(1 << bit);
1c3fae4d 2722
008a7896
TH
2723 /* Mask off all speeds higher than or equal to the current
2724 * one. Force 1.5Gbps if current SPD is not available.
2725 */
2726 if (spd > 1)
2727 mask &= (1 << (spd - 1)) - 1;
2728 else
2729 mask &= 1;
2730
2731 /* were we already at the bottom? */
1c3fae4d
TH
2732 if (!mask)
2733 return -EINVAL;
2734
a07d499b
TH
2735 if (spd_limit) {
2736 if (mask & ((1 << spd_limit) - 1))
2737 mask &= (1 << spd_limit) - 1;
2738 else {
2739 bit = ffs(mask) - 1;
2740 mask = 1 << bit;
2741 }
2742 }
2743
936fd732 2744 link->sata_spd_limit = mask;
1c3fae4d 2745
a9a79dfe
JP
2746 ata_link_warn(link, "limiting SATA link speed to %s\n",
2747 sata_spd_string(fls(mask)));
1c3fae4d
TH
2748
2749 return 0;
2750}
2751
936fd732 2752static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
1c3fae4d 2753{
5270222f
TH
2754 struct ata_link *host_link = &link->ap->link;
2755 u32 limit, target, spd;
1c3fae4d 2756
5270222f
TH
2757 limit = link->sata_spd_limit;
2758
2759 /* Don't configure downstream link faster than upstream link.
2760 * It doesn't speed up anything and some PMPs choke on such
2761 * configuration.
2762 */
2763 if (!ata_is_host_link(link) && host_link->sata_spd)
2764 limit &= (1 << host_link->sata_spd) - 1;
2765
2766 if (limit == UINT_MAX)
2767 target = 0;
1c3fae4d 2768 else
5270222f 2769 target = fls(limit);
1c3fae4d
TH
2770
2771 spd = (*scontrol >> 4) & 0xf;
5270222f 2772 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
1c3fae4d 2773
5270222f 2774 return spd != target;
1c3fae4d
TH
2775}
2776
2777/**
3c567b7d 2778 * sata_set_spd_needed - is SATA spd configuration needed
936fd732 2779 * @link: Link in question
1c3fae4d
TH
2780 *
2781 * Test whether the spd limit in SControl matches
936fd732 2782 * @link->sata_spd_limit. This function is used to determine
1c3fae4d
TH
2783 * whether hardreset is necessary to apply SATA spd
2784 * configuration.
2785 *
2786 * LOCKING:
2787 * Inherited from caller.
2788 *
2789 * RETURNS:
2790 * 1 if SATA spd configuration is needed, 0 otherwise.
2791 */
1dc55e87 2792static int sata_set_spd_needed(struct ata_link *link)
1c3fae4d
TH
2793{
2794 u32 scontrol;
2795
936fd732 2796 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
db64bcf3 2797 return 1;
1c3fae4d 2798
936fd732 2799 return __sata_set_spd_needed(link, &scontrol);
1c3fae4d
TH
2800}
2801
2802/**
3c567b7d 2803 * sata_set_spd - set SATA spd according to spd limit
936fd732 2804 * @link: Link to set SATA spd for
1c3fae4d 2805 *
936fd732 2806 * Set SATA spd of @link according to sata_spd_limit.
1c3fae4d
TH
2807 *
2808 * LOCKING:
2809 * Inherited from caller.
2810 *
2811 * RETURNS:
2812 * 0 if spd doesn't need to be changed, 1 if spd has been
81952c54 2813 * changed. Negative errno if SCR registers are inaccessible.
1c3fae4d 2814 */
936fd732 2815int sata_set_spd(struct ata_link *link)
1c3fae4d
TH
2816{
2817 u32 scontrol;
81952c54 2818 int rc;
1c3fae4d 2819
936fd732 2820 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 2821 return rc;
1c3fae4d 2822
936fd732 2823 if (!__sata_set_spd_needed(link, &scontrol))
1c3fae4d
TH
2824 return 0;
2825
936fd732 2826 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
81952c54
TH
2827 return rc;
2828
1c3fae4d
TH
2829 return 1;
2830}
2831
452503f9
AC
2832/*
2833 * This mode timing computation functionality is ported over from
2834 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
2835 */
2836/*
b352e57d 2837 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
452503f9 2838 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
b352e57d
AC
2839 * for UDMA6, which is currently supported only by Maxtor drives.
2840 *
2841 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
452503f9
AC
2842 */
2843
2844static const struct ata_timing ata_timing[] = {
3ada9c12
DD
2845/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
2846 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
2847 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
2848 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
2849 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
2850 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
2851 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
2852 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
2853
2854 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
2855 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
2856 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
2857
2858 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
2859 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
2860 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
2861 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
2862 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
2863
2864/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2865 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
2866 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
2867 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
2868 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
2869 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
2870 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
2871 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
452503f9
AC
2872
2873 { 0xFF }
2874};
2875
2dcb407e
JG
2876#define ENOUGH(v, unit) (((v)-1)/(unit)+1)
2877#define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
452503f9
AC
2878
2879static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
2880{
3ada9c12
DD
2881 q->setup = EZ(t->setup * 1000, T);
2882 q->act8b = EZ(t->act8b * 1000, T);
2883 q->rec8b = EZ(t->rec8b * 1000, T);
2884 q->cyc8b = EZ(t->cyc8b * 1000, T);
2885 q->active = EZ(t->active * 1000, T);
2886 q->recover = EZ(t->recover * 1000, T);
2887 q->dmack_hold = EZ(t->dmack_hold * 1000, T);
2888 q->cycle = EZ(t->cycle * 1000, T);
2889 q->udma = EZ(t->udma * 1000, UT);
452503f9
AC
2890}
2891
2892void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
2893 struct ata_timing *m, unsigned int what)
2894{
2895 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
2896 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
2897 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
2898 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
2899 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
2900 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
3ada9c12 2901 if (what & ATA_TIMING_DMACK_HOLD) m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
452503f9
AC
2902 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
2903 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
2904}
2905
6357357c 2906const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
452503f9 2907{
70cd071e
TH
2908 const struct ata_timing *t = ata_timing;
2909
2910 while (xfer_mode > t->mode)
2911 t++;
452503f9 2912
70cd071e
TH
2913 if (xfer_mode == t->mode)
2914 return t;
2915 return NULL;
452503f9
AC
2916}
2917
2918int ata_timing_compute(struct ata_device *adev, unsigned short speed,
2919 struct ata_timing *t, int T, int UT)
2920{
9e8808a9 2921 const u16 *id = adev->id;
452503f9
AC
2922 const struct ata_timing *s;
2923 struct ata_timing p;
2924
2925 /*
2e9edbf8 2926 * Find the mode.
75b1f2f8 2927 */
452503f9
AC
2928
2929 if (!(s = ata_timing_find_mode(speed)))
2930 return -EINVAL;
2931
75b1f2f8
AL
2932 memcpy(t, s, sizeof(*s));
2933
452503f9
AC
2934 /*
2935 * If the drive is an EIDE drive, it can tell us it needs extended
2936 * PIO/MW_DMA cycle timing.
2937 */
2938
9e8808a9 2939 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
452503f9 2940 memset(&p, 0, sizeof(p));
9e8808a9 2941
bff00256 2942 if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
9e8808a9
BZ
2943 if (speed <= XFER_PIO_2)
2944 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
2945 else if ((speed <= XFER_PIO_4) ||
2946 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
2947 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
2948 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
2949 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
2950
452503f9
AC
2951 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
2952 }
2953
2954 /*
2955 * Convert the timing to bus clock counts.
2956 */
2957
75b1f2f8 2958 ata_timing_quantize(t, t, T, UT);
452503f9
AC
2959
2960 /*
c893a3ae
RD
2961 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
2962 * S.M.A.R.T * and some other commands. We have to ensure that the
2963 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC
2964 */
2965
fd3367af 2966 if (speed > XFER_PIO_6) {
452503f9
AC
2967 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
2968 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
2969 }
2970
2971 /*
c893a3ae 2972 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC
2973 */
2974
2975 if (t->act8b + t->rec8b < t->cyc8b) {
2976 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
2977 t->rec8b = t->cyc8b - t->act8b;
2978 }
2979
2980 if (t->active + t->recover < t->cycle) {
2981 t->active += (t->cycle - (t->active + t->recover)) / 2;
2982 t->recover = t->cycle - t->active;
2983 }
a617c09f 2984
4f701d1e
AC
2985 /* In a few cases quantisation may produce enough errors to
2986 leave t->cycle too low for the sum of active and recovery
2987 if so we must correct this */
2988 if (t->active + t->recover > t->cycle)
2989 t->cycle = t->active + t->recover;
452503f9
AC
2990
2991 return 0;
2992}
2993
a0f79b92
TH
2994/**
2995 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration
2996 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
2997 * @cycle: cycle duration in ns
2998 *
2999 * Return matching xfer mode for @cycle. The returned mode is of
3000 * the transfer type specified by @xfer_shift. If @cycle is too
3001 * slow for @xfer_shift, 0xff is returned. If @cycle is faster
3002 * than the fastest known mode, the fasted mode is returned.
3003 *
3004 * LOCKING:
3005 * None.
3006 *
3007 * RETURNS:
3008 * Matching xfer_mode, 0xff if no match found.
3009 */
3010u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle)
3011{
3012 u8 base_mode = 0xff, last_mode = 0xff;
3013 const struct ata_xfer_ent *ent;
3014 const struct ata_timing *t;
3015
3016 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
3017 if (ent->shift == xfer_shift)
3018 base_mode = ent->base;
3019
3020 for (t = ata_timing_find_mode(base_mode);
3021 t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) {
3022 unsigned short this_cycle;
3023
3024 switch (xfer_shift) {
3025 case ATA_SHIFT_PIO:
3026 case ATA_SHIFT_MWDMA:
3027 this_cycle = t->cycle;
3028 break;
3029 case ATA_SHIFT_UDMA:
3030 this_cycle = t->udma;
3031 break;
3032 default:
3033 return 0xff;
3034 }
3035
3036 if (cycle > this_cycle)
3037 break;
3038
3039 last_mode = t->mode;
3040 }
3041
3042 return last_mode;
3043}
3044
cf176e1a
TH
3045/**
3046 * ata_down_xfermask_limit - adjust dev xfer masks downward
cf176e1a 3047 * @dev: Device to adjust xfer masks
458337db 3048 * @sel: ATA_DNXFER_* selector
cf176e1a
TH
3049 *
3050 * Adjust xfer masks of @dev downward. Note that this function
3051 * does not apply the change. Invoking ata_set_mode() afterwards
3052 * will apply the limit.
3053 *
3054 * LOCKING:
3055 * Inherited from caller.
3056 *
3057 * RETURNS:
3058 * 0 on success, negative errno on failure
3059 */
458337db 3060int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
cf176e1a 3061{
458337db 3062 char buf[32];
7dc951ae
TH
3063 unsigned long orig_mask, xfer_mask;
3064 unsigned long pio_mask, mwdma_mask, udma_mask;
458337db 3065 int quiet, highbit;
cf176e1a 3066
458337db
TH
3067 quiet = !!(sel & ATA_DNXFER_QUIET);
3068 sel &= ~ATA_DNXFER_QUIET;
cf176e1a 3069
458337db
TH
3070 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
3071 dev->mwdma_mask,
3072 dev->udma_mask);
3073 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
cf176e1a 3074
458337db
TH
3075 switch (sel) {
3076 case ATA_DNXFER_PIO:
3077 highbit = fls(pio_mask) - 1;
3078 pio_mask &= ~(1 << highbit);
3079 break;
3080
3081 case ATA_DNXFER_DMA:
3082 if (udma_mask) {
3083 highbit = fls(udma_mask) - 1;
3084 udma_mask &= ~(1 << highbit);
3085 if (!udma_mask)
3086 return -ENOENT;
3087 } else if (mwdma_mask) {
3088 highbit = fls(mwdma_mask) - 1;
3089 mwdma_mask &= ~(1 << highbit);
3090 if (!mwdma_mask)
3091 return -ENOENT;
3092 }
3093 break;
3094
3095 case ATA_DNXFER_40C:
3096 udma_mask &= ATA_UDMA_MASK_40C;
3097 break;
3098
3099 case ATA_DNXFER_FORCE_PIO0:
3100 pio_mask &= 1;
3101 case ATA_DNXFER_FORCE_PIO:
3102 mwdma_mask = 0;
3103 udma_mask = 0;
3104 break;
3105
458337db
TH
3106 default:
3107 BUG();
3108 }
3109
3110 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
3111
3112 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
3113 return -ENOENT;
3114
3115 if (!quiet) {
3116 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
3117 snprintf(buf, sizeof(buf), "%s:%s",
3118 ata_mode_string(xfer_mask),
3119 ata_mode_string(xfer_mask & ATA_MASK_PIO));
3120 else
3121 snprintf(buf, sizeof(buf), "%s",
3122 ata_mode_string(xfer_mask));
3123
a9a79dfe 3124 ata_dev_warn(dev, "limiting speed to %s\n", buf);
458337db 3125 }
cf176e1a
TH
3126
3127 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
3128 &dev->udma_mask);
3129
cf176e1a 3130 return 0;
cf176e1a
TH
3131}
3132
3373efd8 3133static int ata_dev_set_mode(struct ata_device *dev)
1da177e4 3134{
d0cb43b3 3135 struct ata_port *ap = dev->link->ap;
9af5c9c9 3136 struct ata_eh_context *ehc = &dev->link->eh_context;
d0cb43b3 3137 const bool nosetxfer = dev->horkage & ATA_HORKAGE_NOSETXFER;
4055dee7
TH
3138 const char *dev_err_whine = "";
3139 int ign_dev_err = 0;
d0cb43b3 3140 unsigned int err_mask = 0;
83206a29 3141 int rc;
1da177e4 3142
e8384607 3143 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT
3144 if (dev->xfer_shift == ATA_SHIFT_PIO)
3145 dev->flags |= ATA_DFLAG_PIO;
3146
d0cb43b3
TH
3147 if (nosetxfer && ap->flags & ATA_FLAG_SATA && ata_id_is_sata(dev->id))
3148 dev_err_whine = " (SET_XFERMODE skipped)";
3149 else {
3150 if (nosetxfer)
a9a79dfe
JP
3151 ata_dev_warn(dev,
3152 "NOSETXFER but PATA detected - can't "
3153 "skip SETXFER, might malfunction\n");
d0cb43b3
TH
3154 err_mask = ata_dev_set_xfermode(dev);
3155 }
2dcb407e 3156
4055dee7
TH
3157 if (err_mask & ~AC_ERR_DEV)
3158 goto fail;
3159
3160 /* revalidate */
3161 ehc->i.flags |= ATA_EHI_POST_SETMODE;
3162 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
3163 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
3164 if (rc)
3165 return rc;
3166
b93fda12
AC
3167 if (dev->xfer_shift == ATA_SHIFT_PIO) {
3168 /* Old CFA may refuse this command, which is just fine */
3169 if (ata_id_is_cfa(dev->id))
3170 ign_dev_err = 1;
3171 /* Catch several broken garbage emulations plus some pre
3172 ATA devices */
3173 if (ata_id_major_version(dev->id) == 0 &&
3174 dev->pio_mode <= XFER_PIO_2)
3175 ign_dev_err = 1;
3176 /* Some very old devices and some bad newer ones fail
3177 any kind of SET_XFERMODE request but support PIO0-2
3178 timings and no IORDY */
3179 if (!ata_id_has_iordy(dev->id) && dev->pio_mode <= XFER_PIO_2)
3180 ign_dev_err = 1;
3181 }
3acaf94b
AC
3182 /* Early MWDMA devices do DMA but don't allow DMA mode setting.
3183 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
c5038fc0 3184 if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
3acaf94b
AC
3185 dev->dma_mode == XFER_MW_DMA_0 &&
3186 (dev->id[63] >> 8) & 1)
4055dee7 3187 ign_dev_err = 1;
3acaf94b 3188
4055dee7
TH
3189 /* if the device is actually configured correctly, ignore dev err */
3190 if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id)))
3191 ign_dev_err = 1;
1da177e4 3192
4055dee7
TH
3193 if (err_mask & AC_ERR_DEV) {
3194 if (!ign_dev_err)
3195 goto fail;
3196 else
3197 dev_err_whine = " (device error ignored)";
3198 }
48a8a14f 3199
23e71c3d
TH
3200 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
3201 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4 3202
a9a79dfe
JP
3203 ata_dev_info(dev, "configured for %s%s\n",
3204 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)),
3205 dev_err_whine);
4055dee7 3206
83206a29 3207 return 0;
4055dee7
TH
3208
3209 fail:
a9a79dfe 3210 ata_dev_err(dev, "failed to set xfermode (err_mask=0x%x)\n", err_mask);
4055dee7 3211 return -EIO;
1da177e4
LT
3212}
3213
1da177e4 3214/**
04351821 3215 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
0260731f 3216 * @link: link on which timings will be programmed
1967b7ff 3217 * @r_failed_dev: out parameter for failed device
1da177e4 3218 *
04351821
A
3219 * Standard implementation of the function used to tune and set
3220 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3221 * ata_dev_set_mode() fails, pointer to the failing device is
e82cbdb9 3222 * returned in @r_failed_dev.
780a87f7 3223 *
1da177e4 3224 * LOCKING:
0cba632b 3225 * PCI/etc. bus probe sem.
e82cbdb9
TH
3226 *
3227 * RETURNS:
3228 * 0 on success, negative errno otherwise
1da177e4 3229 */
04351821 3230
0260731f 3231int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
1da177e4 3232{
0260731f 3233 struct ata_port *ap = link->ap;
e8e0619f 3234 struct ata_device *dev;
f58229f8 3235 int rc = 0, used_dma = 0, found = 0;
3adcebb2 3236
a6d5a51c 3237 /* step 1: calculate xfer_mask */
1eca4365 3238 ata_for_each_dev(dev, link, ENABLED) {
7dc951ae 3239 unsigned long pio_mask, dma_mask;
b3a70601 3240 unsigned int mode_mask;
a6d5a51c 3241
b3a70601
AC
3242 mode_mask = ATA_DMA_MASK_ATA;
3243 if (dev->class == ATA_DEV_ATAPI)
3244 mode_mask = ATA_DMA_MASK_ATAPI;
3245 else if (ata_id_is_cfa(dev->id))
3246 mode_mask = ATA_DMA_MASK_CFA;
3247
3373efd8 3248 ata_dev_xfermask(dev);
33267325 3249 ata_force_xfermask(dev);
1da177e4 3250
acf356b1
TH
3251 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
3252 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
b3a70601
AC
3253
3254 if (libata_dma_mask & mode_mask)
3255 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
3256 else
3257 dma_mask = 0;
3258
acf356b1
TH
3259 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
3260 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 3261
4f65977d 3262 found = 1;
b15b3eba 3263 if (ata_dma_enabled(dev))
5444a6f4 3264 used_dma = 1;
a6d5a51c 3265 }
4f65977d 3266 if (!found)
e82cbdb9 3267 goto out;
a6d5a51c
TH
3268
3269 /* step 2: always set host PIO timings */
1eca4365 3270 ata_for_each_dev(dev, link, ENABLED) {
70cd071e 3271 if (dev->pio_mode == 0xff) {
a9a79dfe 3272 ata_dev_warn(dev, "no PIO support\n");
e8e0619f 3273 rc = -EINVAL;
e82cbdb9 3274 goto out;
e8e0619f
TH
3275 }
3276
3277 dev->xfer_mode = dev->pio_mode;
3278 dev->xfer_shift = ATA_SHIFT_PIO;
3279 if (ap->ops->set_piomode)
3280 ap->ops->set_piomode(ap, dev);
3281 }
1da177e4 3282
a6d5a51c 3283 /* step 3: set host DMA timings */
1eca4365
TH
3284 ata_for_each_dev(dev, link, ENABLED) {
3285 if (!ata_dma_enabled(dev))
e8e0619f
TH
3286 continue;
3287
3288 dev->xfer_mode = dev->dma_mode;
3289 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
3290 if (ap->ops->set_dmamode)
3291 ap->ops->set_dmamode(ap, dev);
3292 }
1da177e4
LT
3293
3294 /* step 4: update devices' xfer mode */
1eca4365 3295 ata_for_each_dev(dev, link, ENABLED) {
3373efd8 3296 rc = ata_dev_set_mode(dev);
5bbc53f4 3297 if (rc)
e82cbdb9 3298 goto out;
83206a29 3299 }
1da177e4 3300
e8e0619f
TH
3301 /* Record simplex status. If we selected DMA then the other
3302 * host channels are not permitted to do so.
5444a6f4 3303 */
cca3974e 3304 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
032af1ce 3305 ap->host->simplex_claimed = ap;
5444a6f4 3306
e82cbdb9
TH
3307 out:
3308 if (rc)
3309 *r_failed_dev = dev;
3310 return rc;
1da177e4
LT
3311}
3312
aa2731ad
TH
3313/**
3314 * ata_wait_ready - wait for link to become ready
3315 * @link: link to be waited on
3316 * @deadline: deadline jiffies for the operation
3317 * @check_ready: callback to check link readiness
3318 *
3319 * Wait for @link to become ready. @check_ready should return
3320 * positive number if @link is ready, 0 if it isn't, -ENODEV if
3321 * link doesn't seem to be occupied, other errno for other error
3322 * conditions.
3323 *
3324 * Transient -ENODEV conditions are allowed for
3325 * ATA_TMOUT_FF_WAIT.
3326 *
3327 * LOCKING:
3328 * EH context.
3329 *
3330 * RETURNS:
3331 * 0 if @linke is ready before @deadline; otherwise, -errno.
3332 */
3333int ata_wait_ready(struct ata_link *link, unsigned long deadline,
3334 int (*check_ready)(struct ata_link *link))
3335{
3336 unsigned long start = jiffies;
b48d58f5 3337 unsigned long nodev_deadline;
aa2731ad
TH
3338 int warned = 0;
3339
b48d58f5
TH
3340 /* choose which 0xff timeout to use, read comment in libata.h */
3341 if (link->ap->host->flags & ATA_HOST_PARALLEL_SCAN)
3342 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT_LONG);
3343 else
3344 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT);
3345
b1c72916
TH
3346 /* Slave readiness can't be tested separately from master. On
3347 * M/S emulation configuration, this function should be called
3348 * only on the master and it will handle both master and slave.
3349 */
3350 WARN_ON(link == link->ap->slave_link);
3351
aa2731ad
TH
3352 if (time_after(nodev_deadline, deadline))
3353 nodev_deadline = deadline;
3354
3355 while (1) {
3356 unsigned long now = jiffies;
3357 int ready, tmp;
3358
3359 ready = tmp = check_ready(link);
3360 if (ready > 0)
3361 return 0;
3362
b48d58f5
TH
3363 /*
3364 * -ENODEV could be transient. Ignore -ENODEV if link
aa2731ad 3365 * is online. Also, some SATA devices take a long
b48d58f5
TH
3366 * time to clear 0xff after reset. Wait for
3367 * ATA_TMOUT_FF_WAIT[_LONG] on -ENODEV if link isn't
3368 * offline.
aa2731ad
TH
3369 *
3370 * Note that some PATA controllers (pata_ali) explode
3371 * if status register is read more than once when
3372 * there's no device attached.
3373 */
3374 if (ready == -ENODEV) {
3375 if (ata_link_online(link))
3376 ready = 0;
3377 else if ((link->ap->flags & ATA_FLAG_SATA) &&
3378 !ata_link_offline(link) &&
3379 time_before(now, nodev_deadline))
3380 ready = 0;
3381 }
3382
3383 if (ready)
3384 return ready;
3385 if (time_after(now, deadline))
3386 return -EBUSY;
3387
3388 if (!warned && time_after(now, start + 5 * HZ) &&
3389 (deadline - now > 3 * HZ)) {
a9a79dfe 3390 ata_link_warn(link,
aa2731ad
TH
3391 "link is slow to respond, please be patient "
3392 "(ready=%d)\n", tmp);
3393 warned = 1;
3394 }
3395
97750ceb 3396 ata_msleep(link->ap, 50);
aa2731ad
TH
3397 }
3398}
3399
3400/**
3401 * ata_wait_after_reset - wait for link to become ready after reset
3402 * @link: link to be waited on
3403 * @deadline: deadline jiffies for the operation
3404 * @check_ready: callback to check link readiness
3405 *
3406 * Wait for @link to become ready after reset.
3407 *
3408 * LOCKING:
3409 * EH context.
3410 *
3411 * RETURNS:
3412 * 0 if @linke is ready before @deadline; otherwise, -errno.
3413 */
2b4221bb 3414int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
aa2731ad
TH
3415 int (*check_ready)(struct ata_link *link))
3416{
97750ceb 3417 ata_msleep(link->ap, ATA_WAIT_AFTER_RESET);
aa2731ad
TH
3418
3419 return ata_wait_ready(link, deadline, check_ready);
3420}
3421
d7bb4cc7 3422/**
936fd732
TH
3423 * sata_link_debounce - debounce SATA phy status
3424 * @link: ATA link to debounce SATA phy status for
d7bb4cc7 3425 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3426 * @deadline: deadline jiffies for the operation
d7bb4cc7 3427 *
1152b261 3428 * Make sure SStatus of @link reaches stable state, determined by
d7bb4cc7
TH
3429 * holding the same value where DET is not 1 for @duration polled
3430 * every @interval, before @timeout. Timeout constraints the
d4b2bab4
TH
3431 * beginning of the stable state. Because DET gets stuck at 1 on
3432 * some controllers after hot unplugging, this functions waits
d7bb4cc7
TH
3433 * until timeout then returns 0 if DET is stable at 1.
3434 *
d4b2bab4
TH
3435 * @timeout is further limited by @deadline. The sooner of the
3436 * two is used.
3437 *
d7bb4cc7
TH
3438 * LOCKING:
3439 * Kernel thread context (may sleep)
3440 *
3441 * RETURNS:
3442 * 0 on success, -errno on failure.
3443 */
936fd732
TH
3444int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3445 unsigned long deadline)
7a7921e8 3446{
341c2c95
TH
3447 unsigned long interval = params[0];
3448 unsigned long duration = params[1];
d4b2bab4 3449 unsigned long last_jiffies, t;
d7bb4cc7
TH
3450 u32 last, cur;
3451 int rc;
3452
341c2c95 3453 t = ata_deadline(jiffies, params[2]);
d4b2bab4
TH
3454 if (time_before(t, deadline))
3455 deadline = t;
3456
936fd732 3457 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3458 return rc;
3459 cur &= 0xf;
3460
3461 last = cur;
3462 last_jiffies = jiffies;
3463
3464 while (1) {
97750ceb 3465 ata_msleep(link->ap, interval);
936fd732 3466 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3467 return rc;
3468 cur &= 0xf;
3469
3470 /* DET stable? */
3471 if (cur == last) {
d4b2bab4 3472 if (cur == 1 && time_before(jiffies, deadline))
d7bb4cc7 3473 continue;
341c2c95
TH
3474 if (time_after(jiffies,
3475 ata_deadline(last_jiffies, duration)))
d7bb4cc7
TH
3476 return 0;
3477 continue;
3478 }
3479
3480 /* unstable, start over */
3481 last = cur;
3482 last_jiffies = jiffies;
3483
f1545154
TH
3484 /* Check deadline. If debouncing failed, return
3485 * -EPIPE to tell upper layer to lower link speed.
3486 */
d4b2bab4 3487 if (time_after(jiffies, deadline))
f1545154 3488 return -EPIPE;
d7bb4cc7
TH
3489 }
3490}
3491
3492/**
936fd732
TH
3493 * sata_link_resume - resume SATA link
3494 * @link: ATA link to resume SATA
d7bb4cc7 3495 * @params: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3496 * @deadline: deadline jiffies for the operation
d7bb4cc7 3497 *
936fd732 3498 * Resume SATA phy @link and debounce it.
d7bb4cc7
TH
3499 *
3500 * LOCKING:
3501 * Kernel thread context (may sleep)
3502 *
3503 * RETURNS:
3504 * 0 on success, -errno on failure.
3505 */
936fd732
TH
3506int sata_link_resume(struct ata_link *link, const unsigned long *params,
3507 unsigned long deadline)
d7bb4cc7 3508{
5040ab67 3509 int tries = ATA_LINK_RESUME_TRIES;
ac371987 3510 u32 scontrol, serror;
81952c54
TH
3511 int rc;
3512
936fd732 3513 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 3514 return rc;
7a7921e8 3515
5040ab67
TH
3516 /*
3517 * Writes to SControl sometimes get ignored under certain
3518 * controllers (ata_piix SIDPR). Make sure DET actually is
3519 * cleared.
3520 */
3521 do {
3522 scontrol = (scontrol & 0x0f0) | 0x300;
3523 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3524 return rc;
3525 /*
3526 * Some PHYs react badly if SStatus is pounded
3527 * immediately after resuming. Delay 200ms before
3528 * debouncing.
3529 */
97750ceb 3530 ata_msleep(link->ap, 200);
81952c54 3531
5040ab67
TH
3532 /* is SControl restored correctly? */
3533 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3534 return rc;
3535 } while ((scontrol & 0xf0f) != 0x300 && --tries);
7a7921e8 3536
5040ab67 3537 if ((scontrol & 0xf0f) != 0x300) {
38941c95 3538 ata_link_warn(link, "failed to resume link (SControl %X)\n",
a9a79dfe 3539 scontrol);
5040ab67
TH
3540 return 0;
3541 }
3542
3543 if (tries < ATA_LINK_RESUME_TRIES)
a9a79dfe
JP
3544 ata_link_warn(link, "link resume succeeded after %d retries\n",
3545 ATA_LINK_RESUME_TRIES - tries);
7a7921e8 3546
ac371987
TH
3547 if ((rc = sata_link_debounce(link, params, deadline)))
3548 return rc;
3549
f046519f 3550 /* clear SError, some PHYs require this even for SRST to work */
ac371987
TH
3551 if (!(rc = sata_scr_read(link, SCR_ERROR, &serror)))
3552 rc = sata_scr_write(link, SCR_ERROR, serror);
ac371987 3553
f046519f 3554 return rc != -EINVAL ? rc : 0;
7a7921e8
TH
3555}
3556
1152b261
TH
3557/**
3558 * sata_link_scr_lpm - manipulate SControl IPM and SPM fields
3559 * @link: ATA link to manipulate SControl for
3560 * @policy: LPM policy to configure
3561 * @spm_wakeup: initiate LPM transition to active state
3562 *
3563 * Manipulate the IPM field of the SControl register of @link
3564 * according to @policy. If @policy is ATA_LPM_MAX_POWER and
3565 * @spm_wakeup is %true, the SPM field is manipulated to wake up
3566 * the link. This function also clears PHYRDY_CHG before
3567 * returning.
3568 *
3569 * LOCKING:
3570 * EH context.
3571 *
3572 * RETURNS:
3573 * 0 on succes, -errno otherwise.
3574 */
3575int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy,
3576 bool spm_wakeup)
3577{
3578 struct ata_eh_context *ehc = &link->eh_context;
3579 bool woken_up = false;
3580 u32 scontrol;
3581 int rc;
3582
3583 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
3584 if (rc)
3585 return rc;
3586
3587 switch (policy) {
3588 case ATA_LPM_MAX_POWER:
3589 /* disable all LPM transitions */
3590 scontrol |= (0x3 << 8);
3591 /* initiate transition to active state */
3592 if (spm_wakeup) {
3593 scontrol |= (0x4 << 12);
3594 woken_up = true;
3595 }
3596 break;
3597 case ATA_LPM_MED_POWER:
3598 /* allow LPM to PARTIAL */
3599 scontrol &= ~(0x1 << 8);
3600 scontrol |= (0x2 << 8);
3601 break;
3602 case ATA_LPM_MIN_POWER:
8a745f1f
KCA
3603 if (ata_link_nr_enabled(link) > 0)
3604 /* no restrictions on LPM transitions */
3605 scontrol &= ~(0x3 << 8);
3606 else {
3607 /* empty port, power off */
3608 scontrol &= ~0xf;
3609 scontrol |= (0x1 << 2);
3610 }
1152b261
TH
3611 break;
3612 default:
3613 WARN_ON(1);
3614 }
3615
3616 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
3617 if (rc)
3618 return rc;
3619
3620 /* give the link time to transit out of LPM state */
3621 if (woken_up)
3622 msleep(10);
3623
3624 /* clear PHYRDY_CHG from SError */
3625 ehc->i.serror &= ~SERR_PHYRDY_CHG;
3626 return sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG);
3627}
3628
f5914a46 3629/**
0aa1113d 3630 * ata_std_prereset - prepare for reset
cc0680a5 3631 * @link: ATA link to be reset
d4b2bab4 3632 * @deadline: deadline jiffies for the operation
f5914a46 3633 *
cc0680a5 3634 * @link is about to be reset. Initialize it. Failure from
b8cffc6a
TH
3635 * prereset makes libata abort whole reset sequence and give up
3636 * that port, so prereset should be best-effort. It does its
3637 * best to prepare for reset sequence but if things go wrong, it
3638 * should just whine, not fail.
f5914a46
TH
3639 *
3640 * LOCKING:
3641 * Kernel thread context (may sleep)
3642 *
3643 * RETURNS:
3644 * 0 on success, -errno otherwise.
3645 */
0aa1113d 3646int ata_std_prereset(struct ata_link *link, unsigned long deadline)
f5914a46 3647{
cc0680a5 3648 struct ata_port *ap = link->ap;
936fd732 3649 struct ata_eh_context *ehc = &link->eh_context;
e9c83914 3650 const unsigned long *timing = sata_ehc_deb_timing(ehc);
f5914a46
TH
3651 int rc;
3652
f5914a46
TH
3653 /* if we're about to do hardreset, nothing more to do */
3654 if (ehc->i.action & ATA_EH_HARDRESET)
3655 return 0;
3656
936fd732 3657 /* if SATA, resume link */
a16abc0b 3658 if (ap->flags & ATA_FLAG_SATA) {
936fd732 3659 rc = sata_link_resume(link, timing, deadline);
b8cffc6a
TH
3660 /* whine about phy resume failure but proceed */
3661 if (rc && rc != -EOPNOTSUPP)
a9a79dfe
JP
3662 ata_link_warn(link,
3663 "failed to resume link for reset (errno=%d)\n",
3664 rc);
f5914a46
TH
3665 }
3666
45db2f6c 3667 /* no point in trying softreset on offline link */
b1c72916 3668 if (ata_phys_link_offline(link))
45db2f6c
TH
3669 ehc->i.action &= ~ATA_EH_SOFTRESET;
3670
f5914a46
TH
3671 return 0;
3672}
3673
c2bd5804 3674/**
624d5c51
TH
3675 * sata_link_hardreset - reset link via SATA phy reset
3676 * @link: link to reset
3677 * @timing: timing parameters { interval, duratinon, timeout } in msec
d4b2bab4 3678 * @deadline: deadline jiffies for the operation
9dadd45b
TH
3679 * @online: optional out parameter indicating link onlineness
3680 * @check_ready: optional callback to check link readiness
c2bd5804 3681 *
624d5c51 3682 * SATA phy-reset @link using DET bits of SControl register.
9dadd45b
TH
3683 * After hardreset, link readiness is waited upon using
3684 * ata_wait_ready() if @check_ready is specified. LLDs are
3685 * allowed to not specify @check_ready and wait itself after this
3686 * function returns. Device classification is LLD's
3687 * responsibility.
3688 *
3689 * *@online is set to one iff reset succeeded and @link is online
3690 * after reset.
c2bd5804
TH
3691 *
3692 * LOCKING:
3693 * Kernel thread context (may sleep)
3694 *
3695 * RETURNS:
3696 * 0 on success, -errno otherwise.
3697 */
624d5c51 3698int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
9dadd45b
TH
3699 unsigned long deadline,
3700 bool *online, int (*check_ready)(struct ata_link *))
c2bd5804 3701{
624d5c51 3702 u32 scontrol;
81952c54 3703 int rc;
852ee16a 3704
c2bd5804
TH
3705 DPRINTK("ENTER\n");
3706
9dadd45b
TH
3707 if (online)
3708 *online = false;
3709
936fd732 3710 if (sata_set_spd_needed(link)) {
1c3fae4d
TH
3711 /* SATA spec says nothing about how to reconfigure
3712 * spd. To be on the safe side, turn off phy during
3713 * reconfiguration. This works for at least ICH7 AHCI
3714 * and Sil3124.
3715 */
936fd732 3716 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3717 goto out;
81952c54 3718
a34b6fc0 3719 scontrol = (scontrol & 0x0f0) | 0x304;
81952c54 3720
936fd732 3721 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
b6103f6d 3722 goto out;
1c3fae4d 3723
936fd732 3724 sata_set_spd(link);
1c3fae4d
TH
3725 }
3726
3727 /* issue phy wake/reset */
936fd732 3728 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 3729 goto out;
81952c54 3730
852ee16a 3731 scontrol = (scontrol & 0x0f0) | 0x301;
81952c54 3732
936fd732 3733 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
b6103f6d 3734 goto out;
c2bd5804 3735
1c3fae4d 3736 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH
3737 * 10.4.2 says at least 1 ms.
3738 */
97750ceb 3739 ata_msleep(link->ap, 1);
c2bd5804 3740
936fd732
TH
3741 /* bring link back */
3742 rc = sata_link_resume(link, timing, deadline);
9dadd45b
TH
3743 if (rc)
3744 goto out;
3745 /* if link is offline nothing more to do */
b1c72916 3746 if (ata_phys_link_offline(link))
9dadd45b
TH
3747 goto out;
3748
3749 /* Link is online. From this point, -ENODEV too is an error. */
3750 if (online)
3751 *online = true;
3752
071f44b1 3753 if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) {
9dadd45b
TH
3754 /* If PMP is supported, we have to do follow-up SRST.
3755 * Some PMPs don't send D2H Reg FIS after hardreset if
3756 * the first port is empty. Wait only for
3757 * ATA_TMOUT_PMP_SRST_WAIT.
3758 */
3759 if (check_ready) {
3760 unsigned long pmp_deadline;
3761
341c2c95
TH
3762 pmp_deadline = ata_deadline(jiffies,
3763 ATA_TMOUT_PMP_SRST_WAIT);
9dadd45b
TH
3764 if (time_after(pmp_deadline, deadline))
3765 pmp_deadline = deadline;
3766 ata_wait_ready(link, pmp_deadline, check_ready);
3767 }
3768 rc = -EAGAIN;
3769 goto out;
3770 }
3771
3772 rc = 0;
3773 if (check_ready)
3774 rc = ata_wait_ready(link, deadline, check_ready);
b6103f6d 3775 out:
0cbf0711
TH
3776 if (rc && rc != -EAGAIN) {
3777 /* online is set iff link is online && reset succeeded */
3778 if (online)
3779 *online = false;
a9a79dfe 3780 ata_link_err(link, "COMRESET failed (errno=%d)\n", rc);
0cbf0711 3781 }
b6103f6d
TH
3782 DPRINTK("EXIT, rc=%d\n", rc);
3783 return rc;
3784}
3785
57c9efdf
TH
3786/**
3787 * sata_std_hardreset - COMRESET w/o waiting or classification
3788 * @link: link to reset
3789 * @class: resulting class of attached device
3790 * @deadline: deadline jiffies for the operation
3791 *
3792 * Standard SATA COMRESET w/o waiting or classification.
3793 *
3794 * LOCKING:
3795 * Kernel thread context (may sleep)
3796 *
3797 * RETURNS:
3798 * 0 if link offline, -EAGAIN if link online, -errno on errors.
3799 */
3800int sata_std_hardreset(struct ata_link *link, unsigned int *class,
3801 unsigned long deadline)
3802{
3803 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
3804 bool online;
3805 int rc;
3806
3807 /* do hardreset */
3808 rc = sata_link_hardreset(link, timing, deadline, &online, NULL);
57c9efdf
TH
3809 return online ? -EAGAIN : rc;
3810}
3811
c2bd5804 3812/**
203c75b8 3813 * ata_std_postreset - standard postreset callback
cc0680a5 3814 * @link: the target ata_link
c2bd5804
TH
3815 * @classes: classes of attached devices
3816 *
3817 * This function is invoked after a successful reset. Note that
3818 * the device might have been reset more than once using
3819 * different reset methods before postreset is invoked.
c2bd5804 3820 *
c2bd5804
TH
3821 * LOCKING:
3822 * Kernel thread context (may sleep)
3823 */
203c75b8 3824void ata_std_postreset(struct ata_link *link, unsigned int *classes)
c2bd5804 3825{
f046519f
TH
3826 u32 serror;
3827
c2bd5804
TH
3828 DPRINTK("ENTER\n");
3829
f046519f
TH
3830 /* reset complete, clear SError */
3831 if (!sata_scr_read(link, SCR_ERROR, &serror))
3832 sata_scr_write(link, SCR_ERROR, serror);
3833
c2bd5804 3834 /* print link status */
936fd732 3835 sata_print_link_status(link);
c2bd5804 3836
c2bd5804
TH
3837 DPRINTK("EXIT\n");
3838}
3839
623a3128
TH
3840/**
3841 * ata_dev_same_device - Determine whether new ID matches configured device
623a3128
TH
3842 * @dev: device to compare against
3843 * @new_class: class of the new device
3844 * @new_id: IDENTIFY page of the new device
3845 *
3846 * Compare @new_class and @new_id against @dev and determine
3847 * whether @dev is the device indicated by @new_class and
3848 * @new_id.
3849 *
3850 * LOCKING:
3851 * None.
3852 *
3853 * RETURNS:
3854 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
3855 */
3373efd8
TH
3856static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
3857 const u16 *new_id)
623a3128
TH
3858{
3859 const u16 *old_id = dev->id;
a0cf733b
TH
3860 unsigned char model[2][ATA_ID_PROD_LEN + 1];
3861 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
623a3128
TH
3862
3863 if (dev->class != new_class) {
a9a79dfe
JP
3864 ata_dev_info(dev, "class mismatch %d != %d\n",
3865 dev->class, new_class);
623a3128
TH
3866 return 0;
3867 }
3868
a0cf733b
TH
3869 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
3870 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
3871 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
3872 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
623a3128
TH
3873
3874 if (strcmp(model[0], model[1])) {
a9a79dfe
JP
3875 ata_dev_info(dev, "model number mismatch '%s' != '%s'\n",
3876 model[0], model[1]);
623a3128
TH
3877 return 0;
3878 }
3879
3880 if (strcmp(serial[0], serial[1])) {
a9a79dfe
JP
3881 ata_dev_info(dev, "serial number mismatch '%s' != '%s'\n",
3882 serial[0], serial[1]);
623a3128
TH
3883 return 0;
3884 }
3885
623a3128
TH
3886 return 1;
3887}
3888
3889/**
fe30911b 3890 * ata_dev_reread_id - Re-read IDENTIFY data
3fae450c 3891 * @dev: target ATA device
bff04647 3892 * @readid_flags: read ID flags
623a3128
TH
3893 *
3894 * Re-read IDENTIFY page and make sure @dev is still attached to
3895 * the port.
3896 *
3897 * LOCKING:
3898 * Kernel thread context (may sleep)
3899 *
3900 * RETURNS:
3901 * 0 on success, negative errno otherwise
3902 */
fe30911b 3903int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
623a3128 3904{
5eb45c02 3905 unsigned int class = dev->class;
9af5c9c9 3906 u16 *id = (void *)dev->link->ap->sector_buf;
623a3128
TH
3907 int rc;
3908
fe635c7e 3909 /* read ID data */
bff04647 3910 rc = ata_dev_read_id(dev, &class, readid_flags, id);
623a3128 3911 if (rc)
fe30911b 3912 return rc;
623a3128
TH
3913
3914 /* is the device still there? */
fe30911b
TH
3915 if (!ata_dev_same_device(dev, class, id))
3916 return -ENODEV;
623a3128 3917
fe635c7e 3918 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
fe30911b
TH
3919 return 0;
3920}
3921
3922/**
3923 * ata_dev_revalidate - Revalidate ATA device
3924 * @dev: device to revalidate
422c9daa 3925 * @new_class: new class code
fe30911b
TH
3926 * @readid_flags: read ID flags
3927 *
3928 * Re-read IDENTIFY page, make sure @dev is still attached to the
3929 * port and reconfigure it according to the new IDENTIFY page.
3930 *
3931 * LOCKING:
3932 * Kernel thread context (may sleep)
3933 *
3934 * RETURNS:
3935 * 0 on success, negative errno otherwise
3936 */
422c9daa
TH
3937int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
3938 unsigned int readid_flags)
fe30911b 3939{
6ddcd3b0 3940 u64 n_sectors = dev->n_sectors;
5920dadf 3941 u64 n_native_sectors = dev->n_native_sectors;
fe30911b
TH
3942 int rc;
3943
3944 if (!ata_dev_enabled(dev))
3945 return -ENODEV;
3946
422c9daa
TH
3947 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
3948 if (ata_class_enabled(new_class) &&
f0d0613d
BP
3949 new_class != ATA_DEV_ATA &&
3950 new_class != ATA_DEV_ATAPI &&
3951 new_class != ATA_DEV_SEMB) {
a9a79dfe
JP
3952 ata_dev_info(dev, "class mismatch %u != %u\n",
3953 dev->class, new_class);
422c9daa
TH
3954 rc = -ENODEV;
3955 goto fail;
3956 }
3957
fe30911b
TH
3958 /* re-read ID */
3959 rc = ata_dev_reread_id(dev, readid_flags);
3960 if (rc)
3961 goto fail;
623a3128
TH
3962
3963 /* configure device according to the new ID */
efdaedc4 3964 rc = ata_dev_configure(dev);
6ddcd3b0
TH
3965 if (rc)
3966 goto fail;
3967
3968 /* verify n_sectors hasn't changed */
445d211b
TH
3969 if (dev->class != ATA_DEV_ATA || !n_sectors ||
3970 dev->n_sectors == n_sectors)
3971 return 0;
3972
3973 /* n_sectors has changed */
a9a79dfe
JP
3974 ata_dev_warn(dev, "n_sectors mismatch %llu != %llu\n",
3975 (unsigned long long)n_sectors,
3976 (unsigned long long)dev->n_sectors);
445d211b
TH
3977
3978 /*
3979 * Something could have caused HPA to be unlocked
3980 * involuntarily. If n_native_sectors hasn't changed and the
3981 * new size matches it, keep the device.
3982 */
3983 if (dev->n_native_sectors == n_native_sectors &&
3984 dev->n_sectors > n_sectors && dev->n_sectors == n_native_sectors) {
a9a79dfe
JP
3985 ata_dev_warn(dev,
3986 "new n_sectors matches native, probably "
3987 "late HPA unlock, n_sectors updated\n");
68939ce5 3988 /* use the larger n_sectors */
445d211b 3989 return 0;
6ddcd3b0
TH
3990 }
3991
445d211b
TH
3992 /*
3993 * Some BIOSes boot w/o HPA but resume w/ HPA locked. Try
3994 * unlocking HPA in those cases.
3995 *
3996 * https://bugzilla.kernel.org/show_bug.cgi?id=15396
3997 */
3998 if (dev->n_native_sectors == n_native_sectors &&
3999 dev->n_sectors < n_sectors && n_sectors == n_native_sectors &&
4000 !(dev->horkage & ATA_HORKAGE_BROKEN_HPA)) {
a9a79dfe
JP
4001 ata_dev_warn(dev,
4002 "old n_sectors matches native, probably "
4003 "late HPA lock, will try to unlock HPA\n");
445d211b
TH
4004 /* try unlocking HPA */
4005 dev->flags |= ATA_DFLAG_UNLOCK_HPA;
4006 rc = -EIO;
4007 } else
4008 rc = -ENODEV;
623a3128 4009
445d211b
TH
4010 /* restore original n_[native_]sectors and fail */
4011 dev->n_native_sectors = n_native_sectors;
4012 dev->n_sectors = n_sectors;
623a3128 4013 fail:
a9a79dfe 4014 ata_dev_err(dev, "revalidation failed (errno=%d)\n", rc);
623a3128
TH
4015 return rc;
4016}
4017
6919a0a6
AC
4018struct ata_blacklist_entry {
4019 const char *model_num;
4020 const char *model_rev;
4021 unsigned long horkage;
4022};
4023
4024static const struct ata_blacklist_entry ata_device_blacklist [] = {
4025 /* Devices with DMA related problems under Linux */
4026 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
4027 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
4028 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
4029 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
4030 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
4031 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
4032 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
4033 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
4034 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
7da4c935 4035 { "CRD-848[02]B", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4036 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
4037 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
4038 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
4039 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
4040 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
7da4c935 4041 { "HITACHI CDR-8[34]35",NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4042 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
4043 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
4044 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
4045 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
4046 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
4047 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
4048 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
4049 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4050 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
4051 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
2dcb407e 4052 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
39f19886 4053 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
3af9a77a 4054 /* Odd clown on sil3726/4726 PMPs */
50af2fa1 4055 { "Config Disk", NULL, ATA_HORKAGE_DISABLE },
6919a0a6 4056
18d6e9d5 4057 /* Weird ATAPI devices */
40a1d531 4058 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
6a87e42e 4059 { "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
18d6e9d5 4060
6919a0a6
AC
4061 /* Devices we expect to fail diagnostics */
4062
4063 /* Devices where NCQ should be avoided */
4064 /* NCQ is slow */
2dcb407e 4065 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
459ad688 4066 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
09125ea6
TH
4067 /* http://thread.gmane.org/gmane.linux.ide/14907 */
4068 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
7acfaf30 4069 /* NCQ is broken */
539cc7c7 4070 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
0e3dbc01 4071 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
da6f0ec2 4072 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
e41bd3e8 4073 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ },
5ccfca97 4074 { "OCZ CORE_SSD", "02.10104", ATA_HORKAGE_NONCQ },
539cc7c7 4075
ac70a964 4076 /* Seagate NCQ + FLUSH CACHE firmware bug */
4d1f9082 4077 { "ST31500341AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964 4078 ATA_HORKAGE_FIRMWARE_WARN },
d10d491f 4079
4d1f9082 4080 { "ST31000333AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4081 ATA_HORKAGE_FIRMWARE_WARN },
4082
4d1f9082 4083 { "ST3640[36]23AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4084 ATA_HORKAGE_FIRMWARE_WARN },
4085
4d1f9082 4086 { "ST3320[68]13AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964
TH
4087 ATA_HORKAGE_FIRMWARE_WARN },
4088
36e337d0
RH
4089 /* Blacklist entries taken from Silicon Image 3124/3132
4090 Windows driver .inf file - also several Linux problem reports */
4091 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
4092 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4093 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
6919a0a6 4094
68b0ddb2
TH
4095 /* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
4096 { "C300-CTFDDAC128MAG", "0001", ATA_HORKAGE_NONCQ, },
4097
16c55b03
TH
4098 /* devices which puke on READ_NATIVE_MAX */
4099 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4100 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
4101 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4102 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
6919a0a6 4103
7831387b
TH
4104 /* this one allows HPA unlocking but fails IOs on the area */
4105 { "OCZ-VERTEX", "1.30", ATA_HORKAGE_BROKEN_HPA },
4106
93328e11
AC
4107 /* Devices which report 1 sector over size HPA */
4108 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4109 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
b152fcd3 4110 { "ST310211A", NULL, ATA_HORKAGE_HPA_SIZE, },
93328e11 4111
6bbfd53d
AC
4112 /* Devices which get the IVB wrong */
4113 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
a79067e5 4114 /* Maybe we should just blacklist TSSTcorp... */
7da4c935 4115 { "TSSTcorp CDDVDW SH-S202[HJN]", "SB0[01]", ATA_HORKAGE_IVB, },
6bbfd53d 4116
9ce8e307
JA
4117 /* Devices that do not need bridging limits applied */
4118 { "MTRON MSP-SATA*", NULL, ATA_HORKAGE_BRIDGE_OK, },
4119
9062712f
TH
4120 /* Devices which aren't very happy with higher link speeds */
4121 { "WD My Book", NULL, ATA_HORKAGE_1_5_GBPS, },
4122
d0cb43b3
TH
4123 /*
4124 * Devices which choke on SETXFER. Applies only if both the
4125 * device and controller are SATA.
4126 */
cd691876
TH
4127 { "PIONEER DVD-RW DVRTD08", NULL, ATA_HORKAGE_NOSETXFER },
4128 { "PIONEER DVD-RW DVR-212D", NULL, ATA_HORKAGE_NOSETXFER },
4129 { "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER },
d0cb43b3 4130
6919a0a6
AC
4131 /* End Marker */
4132 { }
1da177e4 4133};
2e9edbf8 4134
bce036ce
ML
4135/**
4136 * glob_match - match a text string against a glob-style pattern
4137 * @text: the string to be examined
4138 * @pattern: the glob-style pattern to be matched against
4139 *
4140 * Either/both of text and pattern can be empty strings.
4141 *
4142 * Match text against a glob-style pattern, with wildcards and simple sets:
4143 *
4144 * ? matches any single character.
4145 * * matches any run of characters.
4146 * [xyz] matches a single character from the set: x, y, or z.
2f9e4d16
ML
4147 * [a-d] matches a single character from the range: a, b, c, or d.
4148 * [a-d0-9] matches a single character from either range.
bce036ce 4149 *
2f9e4d16
ML
4150 * The special characters ?, [, -, or *, can be matched using a set, eg. [*]
4151 * Behaviour with malformed patterns is undefined, though generally reasonable.
bce036ce 4152 *
3d2be54b 4153 * Sample patterns: "SD1?", "SD1[0-5]", "*R0", "SD*1?[012]*xx"
bce036ce
ML
4154 *
4155 * This function uses one level of recursion per '*' in pattern.
4156 * Since it calls _nothing_ else, and has _no_ explicit local variables,
4157 * this will not cause stack problems for any reasonable use here.
4158 *
4159 * RETURNS:
4160 * 0 on match, 1 otherwise.
4161 */
4162static int glob_match (const char *text, const char *pattern)
539cc7c7 4163{
bce036ce
ML
4164 do {
4165 /* Match single character or a '?' wildcard */
4166 if (*text == *pattern || *pattern == '?') {
4167 if (!*pattern++)
4168 return 0; /* End of both strings: match */
4169 } else {
4170 /* Match single char against a '[' bracketed ']' pattern set */
4171 if (!*text || *pattern != '[')
4172 break; /* Not a pattern set */
2f9e4d16
ML
4173 while (*++pattern && *pattern != ']' && *text != *pattern) {
4174 if (*pattern == '-' && *(pattern - 1) != '[')
4175 if (*text > *(pattern - 1) && *text < *(pattern + 1)) {
4176 ++pattern;
4177 break;
4178 }
4179 }
bce036ce
ML
4180 if (!*pattern || *pattern == ']')
4181 return 1; /* No match */
4182 while (*pattern && *pattern++ != ']');
4183 }
4184 } while (*++text && *pattern);
4185
4186 /* Match any run of chars against a '*' wildcard */
4187 if (*pattern == '*') {
4188 if (!*++pattern)
4189 return 0; /* Match: avoid recursion at end of pattern */
4190 /* Loop to handle additional pattern chars after the wildcard */
4191 while (*text) {
4192 if (glob_match(text, pattern) == 0)
4193 return 0; /* Remainder matched */
4194 ++text; /* Absorb (match) this char and try again */
317b50b8
AP
4195 }
4196 }
bce036ce
ML
4197 if (!*text && !*pattern)
4198 return 0; /* End of both strings: match */
4199 return 1; /* No match */
539cc7c7 4200}
4fca377f 4201
75683fe7 4202static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
1da177e4 4203{
8bfa79fc
TH
4204 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4205 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
6919a0a6 4206 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3a778275 4207
8bfa79fc
TH
4208 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4209 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
1da177e4 4210
6919a0a6 4211 while (ad->model_num) {
bce036ce 4212 if (!glob_match(model_num, ad->model_num)) {
6919a0a6
AC
4213 if (ad->model_rev == NULL)
4214 return ad->horkage;
bce036ce 4215 if (!glob_match(model_rev, ad->model_rev))
6919a0a6 4216 return ad->horkage;
f4b15fef 4217 }
6919a0a6 4218 ad++;
f4b15fef 4219 }
1da177e4
LT
4220 return 0;
4221}
4222
6919a0a6
AC
4223static int ata_dma_blacklisted(const struct ata_device *dev)
4224{
4225 /* We don't support polling DMA.
4226 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4227 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4228 */
9af5c9c9 4229 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
6919a0a6
AC
4230 (dev->flags & ATA_DFLAG_CDB_INTR))
4231 return 1;
75683fe7 4232 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
6919a0a6
AC
4233}
4234
6bbfd53d
AC
4235/**
4236 * ata_is_40wire - check drive side detection
4237 * @dev: device
4238 *
4239 * Perform drive side detection decoding, allowing for device vendors
4240 * who can't follow the documentation.
4241 */
4242
4243static int ata_is_40wire(struct ata_device *dev)
4244{
4245 if (dev->horkage & ATA_HORKAGE_IVB)
4246 return ata_drive_40wire_relaxed(dev->id);
4247 return ata_drive_40wire(dev->id);
4248}
4249
15a5551c
AC
4250/**
4251 * cable_is_40wire - 40/80/SATA decider
4252 * @ap: port to consider
4253 *
4254 * This function encapsulates the policy for speed management
4255 * in one place. At the moment we don't cache the result but
4256 * there is a good case for setting ap->cbl to the result when
4257 * we are called with unknown cables (and figuring out if it
4258 * impacts hotplug at all).
4259 *
4260 * Return 1 if the cable appears to be 40 wire.
4261 */
4262
4263static int cable_is_40wire(struct ata_port *ap)
4264{
4265 struct ata_link *link;
4266 struct ata_device *dev;
4267
4a9c7b33 4268 /* If the controller thinks we are 40 wire, we are. */
15a5551c
AC
4269 if (ap->cbl == ATA_CBL_PATA40)
4270 return 1;
4a9c7b33
TH
4271
4272 /* If the controller thinks we are 80 wire, we are. */
15a5551c
AC
4273 if (ap->cbl == ATA_CBL_PATA80 || ap->cbl == ATA_CBL_SATA)
4274 return 0;
4a9c7b33
TH
4275
4276 /* If the system is known to be 40 wire short cable (eg
4277 * laptop), then we allow 80 wire modes even if the drive
4278 * isn't sure.
4279 */
f792068e
AC
4280 if (ap->cbl == ATA_CBL_PATA40_SHORT)
4281 return 0;
4a9c7b33
TH
4282
4283 /* If the controller doesn't know, we scan.
4284 *
4285 * Note: We look for all 40 wire detects at this point. Any
4286 * 80 wire detect is taken to be 80 wire cable because
4287 * - in many setups only the one drive (slave if present) will
4288 * give a valid detect
4289 * - if you have a non detect capable drive you don't want it
4290 * to colour the choice
4291 */
1eca4365
TH
4292 ata_for_each_link(link, ap, EDGE) {
4293 ata_for_each_dev(dev, link, ENABLED) {
4294 if (!ata_is_40wire(dev))
15a5551c
AC
4295 return 0;
4296 }
4297 }
4298 return 1;
4299}
4300
a6d5a51c
TH
4301/**
4302 * ata_dev_xfermask - Compute supported xfermask of the given device
a6d5a51c
TH
4303 * @dev: Device to compute xfermask for
4304 *
acf356b1
TH
4305 * Compute supported xfermask of @dev and store it in
4306 * dev->*_mask. This function is responsible for applying all
4307 * known limits including host controller limits, device
4308 * blacklist, etc...
a6d5a51c
TH
4309 *
4310 * LOCKING:
4311 * None.
a6d5a51c 4312 */
3373efd8 4313static void ata_dev_xfermask(struct ata_device *dev)
1da177e4 4314{
9af5c9c9
TH
4315 struct ata_link *link = dev->link;
4316 struct ata_port *ap = link->ap;
cca3974e 4317 struct ata_host *host = ap->host;
a6d5a51c 4318 unsigned long xfer_mask;
1da177e4 4319
37deecb5 4320 /* controller modes available */
565083e1
TH
4321 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4322 ap->mwdma_mask, ap->udma_mask);
4323
8343f889 4324 /* drive modes available */
37deecb5
TH
4325 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4326 dev->mwdma_mask, dev->udma_mask);
4327 xfer_mask &= ata_id_xfermask(dev->id);
565083e1 4328
b352e57d
AC
4329 /*
4330 * CFA Advanced TrueIDE timings are not allowed on a shared
4331 * cable
4332 */
4333 if (ata_dev_pair(dev)) {
4334 /* No PIO5 or PIO6 */
4335 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4336 /* No MWDMA3 or MWDMA 4 */
4337 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4338 }
4339
37deecb5
TH
4340 if (ata_dma_blacklisted(dev)) {
4341 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4342 ata_dev_warn(dev,
4343 "device is on DMA blacklist, disabling DMA\n");
37deecb5 4344 }
a6d5a51c 4345
14d66ab7 4346 if ((host->flags & ATA_HOST_SIMPLEX) &&
2dcb407e 4347 host->simplex_claimed && host->simplex_claimed != ap) {
37deecb5 4348 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4349 ata_dev_warn(dev,
4350 "simplex DMA is claimed by other device, disabling DMA\n");
5444a6f4 4351 }
565083e1 4352
e424675f
JG
4353 if (ap->flags & ATA_FLAG_NO_IORDY)
4354 xfer_mask &= ata_pio_mask_no_iordy(dev);
4355
5444a6f4 4356 if (ap->ops->mode_filter)
a76b62ca 4357 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
5444a6f4 4358
8343f889
RH
4359 /* Apply cable rule here. Don't apply it early because when
4360 * we handle hot plug the cable type can itself change.
4361 * Check this last so that we know if the transfer rate was
4362 * solely limited by the cable.
4363 * Unknown or 80 wire cables reported host side are checked
4364 * drive side as well. Cases where we know a 40wire cable
4365 * is used safely for 80 are not checked here.
4366 */
4367 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4368 /* UDMA/44 or higher would be available */
15a5551c 4369 if (cable_is_40wire(ap)) {
a9a79dfe
JP
4370 ata_dev_warn(dev,
4371 "limited to UDMA/33 due to 40-wire cable\n");
8343f889
RH
4372 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4373 }
4374
565083e1
TH
4375 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4376 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT
4377}
4378
1da177e4
LT
4379/**
4380 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
1da177e4
LT
4381 * @dev: Device to which command will be sent
4382 *
780a87f7
JG
4383 * Issue SET FEATURES - XFER MODE command to device @dev
4384 * on port @ap.
4385 *
1da177e4 4386 * LOCKING:
0cba632b 4387 * PCI/etc. bus probe sem.
83206a29
TH
4388 *
4389 * RETURNS:
4390 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT
4391 */
4392
3373efd8 4393static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
1da177e4 4394{
a0123703 4395 struct ata_taskfile tf;
83206a29 4396 unsigned int err_mask;
1da177e4
LT
4397
4398 /* set up set-features taskfile */
4399 DPRINTK("set features - xfer mode\n");
4400
464cf177
TH
4401 /* Some controllers and ATAPI devices show flaky interrupt
4402 * behavior after setting xfer mode. Use polling instead.
4403 */
3373efd8 4404 ata_tf_init(dev, &tf);
a0123703
TH
4405 tf.command = ATA_CMD_SET_FEATURES;
4406 tf.feature = SETFEATURES_XFER;
464cf177 4407 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
a0123703 4408 tf.protocol = ATA_PROT_NODATA;
b9f8ab2d 4409 /* If we are using IORDY we must send the mode setting command */
11b7becc
JG
4410 if (ata_pio_need_iordy(dev))
4411 tf.nsect = dev->xfer_mode;
b9f8ab2d
AC
4412 /* If the device has IORDY and the controller does not - turn it off */
4413 else if (ata_id_has_iordy(dev->id))
11b7becc 4414 tf.nsect = 0x01;
b9f8ab2d
AC
4415 else /* In the ancient relic department - skip all of this */
4416 return 0;
1da177e4 4417
2b789108 4418 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
9f45cbd3
KCA
4419
4420 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4421 return err_mask;
4422}
1152b261 4423
9f45cbd3 4424/**
218f3d30 4425 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
9f45cbd3
KCA
4426 * @dev: Device to which command will be sent
4427 * @enable: Whether to enable or disable the feature
218f3d30 4428 * @feature: The sector count represents the feature to set
9f45cbd3
KCA
4429 *
4430 * Issue SET FEATURES - SATA FEATURES command to device @dev
218f3d30 4431 * on port @ap with sector count
9f45cbd3
KCA
4432 *
4433 * LOCKING:
4434 * PCI/etc. bus probe sem.
4435 *
4436 * RETURNS:
4437 * 0 on success, AC_ERR_* mask otherwise.
4438 */
1152b261 4439unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, u8 feature)
9f45cbd3
KCA
4440{
4441 struct ata_taskfile tf;
4442 unsigned int err_mask;
4443
4444 /* set up set-features taskfile */
4445 DPRINTK("set features - SATA features\n");
4446
4447 ata_tf_init(dev, &tf);
4448 tf.command = ATA_CMD_SET_FEATURES;
4449 tf.feature = enable;
4450 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4451 tf.protocol = ATA_PROT_NODATA;
218f3d30 4452 tf.nsect = feature;
9f45cbd3 4453
2b789108 4454 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
1da177e4 4455
83206a29
TH
4456 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4457 return err_mask;
1da177e4
LT
4458}
4459
8bf62ece
AL
4460/**
4461 * ata_dev_init_params - Issue INIT DEV PARAMS command
8bf62ece 4462 * @dev: Device to which command will be sent
e2a7f77a
RD
4463 * @heads: Number of heads (taskfile parameter)
4464 * @sectors: Number of sectors (taskfile parameter)
8bf62ece
AL
4465 *
4466 * LOCKING:
6aff8f1f
TH
4467 * Kernel thread context (may sleep)
4468 *
4469 * RETURNS:
4470 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece 4471 */
3373efd8
TH
4472static unsigned int ata_dev_init_params(struct ata_device *dev,
4473 u16 heads, u16 sectors)
8bf62ece 4474{
a0123703 4475 struct ata_taskfile tf;
6aff8f1f 4476 unsigned int err_mask;
8bf62ece
AL
4477
4478 /* Number of sectors per track 1-255. Number of heads 1-16 */
4479 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 4480 return AC_ERR_INVALID;
8bf62ece
AL
4481
4482 /* set up init dev params taskfile */
4483 DPRINTK("init dev params \n");
4484
3373efd8 4485 ata_tf_init(dev, &tf);
a0123703
TH
4486 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4487 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4488 tf.protocol = ATA_PROT_NODATA;
4489 tf.nsect = sectors;
4490 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 4491
2b789108 4492 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
18b2466c
AC
4493 /* A clean abort indicates an original or just out of spec drive
4494 and we should continue as we issue the setup based on the
4495 drive reported working geometry */
4496 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4497 err_mask = 0;
8bf62ece 4498
6aff8f1f
TH
4499 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4500 return err_mask;
8bf62ece
AL
4501}
4502
1da177e4 4503/**
0cba632b
JG
4504 * ata_sg_clean - Unmap DMA memory associated with command
4505 * @qc: Command containing DMA memory to be released
4506 *
4507 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT
4508 *
4509 * LOCKING:
cca3974e 4510 * spin_lock_irqsave(host lock)
1da177e4 4511 */
70e6ad0c 4512void ata_sg_clean(struct ata_queued_cmd *qc)
1da177e4
LT
4513{
4514 struct ata_port *ap = qc->ap;
ff2aeb1e 4515 struct scatterlist *sg = qc->sg;
1da177e4
LT
4516 int dir = qc->dma_dir;
4517
efcb3cf7 4518 WARN_ON_ONCE(sg == NULL);
1da177e4 4519
dde20207 4520 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 4521
dde20207 4522 if (qc->n_elem)
5825627c 4523 dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir);
1da177e4
LT
4524
4525 qc->flags &= ~ATA_QCFLAG_DMAMAP;
ff2aeb1e 4526 qc->sg = NULL;
1da177e4
LT
4527}
4528
1da177e4 4529/**
5895ef9a 4530 * atapi_check_dma - Check whether ATAPI DMA can be supported
1da177e4
LT
4531 * @qc: Metadata associated with taskfile to check
4532 *
780a87f7
JG
4533 * Allow low-level driver to filter ATA PACKET commands, returning
4534 * a status indicating whether or not it is OK to use DMA for the
4535 * supplied PACKET command.
4536 *
1da177e4 4537 * LOCKING:
624d5c51
TH
4538 * spin_lock_irqsave(host lock)
4539 *
4540 * RETURNS: 0 when ATAPI DMA can be used
4541 * nonzero otherwise
4542 */
5895ef9a 4543int atapi_check_dma(struct ata_queued_cmd *qc)
624d5c51
TH
4544{
4545 struct ata_port *ap = qc->ap;
71601958 4546
624d5c51
TH
4547 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4548 * few ATAPI devices choke on such DMA requests.
4549 */
6a87e42e
TH
4550 if (!(qc->dev->horkage & ATA_HORKAGE_ATAPI_MOD16_DMA) &&
4551 unlikely(qc->nbytes & 15))
624d5c51 4552 return 1;
e2cec771 4553
624d5c51
TH
4554 if (ap->ops->check_atapi_dma)
4555 return ap->ops->check_atapi_dma(qc);
e2cec771 4556
624d5c51
TH
4557 return 0;
4558}
1da177e4 4559
624d5c51
TH
4560/**
4561 * ata_std_qc_defer - Check whether a qc needs to be deferred
4562 * @qc: ATA command in question
4563 *
4564 * Non-NCQ commands cannot run with any other command, NCQ or
4565 * not. As upper layer only knows the queue depth, we are
4566 * responsible for maintaining exclusion. This function checks
4567 * whether a new command @qc can be issued.
4568 *
4569 * LOCKING:
4570 * spin_lock_irqsave(host lock)
4571 *
4572 * RETURNS:
4573 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4574 */
4575int ata_std_qc_defer(struct ata_queued_cmd *qc)
4576{
4577 struct ata_link *link = qc->dev->link;
e2cec771 4578
624d5c51
TH
4579 if (qc->tf.protocol == ATA_PROT_NCQ) {
4580 if (!ata_tag_valid(link->active_tag))
4581 return 0;
4582 } else {
4583 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4584 return 0;
4585 }
e2cec771 4586
624d5c51
TH
4587 return ATA_DEFER_LINK;
4588}
6912ccd5 4589
624d5c51 4590void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
1da177e4 4591
624d5c51
TH
4592/**
4593 * ata_sg_init - Associate command with scatter-gather table.
4594 * @qc: Command to be associated
4595 * @sg: Scatter-gather table.
4596 * @n_elem: Number of elements in s/g table.
4597 *
4598 * Initialize the data-related elements of queued_cmd @qc
4599 * to point to a scatter-gather table @sg, containing @n_elem
4600 * elements.
4601 *
4602 * LOCKING:
4603 * spin_lock_irqsave(host lock)
4604 */
4605void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4606 unsigned int n_elem)
4607{
4608 qc->sg = sg;
4609 qc->n_elem = n_elem;
4610 qc->cursg = qc->sg;
4611}
bb5cb290 4612
624d5c51
TH
4613/**
4614 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
4615 * @qc: Command with scatter-gather table to be mapped.
4616 *
4617 * DMA-map the scatter-gather table associated with queued_cmd @qc.
4618 *
4619 * LOCKING:
4620 * spin_lock_irqsave(host lock)
4621 *
4622 * RETURNS:
4623 * Zero on success, negative on error.
4624 *
4625 */
4626static int ata_sg_setup(struct ata_queued_cmd *qc)
4627{
4628 struct ata_port *ap = qc->ap;
4629 unsigned int n_elem;
1da177e4 4630
624d5c51 4631 VPRINTK("ENTER, ata%u\n", ap->print_id);
e2cec771 4632
624d5c51
TH
4633 n_elem = dma_map_sg(ap->dev, qc->sg, qc->n_elem, qc->dma_dir);
4634 if (n_elem < 1)
4635 return -1;
bb5cb290 4636
624d5c51 4637 DPRINTK("%d sg elements mapped\n", n_elem);
5825627c 4638 qc->orig_n_elem = qc->n_elem;
624d5c51
TH
4639 qc->n_elem = n_elem;
4640 qc->flags |= ATA_QCFLAG_DMAMAP;
1da177e4 4641
624d5c51 4642 return 0;
1da177e4
LT
4643}
4644
624d5c51
TH
4645/**
4646 * swap_buf_le16 - swap halves of 16-bit words in place
4647 * @buf: Buffer to swap
4648 * @buf_words: Number of 16-bit words in buffer.
4649 *
4650 * Swap halves of 16-bit words if needed to convert from
4651 * little-endian byte order to native cpu byte order, or
4652 * vice-versa.
4653 *
4654 * LOCKING:
4655 * Inherited from caller.
4656 */
4657void swap_buf_le16(u16 *buf, unsigned int buf_words)
8061f5f0 4658{
624d5c51
TH
4659#ifdef __BIG_ENDIAN
4660 unsigned int i;
8061f5f0 4661
624d5c51
TH
4662 for (i = 0; i < buf_words; i++)
4663 buf[i] = le16_to_cpu(buf[i]);
4664#endif /* __BIG_ENDIAN */
8061f5f0
TH
4665}
4666
8a8bc223
TH
4667/**
4668 * ata_qc_new - Request an available ATA command, for queueing
5eb66fe0 4669 * @ap: target port
8a8bc223
TH
4670 *
4671 * LOCKING:
4672 * None.
4673 */
4674
4675static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4676{
4677 struct ata_queued_cmd *qc = NULL;
4678 unsigned int i;
4679
4680 /* no command while frozen */
4681 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
4682 return NULL;
4683
4684 /* the last tag is reserved for internal command. */
4685 for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
4686 if (!test_and_set_bit(i, &ap->qc_allocated)) {
4687 qc = __ata_qc_from_tag(ap, i);
4688 break;
4689 }
4690
4691 if (qc)
4692 qc->tag = i;
4693
4694 return qc;
4695}
4696
1da177e4
LT
4697/**
4698 * ata_qc_new_init - Request an available ATA command, and initialize it
1da177e4
LT
4699 * @dev: Device from whom we request an available command structure
4700 *
4701 * LOCKING:
0cba632b 4702 * None.
1da177e4
LT
4703 */
4704
8a8bc223 4705struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
1da177e4 4706{
9af5c9c9 4707 struct ata_port *ap = dev->link->ap;
1da177e4
LT
4708 struct ata_queued_cmd *qc;
4709
8a8bc223 4710 qc = ata_qc_new(ap);
1da177e4 4711 if (qc) {
1da177e4
LT
4712 qc->scsicmd = NULL;
4713 qc->ap = ap;
4714 qc->dev = dev;
1da177e4 4715
2c13b7ce 4716 ata_qc_reinit(qc);
1da177e4
LT
4717 }
4718
4719 return qc;
4720}
4721
8a8bc223
TH
4722/**
4723 * ata_qc_free - free unused ata_queued_cmd
4724 * @qc: Command to complete
4725 *
4726 * Designed to free unused ata_queued_cmd object
4727 * in case something prevents using it.
4728 *
4729 * LOCKING:
4730 * spin_lock_irqsave(host lock)
4731 */
4732void ata_qc_free(struct ata_queued_cmd *qc)
4733{
a1104016 4734 struct ata_port *ap;
8a8bc223
TH
4735 unsigned int tag;
4736
efcb3cf7 4737 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
a1104016 4738 ap = qc->ap;
8a8bc223
TH
4739
4740 qc->flags = 0;
4741 tag = qc->tag;
4742 if (likely(ata_tag_valid(tag))) {
4743 qc->tag = ATA_TAG_POISON;
4744 clear_bit(tag, &ap->qc_allocated);
4745 }
4746}
4747
76014427 4748void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4749{
a1104016
JL
4750 struct ata_port *ap;
4751 struct ata_link *link;
dedaf2b0 4752
efcb3cf7
TH
4753 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4754 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
a1104016
JL
4755 ap = qc->ap;
4756 link = qc->dev->link;
1da177e4
LT
4757
4758 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4759 ata_sg_clean(qc);
4760
7401abf2 4761 /* command should be marked inactive atomically with qc completion */
da917d69 4762 if (qc->tf.protocol == ATA_PROT_NCQ) {
9af5c9c9 4763 link->sactive &= ~(1 << qc->tag);
da917d69
TH
4764 if (!link->sactive)
4765 ap->nr_active_links--;
4766 } else {
9af5c9c9 4767 link->active_tag = ATA_TAG_POISON;
da917d69
TH
4768 ap->nr_active_links--;
4769 }
4770
4771 /* clear exclusive status */
4772 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
4773 ap->excl_link == link))
4774 ap->excl_link = NULL;
7401abf2 4775
3f3791d3
AL
4776 /* atapi: mark qc as inactive to prevent the interrupt handler
4777 * from completing the command twice later, before the error handler
4778 * is called. (when rc != 0 and atapi request sense is needed)
4779 */
4780 qc->flags &= ~ATA_QCFLAG_ACTIVE;
dedaf2b0 4781 ap->qc_active &= ~(1 << qc->tag);
3f3791d3 4782
1da177e4 4783 /* call completion callback */
77853bf2 4784 qc->complete_fn(qc);
1da177e4
LT
4785}
4786
39599a53
TH
4787static void fill_result_tf(struct ata_queued_cmd *qc)
4788{
4789 struct ata_port *ap = qc->ap;
4790
39599a53 4791 qc->result_tf.flags = qc->tf.flags;
22183bf5 4792 ap->ops->qc_fill_rtf(qc);
39599a53
TH
4793}
4794
00115e0f
TH
4795static void ata_verify_xfer(struct ata_queued_cmd *qc)
4796{
4797 struct ata_device *dev = qc->dev;
4798
00115e0f
TH
4799 if (ata_is_nodata(qc->tf.protocol))
4800 return;
4801
4802 if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol))
4803 return;
4804
4805 dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER;
4806}
4807
f686bcb8
TH
4808/**
4809 * ata_qc_complete - Complete an active ATA command
4810 * @qc: Command to complete
f686bcb8 4811 *
1aadf5c3
TH
4812 * Indicate to the mid and upper layers that an ATA command has
4813 * completed, with either an ok or not-ok status.
4814 *
4815 * Refrain from calling this function multiple times when
4816 * successfully completing multiple NCQ commands.
4817 * ata_qc_complete_multiple() should be used instead, which will
4818 * properly update IRQ expect state.
f686bcb8
TH
4819 *
4820 * LOCKING:
cca3974e 4821 * spin_lock_irqsave(host lock)
f686bcb8
TH
4822 */
4823void ata_qc_complete(struct ata_queued_cmd *qc)
4824{
4825 struct ata_port *ap = qc->ap;
4826
4827 /* XXX: New EH and old EH use different mechanisms to
4828 * synchronize EH with regular execution path.
4829 *
4830 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
4831 * Normal execution path is responsible for not accessing a
4832 * failed qc. libata core enforces the rule by returning NULL
4833 * from ata_qc_from_tag() for failed qcs.
4834 *
4835 * Old EH depends on ata_qc_complete() nullifying completion
4836 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
4837 * not synchronize with interrupt handler. Only PIO task is
4838 * taken care of.
4839 */
4840 if (ap->ops->error_handler) {
4dbfa39b
TH
4841 struct ata_device *dev = qc->dev;
4842 struct ata_eh_info *ehi = &dev->link->eh_info;
4843
f686bcb8
TH
4844 if (unlikely(qc->err_mask))
4845 qc->flags |= ATA_QCFLAG_FAILED;
4846
f08dc1ac
TH
4847 /*
4848 * Finish internal commands without any further processing
4849 * and always with the result TF filled.
4850 */
4851 if (unlikely(ata_tag_internal(qc->tag))) {
f4b31db9 4852 fill_result_tf(qc);
f08dc1ac
TH
4853 __ata_qc_complete(qc);
4854 return;
4855 }
f4b31db9 4856
f08dc1ac
TH
4857 /*
4858 * Non-internal qc has failed. Fill the result TF and
4859 * summon EH.
4860 */
4861 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
4862 fill_result_tf(qc);
4863 ata_qc_schedule_eh(qc);
f4b31db9 4864 return;
f686bcb8
TH
4865 }
4866
4dc738ed
TH
4867 WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN);
4868
f686bcb8
TH
4869 /* read result TF if requested */
4870 if (qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4871 fill_result_tf(qc);
f686bcb8 4872
4dbfa39b
TH
4873 /* Some commands need post-processing after successful
4874 * completion.
4875 */
4876 switch (qc->tf.command) {
4877 case ATA_CMD_SET_FEATURES:
4878 if (qc->tf.feature != SETFEATURES_WC_ON &&
4879 qc->tf.feature != SETFEATURES_WC_OFF)
4880 break;
4881 /* fall through */
4882 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
4883 case ATA_CMD_SET_MULTI: /* multi_count changed */
4884 /* revalidate device */
4885 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
4886 ata_port_schedule_eh(ap);
4887 break;
054a5fba
TH
4888
4889 case ATA_CMD_SLEEP:
4890 dev->flags |= ATA_DFLAG_SLEEPING;
4891 break;
4dbfa39b
TH
4892 }
4893
00115e0f
TH
4894 if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER))
4895 ata_verify_xfer(qc);
4896
f686bcb8
TH
4897 __ata_qc_complete(qc);
4898 } else {
4899 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
4900 return;
4901
4902 /* read result TF if failed or requested */
4903 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 4904 fill_result_tf(qc);
f686bcb8
TH
4905
4906 __ata_qc_complete(qc);
4907 }
4908}
4909
dedaf2b0
TH
4910/**
4911 * ata_qc_complete_multiple - Complete multiple qcs successfully
4912 * @ap: port in question
4913 * @qc_active: new qc_active mask
dedaf2b0
TH
4914 *
4915 * Complete in-flight commands. This functions is meant to be
4916 * called from low-level driver's interrupt routine to complete
4917 * requests normally. ap->qc_active and @qc_active is compared
4918 * and commands are completed accordingly.
4919 *
1aadf5c3
TH
4920 * Always use this function when completing multiple NCQ commands
4921 * from IRQ handlers instead of calling ata_qc_complete()
4922 * multiple times to keep IRQ expect status properly in sync.
4923 *
dedaf2b0 4924 * LOCKING:
cca3974e 4925 * spin_lock_irqsave(host lock)
dedaf2b0
TH
4926 *
4927 * RETURNS:
4928 * Number of completed commands on success, -errno otherwise.
4929 */
79f97dad 4930int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
dedaf2b0
TH
4931{
4932 int nr_done = 0;
4933 u32 done_mask;
dedaf2b0
TH
4934
4935 done_mask = ap->qc_active ^ qc_active;
4936
4937 if (unlikely(done_mask & qc_active)) {
a9a79dfe
JP
4938 ata_port_err(ap, "illegal qc_active transition (%08x->%08x)\n",
4939 ap->qc_active, qc_active);
dedaf2b0
TH
4940 return -EINVAL;
4941 }
4942
43768180 4943 while (done_mask) {
dedaf2b0 4944 struct ata_queued_cmd *qc;
43768180 4945 unsigned int tag = __ffs(done_mask);
dedaf2b0 4946
43768180
JA
4947 qc = ata_qc_from_tag(ap, tag);
4948 if (qc) {
dedaf2b0
TH
4949 ata_qc_complete(qc);
4950 nr_done++;
4951 }
43768180 4952 done_mask &= ~(1 << tag);
dedaf2b0
TH
4953 }
4954
4955 return nr_done;
4956}
4957
1da177e4
LT
4958/**
4959 * ata_qc_issue - issue taskfile to device
4960 * @qc: command to issue to device
4961 *
4962 * Prepare an ATA command to submission to device.
4963 * This includes mapping the data into a DMA-able
4964 * area, filling in the S/G table, and finally
4965 * writing the taskfile to hardware, starting the command.
4966 *
4967 * LOCKING:
cca3974e 4968 * spin_lock_irqsave(host lock)
1da177e4 4969 */
8e0e694a 4970void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT
4971{
4972 struct ata_port *ap = qc->ap;
9af5c9c9 4973 struct ata_link *link = qc->dev->link;
405e66b3 4974 u8 prot = qc->tf.protocol;
1da177e4 4975
dedaf2b0
TH
4976 /* Make sure only one non-NCQ command is outstanding. The
4977 * check is skipped for old EH because it reuses active qc to
4978 * request ATAPI sense.
4979 */
efcb3cf7 4980 WARN_ON_ONCE(ap->ops->error_handler && ata_tag_valid(link->active_tag));
dedaf2b0 4981
1973a023 4982 if (ata_is_ncq(prot)) {
efcb3cf7 4983 WARN_ON_ONCE(link->sactive & (1 << qc->tag));
da917d69
TH
4984
4985 if (!link->sactive)
4986 ap->nr_active_links++;
9af5c9c9 4987 link->sactive |= 1 << qc->tag;
dedaf2b0 4988 } else {
efcb3cf7 4989 WARN_ON_ONCE(link->sactive);
da917d69
TH
4990
4991 ap->nr_active_links++;
9af5c9c9 4992 link->active_tag = qc->tag;
dedaf2b0
TH
4993 }
4994
e4a70e76 4995 qc->flags |= ATA_QCFLAG_ACTIVE;
dedaf2b0 4996 ap->qc_active |= 1 << qc->tag;
e4a70e76 4997
60f5d6ef
TH
4998 /*
4999 * We guarantee to LLDs that they will have at least one
f92a2636
TH
5000 * non-zero sg if the command is a data command.
5001 */
60f5d6ef
TH
5002 if (WARN_ON_ONCE(ata_is_data(prot) &&
5003 (!qc->sg || !qc->n_elem || !qc->nbytes)))
5004 goto sys_err;
f92a2636 5005
405e66b3 5006 if (ata_is_dma(prot) || (ata_is_pio(prot) &&
f92a2636 5007 (ap->flags & ATA_FLAG_PIO_DMA)))
001102d7 5008 if (ata_sg_setup(qc))
60f5d6ef 5009 goto sys_err;
1da177e4 5010
cf480626 5011 /* if device is sleeping, schedule reset and abort the link */
054a5fba 5012 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
cf480626 5013 link->eh_info.action |= ATA_EH_RESET;
054a5fba
TH
5014 ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
5015 ata_link_abort(link);
5016 return;
5017 }
5018
1da177e4
LT
5019 ap->ops->qc_prep(qc);
5020
8e0e694a
TH
5021 qc->err_mask |= ap->ops->qc_issue(qc);
5022 if (unlikely(qc->err_mask))
5023 goto err;
5024 return;
1da177e4 5025
60f5d6ef 5026sys_err:
8e0e694a
TH
5027 qc->err_mask |= AC_ERR_SYSTEM;
5028err:
5029 ata_qc_complete(qc);
1da177e4
LT
5030}
5031
34bf2170
TH
5032/**
5033 * sata_scr_valid - test whether SCRs are accessible
936fd732 5034 * @link: ATA link to test SCR accessibility for
34bf2170 5035 *
936fd732 5036 * Test whether SCRs are accessible for @link.
34bf2170
TH
5037 *
5038 * LOCKING:
5039 * None.
5040 *
5041 * RETURNS:
5042 * 1 if SCRs are accessible, 0 otherwise.
5043 */
936fd732 5044int sata_scr_valid(struct ata_link *link)
34bf2170 5045{
936fd732
TH
5046 struct ata_port *ap = link->ap;
5047
a16abc0b 5048 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
34bf2170
TH
5049}
5050
5051/**
5052 * sata_scr_read - read SCR register of the specified port
936fd732 5053 * @link: ATA link to read SCR for
34bf2170
TH
5054 * @reg: SCR to read
5055 * @val: Place to store read value
5056 *
936fd732 5057 * Read SCR register @reg of @link into *@val. This function is
633273a3
TH
5058 * guaranteed to succeed if @link is ap->link, the cable type of
5059 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5060 *
5061 * LOCKING:
633273a3 5062 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5063 *
5064 * RETURNS:
5065 * 0 on success, negative errno on failure.
5066 */
936fd732 5067int sata_scr_read(struct ata_link *link, int reg, u32 *val)
34bf2170 5068{
633273a3 5069 if (ata_is_host_link(link)) {
633273a3 5070 if (sata_scr_valid(link))
82ef04fb 5071 return link->ap->ops->scr_read(link, reg, val);
633273a3
TH
5072 return -EOPNOTSUPP;
5073 }
5074
5075 return sata_pmp_scr_read(link, reg, val);
34bf2170
TH
5076}
5077
5078/**
5079 * sata_scr_write - write SCR register of the specified port
936fd732 5080 * @link: ATA link to write SCR for
34bf2170
TH
5081 * @reg: SCR to write
5082 * @val: value to write
5083 *
936fd732 5084 * Write @val to SCR register @reg of @link. This function is
633273a3
TH
5085 * guaranteed to succeed if @link is ap->link, the cable type of
5086 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5087 *
5088 * LOCKING:
633273a3 5089 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5090 *
5091 * RETURNS:
5092 * 0 on success, negative errno on failure.
5093 */
936fd732 5094int sata_scr_write(struct ata_link *link, int reg, u32 val)
34bf2170 5095{
633273a3 5096 if (ata_is_host_link(link)) {
633273a3 5097 if (sata_scr_valid(link))
82ef04fb 5098 return link->ap->ops->scr_write(link, reg, val);
633273a3
TH
5099 return -EOPNOTSUPP;
5100 }
936fd732 5101
633273a3 5102 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5103}
5104
5105/**
5106 * sata_scr_write_flush - write SCR register of the specified port and flush
936fd732 5107 * @link: ATA link to write SCR for
34bf2170
TH
5108 * @reg: SCR to write
5109 * @val: value to write
5110 *
5111 * This function is identical to sata_scr_write() except that this
5112 * function performs flush after writing to the register.
5113 *
5114 * LOCKING:
633273a3 5115 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5116 *
5117 * RETURNS:
5118 * 0 on success, negative errno on failure.
5119 */
936fd732 5120int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
34bf2170 5121{
633273a3 5122 if (ata_is_host_link(link)) {
633273a3 5123 int rc;
da3dbb17 5124
633273a3 5125 if (sata_scr_valid(link)) {
82ef04fb 5126 rc = link->ap->ops->scr_write(link, reg, val);
633273a3 5127 if (rc == 0)
82ef04fb 5128 rc = link->ap->ops->scr_read(link, reg, &val);
633273a3
TH
5129 return rc;
5130 }
5131 return -EOPNOTSUPP;
34bf2170 5132 }
633273a3
TH
5133
5134 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5135}
5136
5137/**
b1c72916 5138 * ata_phys_link_online - test whether the given link is online
936fd732 5139 * @link: ATA link to test
34bf2170 5140 *
936fd732
TH
5141 * Test whether @link is online. Note that this function returns
5142 * 0 if online status of @link cannot be obtained, so
5143 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5144 *
5145 * LOCKING:
5146 * None.
5147 *
5148 * RETURNS:
b5b3fa38 5149 * True if the port online status is available and online.
34bf2170 5150 */
b1c72916 5151bool ata_phys_link_online(struct ata_link *link)
34bf2170
TH
5152{
5153 u32 sstatus;
5154
936fd732 5155 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5156 ata_sstatus_online(sstatus))
b5b3fa38
TH
5157 return true;
5158 return false;
34bf2170
TH
5159}
5160
5161/**
b1c72916 5162 * ata_phys_link_offline - test whether the given link is offline
936fd732 5163 * @link: ATA link to test
34bf2170 5164 *
936fd732
TH
5165 * Test whether @link is offline. Note that this function
5166 * returns 0 if offline status of @link cannot be obtained, so
5167 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5168 *
5169 * LOCKING:
5170 * None.
5171 *
5172 * RETURNS:
b5b3fa38 5173 * True if the port offline status is available and offline.
34bf2170 5174 */
b1c72916 5175bool ata_phys_link_offline(struct ata_link *link)
34bf2170
TH
5176{
5177 u32 sstatus;
5178
936fd732 5179 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5180 !ata_sstatus_online(sstatus))
b5b3fa38
TH
5181 return true;
5182 return false;
34bf2170 5183}
0baab86b 5184
b1c72916
TH
5185/**
5186 * ata_link_online - test whether the given link is online
5187 * @link: ATA link to test
5188 *
5189 * Test whether @link is online. This is identical to
5190 * ata_phys_link_online() when there's no slave link. When
5191 * there's a slave link, this function should only be called on
5192 * the master link and will return true if any of M/S links is
5193 * online.
5194 *
5195 * LOCKING:
5196 * None.
5197 *
5198 * RETURNS:
5199 * True if the port online status is available and online.
5200 */
5201bool ata_link_online(struct ata_link *link)
5202{
5203 struct ata_link *slave = link->ap->slave_link;
5204
5205 WARN_ON(link == slave); /* shouldn't be called on slave link */
5206
5207 return ata_phys_link_online(link) ||
5208 (slave && ata_phys_link_online(slave));
5209}
5210
5211/**
5212 * ata_link_offline - test whether the given link is offline
5213 * @link: ATA link to test
5214 *
5215 * Test whether @link is offline. This is identical to
5216 * ata_phys_link_offline() when there's no slave link. When
5217 * there's a slave link, this function should only be called on
5218 * the master link and will return true if both M/S links are
5219 * offline.
5220 *
5221 * LOCKING:
5222 * None.
5223 *
5224 * RETURNS:
5225 * True if the port offline status is available and offline.
5226 */
5227bool ata_link_offline(struct ata_link *link)
5228{
5229 struct ata_link *slave = link->ap->slave_link;
5230
5231 WARN_ON(link == slave); /* shouldn't be called on slave link */
5232
5233 return ata_phys_link_offline(link) &&
5234 (!slave || ata_phys_link_offline(slave));
5235}
5236
6ffa01d8 5237#ifdef CONFIG_PM
5ef41082 5238static int ata_port_request_pm(struct ata_port *ap, pm_message_t mesg,
cca3974e
JG
5239 unsigned int action, unsigned int ehi_flags,
5240 int wait)
500530f6 5241{
5ef41082 5242 struct ata_link *link;
500530f6 5243 unsigned long flags;
5ef41082 5244 int rc;
500530f6 5245
5ef41082
LM
5246 /* Previous resume operation might still be in
5247 * progress. Wait for PM_PENDING to clear.
5248 */
5249 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5250 ata_port_wait_eh(ap);
5251 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5252 }
500530f6 5253
5ef41082
LM
5254 /* request PM ops to EH */
5255 spin_lock_irqsave(ap->lock, flags);
500530f6 5256
5ef41082
LM
5257 ap->pm_mesg = mesg;
5258 if (wait) {
5259 rc = 0;
5260 ap->pm_result = &rc;
5261 }
500530f6 5262
5ef41082
LM
5263 ap->pflags |= ATA_PFLAG_PM_PENDING;
5264 ata_for_each_link(link, ap, HOST_FIRST) {
5265 link->eh_info.action |= action;
5266 link->eh_info.flags |= ehi_flags;
5267 }
500530f6 5268
5ef41082 5269 ata_port_schedule_eh(ap);
500530f6 5270
5ef41082 5271 spin_unlock_irqrestore(ap->lock, flags);
500530f6 5272
5ef41082
LM
5273 /* wait and check result */
5274 if (wait) {
5275 ata_port_wait_eh(ap);
5276 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
500530f6
TH
5277 }
5278
5ef41082 5279 return rc;
500530f6
TH
5280}
5281
5ef41082
LM
5282#define to_ata_port(d) container_of(d, struct ata_port, tdev)
5283
5284static int ata_port_suspend_common(struct device *dev)
5285{
5286 struct ata_port *ap = to_ata_port(dev);
5287 int rc;
5288
5289 rc = ata_port_request_pm(ap, PMSG_SUSPEND, 0, ATA_EHI_QUIET, 1);
5290 return rc;
5291}
5292
5293static int ata_port_suspend(struct device *dev)
5294{
5295 if (pm_runtime_suspended(dev))
5296 return 0;
5297
5298 return ata_port_suspend_common(dev);
5299}
5300
5301static int ata_port_resume(struct device *dev)
5302{
5303 struct ata_port *ap = to_ata_port(dev);
5304 int rc;
5305
5306 rc = ata_port_request_pm(ap, PMSG_ON, ATA_EH_RESET,
5307 ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET, 1);
5308 return rc;
5309}
5310
9ee4f393
LM
5311static int ata_port_runtime_idle(struct device *dev)
5312{
5313 return pm_runtime_suspend(dev);
5314}
5315
5ef41082
LM
5316static const struct dev_pm_ops ata_port_pm_ops = {
5317 .suspend = ata_port_suspend,
5318 .resume = ata_port_resume,
9ee4f393
LM
5319
5320 .runtime_suspend = ata_port_suspend_common,
5321 .runtime_resume = ata_port_resume,
5322 .runtime_idle = ata_port_runtime_idle,
5ef41082
LM
5323};
5324
500530f6 5325/**
cca3974e
JG
5326 * ata_host_suspend - suspend host
5327 * @host: host to suspend
500530f6
TH
5328 * @mesg: PM message
5329 *
5ef41082 5330 * Suspend @host. Actual operation is performed by port suspend.
500530f6 5331 */
cca3974e 5332int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
500530f6 5333{
5ef41082
LM
5334 host->dev->power.power_state = mesg;
5335 return 0;
500530f6
TH
5336}
5337
5338/**
cca3974e
JG
5339 * ata_host_resume - resume host
5340 * @host: host to resume
500530f6 5341 *
5ef41082 5342 * Resume @host. Actual operation is performed by port resume.
500530f6 5343 */
cca3974e 5344void ata_host_resume(struct ata_host *host)
500530f6 5345{
72ad6ec4 5346 host->dev->power.power_state = PMSG_ON;
500530f6 5347}
6ffa01d8 5348#endif
500530f6 5349
5ef41082
LM
5350struct device_type ata_port_type = {
5351 .name = "ata_port",
5352#ifdef CONFIG_PM
5353 .pm = &ata_port_pm_ops,
5354#endif
5355};
5356
3ef3b43d
TH
5357/**
5358 * ata_dev_init - Initialize an ata_device structure
5359 * @dev: Device structure to initialize
5360 *
5361 * Initialize @dev in preparation for probing.
5362 *
5363 * LOCKING:
5364 * Inherited from caller.
5365 */
5366void ata_dev_init(struct ata_device *dev)
5367{
b1c72916 5368 struct ata_link *link = ata_dev_phys_link(dev);
9af5c9c9 5369 struct ata_port *ap = link->ap;
72fa4b74
TH
5370 unsigned long flags;
5371
b1c72916 5372 /* SATA spd limit is bound to the attached device, reset together */
9af5c9c9
TH
5373 link->sata_spd_limit = link->hw_sata_spd_limit;
5374 link->sata_spd = 0;
5a04bf4b 5375
72fa4b74
TH
5376 /* High bits of dev->flags are used to record warm plug
5377 * requests which occur asynchronously. Synchronize using
cca3974e 5378 * host lock.
72fa4b74 5379 */
ba6a1308 5380 spin_lock_irqsave(ap->lock, flags);
72fa4b74 5381 dev->flags &= ~ATA_DFLAG_INIT_MASK;
3dcc323f 5382 dev->horkage = 0;
ba6a1308 5383 spin_unlock_irqrestore(ap->lock, flags);
3ef3b43d 5384
99cf610a
TH
5385 memset((void *)dev + ATA_DEVICE_CLEAR_BEGIN, 0,
5386 ATA_DEVICE_CLEAR_END - ATA_DEVICE_CLEAR_BEGIN);
3ef3b43d
TH
5387 dev->pio_mask = UINT_MAX;
5388 dev->mwdma_mask = UINT_MAX;
5389 dev->udma_mask = UINT_MAX;
5390}
5391
4fb37a25
TH
5392/**
5393 * ata_link_init - Initialize an ata_link structure
5394 * @ap: ATA port link is attached to
5395 * @link: Link structure to initialize
8989805d 5396 * @pmp: Port multiplier port number
4fb37a25
TH
5397 *
5398 * Initialize @link.
5399 *
5400 * LOCKING:
5401 * Kernel thread context (may sleep)
5402 */
fb7fd614 5403void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
4fb37a25
TH
5404{
5405 int i;
5406
5407 /* clear everything except for devices */
d9027470
GG
5408 memset((void *)link + ATA_LINK_CLEAR_BEGIN, 0,
5409 ATA_LINK_CLEAR_END - ATA_LINK_CLEAR_BEGIN);
4fb37a25
TH
5410
5411 link->ap = ap;
8989805d 5412 link->pmp = pmp;
4fb37a25
TH
5413 link->active_tag = ATA_TAG_POISON;
5414 link->hw_sata_spd_limit = UINT_MAX;
5415
5416 /* can't use iterator, ap isn't initialized yet */
5417 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5418 struct ata_device *dev = &link->device[i];
5419
5420 dev->link = link;
5421 dev->devno = dev - link->device;
110f66d2
TH
5422#ifdef CONFIG_ATA_ACPI
5423 dev->gtf_filter = ata_acpi_gtf_filter;
5424#endif
4fb37a25
TH
5425 ata_dev_init(dev);
5426 }
5427}
5428
5429/**
5430 * sata_link_init_spd - Initialize link->sata_spd_limit
5431 * @link: Link to configure sata_spd_limit for
5432 *
5433 * Initialize @link->[hw_]sata_spd_limit to the currently
5434 * configured value.
5435 *
5436 * LOCKING:
5437 * Kernel thread context (may sleep).
5438 *
5439 * RETURNS:
5440 * 0 on success, -errno on failure.
5441 */
fb7fd614 5442int sata_link_init_spd(struct ata_link *link)
4fb37a25 5443{
33267325 5444 u8 spd;
4fb37a25
TH
5445 int rc;
5446
d127ea7b 5447 rc = sata_scr_read(link, SCR_CONTROL, &link->saved_scontrol);
4fb37a25
TH
5448 if (rc)
5449 return rc;
5450
d127ea7b 5451 spd = (link->saved_scontrol >> 4) & 0xf;
4fb37a25
TH
5452 if (spd)
5453 link->hw_sata_spd_limit &= (1 << spd) - 1;
5454
05944bdf 5455 ata_force_link_limits(link);
33267325 5456
4fb37a25
TH
5457 link->sata_spd_limit = link->hw_sata_spd_limit;
5458
5459 return 0;
5460}
5461
1da177e4 5462/**
f3187195
TH
5463 * ata_port_alloc - allocate and initialize basic ATA port resources
5464 * @host: ATA host this allocated port belongs to
1da177e4 5465 *
f3187195
TH
5466 * Allocate and initialize basic ATA port resources.
5467 *
5468 * RETURNS:
5469 * Allocate ATA port on success, NULL on failure.
0cba632b 5470 *
1da177e4 5471 * LOCKING:
f3187195 5472 * Inherited from calling layer (may sleep).
1da177e4 5473 */
f3187195 5474struct ata_port *ata_port_alloc(struct ata_host *host)
1da177e4 5475{
f3187195 5476 struct ata_port *ap;
1da177e4 5477
f3187195
TH
5478 DPRINTK("ENTER\n");
5479
5480 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
5481 if (!ap)
5482 return NULL;
4fca377f 5483
7b3a24c5 5484 ap->pflags |= ATA_PFLAG_INITIALIZING | ATA_PFLAG_FROZEN;
cca3974e 5485 ap->lock = &host->lock;
f3187195 5486 ap->print_id = -1;
cca3974e 5487 ap->host = host;
f3187195 5488 ap->dev = host->dev;
bd5d825c
BP
5489
5490#if defined(ATA_VERBOSE_DEBUG)
5491 /* turn on all debugging levels */
5492 ap->msg_enable = 0x00FF;
5493#elif defined(ATA_DEBUG)
5494 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
88574551 5495#else
0dd4b21f 5496 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
bd5d825c 5497#endif
1da177e4 5498
ad72cf98 5499 mutex_init(&ap->scsi_scan_mutex);
65f27f38
DH
5500 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5501 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
a72ec4ce 5502 INIT_LIST_HEAD(&ap->eh_done_q);
c6cf9e99 5503 init_waitqueue_head(&ap->eh_wait_q);
45fabbb7 5504 init_completion(&ap->park_req_pending);
5ddf24c5
TH
5505 init_timer_deferrable(&ap->fastdrain_timer);
5506 ap->fastdrain_timer.function = ata_eh_fastdrain_timerfn;
5507 ap->fastdrain_timer.data = (unsigned long)ap;
1da177e4 5508
838df628 5509 ap->cbl = ATA_CBL_NONE;
838df628 5510
8989805d 5511 ata_link_init(ap, &ap->link, 0);
1da177e4
LT
5512
5513#ifdef ATA_IRQ_TRAP
5514 ap->stats.unhandled_irq = 1;
5515 ap->stats.idle_irq = 1;
5516#endif
270390e1
TH
5517 ata_sff_port_init(ap);
5518
1da177e4 5519 return ap;
1da177e4
LT
5520}
5521
f0d36efd
TH
5522static void ata_host_release(struct device *gendev, void *res)
5523{
5524 struct ata_host *host = dev_get_drvdata(gendev);
5525 int i;
5526
1aa506e4
TH
5527 for (i = 0; i < host->n_ports; i++) {
5528 struct ata_port *ap = host->ports[i];
5529
4911487a
TH
5530 if (!ap)
5531 continue;
5532
5533 if (ap->scsi_host)
1aa506e4
TH
5534 scsi_host_put(ap->scsi_host);
5535
633273a3 5536 kfree(ap->pmp_link);
b1c72916 5537 kfree(ap->slave_link);
4911487a 5538 kfree(ap);
1aa506e4
TH
5539 host->ports[i] = NULL;
5540 }
5541
1aa56cca 5542 dev_set_drvdata(gendev, NULL);
f0d36efd
TH
5543}
5544
f3187195
TH
5545/**
5546 * ata_host_alloc - allocate and init basic ATA host resources
5547 * @dev: generic device this host is associated with
5548 * @max_ports: maximum number of ATA ports associated with this host
5549 *
5550 * Allocate and initialize basic ATA host resources. LLD calls
5551 * this function to allocate a host, initializes it fully and
5552 * attaches it using ata_host_register().
5553 *
5554 * @max_ports ports are allocated and host->n_ports is
5555 * initialized to @max_ports. The caller is allowed to decrease
5556 * host->n_ports before calling ata_host_register(). The unused
5557 * ports will be automatically freed on registration.
5558 *
5559 * RETURNS:
5560 * Allocate ATA host on success, NULL on failure.
5561 *
5562 * LOCKING:
5563 * Inherited from calling layer (may sleep).
5564 */
5565struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
5566{
5567 struct ata_host *host;
5568 size_t sz;
5569 int i;
5570
5571 DPRINTK("ENTER\n");
5572
5573 if (!devres_open_group(dev, NULL, GFP_KERNEL))
5574 return NULL;
5575
5576 /* alloc a container for our list of ATA ports (buses) */
5577 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
5578 /* alloc a container for our list of ATA ports (buses) */
5579 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
5580 if (!host)
5581 goto err_out;
5582
5583 devres_add(dev, host);
5584 dev_set_drvdata(dev, host);
5585
5586 spin_lock_init(&host->lock);
c0c362b6 5587 mutex_init(&host->eh_mutex);
f3187195
TH
5588 host->dev = dev;
5589 host->n_ports = max_ports;
5590
5591 /* allocate ports bound to this host */
5592 for (i = 0; i < max_ports; i++) {
5593 struct ata_port *ap;
5594
5595 ap = ata_port_alloc(host);
5596 if (!ap)
5597 goto err_out;
5598
5599 ap->port_no = i;
5600 host->ports[i] = ap;
5601 }
5602
5603 devres_remove_group(dev, NULL);
5604 return host;
5605
5606 err_out:
5607 devres_release_group(dev, NULL);
5608 return NULL;
5609}
5610
f5cda257
TH
5611/**
5612 * ata_host_alloc_pinfo - alloc host and init with port_info array
5613 * @dev: generic device this host is associated with
5614 * @ppi: array of ATA port_info to initialize host with
5615 * @n_ports: number of ATA ports attached to this host
5616 *
5617 * Allocate ATA host and initialize with info from @ppi. If NULL
5618 * terminated, @ppi may contain fewer entries than @n_ports. The
5619 * last entry will be used for the remaining ports.
5620 *
5621 * RETURNS:
5622 * Allocate ATA host on success, NULL on failure.
5623 *
5624 * LOCKING:
5625 * Inherited from calling layer (may sleep).
5626 */
5627struct ata_host *ata_host_alloc_pinfo(struct device *dev,
5628 const struct ata_port_info * const * ppi,
5629 int n_ports)
5630{
5631 const struct ata_port_info *pi;
5632 struct ata_host *host;
5633 int i, j;
5634
5635 host = ata_host_alloc(dev, n_ports);
5636 if (!host)
5637 return NULL;
5638
5639 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
5640 struct ata_port *ap = host->ports[i];
5641
5642 if (ppi[j])
5643 pi = ppi[j++];
5644
5645 ap->pio_mask = pi->pio_mask;
5646 ap->mwdma_mask = pi->mwdma_mask;
5647 ap->udma_mask = pi->udma_mask;
5648 ap->flags |= pi->flags;
0c88758b 5649 ap->link.flags |= pi->link_flags;
f5cda257
TH
5650 ap->ops = pi->port_ops;
5651
5652 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
5653 host->ops = pi->port_ops;
f5cda257
TH
5654 }
5655
5656 return host;
5657}
5658
b1c72916
TH
5659/**
5660 * ata_slave_link_init - initialize slave link
5661 * @ap: port to initialize slave link for
5662 *
5663 * Create and initialize slave link for @ap. This enables slave
5664 * link handling on the port.
5665 *
5666 * In libata, a port contains links and a link contains devices.
5667 * There is single host link but if a PMP is attached to it,
5668 * there can be multiple fan-out links. On SATA, there's usually
5669 * a single device connected to a link but PATA and SATA
5670 * controllers emulating TF based interface can have two - master
5671 * and slave.
5672 *
5673 * However, there are a few controllers which don't fit into this
5674 * abstraction too well - SATA controllers which emulate TF
5675 * interface with both master and slave devices but also have
5676 * separate SCR register sets for each device. These controllers
5677 * need separate links for physical link handling
5678 * (e.g. onlineness, link speed) but should be treated like a
5679 * traditional M/S controller for everything else (e.g. command
5680 * issue, softreset).
5681 *
5682 * slave_link is libata's way of handling this class of
5683 * controllers without impacting core layer too much. For
5684 * anything other than physical link handling, the default host
5685 * link is used for both master and slave. For physical link
5686 * handling, separate @ap->slave_link is used. All dirty details
5687 * are implemented inside libata core layer. From LLD's POV, the
5688 * only difference is that prereset, hardreset and postreset are
5689 * called once more for the slave link, so the reset sequence
5690 * looks like the following.
5691 *
5692 * prereset(M) -> prereset(S) -> hardreset(M) -> hardreset(S) ->
5693 * softreset(M) -> postreset(M) -> postreset(S)
5694 *
5695 * Note that softreset is called only for the master. Softreset
5696 * resets both M/S by definition, so SRST on master should handle
5697 * both (the standard method will work just fine).
5698 *
5699 * LOCKING:
5700 * Should be called before host is registered.
5701 *
5702 * RETURNS:
5703 * 0 on success, -errno on failure.
5704 */
5705int ata_slave_link_init(struct ata_port *ap)
5706{
5707 struct ata_link *link;
5708
5709 WARN_ON(ap->slave_link);
5710 WARN_ON(ap->flags & ATA_FLAG_PMP);
5711
5712 link = kzalloc(sizeof(*link), GFP_KERNEL);
5713 if (!link)
5714 return -ENOMEM;
5715
5716 ata_link_init(ap, link, 1);
5717 ap->slave_link = link;
5718 return 0;
5719}
5720
32ebbc0c
TH
5721static void ata_host_stop(struct device *gendev, void *res)
5722{
5723 struct ata_host *host = dev_get_drvdata(gendev);
5724 int i;
5725
5726 WARN_ON(!(host->flags & ATA_HOST_STARTED));
5727
5728 for (i = 0; i < host->n_ports; i++) {
5729 struct ata_port *ap = host->ports[i];
5730
5731 if (ap->ops->port_stop)
5732 ap->ops->port_stop(ap);
5733 }
5734
5735 if (host->ops->host_stop)
5736 host->ops->host_stop(host);
5737}
5738
029cfd6b
TH
5739/**
5740 * ata_finalize_port_ops - finalize ata_port_operations
5741 * @ops: ata_port_operations to finalize
5742 *
5743 * An ata_port_operations can inherit from another ops and that
5744 * ops can again inherit from another. This can go on as many
5745 * times as necessary as long as there is no loop in the
5746 * inheritance chain.
5747 *
5748 * Ops tables are finalized when the host is started. NULL or
5749 * unspecified entries are inherited from the closet ancestor
5750 * which has the method and the entry is populated with it.
5751 * After finalization, the ops table directly points to all the
5752 * methods and ->inherits is no longer necessary and cleared.
5753 *
5754 * Using ATA_OP_NULL, inheriting ops can force a method to NULL.
5755 *
5756 * LOCKING:
5757 * None.
5758 */
5759static void ata_finalize_port_ops(struct ata_port_operations *ops)
5760{
2da67659 5761 static DEFINE_SPINLOCK(lock);
029cfd6b
TH
5762 const struct ata_port_operations *cur;
5763 void **begin = (void **)ops;
5764 void **end = (void **)&ops->inherits;
5765 void **pp;
5766
5767 if (!ops || !ops->inherits)
5768 return;
5769
5770 spin_lock(&lock);
5771
5772 for (cur = ops->inherits; cur; cur = cur->inherits) {
5773 void **inherit = (void **)cur;
5774
5775 for (pp = begin; pp < end; pp++, inherit++)
5776 if (!*pp)
5777 *pp = *inherit;
5778 }
5779
5780 for (pp = begin; pp < end; pp++)
5781 if (IS_ERR(*pp))
5782 *pp = NULL;
5783
5784 ops->inherits = NULL;
5785
5786 spin_unlock(&lock);
5787}
5788
ecef7253
TH
5789/**
5790 * ata_host_start - start and freeze ports of an ATA host
5791 * @host: ATA host to start ports for
5792 *
5793 * Start and then freeze ports of @host. Started status is
5794 * recorded in host->flags, so this function can be called
5795 * multiple times. Ports are guaranteed to get started only
f3187195
TH
5796 * once. If host->ops isn't initialized yet, its set to the
5797 * first non-dummy port ops.
ecef7253
TH
5798 *
5799 * LOCKING:
5800 * Inherited from calling layer (may sleep).
5801 *
5802 * RETURNS:
5803 * 0 if all ports are started successfully, -errno otherwise.
5804 */
5805int ata_host_start(struct ata_host *host)
5806{
32ebbc0c
TH
5807 int have_stop = 0;
5808 void *start_dr = NULL;
ecef7253
TH
5809 int i, rc;
5810
5811 if (host->flags & ATA_HOST_STARTED)
5812 return 0;
5813
029cfd6b
TH
5814 ata_finalize_port_ops(host->ops);
5815
ecef7253
TH
5816 for (i = 0; i < host->n_ports; i++) {
5817 struct ata_port *ap = host->ports[i];
5818
029cfd6b
TH
5819 ata_finalize_port_ops(ap->ops);
5820
f3187195
TH
5821 if (!host->ops && !ata_port_is_dummy(ap))
5822 host->ops = ap->ops;
5823
32ebbc0c
TH
5824 if (ap->ops->port_stop)
5825 have_stop = 1;
5826 }
5827
5828 if (host->ops->host_stop)
5829 have_stop = 1;
5830
5831 if (have_stop) {
5832 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
5833 if (!start_dr)
5834 return -ENOMEM;
5835 }
5836
5837 for (i = 0; i < host->n_ports; i++) {
5838 struct ata_port *ap = host->ports[i];
5839
ecef7253
TH
5840 if (ap->ops->port_start) {
5841 rc = ap->ops->port_start(ap);
5842 if (rc) {
0f9fe9b7 5843 if (rc != -ENODEV)
a44fec1f
JP
5844 dev_err(host->dev,
5845 "failed to start port %d (errno=%d)\n",
5846 i, rc);
ecef7253
TH
5847 goto err_out;
5848 }
5849 }
ecef7253
TH
5850 ata_eh_freeze_port(ap);
5851 }
5852
32ebbc0c
TH
5853 if (start_dr)
5854 devres_add(host->dev, start_dr);
ecef7253
TH
5855 host->flags |= ATA_HOST_STARTED;
5856 return 0;
5857
5858 err_out:
5859 while (--i >= 0) {
5860 struct ata_port *ap = host->ports[i];
5861
5862 if (ap->ops->port_stop)
5863 ap->ops->port_stop(ap);
5864 }
32ebbc0c 5865 devres_free(start_dr);
ecef7253
TH
5866 return rc;
5867}
5868
b03732f0 5869/**
cca3974e
JG
5870 * ata_sas_host_init - Initialize a host struct
5871 * @host: host to initialize
5872 * @dev: device host is attached to
5873 * @flags: host flags
5874 * @ops: port_ops
b03732f0
BK
5875 *
5876 * LOCKING:
5877 * PCI/etc. bus probe sem.
5878 *
5879 */
f3187195 5880/* KILLME - the only user left is ipr */
cca3974e 5881void ata_host_init(struct ata_host *host, struct device *dev,
029cfd6b 5882 unsigned long flags, struct ata_port_operations *ops)
b03732f0 5883{
cca3974e 5884 spin_lock_init(&host->lock);
c0c362b6 5885 mutex_init(&host->eh_mutex);
cca3974e
JG
5886 host->dev = dev;
5887 host->flags = flags;
5888 host->ops = ops;
b03732f0
BK
5889}
5890
238c9cf9 5891int ata_port_probe(struct ata_port *ap)
79318057 5892{
238c9cf9 5893 int rc = 0;
886ad09f 5894
79318057
AV
5895 /* probe */
5896 if (ap->ops->error_handler) {
5897 struct ata_eh_info *ehi = &ap->link.eh_info;
5898 unsigned long flags;
5899
79318057
AV
5900 /* kick EH for boot probing */
5901 spin_lock_irqsave(ap->lock, flags);
5902
5903 ehi->probe_mask |= ATA_ALL_DEVICES;
6b7ae954 5904 ehi->action |= ATA_EH_RESET;
79318057
AV
5905 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
5906
5907 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
5908 ap->pflags |= ATA_PFLAG_LOADING;
5909 ata_port_schedule_eh(ap);
5910
5911 spin_unlock_irqrestore(ap->lock, flags);
5912
5913 /* wait for EH to finish */
5914 ata_port_wait_eh(ap);
5915 } else {
5916 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
5917 rc = ata_bus_probe(ap);
5918 DPRINTK("ata%u: bus probe end\n", ap->print_id);
79318057 5919 }
238c9cf9
JB
5920 return rc;
5921}
5922
5923
5924static void async_port_probe(void *data, async_cookie_t cookie)
5925{
5926 struct ata_port *ap = data;
4fca377f 5927
238c9cf9
JB
5928 /*
5929 * If we're not allowed to scan this host in parallel,
5930 * we need to wait until all previous scans have completed
5931 * before going further.
5932 * Jeff Garzik says this is only within a controller, so we
5933 * don't need to wait for port 0, only for later ports.
5934 */
5935 if (!(ap->host->flags & ATA_HOST_PARALLEL_SCAN) && ap->port_no != 0)
5936 async_synchronize_cookie(cookie);
5937
5938 (void)ata_port_probe(ap);
f29d3b23
AV
5939
5940 /* in order to keep device order, we need to synchronize at this point */
5941 async_synchronize_cookie(cookie);
5942
5943 ata_scsi_scan_host(ap, 1);
79318057 5944}
238c9cf9 5945
f3187195
TH
5946/**
5947 * ata_host_register - register initialized ATA host
5948 * @host: ATA host to register
5949 * @sht: template for SCSI host
5950 *
5951 * Register initialized ATA host. @host is allocated using
5952 * ata_host_alloc() and fully initialized by LLD. This function
5953 * starts ports, registers @host with ATA and SCSI layers and
5954 * probe registered devices.
5955 *
5956 * LOCKING:
5957 * Inherited from calling layer (may sleep).
5958 *
5959 * RETURNS:
5960 * 0 on success, -errno otherwise.
5961 */
5962int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
5963{
5964 int i, rc;
5965
5966 /* host must have been started */
5967 if (!(host->flags & ATA_HOST_STARTED)) {
a44fec1f 5968 dev_err(host->dev, "BUG: trying to register unstarted host\n");
f3187195
TH
5969 WARN_ON(1);
5970 return -EINVAL;
5971 }
5972
5973 /* Blow away unused ports. This happens when LLD can't
5974 * determine the exact number of ports to allocate at
5975 * allocation time.
5976 */
5977 for (i = host->n_ports; host->ports[i]; i++)
5978 kfree(host->ports[i]);
5979
5980 /* give ports names and add SCSI hosts */
5981 for (i = 0; i < host->n_ports; i++)
5982 host->ports[i]->print_id = ata_print_id++;
5983
4fca377f 5984
d9027470
GG
5985 /* Create associated sysfs transport objects */
5986 for (i = 0; i < host->n_ports; i++) {
5987 rc = ata_tport_add(host->dev,host->ports[i]);
5988 if (rc) {
5989 goto err_tadd;
5990 }
5991 }
5992
f3187195
TH
5993 rc = ata_scsi_add_hosts(host, sht);
5994 if (rc)
d9027470 5995 goto err_tadd;
f3187195 5996
fafbae87
TH
5997 /* associate with ACPI nodes */
5998 ata_acpi_associate(host);
5999
f3187195
TH
6000 /* set cable, sata_spd_limit and report */
6001 for (i = 0; i < host->n_ports; i++) {
6002 struct ata_port *ap = host->ports[i];
f3187195
TH
6003 unsigned long xfer_mask;
6004
6005 /* set SATA cable type if still unset */
6006 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6007 ap->cbl = ATA_CBL_SATA;
6008
6009 /* init sata_spd_limit to the current value */
4fb37a25 6010 sata_link_init_spd(&ap->link);
b1c72916
TH
6011 if (ap->slave_link)
6012 sata_link_init_spd(ap->slave_link);
f3187195 6013
cbcdd875 6014 /* print per-port info to dmesg */
f3187195
TH
6015 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6016 ap->udma_mask);
6017
abf6e8ed 6018 if (!ata_port_is_dummy(ap)) {
a9a79dfe
JP
6019 ata_port_info(ap, "%cATA max %s %s\n",
6020 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6021 ata_mode_string(xfer_mask),
6022 ap->link.eh_info.desc);
abf6e8ed
TH
6023 ata_ehi_clear_desc(&ap->link.eh_info);
6024 } else
a9a79dfe 6025 ata_port_info(ap, "DUMMY\n");
f3187195
TH
6026 }
6027
f6005354 6028 /* perform each probe asynchronously */
f3187195
TH
6029 for (i = 0; i < host->n_ports; i++) {
6030 struct ata_port *ap = host->ports[i];
79318057 6031 async_schedule(async_port_probe, ap);
f3187195 6032 }
f3187195
TH
6033
6034 return 0;
d9027470
GG
6035
6036 err_tadd:
6037 while (--i >= 0) {
6038 ata_tport_delete(host->ports[i]);
6039 }
6040 return rc;
6041
f3187195
TH
6042}
6043
f5cda257
TH
6044/**
6045 * ata_host_activate - start host, request IRQ and register it
6046 * @host: target ATA host
6047 * @irq: IRQ to request
6048 * @irq_handler: irq_handler used when requesting IRQ
6049 * @irq_flags: irq_flags used when requesting IRQ
6050 * @sht: scsi_host_template to use when registering the host
6051 *
6052 * After allocating an ATA host and initializing it, most libata
6053 * LLDs perform three steps to activate the host - start host,
6054 * request IRQ and register it. This helper takes necessasry
6055 * arguments and performs the three steps in one go.
6056 *
3d46b2e2
PM
6057 * An invalid IRQ skips the IRQ registration and expects the host to
6058 * have set polling mode on the port. In this case, @irq_handler
6059 * should be NULL.
6060 *
f5cda257
TH
6061 * LOCKING:
6062 * Inherited from calling layer (may sleep).
6063 *
6064 * RETURNS:
6065 * 0 on success, -errno otherwise.
6066 */
6067int ata_host_activate(struct ata_host *host, int irq,
6068 irq_handler_t irq_handler, unsigned long irq_flags,
6069 struct scsi_host_template *sht)
6070{
cbcdd875 6071 int i, rc;
f5cda257
TH
6072
6073 rc = ata_host_start(host);
6074 if (rc)
6075 return rc;
6076
3d46b2e2
PM
6077 /* Special case for polling mode */
6078 if (!irq) {
6079 WARN_ON(irq_handler);
6080 return ata_host_register(host, sht);
6081 }
6082
f5cda257
TH
6083 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
6084 dev_driver_string(host->dev), host);
6085 if (rc)
6086 return rc;
6087
cbcdd875
TH
6088 for (i = 0; i < host->n_ports; i++)
6089 ata_port_desc(host->ports[i], "irq %d", irq);
4031826b 6090
f5cda257
TH
6091 rc = ata_host_register(host, sht);
6092 /* if failed, just free the IRQ and leave ports alone */
6093 if (rc)
6094 devm_free_irq(host->dev, irq, host);
6095
6096 return rc;
6097}
6098
720ba126
TH
6099/**
6100 * ata_port_detach - Detach ATA port in prepration of device removal
6101 * @ap: ATA port to be detached
6102 *
6103 * Detach all ATA devices and the associated SCSI devices of @ap;
6104 * then, remove the associated SCSI host. @ap is guaranteed to
6105 * be quiescent on return from this function.
6106 *
6107 * LOCKING:
6108 * Kernel thread context (may sleep).
6109 */
741b7763 6110static void ata_port_detach(struct ata_port *ap)
720ba126
TH
6111{
6112 unsigned long flags;
720ba126
TH
6113
6114 if (!ap->ops->error_handler)
c3cf30a9 6115 goto skip_eh;
720ba126
TH
6116
6117 /* tell EH we're leaving & flush EH */
ba6a1308 6118 spin_lock_irqsave(ap->lock, flags);
b51e9e5d 6119 ap->pflags |= ATA_PFLAG_UNLOADING;
ece180d1 6120 ata_port_schedule_eh(ap);
ba6a1308 6121 spin_unlock_irqrestore(ap->lock, flags);
720ba126 6122
ece180d1 6123 /* wait till EH commits suicide */
720ba126
TH
6124 ata_port_wait_eh(ap);
6125
ece180d1
TH
6126 /* it better be dead now */
6127 WARN_ON(!(ap->pflags & ATA_PFLAG_UNLOADED));
720ba126 6128
afe2c511 6129 cancel_delayed_work_sync(&ap->hotplug_task);
720ba126 6130
c3cf30a9 6131 skip_eh:
d9027470
GG
6132 if (ap->pmp_link) {
6133 int i;
6134 for (i = 0; i < SATA_PMP_MAX_PORTS; i++)
6135 ata_tlink_delete(&ap->pmp_link[i]);
6136 }
6137 ata_tport_delete(ap);
6138
720ba126 6139 /* remove the associated SCSI host */
cca3974e 6140 scsi_remove_host(ap->scsi_host);
720ba126
TH
6141}
6142
0529c159
TH
6143/**
6144 * ata_host_detach - Detach all ports of an ATA host
6145 * @host: Host to detach
6146 *
6147 * Detach all ports of @host.
6148 *
6149 * LOCKING:
6150 * Kernel thread context (may sleep).
6151 */
6152void ata_host_detach(struct ata_host *host)
6153{
6154 int i;
6155
6156 for (i = 0; i < host->n_ports; i++)
6157 ata_port_detach(host->ports[i]);
562f0c2d
TH
6158
6159 /* the host is dead now, dissociate ACPI */
6160 ata_acpi_dissociate(host);
0529c159
TH
6161}
6162
374b1873
JG
6163#ifdef CONFIG_PCI
6164
1da177e4
LT
6165/**
6166 * ata_pci_remove_one - PCI layer callback for device removal
6167 * @pdev: PCI device that was removed
6168 *
b878ca5d
TH
6169 * PCI layer indicates to libata via this hook that hot-unplug or
6170 * module unload event has occurred. Detach all ports. Resource
6171 * release is handled via devres.
1da177e4
LT
6172 *
6173 * LOCKING:
6174 * Inherited from PCI layer (may sleep).
6175 */
f0d36efd 6176void ata_pci_remove_one(struct pci_dev *pdev)
1da177e4 6177{
2855568b 6178 struct device *dev = &pdev->dev;
cca3974e 6179 struct ata_host *host = dev_get_drvdata(dev);
1da177e4 6180
b878ca5d 6181 ata_host_detach(host);
1da177e4
LT
6182}
6183
6184/* move to PCI subsystem */
057ace5e 6185int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT
6186{
6187 unsigned long tmp = 0;
6188
6189 switch (bits->width) {
6190 case 1: {
6191 u8 tmp8 = 0;
6192 pci_read_config_byte(pdev, bits->reg, &tmp8);
6193 tmp = tmp8;
6194 break;
6195 }
6196 case 2: {
6197 u16 tmp16 = 0;
6198 pci_read_config_word(pdev, bits->reg, &tmp16);
6199 tmp = tmp16;
6200 break;
6201 }
6202 case 4: {
6203 u32 tmp32 = 0;
6204 pci_read_config_dword(pdev, bits->reg, &tmp32);
6205 tmp = tmp32;
6206 break;
6207 }
6208
6209 default:
6210 return -EINVAL;
6211 }
6212
6213 tmp &= bits->mask;
6214
6215 return (tmp == bits->val) ? 1 : 0;
6216}
9b847548 6217
6ffa01d8 6218#ifdef CONFIG_PM
3c5100c1 6219void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
9b847548
JA
6220{
6221 pci_save_state(pdev);
4c90d971 6222 pci_disable_device(pdev);
500530f6 6223
3a2d5b70 6224 if (mesg.event & PM_EVENT_SLEEP)
500530f6 6225 pci_set_power_state(pdev, PCI_D3hot);
9b847548
JA
6226}
6227
553c4aa6 6228int ata_pci_device_do_resume(struct pci_dev *pdev)
9b847548 6229{
553c4aa6
TH
6230 int rc;
6231
9b847548
JA
6232 pci_set_power_state(pdev, PCI_D0);
6233 pci_restore_state(pdev);
553c4aa6 6234
b878ca5d 6235 rc = pcim_enable_device(pdev);
553c4aa6 6236 if (rc) {
a44fec1f
JP
6237 dev_err(&pdev->dev,
6238 "failed to enable device after resume (%d)\n", rc);
553c4aa6
TH
6239 return rc;
6240 }
6241
9b847548 6242 pci_set_master(pdev);
553c4aa6 6243 return 0;
500530f6
TH
6244}
6245
3c5100c1 6246int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
500530f6 6247{
cca3974e 6248 struct ata_host *host = dev_get_drvdata(&pdev->dev);
500530f6
TH
6249 int rc = 0;
6250
cca3974e 6251 rc = ata_host_suspend(host, mesg);
500530f6
TH
6252 if (rc)
6253 return rc;
6254
3c5100c1 6255 ata_pci_device_do_suspend(pdev, mesg);
500530f6
TH
6256
6257 return 0;
6258}
6259
6260int ata_pci_device_resume(struct pci_dev *pdev)
6261{
cca3974e 6262 struct ata_host *host = dev_get_drvdata(&pdev->dev);
553c4aa6 6263 int rc;
500530f6 6264
553c4aa6
TH
6265 rc = ata_pci_device_do_resume(pdev);
6266 if (rc == 0)
6267 ata_host_resume(host);
6268 return rc;
9b847548 6269}
6ffa01d8
TH
6270#endif /* CONFIG_PM */
6271
1da177e4
LT
6272#endif /* CONFIG_PCI */
6273
33267325
TH
6274static int __init ata_parse_force_one(char **cur,
6275 struct ata_force_ent *force_ent,
6276 const char **reason)
6277{
6278 /* FIXME: Currently, there's no way to tag init const data and
6279 * using __initdata causes build failure on some versions of
6280 * gcc. Once __initdataconst is implemented, add const to the
6281 * following structure.
6282 */
6283 static struct ata_force_param force_tbl[] __initdata = {
6284 { "40c", .cbl = ATA_CBL_PATA40 },
6285 { "80c", .cbl = ATA_CBL_PATA80 },
6286 { "short40c", .cbl = ATA_CBL_PATA40_SHORT },
6287 { "unk", .cbl = ATA_CBL_PATA_UNK },
6288 { "ign", .cbl = ATA_CBL_PATA_IGN },
6289 { "sata", .cbl = ATA_CBL_SATA },
6290 { "1.5Gbps", .spd_limit = 1 },
6291 { "3.0Gbps", .spd_limit = 2 },
6292 { "noncq", .horkage_on = ATA_HORKAGE_NONCQ },
6293 { "ncq", .horkage_off = ATA_HORKAGE_NONCQ },
43c9c591 6294 { "dump_id", .horkage_on = ATA_HORKAGE_DUMP_ID },
33267325
TH
6295 { "pio0", .xfer_mask = 1 << (ATA_SHIFT_PIO + 0) },
6296 { "pio1", .xfer_mask = 1 << (ATA_SHIFT_PIO + 1) },
6297 { "pio2", .xfer_mask = 1 << (ATA_SHIFT_PIO + 2) },
6298 { "pio3", .xfer_mask = 1 << (ATA_SHIFT_PIO + 3) },
6299 { "pio4", .xfer_mask = 1 << (ATA_SHIFT_PIO + 4) },
6300 { "pio5", .xfer_mask = 1 << (ATA_SHIFT_PIO + 5) },
6301 { "pio6", .xfer_mask = 1 << (ATA_SHIFT_PIO + 6) },
6302 { "mwdma0", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 0) },
6303 { "mwdma1", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 1) },
6304 { "mwdma2", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 2) },
6305 { "mwdma3", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 3) },
6306 { "mwdma4", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 4) },
6307 { "udma0", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6308 { "udma16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6309 { "udma/16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6310 { "udma1", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6311 { "udma25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6312 { "udma/25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6313 { "udma2", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6314 { "udma33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6315 { "udma/33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6316 { "udma3", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6317 { "udma44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6318 { "udma/44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6319 { "udma4", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6320 { "udma66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6321 { "udma/66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6322 { "udma5", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6323 { "udma100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6324 { "udma/100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6325 { "udma6", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6326 { "udma133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6327 { "udma/133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6328 { "udma7", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 7) },
05944bdf
TH
6329 { "nohrst", .lflags = ATA_LFLAG_NO_HRST },
6330 { "nosrst", .lflags = ATA_LFLAG_NO_SRST },
6331 { "norst", .lflags = ATA_LFLAG_NO_HRST | ATA_LFLAG_NO_SRST },
33267325
TH
6332 };
6333 char *start = *cur, *p = *cur;
6334 char *id, *val, *endp;
6335 const struct ata_force_param *match_fp = NULL;
6336 int nr_matches = 0, i;
6337
6338 /* find where this param ends and update *cur */
6339 while (*p != '\0' && *p != ',')
6340 p++;
6341
6342 if (*p == '\0')
6343 *cur = p;
6344 else
6345 *cur = p + 1;
6346
6347 *p = '\0';
6348
6349 /* parse */
6350 p = strchr(start, ':');
6351 if (!p) {
6352 val = strstrip(start);
6353 goto parse_val;
6354 }
6355 *p = '\0';
6356
6357 id = strstrip(start);
6358 val = strstrip(p + 1);
6359
6360 /* parse id */
6361 p = strchr(id, '.');
6362 if (p) {
6363 *p++ = '\0';
6364 force_ent->device = simple_strtoul(p, &endp, 10);
6365 if (p == endp || *endp != '\0') {
6366 *reason = "invalid device";
6367 return -EINVAL;
6368 }
6369 }
6370
6371 force_ent->port = simple_strtoul(id, &endp, 10);
6372 if (p == endp || *endp != '\0') {
6373 *reason = "invalid port/link";
6374 return -EINVAL;
6375 }
6376
6377 parse_val:
6378 /* parse val, allow shortcuts so that both 1.5 and 1.5Gbps work */
6379 for (i = 0; i < ARRAY_SIZE(force_tbl); i++) {
6380 const struct ata_force_param *fp = &force_tbl[i];
6381
6382 if (strncasecmp(val, fp->name, strlen(val)))
6383 continue;
6384
6385 nr_matches++;
6386 match_fp = fp;
6387
6388 if (strcasecmp(val, fp->name) == 0) {
6389 nr_matches = 1;
6390 break;
6391 }
6392 }
6393
6394 if (!nr_matches) {
6395 *reason = "unknown value";
6396 return -EINVAL;
6397 }
6398 if (nr_matches > 1) {
6399 *reason = "ambigious value";
6400 return -EINVAL;
6401 }
6402
6403 force_ent->param = *match_fp;
6404
6405 return 0;
6406}
6407
6408static void __init ata_parse_force_param(void)
6409{
6410 int idx = 0, size = 1;
6411 int last_port = -1, last_device = -1;
6412 char *p, *cur, *next;
6413
6414 /* calculate maximum number of params and allocate force_tbl */
6415 for (p = ata_force_param_buf; *p; p++)
6416 if (*p == ',')
6417 size++;
6418
6419 ata_force_tbl = kzalloc(sizeof(ata_force_tbl[0]) * size, GFP_KERNEL);
6420 if (!ata_force_tbl) {
6421 printk(KERN_WARNING "ata: failed to extend force table, "
6422 "libata.force ignored\n");
6423 return;
6424 }
6425
6426 /* parse and populate the table */
6427 for (cur = ata_force_param_buf; *cur != '\0'; cur = next) {
6428 const char *reason = "";
6429 struct ata_force_ent te = { .port = -1, .device = -1 };
6430
6431 next = cur;
6432 if (ata_parse_force_one(&next, &te, &reason)) {
6433 printk(KERN_WARNING "ata: failed to parse force "
6434 "parameter \"%s\" (%s)\n",
6435 cur, reason);
6436 continue;
6437 }
6438
6439 if (te.port == -1) {
6440 te.port = last_port;
6441 te.device = last_device;
6442 }
6443
6444 ata_force_tbl[idx++] = te;
6445
6446 last_port = te.port;
6447 last_device = te.device;
6448 }
6449
6450 ata_force_tbl_size = idx;
6451}
1da177e4 6452
1da177e4
LT
6453static int __init ata_init(void)
6454{
d9027470 6455 int rc;
270390e1 6456
33267325
TH
6457 ata_parse_force_param();
6458
270390e1 6459 rc = ata_sff_init();
ad72cf98
TH
6460 if (rc) {
6461 kfree(ata_force_tbl);
6462 return rc;
6463 }
453b07ac 6464
d9027470
GG
6465 libata_transport_init();
6466 ata_scsi_transport_template = ata_attach_transport();
6467 if (!ata_scsi_transport_template) {
6468 ata_sff_exit();
6469 rc = -ENOMEM;
6470 goto err_out;
4fca377f 6471 }
d9027470 6472
1da177e4
LT
6473 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6474 return 0;
d9027470
GG
6475
6476err_out:
6477 return rc;
1da177e4
LT
6478}
6479
6480static void __exit ata_exit(void)
6481{
d9027470
GG
6482 ata_release_transport(ata_scsi_transport_template);
6483 libata_transport_exit();
270390e1 6484 ata_sff_exit();
33267325 6485 kfree(ata_force_tbl);
1da177e4
LT
6486}
6487
a4625085 6488subsys_initcall(ata_init);
1da177e4
LT
6489module_exit(ata_exit);
6490
9990b6f3 6491static DEFINE_RATELIMIT_STATE(ratelimit, HZ / 5, 1);
67846b30
JG
6492
6493int ata_ratelimit(void)
6494{
9990b6f3 6495 return __ratelimit(&ratelimit);
67846b30
JG
6496}
6497
c0c362b6
TH
6498/**
6499 * ata_msleep - ATA EH owner aware msleep
6500 * @ap: ATA port to attribute the sleep to
6501 * @msecs: duration to sleep in milliseconds
6502 *
6503 * Sleeps @msecs. If the current task is owner of @ap's EH, the
6504 * ownership is released before going to sleep and reacquired
6505 * after the sleep is complete. IOW, other ports sharing the
6506 * @ap->host will be allowed to own the EH while this task is
6507 * sleeping.
6508 *
6509 * LOCKING:
6510 * Might sleep.
6511 */
97750ceb
TH
6512void ata_msleep(struct ata_port *ap, unsigned int msecs)
6513{
c0c362b6
TH
6514 bool owns_eh = ap && ap->host->eh_owner == current;
6515
6516 if (owns_eh)
6517 ata_eh_release(ap);
6518
97750ceb 6519 msleep(msecs);
c0c362b6
TH
6520
6521 if (owns_eh)
6522 ata_eh_acquire(ap);
97750ceb
TH
6523}
6524
c22daff4
TH
6525/**
6526 * ata_wait_register - wait until register value changes
97750ceb 6527 * @ap: ATA port to wait register for, can be NULL
c22daff4
TH
6528 * @reg: IO-mapped register
6529 * @mask: Mask to apply to read register value
6530 * @val: Wait condition
341c2c95
TH
6531 * @interval: polling interval in milliseconds
6532 * @timeout: timeout in milliseconds
c22daff4
TH
6533 *
6534 * Waiting for some bits of register to change is a common
6535 * operation for ATA controllers. This function reads 32bit LE
6536 * IO-mapped register @reg and tests for the following condition.
6537 *
6538 * (*@reg & mask) != val
6539 *
6540 * If the condition is met, it returns; otherwise, the process is
6541 * repeated after @interval_msec until timeout.
6542 *
6543 * LOCKING:
6544 * Kernel thread context (may sleep)
6545 *
6546 * RETURNS:
6547 * The final register value.
6548 */
97750ceb 6549u32 ata_wait_register(struct ata_port *ap, void __iomem *reg, u32 mask, u32 val,
341c2c95 6550 unsigned long interval, unsigned long timeout)
c22daff4 6551{
341c2c95 6552 unsigned long deadline;
c22daff4
TH
6553 u32 tmp;
6554
6555 tmp = ioread32(reg);
6556
6557 /* Calculate timeout _after_ the first read to make sure
6558 * preceding writes reach the controller before starting to
6559 * eat away the timeout.
6560 */
341c2c95 6561 deadline = ata_deadline(jiffies, timeout);
c22daff4 6562
341c2c95 6563 while ((tmp & mask) == val && time_before(jiffies, deadline)) {
97750ceb 6564 ata_msleep(ap, interval);
c22daff4
TH
6565 tmp = ioread32(reg);
6566 }
6567
6568 return tmp;
6569}
6570
dd5b06c4
TH
6571/*
6572 * Dummy port_ops
6573 */
182d7bba 6574static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
dd5b06c4 6575{
182d7bba 6576 return AC_ERR_SYSTEM;
dd5b06c4
TH
6577}
6578
182d7bba 6579static void ata_dummy_error_handler(struct ata_port *ap)
dd5b06c4 6580{
182d7bba 6581 /* truly dummy */
dd5b06c4
TH
6582}
6583
029cfd6b 6584struct ata_port_operations ata_dummy_port_ops = {
dd5b06c4
TH
6585 .qc_prep = ata_noop_qc_prep,
6586 .qc_issue = ata_dummy_qc_issue,
182d7bba 6587 .error_handler = ata_dummy_error_handler,
dd5b06c4
TH
6588};
6589
21b0ad4f
TH
6590const struct ata_port_info ata_dummy_port_info = {
6591 .port_ops = &ata_dummy_port_ops,
6592};
6593
a9a79dfe
JP
6594/*
6595 * Utility print functions
6596 */
6597int ata_port_printk(const struct ata_port *ap, const char *level,
6598 const char *fmt, ...)
6599{
6600 struct va_format vaf;
6601 va_list args;
6602 int r;
6603
6604 va_start(args, fmt);
6605
6606 vaf.fmt = fmt;
6607 vaf.va = &args;
6608
6609 r = printk("%sata%u: %pV", level, ap->print_id, &vaf);
6610
6611 va_end(args);
6612
6613 return r;
6614}
6615EXPORT_SYMBOL(ata_port_printk);
6616
6617int ata_link_printk(const struct ata_link *link, const char *level,
6618 const char *fmt, ...)
6619{
6620 struct va_format vaf;
6621 va_list args;
6622 int r;
6623
6624 va_start(args, fmt);
6625
6626 vaf.fmt = fmt;
6627 vaf.va = &args;
6628
6629 if (sata_pmp_attached(link->ap) || link->ap->slave_link)
6630 r = printk("%sata%u.%02u: %pV",
6631 level, link->ap->print_id, link->pmp, &vaf);
6632 else
6633 r = printk("%sata%u: %pV",
6634 level, link->ap->print_id, &vaf);
6635
6636 va_end(args);
6637
6638 return r;
6639}
6640EXPORT_SYMBOL(ata_link_printk);
6641
6642int ata_dev_printk(const struct ata_device *dev, const char *level,
6643 const char *fmt, ...)
6644{
6645 struct va_format vaf;
6646 va_list args;
6647 int r;
6648
6649 va_start(args, fmt);
6650
6651 vaf.fmt = fmt;
6652 vaf.va = &args;
6653
6654 r = printk("%sata%u.%02u: %pV",
6655 level, dev->link->ap->print_id, dev->link->pmp + dev->devno,
6656 &vaf);
6657
6658 va_end(args);
6659
6660 return r;
6661}
6662EXPORT_SYMBOL(ata_dev_printk);
6663
06296a1e
JP
6664void ata_print_version(const struct device *dev, const char *version)
6665{
6666 dev_printk(KERN_DEBUG, dev, "version %s\n", version);
6667}
6668EXPORT_SYMBOL(ata_print_version);
6669
1da177e4
LT
6670/*
6671 * libata is essentially a library of internal helper functions for
6672 * low-level ATA host controller drivers. As such, the API/ABI is
6673 * likely to change as new drivers are added and updated.
6674 * Do not depend on ABI/API stability.
6675 */
e9c83914
TH
6676EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
6677EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
6678EXPORT_SYMBOL_GPL(sata_deb_timing_long);
029cfd6b
TH
6679EXPORT_SYMBOL_GPL(ata_base_port_ops);
6680EXPORT_SYMBOL_GPL(sata_port_ops);
dd5b06c4 6681EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
21b0ad4f 6682EXPORT_SYMBOL_GPL(ata_dummy_port_info);
1eca4365
TH
6683EXPORT_SYMBOL_GPL(ata_link_next);
6684EXPORT_SYMBOL_GPL(ata_dev_next);
1da177e4 6685EXPORT_SYMBOL_GPL(ata_std_bios_param);
d8d9129e 6686EXPORT_SYMBOL_GPL(ata_scsi_unlock_native_capacity);
cca3974e 6687EXPORT_SYMBOL_GPL(ata_host_init);
f3187195 6688EXPORT_SYMBOL_GPL(ata_host_alloc);
f5cda257 6689EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
b1c72916 6690EXPORT_SYMBOL_GPL(ata_slave_link_init);
ecef7253 6691EXPORT_SYMBOL_GPL(ata_host_start);
f3187195 6692EXPORT_SYMBOL_GPL(ata_host_register);
f5cda257 6693EXPORT_SYMBOL_GPL(ata_host_activate);
0529c159 6694EXPORT_SYMBOL_GPL(ata_host_detach);
1da177e4 6695EXPORT_SYMBOL_GPL(ata_sg_init);
f686bcb8 6696EXPORT_SYMBOL_GPL(ata_qc_complete);
dedaf2b0 6697EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
436d34b3 6698EXPORT_SYMBOL_GPL(atapi_cmd_type);
1da177e4
LT
6699EXPORT_SYMBOL_GPL(ata_tf_to_fis);
6700EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6357357c
TH
6701EXPORT_SYMBOL_GPL(ata_pack_xfermask);
6702EXPORT_SYMBOL_GPL(ata_unpack_xfermask);
6703EXPORT_SYMBOL_GPL(ata_xfer_mask2mode);
6704EXPORT_SYMBOL_GPL(ata_xfer_mode2mask);
6705EXPORT_SYMBOL_GPL(ata_xfer_mode2shift);
6706EXPORT_SYMBOL_GPL(ata_mode_string);
6707EXPORT_SYMBOL_GPL(ata_id_xfermask);
04351821 6708EXPORT_SYMBOL_GPL(ata_do_set_mode);
31cc23b3 6709EXPORT_SYMBOL_GPL(ata_std_qc_defer);
e46834cd 6710EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
10305f0f 6711EXPORT_SYMBOL_GPL(ata_dev_disable);
3c567b7d 6712EXPORT_SYMBOL_GPL(sata_set_spd);
aa2731ad 6713EXPORT_SYMBOL_GPL(ata_wait_after_reset);
936fd732
TH
6714EXPORT_SYMBOL_GPL(sata_link_debounce);
6715EXPORT_SYMBOL_GPL(sata_link_resume);
1152b261 6716EXPORT_SYMBOL_GPL(sata_link_scr_lpm);
0aa1113d 6717EXPORT_SYMBOL_GPL(ata_std_prereset);
cc0680a5 6718EXPORT_SYMBOL_GPL(sata_link_hardreset);
57c9efdf 6719EXPORT_SYMBOL_GPL(sata_std_hardreset);
203c75b8 6720EXPORT_SYMBOL_GPL(ata_std_postreset);
2e9edbf8
JG
6721EXPORT_SYMBOL_GPL(ata_dev_classify);
6722EXPORT_SYMBOL_GPL(ata_dev_pair);
67846b30 6723EXPORT_SYMBOL_GPL(ata_ratelimit);
97750ceb 6724EXPORT_SYMBOL_GPL(ata_msleep);
c22daff4 6725EXPORT_SYMBOL_GPL(ata_wait_register);
1da177e4 6726EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4 6727EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
83c47bcb 6728EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
a6e6ce8e 6729EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
f6e67035 6730EXPORT_SYMBOL_GPL(__ata_change_queue_depth);
34bf2170
TH
6731EXPORT_SYMBOL_GPL(sata_scr_valid);
6732EXPORT_SYMBOL_GPL(sata_scr_read);
6733EXPORT_SYMBOL_GPL(sata_scr_write);
6734EXPORT_SYMBOL_GPL(sata_scr_write_flush);
936fd732
TH
6735EXPORT_SYMBOL_GPL(ata_link_online);
6736EXPORT_SYMBOL_GPL(ata_link_offline);
6ffa01d8 6737#ifdef CONFIG_PM
cca3974e
JG
6738EXPORT_SYMBOL_GPL(ata_host_suspend);
6739EXPORT_SYMBOL_GPL(ata_host_resume);
6ffa01d8 6740#endif /* CONFIG_PM */
6a62a04d
TH
6741EXPORT_SYMBOL_GPL(ata_id_string);
6742EXPORT_SYMBOL_GPL(ata_id_c_string);
963e4975 6743EXPORT_SYMBOL_GPL(ata_do_dev_read_id);
1da177e4
LT
6744EXPORT_SYMBOL_GPL(ata_scsi_simulate);
6745
1bc4ccff 6746EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6357357c 6747EXPORT_SYMBOL_GPL(ata_timing_find_mode);
452503f9
AC
6748EXPORT_SYMBOL_GPL(ata_timing_compute);
6749EXPORT_SYMBOL_GPL(ata_timing_merge);
a0f79b92 6750EXPORT_SYMBOL_GPL(ata_timing_cycle2mode);
452503f9 6751
1da177e4
LT
6752#ifdef CONFIG_PCI
6753EXPORT_SYMBOL_GPL(pci_test_config_bits);
1da177e4 6754EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6ffa01d8 6755#ifdef CONFIG_PM
500530f6
TH
6756EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
6757EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
9b847548
JA
6758EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
6759EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6ffa01d8 6760#endif /* CONFIG_PM */
1da177e4 6761#endif /* CONFIG_PCI */
9b847548 6762
b64bbc39
TH
6763EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
6764EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
6765EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
cbcdd875
TH
6766EXPORT_SYMBOL_GPL(ata_port_desc);
6767#ifdef CONFIG_PCI
6768EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
6769#endif /* CONFIG_PCI */
7b70fc03 6770EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
dbd82616 6771EXPORT_SYMBOL_GPL(ata_link_abort);
7b70fc03 6772EXPORT_SYMBOL_GPL(ata_port_abort);
e3180499 6773EXPORT_SYMBOL_GPL(ata_port_freeze);
7d77b247 6774EXPORT_SYMBOL_GPL(sata_async_notification);
e3180499
TH
6775EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
6776EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
ece1d636
TH
6777EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
6778EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
10acf3b0 6779EXPORT_SYMBOL_GPL(ata_eh_analyze_ncq_error);
022bdb07 6780EXPORT_SYMBOL_GPL(ata_do_eh);
a1efdaba 6781EXPORT_SYMBOL_GPL(ata_std_error_handler);
be0d18df
AC
6782
6783EXPORT_SYMBOL_GPL(ata_cable_40wire);
6784EXPORT_SYMBOL_GPL(ata_cable_80wire);
6785EXPORT_SYMBOL_GPL(ata_cable_unknown);
c88f90c3 6786EXPORT_SYMBOL_GPL(ata_cable_ignore);
be0d18df 6787EXPORT_SYMBOL_GPL(ata_cable_sata);