[linux-2.6-block.git] / drivers / ata / ahci_platform.c

/*
 * AHCI SATA platform driver
 *
 * Copyright 2004-2005  Red Hat, Inc.
 *   Jeff Garzik <jgarzik@pobox.com>
 * Copyright 2010  MontaVista Software, LLC.
 *   Anton Vorontsov <avorontsov@ru.mvista.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2, or (at your option)
 * any later version.
 */

#include <linux/clk.h>
#include <linux/kernel.h>
#include <linux/gfp.h>
#include <linux/module.h>
#include <linux/pm.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/libata.h>
#include <linux/ahci_platform.h>
#include "ahci.h"

static void ahci_host_stop(struct ata_host *host);

enum ahci_type {
	AHCI,		/* standard platform ahci */
	IMX53_AHCI,	/* ahci on i.mx53 */
	STRICT_AHCI,	/* delayed DMA engine start */
};

static struct platform_device_id ahci_devtype[] = {
	{
		.name = "ahci",
		.driver_data = AHCI,
	}, {
		.name = "imx53-ahci",
		.driver_data = IMX53_AHCI,
	}, {
		.name = "strict-ahci",
		.driver_data = STRICT_AHCI,
	}, {
		/* sentinel */
	}
};
MODULE_DEVICE_TABLE(platform, ahci_devtype);

struct ata_port_operations ahci_platform_ops = {
	.inherits	= &ahci_ops,
	.host_stop	= ahci_host_stop,
};
EXPORT_SYMBOL_GPL(ahci_platform_ops);

static struct ata_port_operations ahci_platform_retry_srst_ops = {
	.inherits	= &ahci_pmp_retry_srst_ops,
	.host_stop	= ahci_host_stop,
};

static const struct ata_port_info ahci_port_info[] = {
	/* by features */
	[AHCI] = {
		.flags		= AHCI_FLAG_COMMON,
		.pio_mask	= ATA_PIO4,
		.udma_mask	= ATA_UDMA6,
		.port_ops	= &ahci_platform_ops,
	},
	[IMX53_AHCI] = {
		.flags		= AHCI_FLAG_COMMON,
		.pio_mask	= ATA_PIO4,
		.udma_mask	= ATA_UDMA6,
		.port_ops	= &ahci_platform_retry_srst_ops,
	},
	[STRICT_AHCI] = {
		AHCI_HFLAGS	(AHCI_HFLAG_DELAY_ENGINE),
		.flags		= AHCI_FLAG_COMMON,
		.pio_mask	= ATA_PIO4,
		.udma_mask	= ATA_UDMA6,
		.port_ops	= &ahci_platform_ops,
	},
};

static struct scsi_host_template ahci_platform_sht = {
	AHCI_SHT("ahci_platform"),
};

/**
 * ahci_platform_enable_clks - Enable platform clocks
 * @hpriv: host private area to store config values
 *
 * This function enables all the clks found in hpriv->clks, starting at
 * index 0. If any clk fails to enable it disables all the clks already
 * enabled in reverse order, and then returns an error.
 *
 * RETURNS:
 * 0 on success otherwise a negative error code
 */
int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
{
	int c, rc;

	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
		rc = clk_prepare_enable(hpriv->clks[c]);
		if (rc)
			goto disable_unprepare_clk;
	}
	return 0;

disable_unprepare_clk:
	while (--c >= 0)
		clk_disable_unprepare(hpriv->clks[c]);
	return rc;
}
EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);

/**
 * ahci_platform_disable_clks - Disable platform clocks
 * @hpriv: host private area to store config values
 *
 * This function disables all the clks found in hpriv->clks, in reverse
 * order of ahci_platform_enable_clks (starting at the end of the array).
 */
void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
{
	int c;

	for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
		if (hpriv->clks[c])
			clk_disable_unprepare(hpriv->clks[c]);
}
EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);

/**
 * ahci_platform_enable_resources - Enable platform resources
 * @hpriv: host private area to store config values
 *
 * This function enables all ahci_platform managed resources in the
 * following order:
 * 1) Regulator
 * 2) Clocks (through ahci_platform_enable_clks)
 *
 * If resource enabling fails at any point the previous enabled resources
 * are disabled in reverse order.
 *
 * RETURNS:
 * 0 on success otherwise a negative error code
 */
int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
{
	int rc;

	if (hpriv->target_pwr) {
		rc = regulator_enable(hpriv->target_pwr);
		if (rc)
			return rc;
	}

	rc = ahci_platform_enable_clks(hpriv);
	if (rc)
		goto disable_regulator;

	return 0;

disable_regulator:
	if (hpriv->target_pwr)
		regulator_disable(hpriv->target_pwr);
	return rc;
}
EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);

/**
 * ahci_platform_disable_resources - Disable platform resources
 * @hpriv: host private area to store config values
 *
 * This function disables all ahci_platform managed resources in the
 * following order:
 * 1) Clocks (through ahci_platform_disable_clks)
 * 2) Regulator
 */
void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
{
	ahci_platform_disable_clks(hpriv);

	if (hpriv->target_pwr)
		regulator_disable(hpriv->target_pwr);
}
EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);

static void ahci_put_clks(struct ahci_host_priv *hpriv)
{
	int c;

	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
		clk_put(hpriv->clks[c]);
}

static int ahci_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	const struct platform_device_id *id = platform_get_device_id(pdev);
	struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
	const struct ata_port_info *ppi[] = { &pi, NULL };
	struct ahci_host_priv *hpriv;
	struct ata_host *host;
	struct resource *mem;
	struct clk *clk;
	int irq;
	int n_ports;
	int i;
	int rc;

	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!mem) {
		dev_err(dev, "no mmio space\n");
		return -EINVAL;
	}

	irq = platform_get_irq(pdev, 0);
	if (irq <= 0) {
		dev_err(dev, "no irq\n");
		return -EINVAL;
	}

	if (pdata && pdata->ata_port_info)
		pi = *pdata->ata_port_info;

	hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
	if (!hpriv) {
		dev_err(dev, "can't alloc ahci_host_priv\n");
		return -ENOMEM;
	}

	hpriv->flags |= (unsigned long)pi.private_data;

	hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
	if (!hpriv->mmio) {
		dev_err(dev, "can't map %pR\n", mem);
		return -ENOMEM;
	}

	hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
	if (IS_ERR(hpriv->target_pwr)) {
		rc = PTR_ERR(hpriv->target_pwr);
		if (rc == -EPROBE_DEFER)
			return -EPROBE_DEFER;
		hpriv->target_pwr = NULL;
	}

	for (i = 0; i < AHCI_MAX_CLKS; i++) {
		/*
		 * For now we must use clk_get(dev, NULL) for the first clock,
		 * because some platforms (da850, spear13xx) are not yet
		 * converted to use devicetree for clocks.  For new platforms
		 * this is equivalent to of_clk_get(dev->of_node, 0).
		 */
		if (i == 0)
			clk = clk_get(dev, NULL);
		else
			clk = of_clk_get(dev->of_node, i);

		if (IS_ERR(clk)) {
			rc = PTR_ERR(clk);
			if (rc == -EPROBE_DEFER)
				goto free_clk;
			break;
		}
		hpriv->clks[i] = clk;
	}

	rc = ahci_platform_enable_resources(hpriv);
	if (rc)
		goto free_clk;

	/*
	 * Some platforms might need to prepare for mmio region access,
	 * which could be done in the following init call. So, the mmio
	 * region shouldn't be accessed before init (if provided) has
	 * returned successfully.
	 */
	if (pdata && pdata->init) {
		rc = pdata->init(dev, hpriv->mmio);
		if (rc)
			goto disable_resources;
	}

	ahci_save_initial_config(dev, hpriv,
		pdata ? pdata->force_port_map : 0,
		pdata ? pdata->mask_port_map  : 0);

	/* prepare host */
	if (hpriv->cap & HOST_CAP_NCQ)
		pi.flags |= ATA_FLAG_NCQ;

	if (hpriv->cap & HOST_CAP_PMP)
		pi.flags |= ATA_FLAG_PMP;

	ahci_set_em_messages(hpriv, &pi);

	/* CAP.NP sometimes indicate the index of the last enabled
	 * port, at other times, that of the last possible port, so
	 * determining the maximum port number requires looking at
	 * both CAP.NP and port_map.
	 */
	n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));

	host = ata_host_alloc_pinfo(dev, ppi, n_ports);
	if (!host) {
		rc = -ENOMEM;
		goto pdata_exit;
	}

	host->private_data = hpriv;

	if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
		host->flags |= ATA_HOST_PARALLEL_SCAN;
	else
		dev_info(dev, "SSS flag set, parallel bus scan disabled\n");

	if (pi.flags & ATA_FLAG_EM)
		ahci_reset_em(host);

	for (i = 0; i < host->n_ports; i++) {
		struct ata_port *ap = host->ports[i];

		ata_port_desc(ap, "mmio %pR", mem);
		ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);

		/* set enclosure management message type */
		if (ap->flags & ATA_FLAG_EM)
			ap->em_message_type = hpriv->em_msg_type;

		/* disabled/not-implemented port */
		if (!(hpriv->port_map & (1 << i)))
			ap->ops = &ata_dummy_port_ops;
	}

	rc = ahci_reset_controller(host);
	if (rc)
		goto pdata_exit;

	ahci_init_controller(host);
	ahci_print_info(host, "platform");

	rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
			       &ahci_platform_sht);
	if (rc)
		goto pdata_exit;

	return 0;
pdata_exit:
	if (pdata && pdata->exit)
		pdata->exit(dev);
disable_resources:
	ahci_platform_disable_resources(hpriv);
free_clk:
	ahci_put_clks(hpriv);
	return rc;
}

static void ahci_host_stop(struct ata_host *host)
{
	struct device *dev = host->dev;
	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	struct ahci_host_priv *hpriv = host->private_data;

	if (pdata && pdata->exit)
		pdata->exit(dev);

	ahci_platform_disable_resources(hpriv);
	ahci_put_clks(hpriv);
}

#ifdef CONFIG_PM_SLEEP
static int ahci_suspend(struct device *dev)
{
	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	struct ata_host *host = dev_get_drvdata(dev);
	struct ahci_host_priv *hpriv = host->private_data;
	void __iomem *mmio = hpriv->mmio;
	u32 ctl;
	int rc;

	if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
		dev_err(dev, "firmware update required for suspend/resume\n");
		return -EIO;
	}

	/*
	 * AHCI spec rev1.1 section 8.3.3:
	 * Software must disable interrupts prior to requesting a
	 * transition of the HBA to D3 state.
	 */
	ctl = readl(mmio + HOST_CTL);
	ctl &= ~HOST_IRQ_EN;
	writel(ctl, mmio + HOST_CTL);
	readl(mmio + HOST_CTL); /* flush */

	rc = ata_host_suspend(host, PMSG_SUSPEND);
	if (rc)
		return rc;

	if (pdata && pdata->suspend)
		return pdata->suspend(dev);

	ahci_platform_disable_resources(hpriv);

	return 0;
}

static int ahci_resume(struct device *dev)
{
	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	struct ata_host *host = dev_get_drvdata(dev);
	struct ahci_host_priv *hpriv = host->private_data;
	int rc;

	rc = ahci_platform_enable_resources(hpriv);
	if (rc)
		return rc;

	if (pdata && pdata->resume) {
		rc = pdata->resume(dev);
		if (rc)
			goto disable_resources;
	}

	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
		rc = ahci_reset_controller(host);
		if (rc)
			goto disable_resources;

		ahci_init_controller(host);
	}

	ata_host_resume(host);

	return 0;

disable_resources:
	ahci_platform_disable_resources(hpriv);

	return rc;
}
#endif

static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);

static const struct of_device_id ahci_of_match[] = {
	{ .compatible = "snps,spear-ahci", },
	{ .compatible = "snps,exynos5440-ahci", },
	{ .compatible = "ibm,476gtr-ahci", },
	{},
};
MODULE_DEVICE_TABLE(of, ahci_of_match);

static struct platform_driver ahci_driver = {
	.probe = ahci_probe,
	.remove = ata_platform_remove_one,
	.driver = {
		.name = "ahci",
		.owner = THIS_MODULE,
		.of_match_table = ahci_of_match,
		.pm = &ahci_pm_ops,
	},
	.id_table	= ahci_devtype,
};
module_platform_driver(ahci_driver);

MODULE_DESCRIPTION("AHCI SATA platform driver");
MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:ahci");
Commit	Line	Data
1c2a49f6 AV	1	/*
	2	* AHCI SATA platform driver
	3	*
	4	* Copyright 2004-2005 Red Hat, Inc.
	5	* Jeff Garzik <jgarzik@pobox.com>
	6	* Copyright 2010 MontaVista Software, LLC.
	7	* Anton Vorontsov <avorontsov@ru.mvista.com>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2, or (at your option)
	12	* any later version.
	13	*/
	14
f1e70c2c	15	#include <linux/clk.h>
1c2a49f6	16	#include <linux/kernel.h>
fbaf666b	17	#include <linux/gfp.h>
1c2a49f6	18	#include <linux/module.h>
18c25ff4	19	#include <linux/pm.h>
1c2a49f6 AV	20	#include <linux/interrupt.h>
	21	#include <linux/device.h>
	22	#include <linux/platform_device.h>
	23	#include <linux/libata.h>
	24	#include <linux/ahci_platform.h>
	25	#include "ahci.h"
	26
1896b15e BN	27	static void ahci_host_stop(struct ata_host *host);
1896b15e BN	28
904c04fe RZ	29	enum ahci_type {
	30	AHCI, /* standard platform ahci */
	31	IMX53_AHCI, /* ahci on i.mx53 */
d408e2b1	32	STRICT_AHCI, /* delayed DMA engine start */
904c04fe RZ	33	};
	34
	35	static struct platform_device_id ahci_devtype[] = {
	36	{
	37	.name = "ahci",
	38	.driver_data = AHCI,
	39	}, {
	40	.name = "imx53-ahci",
	41	.driver_data = IMX53_AHCI,
d408e2b1 BN	42	}, {
	43	.name = "strict-ahci",
	44	.driver_data = STRICT_AHCI,
904c04fe RZ	45	}, {
	46	/* sentinel */
	47	}
	48	};
	49	MODULE_DEVICE_TABLE(platform, ahci_devtype);
	50
8b789d89	51	struct ata_port_operations ahci_platform_ops = {
1896b15e BN	52	.inherits = &ahci_ops,
	53	.host_stop = ahci_host_stop,
	54	};
8b789d89	55	EXPORT_SYMBOL_GPL(ahci_platform_ops);
1896b15e	56
071d3ad3	57	static struct ata_port_operations ahci_platform_retry_srst_ops = {
1896b15e BN	58	.inherits = &ahci_pmp_retry_srst_ops,
	59	.host_stop = ahci_host_stop,
	60	};
904c04fe RZ	61
	62	static const struct ata_port_info ahci_port_info[] = {
	63	/* by features */
	64	[AHCI] = {
	65	.flags = AHCI_FLAG_COMMON,
	66	.pio_mask = ATA_PIO4,
	67	.udma_mask = ATA_UDMA6,
1896b15e	68	.port_ops = &ahci_platform_ops,
904c04fe RZ	69	},
	70	[IMX53_AHCI] = {
	71	.flags = AHCI_FLAG_COMMON,
	72	.pio_mask = ATA_PIO4,
	73	.udma_mask = ATA_UDMA6,
1896b15e	74	.port_ops = &ahci_platform_retry_srst_ops,
904c04fe	75	},
d408e2b1 BN	76	[STRICT_AHCI] = {
	77	AHCI_HFLAGS (AHCI_HFLAG_DELAY_ENGINE),
	78	.flags = AHCI_FLAG_COMMON,
	79	.pio_mask = ATA_PIO4,
	80	.udma_mask = ATA_UDMA6,
1896b15e	81	.port_ops = &ahci_platform_ops,
d408e2b1	82	},
904c04fe RZ	83	};
904c04fe RZ	84
fad16e7a TH	85	static struct scsi_host_template ahci_platform_sht = {
	86	AHCI_SHT("ahci_platform"),
	87	};
	88
156c5887 HG	89	/**
	90	* ahci_platform_enable_clks - Enable platform clocks
	91	* @hpriv: host private area to store config values
	92	*
	93	* This function enables all the clks found in hpriv->clks, starting at
	94	* index 0. If any clk fails to enable it disables all the clks already
	95	* enabled in reverse order, and then returns an error.
	96	*
	97	* RETURNS:
	98	* 0 on success otherwise a negative error code
	99	*/
	100	int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
	101	{
	102	int c, rc;
	103
	104	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
	105	rc = clk_prepare_enable(hpriv->clks[c]);
	106	if (rc)
	107	goto disable_unprepare_clk;
	108	}
	109	return 0;
	110
	111	disable_unprepare_clk:
	112	while (--c >= 0)
	113	clk_disable_unprepare(hpriv->clks[c]);
	114	return rc;
	115	}
	116	EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
	117
	118	/**
	119	* ahci_platform_disable_clks - Disable platform clocks
	120	* @hpriv: host private area to store config values
	121	*
	122	* This function disables all the clks found in hpriv->clks, in reverse
	123	* order of ahci_platform_enable_clks (starting at the end of the array).
	124	*/
	125	void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
	126	{
	127	int c;
	128
	129	for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
	130	if (hpriv->clks[c])
	131	clk_disable_unprepare(hpriv->clks[c]);
	132	}
	133	EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
	134
96a01ba5 HG	135	/**
	136	* ahci_platform_enable_resources - Enable platform resources
	137	* @hpriv: host private area to store config values
	138	*
	139	* This function enables all ahci_platform managed resources in the
	140	* following order:
	141	* 1) Regulator
	142	* 2) Clocks (through ahci_platform_enable_clks)
	143	*
	144	* If resource enabling fails at any point the previous enabled resources
	145	* are disabled in reverse order.
	146	*
	147	* RETURNS:
	148	* 0 on success otherwise a negative error code
	149	*/
	150	int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
	151	{
	152	int rc;
	153
	154	if (hpriv->target_pwr) {
	155	rc = regulator_enable(hpriv->target_pwr);
	156	if (rc)
	157	return rc;
	158	}
	159
	160	rc = ahci_platform_enable_clks(hpriv);
	161	if (rc)
	162	goto disable_regulator;
	163
	164	return 0;
	165
	166	disable_regulator:
	167	if (hpriv->target_pwr)
	168	regulator_disable(hpriv->target_pwr);
	169	return rc;
	170	}
	171	EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
	172
	173	/**
	174	* ahci_platform_disable_resources - Disable platform resources
	175	* @hpriv: host private area to store config values
	176	*
	177	* This function disables all ahci_platform managed resources in the
	178	* following order:
	179	* 1) Clocks (through ahci_platform_disable_clks)
	180	* 2) Regulator
	181	*/
	182	void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
	183	{
	184	ahci_platform_disable_clks(hpriv);
	185
	186	if (hpriv->target_pwr)
	187	regulator_disable(hpriv->target_pwr);
	188	}
	189	EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
	190
156c5887 HG	191	static void ahci_put_clks(struct ahci_host_priv *hpriv)
	192	{
	193	int c;
	194
	195	for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
	196	clk_put(hpriv->clks[c]);
	197	}
	198
0ec24914	199	static int ahci_probe(struct platform_device *pdev)
1c2a49f6 AV	200	{
1c2a49f6 AV	201	struct device *dev = &pdev->dev;
00345614	202	struct ahci_platform_data *pdata = dev_get_platdata(dev);
904c04fe	203	const struct platform_device_id *id = platform_get_device_id(pdev);
ff956135	204	struct ata_port_info pi = ahci_port_info[id ? id->driver_data : 0];
1c2a49f6 AV	205	const struct ata_port_info *ppi[] = { &pi, NULL };
	206	struct ahci_host_priv *hpriv;
	207	struct ata_host *host;
	208	struct resource *mem;
156c5887	209	struct clk *clk;
1c2a49f6 AV	210	int irq;
	211	int n_ports;
	212	int i;
	213	int rc;
	214
	215	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	216	if (!mem) {
	217	dev_err(dev, "no mmio space\n");
	218	return -EINVAL;
	219	}
	220
	221	irq = platform_get_irq(pdev, 0);
	222	if (irq <= 0) {
	223	dev_err(dev, "no irq\n");
	224	return -EINVAL;
	225	}
	226
1c2a49f6 AV	227	if (pdata && pdata->ata_port_info)
	228	pi = *pdata->ata_port_info;
	229
	230	hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
	231	if (!hpriv) {
08354809 JB	232	dev_err(dev, "can't alloc ahci_host_priv\n");
08354809 JB	233	return -ENOMEM;
1c2a49f6 AV	234	}
	235
	236	hpriv->flags \|= (unsigned long)pi.private_data;
	237
	238	hpriv->mmio = devm_ioremap(dev, mem->start, resource_size(mem));
	239	if (!hpriv->mmio) {
	240	dev_err(dev, "can't map %pR\n", mem);
08354809 JB	241	return -ENOMEM;
	242	}
	243
4b3e603a HG	244	hpriv->target_pwr = devm_regulator_get_optional(dev, "target");
	245	if (IS_ERR(hpriv->target_pwr)) {
	246	rc = PTR_ERR(hpriv->target_pwr);
	247	if (rc == -EPROBE_DEFER)
	248	return -EPROBE_DEFER;
	249	hpriv->target_pwr = NULL;
	250	}
	251
156c5887 HG	252	for (i = 0; i < AHCI_MAX_CLKS; i++) {
	253	/*
	254	* For now we must use clk_get(dev, NULL) for the first clock,
	255	* because some platforms (da850, spear13xx) are not yet
	256	* converted to use devicetree for clocks. For new platforms
	257	* this is equivalent to of_clk_get(dev->of_node, 0).
	258	*/
	259	if (i == 0)
	260	clk = clk_get(dev, NULL);
	261	else
	262	clk = of_clk_get(dev->of_node, i);
	263
	264	if (IS_ERR(clk)) {
	265	rc = PTR_ERR(clk);
	266	if (rc == -EPROBE_DEFER)
	267	goto free_clk;
	268	break;
f1e70c2c	269	}
156c5887	270	hpriv->clks[i] = clk;
f1e70c2c VK	271	}
f1e70c2c VK	272
96a01ba5	273	rc = ahci_platform_enable_resources(hpriv);
156c5887	274	if (rc)
96a01ba5	275	goto free_clk;
156c5887	276
08354809 JB	277	/*
	278	* Some platforms might need to prepare for mmio region access,
	279	* which could be done in the following init call. So, the mmio
	280	* region shouldn't be accessed before init (if provided) has
	281	* returned successfully.
	282	*/
	283	if (pdata && pdata->init) {
	284	rc = pdata->init(dev, hpriv->mmio);
	285	if (rc)
96a01ba5	286	goto disable_resources;
1c2a49f6 AV	287	}
	288
	289	ahci_save_initial_config(dev, hpriv,
	290	pdata ? pdata->force_port_map : 0,
	291	pdata ? pdata->mask_port_map : 0);
	292
	293	/* prepare host */
	294	if (hpriv->cap & HOST_CAP_NCQ)
	295	pi.flags \|= ATA_FLAG_NCQ;
	296
	297	if (hpriv->cap & HOST_CAP_PMP)
	298	pi.flags \|= ATA_FLAG_PMP;
	299
	300	ahci_set_em_messages(hpriv, &pi);
	301
	302	/* CAP.NP sometimes indicate the index of the last enabled
	303	* port, at other times, that of the last possible port, so
	304	* determining the maximum port number requires looking at
	305	* both CAP.NP and port_map.
	306	*/
	307	n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
	308
	309	host = ata_host_alloc_pinfo(dev, ppi, n_ports);
	310	if (!host) {
	311	rc = -ENOMEM;
f1e70c2c	312	goto pdata_exit;
1c2a49f6 AV	313	}
	314
	315	host->private_data = hpriv;
	316
	317	if (!(hpriv->cap & HOST_CAP_SSS) \|\| ahci_ignore_sss)
	318	host->flags \|= ATA_HOST_PARALLEL_SCAN;
	319	else
0fed4c09	320	dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
1c2a49f6 AV	321
	322	if (pi.flags & ATA_FLAG_EM)
	323	ahci_reset_em(host);
	324
	325	for (i = 0; i < host->n_ports; i++) {
	326	struct ata_port *ap = host->ports[i];
	327
	328	ata_port_desc(ap, "mmio %pR", mem);
	329	ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
	330
1c2a49f6 AV	331	/* set enclosure management message type */
1c2a49f6 AV	332	if (ap->flags & ATA_FLAG_EM)
55787183	333	ap->em_message_type = hpriv->em_msg_type;
1c2a49f6 AV	334
	335	/* disabled/not-implemented port */
	336	if (!(hpriv->port_map & (1 << i)))
	337	ap->ops = &ata_dummy_port_ops;
	338	}
	339
	340	rc = ahci_reset_controller(host);
	341	if (rc)
f1e70c2c	342	goto pdata_exit;
1c2a49f6 AV	343
	344	ahci_init_controller(host);
	345	ahci_print_info(host, "platform");
	346
	347	rc = ata_host_activate(host, irq, ahci_interrupt, IRQF_SHARED,
fad16e7a	348	&ahci_platform_sht);
1c2a49f6	349	if (rc)
f1e70c2c	350	goto pdata_exit;
1c2a49f6 AV	351
1c2a49f6 AV	352	return 0;
f1e70c2c	353	pdata_exit:
1c2a49f6 AV	354	if (pdata && pdata->exit)
1c2a49f6 AV	355	pdata->exit(dev);
96a01ba5 HG	356	disable_resources:
96a01ba5 HG	357	ahci_platform_disable_resources(hpriv);
f1e70c2c	358	free_clk:
156c5887	359	ahci_put_clks(hpriv);
1c2a49f6 AV	360	return rc;
	361	}
	362
1896b15e BN	363	static void ahci_host_stop(struct ata_host *host)
	364	{
	365	struct device *dev = host->dev;
	366	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	367	struct ahci_host_priv *hpriv = host->private_data;
	368
1c2a49f6 AV	369	if (pdata && pdata->exit)
	370	pdata->exit(dev);
	371
96a01ba5	372	ahci_platform_disable_resources(hpriv);
156c5887	373	ahci_put_clks(hpriv);
1c2a49f6 AV	374	}
1c2a49f6 AV	375
29448ec1	376	#ifdef CONFIG_PM_SLEEP
17ab594f BN	377	static int ahci_suspend(struct device *dev)
	378	{
	379	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	380	struct ata_host *host = dev_get_drvdata(dev);
	381	struct ahci_host_priv *hpriv = host->private_data;
	382	void __iomem *mmio = hpriv->mmio;
	383	u32 ctl;
	384	int rc;
	385
	386	if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
	387	dev_err(dev, "firmware update required for suspend/resume\n");
	388	return -EIO;
	389	}
	390
	391	/*
	392	* AHCI spec rev1.1 section 8.3.3:
	393	* Software must disable interrupts prior to requesting a
	394	* transition of the HBA to D3 state.
	395	*/
	396	ctl = readl(mmio + HOST_CTL);
	397	ctl &= ~HOST_IRQ_EN;
	398	writel(ctl, mmio + HOST_CTL);
	399	readl(mmio + HOST_CTL); /* flush */
	400
	401	rc = ata_host_suspend(host, PMSG_SUSPEND);
	402	if (rc)
	403	return rc;
	404
	405	if (pdata && pdata->suspend)
	406	return pdata->suspend(dev);
f1e70c2c	407
96a01ba5	408	ahci_platform_disable_resources(hpriv);
4b3e603a	409
17ab594f BN	410	return 0;
	411	}
	412
	413	static int ahci_resume(struct device *dev)
	414	{
	415	struct ahci_platform_data *pdata = dev_get_platdata(dev);
	416	struct ata_host *host = dev_get_drvdata(dev);
f1e70c2c	417	struct ahci_host_priv *hpriv = host->private_data;
17ab594f BN	418	int rc;
17ab594f BN	419
96a01ba5	420	rc = ahci_platform_enable_resources(hpriv);
156c5887	421	if (rc)
96a01ba5	422	return rc;
f1e70c2c	423
17ab594f BN	424	if (pdata && pdata->resume) {
	425	rc = pdata->resume(dev);
	426	if (rc)
96a01ba5	427	goto disable_resources;
17ab594f BN	428	}
	429
	430	if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
	431	rc = ahci_reset_controller(host);
	432	if (rc)
96a01ba5	433	goto disable_resources;
17ab594f BN	434
	435	ahci_init_controller(host);
	436	}
	437
	438	ata_host_resume(host);
	439
	440	return 0;
f1e70c2c	441
96a01ba5 HG	442	disable_resources:
96a01ba5 HG	443	ahci_platform_disable_resources(hpriv);
f1e70c2c VK	444
f1e70c2c VK	445	return rc;
17ab594f	446	}
17ab594f BN	447	#endif
17ab594f BN	448
071d3ad3	449	static SIMPLE_DEV_PM_OPS(ahci_pm_ops, ahci_suspend, ahci_resume);
18c25ff4	450
02aac316	451	static const struct of_device_id ahci_of_match[] = {
5f098a3e	452	{ .compatible = "snps,spear-ahci", },
1e8f5f76	453	{ .compatible = "snps,exynos5440-ahci", },
2435dcb9	454	{ .compatible = "ibm,476gtr-ahci", },
02aac316 RH	455	{},
	456	};
	457	MODULE_DEVICE_TABLE(of, ahci_of_match);
	458
1c2a49f6	459	static struct platform_driver ahci_driver = {
941c77fd	460	.probe = ahci_probe,
83291d65	461	.remove = ata_platform_remove_one,
1c2a49f6 AV	462	.driver = {
	463	.name = "ahci",
	464	.owner = THIS_MODULE,
02aac316	465	.of_match_table = ahci_of_match,
17ab594f	466	.pm = &ahci_pm_ops,
1c2a49f6	467	},
904c04fe	468	.id_table = ahci_devtype,
1c2a49f6	469	};
9a99e476	470	module_platform_driver(ahci_driver);
1c2a49f6 AV	471
	472	MODULE_DESCRIPTION("AHCI SATA platform driver");
	473	MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
	474	MODULE_LICENSE("GPL");
	475	MODULE_ALIAS("platform:ahci");