[linux-2.6-block.git] / arch / xtensa / kernel / process.c

/*
 * arch/xtensa/kernel/process.c
 *
 * Xtensa Processor version.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * Copyright (C) 2001 - 2005 Tensilica Inc.
 *
 * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
 * Chris Zankel <chris@zankel.net>
 * Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
 * Kevin Chea
 */

#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/stddef.h>
#include <linux/unistd.h>
#include <linux/ptrace.h>
#include <linux/elf.h>
#include <linux/init.h>
#include <linux/prctl.h>
#include <linux/init_task.h>
#include <linux/module.h>
#include <linux/mqueue.h>
#include <linux/fs.h>
#include <linux/slab.h>
#include <linux/rcupdate.h>

#include <asm/pgtable.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/platform.h>
#include <asm/mmu.h>
#include <asm/irq.h>
#include <linux/atomic.h>
#include <asm/asm-offsets.h>
#include <asm/regs.h>

extern void ret_from_fork(void);

struct task_struct *current_set[NR_CPUS] = {&init_task, };

void (*pm_power_off)(void) = NULL;
EXPORT_SYMBOL(pm_power_off);


#if XTENSA_HAVE_COPROCESSORS

void coprocessor_release_all(struct thread_info *ti)
{
	unsigned long cpenable;
	int i;

	/* Make sure we don't switch tasks during this operation. */

	preempt_disable();

	/* Walk through all cp owners and release it for the requested one. */

	cpenable = ti->cpenable;

	for (i = 0; i < XCHAL_CP_MAX; i++) {
		if (coprocessor_owner[i] == ti) {
			coprocessor_owner[i] = 0;
			cpenable &= ~(1 << i);
		}
	}

	ti->cpenable = cpenable;
	coprocessor_clear_cpenable();

	preempt_enable();
}

void coprocessor_flush_all(struct thread_info *ti)
{
	unsigned long cpenable;
	int i;

	preempt_disable();

	cpenable = ti->cpenable;

	for (i = 0; i < XCHAL_CP_MAX; i++) {
		if ((cpenable & 1) != 0 && coprocessor_owner[i] == ti)
			coprocessor_flush(ti, i);
		cpenable >>= 1;
	}

	preempt_enable();
}

#endif


/*
 * Powermanagement idle function, if any is provided by the platform.
 */

void cpu_idle(void)
{
  	local_irq_enable();

	/* endless idle loop with no priority at all */
	while (1) {
		rcu_idle_enter();
		while (!need_resched())
			platform_idle();
		rcu_idle_exit();
		schedule_preempt_disabled();
	}
}

/*
 * This is called when the thread calls exit().
 */
void exit_thread(void)
{
#if XTENSA_HAVE_COPROCESSORS
	coprocessor_release_all(current_thread_info());
#endif
}

/*
 * Flush thread state. This is called when a thread does an execve()
 * Note that we flush coprocessor registers for the case execve fails.
 */
void flush_thread(void)
{
#if XTENSA_HAVE_COPROCESSORS
	struct thread_info *ti = current_thread_info();
	coprocessor_flush_all(ti);
	coprocessor_release_all(ti);
#endif
}

/*
 * this gets called so that we can store coprocessor state into memory and
 * copy the current task into the new thread.
 */
int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
{
#if XTENSA_HAVE_COPROCESSORS
	coprocessor_flush_all(task_thread_info(src));
#endif
	*dst = *src;
	return 0;
}

/*
 * Copy thread.
 *
 * The stack layout for the new thread looks like this:
 *
 *	+------------------------+ <- sp in childregs (= tos)
 *	|       childregs        |
 *	+------------------------+ <- thread.sp = sp in dummy-frame
 *	|      dummy-frame       |    (saved in dummy-frame spill-area)
 *	+------------------------+
 *
 * We create a dummy frame to return to ret_from_fork:
 *   a0 points to ret_from_fork (simulating a call4)
 *   sp points to itself (thread.sp)
 *   a2, a3 are unused.
 *
 * Note: This is a pristine frame, so we don't need any spill region on top of
 *       childregs.
 */

int copy_thread(unsigned long clone_flags, unsigned long usp,
		unsigned long unused,
                struct task_struct * p, struct pt_regs * regs)
{
	struct pt_regs *childregs;
	struct thread_info *ti;
	unsigned long tos;
	int user_mode = user_mode(regs);

	/* Set up new TSS. */
	tos = (unsigned long)task_stack_page(p) + THREAD_SIZE;
	if (user_mode)
		childregs = (struct pt_regs*)(tos - PT_USER_SIZE);
	else
		childregs = (struct pt_regs*)tos - 1;

	*childregs = *regs;

	/* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */
	*((int*)childregs - 3) = (unsigned long)childregs;
	*((int*)childregs - 4) = 0;

	childregs->areg[1] = tos;
	childregs->areg[2] = 0;
	p->set_child_tid = p->clear_child_tid = NULL;
	p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1);
	p->thread.sp = (unsigned long)childregs;

	if (user_mode(regs)) {

		int len = childregs->wmask & ~0xf;
		childregs->areg[1] = usp;
		memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4],
		       &regs->areg[XCHAL_NUM_AREGS - len/4], len);
// FIXME: we need to set THREADPTR in thread_info...
		if (clone_flags & CLONE_SETTLS)
			childregs->areg[2] = childregs->areg[6];

	} else {
		/* In kernel space, we start a new thread with a new stack. */
		childregs->wmask = 1;
	}

#if (XTENSA_HAVE_COPROCESSORS || XTENSA_HAVE_IO_PORTS)
	ti = task_thread_info(p);
	ti->cpenable = 0;
#endif

	return 0;
}


/*
 * These bracket the sleeping functions..
 */

unsigned long get_wchan(struct task_struct *p)
{
	unsigned long sp, pc;
	unsigned long stack_page = (unsigned long) task_stack_page(p);
	int count = 0;

	if (!p || p == current || p->state == TASK_RUNNING)
		return 0;

	sp = p->thread.sp;
	pc = MAKE_PC_FROM_RA(p->thread.ra, p->thread.sp);

	do {
		if (sp < stack_page + sizeof(struct task_struct) ||
		    sp >= (stack_page + THREAD_SIZE) ||
		    pc == 0)
			return 0;
		if (!in_sched_functions(pc))
			return pc;

		/* Stack layout: sp-4: ra, sp-3: sp' */

		pc = MAKE_PC_FROM_RA(*(unsigned long*)sp - 4, sp);
		sp = *(unsigned long *)sp - 3;
	} while (count++ < 16);
	return 0;
}

/*
 * xtensa_gregset_t and 'struct pt_regs' are vastly different formats
 * of processor registers.  Besides different ordering,
 * xtensa_gregset_t contains non-live register information that
 * 'struct pt_regs' does not.  Exception handling (primarily) uses
 * 'struct pt_regs'.  Core files and ptrace use xtensa_gregset_t.
 *
 */

void xtensa_elf_core_copy_regs (xtensa_gregset_t *elfregs, struct pt_regs *regs)
{
	unsigned long wb, ws, wm;
	int live, last;

	wb = regs->windowbase;
	ws = regs->windowstart;
	wm = regs->wmask;
	ws = ((ws >> wb) | (ws << (WSBITS - wb))) & ((1 << WSBITS) - 1);

	/* Don't leak any random bits. */

	memset(elfregs, 0, sizeof(*elfregs));

	/* Note:  PS.EXCM is not set while user task is running; its
	 * being set in regs->ps is for exception handling convenience.
	 */

	elfregs->pc		= regs->pc;
	elfregs->ps		= (regs->ps & ~(1 << PS_EXCM_BIT));
	elfregs->lbeg		= regs->lbeg;
	elfregs->lend		= regs->lend;
	elfregs->lcount		= regs->lcount;
	elfregs->sar		= regs->sar;
	elfregs->windowstart	= ws;

	live = (wm & 2) ? 4 : (wm & 4) ? 8 : (wm & 8) ? 12 : 16;
	last = XCHAL_NUM_AREGS - (wm >> 4) * 4;
	memcpy(elfregs->a, regs->areg, live * 4);
	memcpy(elfregs->a + last, regs->areg + last, (wm >> 4) * 16);
}

int dump_fpu(void)
{
	return 0;
}

asmlinkage
long xtensa_clone(unsigned long clone_flags, unsigned long newsp,
                  void __user *parent_tid, void *child_tls,
                  void __user *child_tid, long a5,
                  struct pt_regs *regs)
{
        if (!newsp)
                newsp = regs->areg[1];
        return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
}

/*
 * xtensa_execve() executes a new program.
 */

asmlinkage
long xtensa_execve(const char __user *name,
		   const char __user *const __user *argv,
                   const char __user *const __user *envp,
                   long a3, long a4, long a5,
                   struct pt_regs *regs)
{
	long error;
	struct filename *filename;

	filename = getname(name);
	error = PTR_ERR(filename);
	if (IS_ERR(filename))
		goto out;
	error = do_execve(filename->name, argv, envp, regs);
	putname(filename);
out:
	return error;
}
Commit	Line	Data
5a0015d6 CZ	1	/*
	2	* arch/xtensa/kernel/process.c
	3	*
	4	* Xtensa Processor version.
	5	*
	6	* This file is subject to the terms and conditions of the GNU General Public
	7	* License. See the file "COPYING" in the main directory of this archive
	8	* for more details.
	9	*
	10	* Copyright (C) 2001 - 2005 Tensilica Inc.
	11	*
	12	* Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
	13	* Chris Zankel <chris@zankel.net>
	14	* Marc Gauthier <marc@tensilica.com, marc@alumni.uwaterloo.ca>
	15	* Kevin Chea
	16	*/
	17
5a0015d6 CZ	18	#include <linux/errno.h>
	19	#include <linux/sched.h>
	20	#include <linux/kernel.h>
	21	#include <linux/mm.h>
	22	#include <linux/smp.h>
5a0015d6 CZ	23	#include <linux/stddef.h>
	24	#include <linux/unistd.h>
	25	#include <linux/ptrace.h>
5a0015d6 CZ	26	#include <linux/elf.h>
	27	#include <linux/init.h>
	28	#include <linux/prctl.h>
	29	#include <linux/init_task.h>
	30	#include <linux/module.h>
	31	#include <linux/mqueue.h>
73089cbf	32	#include <linux/fs.h>
5a0e3ad6	33	#include <linux/slab.h>
11ad47a0	34	#include <linux/rcupdate.h>
5a0015d6 CZ	35
	36	#include <asm/pgtable.h>
	37	#include <asm/uaccess.h>
5a0015d6 CZ	38	#include <asm/io.h>
	39	#include <asm/processor.h>
	40	#include <asm/platform.h>
	41	#include <asm/mmu.h>
	42	#include <asm/irq.h>
60063497	43	#include <linux/atomic.h>
0013a854	44	#include <asm/asm-offsets.h>
173d6681	45	#include <asm/regs.h>
5a0015d6 CZ	46
	47	extern void ret_from_fork(void);
	48
5a0015d6 CZ	49	struct task_struct *current_set[NR_CPUS] = {&init_task, };
5a0015d6 CZ	50
47f3fc94 AB	51	void (*pm_power_off)(void) = NULL;
	52	EXPORT_SYMBOL(pm_power_off);
	53
5a0015d6	54
c658eac6 CZ	55	#if XTENSA_HAVE_COPROCESSORS
	56
	57	void coprocessor_release_all(struct thread_info *ti)
	58	{
	59	unsigned long cpenable;
	60	int i;
	61
	62	/* Make sure we don't switch tasks during this operation. */
	63
	64	preempt_disable();
	65
	66	/* Walk through all cp owners and release it for the requested one. */
	67
	68	cpenable = ti->cpenable;
	69
	70	for (i = 0; i < XCHAL_CP_MAX; i++) {
	71	if (coprocessor_owner[i] == ti) {
	72	coprocessor_owner[i] = 0;
	73	cpenable &= ~(1 << i);
	74	}
	75	}
	76
	77	ti->cpenable = cpenable;
	78	coprocessor_clear_cpenable();
	79
	80	preempt_enable();
	81	}
	82
	83	void coprocessor_flush_all(struct thread_info *ti)
	84	{
	85	unsigned long cpenable;
	86	int i;
	87
	88	preempt_disable();
	89
	90	cpenable = ti->cpenable;
	91
	92	for (i = 0; i < XCHAL_CP_MAX; i++) {
	93	if ((cpenable & 1) != 0 && coprocessor_owner[i] == ti)
	94	coprocessor_flush(ti, i);
	95	cpenable >>= 1;
	96	}
	97
	98	preempt_enable();
	99	}
	100
	101	#endif
	102
	103
5a0015d6 CZ	104	/*
	105	* Powermanagement idle function, if any is provided by the platform.
	106	*/
	107
	108	void cpu_idle(void)
	109	{
	110	local_irq_enable();
	111
	112	/* endless idle loop with no priority at all */
	113	while (1) {
11ad47a0	114	rcu_idle_enter();
5a0015d6 CZ	115	while (!need_resched())
5a0015d6 CZ	116	platform_idle();
11ad47a0	117	rcu_idle_exit();
bd2f5536	118	schedule_preempt_disabled();
5a0015d6 CZ	119	}
	120	}
	121
	122	/*
c658eac6	123	* This is called when the thread calls exit().
5a0015d6	124	*/
5a0015d6 CZ	125	void exit_thread(void)
5a0015d6 CZ	126	{
c658eac6 CZ	127	#if XTENSA_HAVE_COPROCESSORS
	128	coprocessor_release_all(current_thread_info());
	129	#endif
5a0015d6 CZ	130	}
5a0015d6 CZ	131
c658eac6 CZ	132	/*
	133	* Flush thread state. This is called when a thread does an execve()
	134	* Note that we flush coprocessor registers for the case execve fails.
	135	*/
5a0015d6 CZ	136	void flush_thread(void)
5a0015d6 CZ	137	{
c658eac6 CZ	138	#if XTENSA_HAVE_COPROCESSORS
	139	struct thread_info *ti = current_thread_info();
	140	coprocessor_flush_all(ti);
	141	coprocessor_release_all(ti);
	142	#endif
	143	}
	144
	145	/*
55ccf3fe SS	146	* this gets called so that we can store coprocessor state into memory and
55ccf3fe SS	147	* copy the current task into the new thread.
c658eac6	148	*/
55ccf3fe	149	int arch_dup_task_struct(struct task_struct dst, struct task_struct src)
c658eac6 CZ	150	{
c658eac6 CZ	151	#if XTENSA_HAVE_COPROCESSORS
55ccf3fe	152	coprocessor_flush_all(task_thread_info(src));
c658eac6	153	#endif
55ccf3fe SS	154	dst = src;
55ccf3fe SS	155	return 0;
5a0015d6 CZ	156	}
	157
	158	/*
	159	* Copy thread.
	160	*
	161	* The stack layout for the new thread looks like this:
	162	*
	163	* +------------------------+ <- sp in childregs (= tos)
	164	* \| childregs \|
	165	* +------------------------+ <- thread.sp = sp in dummy-frame
	166	* \| dummy-frame \| (saved in dummy-frame spill-area)
	167	* +------------------------+
	168	*
	169	* We create a dummy frame to return to ret_from_fork:
	170	* a0 points to ret_from_fork (simulating a call4)
	171	* sp points to itself (thread.sp)
	172	* a2, a3 are unused.
	173	*
	174	* Note: This is a pristine frame, so we don't need any spill region on top of
	175	* childregs.
	176	*/
	177
6f2c55b8	178	int copy_thread(unsigned long clone_flags, unsigned long usp,
5a0015d6 CZ	179	unsigned long unused,
	180	struct task_struct * p, struct pt_regs * regs)
	181	{
	182	struct pt_regs *childregs;
c658eac6	183	struct thread_info *ti;
5a0015d6 CZ	184	unsigned long tos;
	185	int user_mode = user_mode(regs);
	186
	187	/* Set up new TSS. */
04fe6faf	188	tos = (unsigned long)task_stack_page(p) + THREAD_SIZE;
5a0015d6 CZ	189	if (user_mode)
	190	childregs = (struct pt_regs*)(tos - PT_USER_SIZE);
	191	else
	192	childregs = (struct pt_regs*)tos - 1;
	193
	194	childregs = regs;
	195
	196	/* Create a call4 dummy-frame: a0 = 0, a1 = childregs. */
	197	((int)childregs - 3) = (unsigned long)childregs;
	198	((int)childregs - 4) = 0;
	199
	200	childregs->areg[1] = tos;
	201	childregs->areg[2] = 0;
	202	p->set_child_tid = p->clear_child_tid = NULL;
	203	p->thread.ra = MAKE_RA_FOR_CALL((unsigned long)ret_from_fork, 0x1);
	204	p->thread.sp = (unsigned long)childregs;
c658eac6	205
5a0015d6 CZ	206	if (user_mode(regs)) {
	207
	208	int len = childregs->wmask & ~0xf;
	209	childregs->areg[1] = usp;
	210	memcpy(&childregs->areg[XCHAL_NUM_AREGS - len/4],
	211	&regs->areg[XCHAL_NUM_AREGS - len/4], len);
c658eac6	212	// FIXME: we need to set THREADPTR in thread_info...
5a0015d6 CZ	213	if (clone_flags & CLONE_SETTLS)
	214	childregs->areg[2] = childregs->areg[6];
	215
	216	} else {
	217	/* In kernel space, we start a new thread with a new stack. */
	218	childregs->wmask = 1;
	219	}
c658eac6 CZ	220
	221	#if (XTENSA_HAVE_COPROCESSORS \|\| XTENSA_HAVE_IO_PORTS)
	222	ti = task_thread_info(p);
	223	ti->cpenable = 0;
	224	#endif
	225
5a0015d6 CZ	226	return 0;
	227	}
	228
	229
5a0015d6 CZ	230	/*
	231	* These bracket the sleeping functions..
	232	*/
	233
	234	unsigned long get_wchan(struct task_struct *p)
	235	{
	236	unsigned long sp, pc;
04fe6faf	237	unsigned long stack_page = (unsigned long) task_stack_page(p);
5a0015d6 CZ	238	int count = 0;
	239
	240	if (!p \|\| p == current \|\| p->state == TASK_RUNNING)
	241	return 0;
	242
	243	sp = p->thread.sp;
	244	pc = MAKE_PC_FROM_RA(p->thread.ra, p->thread.sp);
	245
	246	do {
	247	if (sp < stack_page + sizeof(struct task_struct) \|\|
	248	sp >= (stack_page + THREAD_SIZE) \|\|
	249	pc == 0)
	250	return 0;
	251	if (!in_sched_functions(pc))
	252	return pc;
	253
	254	/* Stack layout: sp-4: ra, sp-3: sp' */
	255
	256	pc = MAKE_PC_FROM_RA((unsigned long)sp - 4, sp);
	257	sp = (unsigned long )sp - 3;
	258	} while (count++ < 16);
	259	return 0;
	260	}
	261
	262	/*
5a0015d6 CZ	263	* xtensa_gregset_t and 'struct pt_regs' are vastly different formats
	264	* of processor registers. Besides different ordering,
	265	* xtensa_gregset_t contains non-live register information that
	266	* 'struct pt_regs' does not. Exception handling (primarily) uses
	267	* 'struct pt_regs'. Core files and ptrace use xtensa_gregset_t.
	268	*
	269	*/
	270
c658eac6	271	void xtensa_elf_core_copy_regs (xtensa_gregset_t elfregs, struct pt_regs regs)
5a0015d6	272	{
c658eac6 CZ	273	unsigned long wb, ws, wm;
	274	int live, last;
	275
	276	wb = regs->windowbase;
	277	ws = regs->windowstart;
	278	wm = regs->wmask;
	279	ws = ((ws >> wb) \| (ws << (WSBITS - wb))) & ((1 << WSBITS) - 1);
	280
	281	/* Don't leak any random bits. */
	282
688bb415	283	memset(elfregs, 0, sizeof(*elfregs));
c658eac6	284
5a0015d6 CZ	285	/* Note: PS.EXCM is not set while user task is running; its
	286	* being set in regs->ps is for exception handling convenience.
	287	*/
	288
	289	elfregs->pc = regs->pc;
173d6681	290	elfregs->ps = (regs->ps & ~(1 << PS_EXCM_BIT));
5a0015d6 CZ	291	elfregs->lbeg = regs->lbeg;
	292	elfregs->lend = regs->lend;
	293	elfregs->lcount = regs->lcount;
	294	elfregs->sar = regs->sar;
c658eac6	295	elfregs->windowstart = ws;
5a0015d6	296
c658eac6 CZ	297	live = (wm & 2) ? 4 : (wm & 4) ? 8 : (wm & 8) ? 12 : 16;
	298	last = XCHAL_NUM_AREGS - (wm >> 4) * 4;
	299	memcpy(elfregs->a, regs->areg, live * 4);
	300	memcpy(elfregs->a + last, regs->areg + last, (wm >> 4) * 16);
5a0015d6 CZ	301	}
5a0015d6 CZ	302
c658eac6	303	int dump_fpu(void)
5a0015d6	304	{
5a0015d6 CZ	305	return 0;
5a0015d6 CZ	306	}
fc4fb2ad CZ	307
	308	asmlinkage
	309	long xtensa_clone(unsigned long clone_flags, unsigned long newsp,
	310	void __user parent_tid, void child_tls,
	311	void __user *child_tid, long a5,
	312	struct pt_regs *regs)
	313	{
	314	if (!newsp)
	315	newsp = regs->areg[1];
	316	return do_fork(clone_flags, newsp, regs, 0, parent_tid, child_tid);
	317	}
	318
	319	/*
c658eac6 CZ	320	* xtensa_execve() executes a new program.
c658eac6 CZ	321	*/
fc4fb2ad CZ	322
fc4fb2ad CZ	323	asmlinkage
d7627467 DH	324	long xtensa_execve(const char __user *name,
	325	const char __user const __user argv,
	326	const char __user const __user envp,
fc4fb2ad CZ	327	long a3, long a4, long a5,
	328	struct pt_regs *regs)
	329	{
	330	long error;
91a27b2a	331	struct filename *filename;
fc4fb2ad CZ	332
	333	filename = getname(name);
	334	error = PTR_ERR(filename);
	335	if (IS_ERR(filename))
	336	goto out;
91a27b2a	337	error = do_execve(filename->name, argv, envp, regs);
fc4fb2ad CZ	338	putname(filename);
	339	out:
	340	return error;
	341	}
	342