projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 9a8fd558 CZ |
1 | /* |
| 2 | * include/asm-xtensa/timex.h | |
| 3 | * | |
| 4 | * This file is subject to the terms and conditions of the GNU General Public | |
| 5 | * License. See the file "COPYING" in the main directory of this archive | |
| 6 | * for more details. | |
| 7 | * | |
| 2d1c645c | 8 | * Copyright (C) 2001 - 2008 Tensilica Inc. |
| 9a8fd558 CZ |
9 | */ |
| 10 | ||
| 11 | #ifndef _XTENSA_TIMEX_H | |
| 12 | #define _XTENSA_TIMEX_H | |
| 13 | ||
| 14 | #ifdef __KERNEL__ | |
| 15 | ||
| 16 | #include <asm/processor.h> | |
| 17 | #include <linux/stringify.h> | |
| 18 | ||
| 173d6681 CZ |
19 | #define _INTLEVEL(x) XCHAL_INT ## x ## _LEVEL |
| 20 | #define INTLEVEL(x) _INTLEVEL(x) | |
| 21 | ||
| 0f7f9310 MF |
22 | #if XCHAL_NUM_TIMERS > 0 && \ |
| 23 | INTLEVEL(XCHAL_TIMER0_INTERRUPT) <= XCHAL_EXCM_LEVEL | |
| 9a8fd558 | 24 | # define LINUX_TIMER 0 |
| 173d6681 | 25 | # define LINUX_TIMER_INT XCHAL_TIMER0_INTERRUPT |
| 0f7f9310 MF |
26 | #elif XCHAL_NUM_TIMERS > 1 && \ |
| 27 | INTLEVEL(XCHAL_TIMER1_INTERRUPT) <= XCHAL_EXCM_LEVEL | |
| 9a8fd558 | 28 | # define LINUX_TIMER 1 |
| 173d6681 | 29 | # define LINUX_TIMER_INT XCHAL_TIMER1_INTERRUPT |
| 0f7f9310 MF |
30 | #elif XCHAL_NUM_TIMERS > 2 && \ |
| 31 | INTLEVEL(XCHAL_TIMER2_INTERRUPT) <= XCHAL_EXCM_LEVEL | |
| 9a8fd558 | 32 | # define LINUX_TIMER 2 |
| 173d6681 | 33 | # define LINUX_TIMER_INT XCHAL_TIMER2_INTERRUPT |
| 9a8fd558 CZ |
34 | #else |
| 35 | # error "Bad timer number for Linux configurations!" | |
| 36 | #endif | |
| 37 | ||
| e504c4b6 | 38 | extern unsigned long ccount_freq; |
| 9a8fd558 CZ |
39 | |
| 40 | typedef unsigned long long cycles_t; | |
| 41 | ||
| 42 | /* | |
| 43 | * Only used for SMP. | |
| 44 | */ | |
| 45 | ||
| 46 | extern cycles_t cacheflush_time; | |
| 47 | ||
| 48 | #define get_cycles() (0) | |
| 49 | ||
| 50 | ||
| 51 | /* | |
| 52 | * Register access. | |
| 53 | */ | |
| 54 | ||
| bc5378fc MF |
55 | #define WSR_CCOUNT(r) asm volatile ("wsr %0, ccount" :: "a" (r)) |
| 56 | #define RSR_CCOUNT(r) asm volatile ("rsr %0, ccount" : "=a" (r)) | |
| 57 | #define WSR_CCOMPARE(x,r) asm volatile ("wsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) :: "a"(r)) | |
| 58 | #define RSR_CCOMPARE(x,r) asm volatile ("rsr %0,"__stringify(SREG_CCOMPARE)"+"__stringify(x) : "=a"(r)) | |
| 9a8fd558 CZ |
59 | |
| 60 | static inline unsigned long get_ccount (void) | |
| 61 | { | |
| 62 | unsigned long ccount; | |
| 63 | RSR_CCOUNT(ccount); | |
| 64 | return ccount; | |
| 65 | } | |
| 66 | ||
| 67 | static inline void set_ccount (unsigned long ccount) | |
| 68 | { | |
| 69 | WSR_CCOUNT(ccount); | |
| 70 | } | |
| 71 | ||
| 72 | static inline unsigned long get_linux_timer (void) | |
| 73 | { | |
| 74 | unsigned ccompare; | |
| 75 | RSR_CCOMPARE(LINUX_TIMER, ccompare); | |
| 76 | return ccompare; | |
| 77 | } | |
| 78 | ||
| 79 | static inline void set_linux_timer (unsigned long ccompare) | |
| 80 | { | |
| 81 | WSR_CCOMPARE(LINUX_TIMER, ccompare); | |
| 82 | } | |
| 83 | ||
| 84 | #endif /* __KERNEL__ */ | |
| 85 | #endif /* _XTENSA_TIMEX_H */ |