[linux-2.6-block.git] / arch / x86 / pci / acpi.c

#include <linux/pci.h>
#include <linux/acpi.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/dmi.h>
#include <linux/slab.h>
#include <asm/numa.h>
#include <asm/pci_x86.h>

struct pci_root_info {
	struct acpi_device *bridge;
	char name[16];
	unsigned int res_num;
	struct resource *res;
	resource_size_t *res_offset;
	struct pci_sysdata sd;
#ifdef	CONFIG_PCI_MMCONFIG
	bool mcfg_added;
	u16 segment;
	u8 start_bus;
	u8 end_bus;
#endif
};

static bool pci_use_crs = true;
static bool pci_ignore_seg = false;

static int __init set_use_crs(const struct dmi_system_id *id)
{
	pci_use_crs = true;
	return 0;
}

static int __init set_nouse_crs(const struct dmi_system_id *id)
{
	pci_use_crs = false;
	return 0;
}

static int __init set_ignore_seg(const struct dmi_system_id *id)
{
	printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
	pci_ignore_seg = true;
	return 0;
}

static const struct dmi_system_id pci_crs_quirks[] __initconst = {
	/* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
	{
		.callback = set_use_crs,
		.ident = "IBM System x3800",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
			DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
		},
	},
	/* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
	/* 2006 AMD HT/VIA system with two host bridges */
        {
		.callback = set_use_crs,
		.ident = "ASRock ALiveSATA2-GLAN",
		.matches = {
			DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
                },
        },
	/* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
	/* 2006 AMD HT/VIA system with two host bridges */
	{
		.callback = set_use_crs,
		.ident = "ASUS M2V-MX SE",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
			DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
			DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
		},
	},
	/* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
	{
		.callback = set_use_crs,
		.ident = "MSI MS-7253",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
			DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
			DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
		},
	},

	/* Now for the blacklist.. */

	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	{
		.callback = set_nouse_crs,
		.ident = "Dell Studio 1557",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
			DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
			DMI_MATCH(DMI_BIOS_VERSION, "A09"),
		},
	},
	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	{
		.callback = set_nouse_crs,
		.ident = "Thinkpad SL510",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
			DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
			DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
		},
	},

	/* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
	{
		.callback = set_ignore_seg,
		.ident = "HP xw9300",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
			DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
		},
	},
	{}
};

void __init pci_acpi_crs_quirks(void)
{
	int year;

	if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
		pci_use_crs = false;

	dmi_check_system(pci_crs_quirks);

	/*
	 * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
	 * takes precedence over anything we figured out above.
	 */
	if (pci_probe & PCI_ROOT_NO_CRS)
		pci_use_crs = false;
	else if (pci_probe & PCI_USE__CRS)
		pci_use_crs = true;

	printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
	       "if necessary, use \"pci=%s\" and report a bug\n",
	       pci_use_crs ? "Using" : "Ignoring",
	       pci_use_crs ? "nocrs" : "use_crs");
}

#ifdef	CONFIG_PCI_MMCONFIG
static int check_segment(u16 seg, struct device *dev, char *estr)
{
	if (seg) {
		dev_err(dev,
			"%s can't access PCI configuration "
			"space under this host bridge.\n",
			estr);
		return -EIO;
	}

	/*
	 * Failure in adding MMCFG information is not fatal,
	 * just can't access extended configuration space of
	 * devices under this host bridge.
	 */
	dev_warn(dev,
		 "%s can't access extended PCI configuration "
		 "space under this bridge.\n",
		 estr);

	return 0;
}

static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
			  u8 end, phys_addr_t addr)
{
	int result;
	struct device *dev = &info->bridge->dev;

	info->start_bus = start;
	info->end_bus = end;
	info->mcfg_added = false;

	/* return success if MMCFG is not in use */
	if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
		return 0;

	if (!(pci_probe & PCI_PROBE_MMCONF))
		return check_segment(seg, dev, "MMCONFIG is disabled,");

	result = pci_mmconfig_insert(dev, seg, start, end, addr);
	if (result == 0) {
		/* enable MMCFG if it hasn't been enabled yet */
		if (raw_pci_ext_ops == NULL)
			raw_pci_ext_ops = &pci_mmcfg;
		info->mcfg_added = true;
	} else if (result != -EEXIST)
		return check_segment(seg, dev,
			 "fail to add MMCONFIG information,");

	return 0;
}

static void teardown_mcfg_map(struct pci_root_info *info)
{
	if (info->mcfg_added) {
		pci_mmconfig_delete(info->segment, info->start_bus,
				    info->end_bus);
		info->mcfg_added = false;
	}
}
#else
static int setup_mcfg_map(struct pci_root_info *info,
				    u16 seg, u8 start, u8 end,
				    phys_addr_t addr)
{
	return 0;
}
static void teardown_mcfg_map(struct pci_root_info *info)
{
}
#endif

static acpi_status
resource_to_addr(struct acpi_resource *resource,
			struct acpi_resource_address64 *addr)
{
	acpi_status status;
	struct acpi_resource_memory24 *memory24;
	struct acpi_resource_memory32 *memory32;
	struct acpi_resource_fixed_memory32 *fixed_memory32;

	memset(addr, 0, sizeof(*addr));
	switch (resource->type) {
	case ACPI_RESOURCE_TYPE_MEMORY24:
		memory24 = &resource->data.memory24;
		addr->resource_type = ACPI_MEMORY_RANGE;
		addr->minimum = memory24->minimum;
		addr->address_length = memory24->address_length;
		addr->maximum = addr->minimum + addr->address_length - 1;
		return AE_OK;
	case ACPI_RESOURCE_TYPE_MEMORY32:
		memory32 = &resource->data.memory32;
		addr->resource_type = ACPI_MEMORY_RANGE;
		addr->minimum = memory32->minimum;
		addr->address_length = memory32->address_length;
		addr->maximum = addr->minimum + addr->address_length - 1;
		return AE_OK;
	case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
		fixed_memory32 = &resource->data.fixed_memory32;
		addr->resource_type = ACPI_MEMORY_RANGE;
		addr->minimum = fixed_memory32->address;
		addr->address_length = fixed_memory32->address_length;
		addr->maximum = addr->minimum + addr->address_length - 1;
		return AE_OK;
	case ACPI_RESOURCE_TYPE_ADDRESS16:
	case ACPI_RESOURCE_TYPE_ADDRESS32:
	case ACPI_RESOURCE_TYPE_ADDRESS64:
		status = acpi_resource_to_address64(resource, addr);
		if (ACPI_SUCCESS(status) &&
		    (addr->resource_type == ACPI_MEMORY_RANGE ||
		    addr->resource_type == ACPI_IO_RANGE) &&
		    addr->address_length > 0) {
			return AE_OK;
		}
		break;
	}
	return AE_ERROR;
}

static acpi_status
count_resource(struct acpi_resource *acpi_res, void *data)
{
	struct pci_root_info *info = data;
	struct acpi_resource_address64 addr;
	acpi_status status;

	status = resource_to_addr(acpi_res, &addr);
	if (ACPI_SUCCESS(status))
		info->res_num++;
	return AE_OK;
}

static acpi_status
setup_resource(struct acpi_resource *acpi_res, void *data)
{
	struct pci_root_info *info = data;
	struct resource *res;
	struct acpi_resource_address64 addr;
	acpi_status status;
	unsigned long flags;
	u64 start, orig_end, end;

	status = resource_to_addr(acpi_res, &addr);
	if (!ACPI_SUCCESS(status))
		return AE_OK;

	if (addr.resource_type == ACPI_MEMORY_RANGE) {
		flags = IORESOURCE_MEM;
		if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
			flags |= IORESOURCE_PREFETCH;
	} else if (addr.resource_type == ACPI_IO_RANGE) {
		flags = IORESOURCE_IO;
	} else
		return AE_OK;

	start = addr.minimum + addr.translation_offset;
	orig_end = end = addr.maximum + addr.translation_offset;

	/* Exclude non-addressable range or non-addressable portion of range */
	end = min(end, (u64)iomem_resource.end);
	if (end <= start) {
		dev_info(&info->bridge->dev,
			"host bridge window [%#llx-%#llx] "
			"(ignored, not CPU addressable)\n", start, orig_end);
		return AE_OK;
	} else if (orig_end != end) {
		dev_info(&info->bridge->dev,
			"host bridge window [%#llx-%#llx] "
			"([%#llx-%#llx] ignored, not CPU addressable)\n", 
			start, orig_end, end + 1, orig_end);
	}

	res = &info->res[info->res_num];
	res->name = info->name;
	res->flags = flags;
	res->start = start;
	res->end = end;
	info->res_offset[info->res_num] = addr.translation_offset;
	info->res_num++;

	if (!pci_use_crs)
		dev_printk(KERN_DEBUG, &info->bridge->dev,
			   "host bridge window %pR (ignored)\n", res);

	return AE_OK;
}

static void coalesce_windows(struct pci_root_info *info, unsigned long type)
{
	int i, j;
	struct resource *res1, *res2;

	for (i = 0; i < info->res_num; i++) {
		res1 = &info->res[i];
		if (!(res1->flags & type))
			continue;

		for (j = i + 1; j < info->res_num; j++) {
			res2 = &info->res[j];
			if (!(res2->flags & type))
				continue;

			/*
			 * I don't like throwing away windows because then
			 * our resources no longer match the ACPI _CRS, but
			 * the kernel resource tree doesn't allow overlaps.
			 */
			if (resource_overlaps(res1, res2)) {
				res2->start = min(res1->start, res2->start);
				res2->end = max(res1->end, res2->end);
				dev_info(&info->bridge->dev,
					 "host bridge window expanded to %pR; %pR ignored\n",
					 res2, res1);
				res1->flags = 0;
			}
		}
	}
}

static void add_resources(struct pci_root_info *info,
			  struct list_head *resources)
{
	int i;
	struct resource *res, *root, *conflict;

	coalesce_windows(info, IORESOURCE_MEM);
	coalesce_windows(info, IORESOURCE_IO);

	for (i = 0; i < info->res_num; i++) {
		res = &info->res[i];

		if (res->flags & IORESOURCE_MEM)
			root = &iomem_resource;
		else if (res->flags & IORESOURCE_IO)
			root = &ioport_resource;
		else
			continue;

		conflict = insert_resource_conflict(root, res);
		if (conflict)
			dev_info(&info->bridge->dev,
				 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
				 res, conflict->name, conflict);
		else
			pci_add_resource_offset(resources, res,
					info->res_offset[i]);
	}
}

static void free_pci_root_info_res(struct pci_root_info *info)
{
	kfree(info->res);
	info->res = NULL;
	kfree(info->res_offset);
	info->res_offset = NULL;
	info->res_num = 0;
}

static void __release_pci_root_info(struct pci_root_info *info)
{
	int i;
	struct resource *res;

	for (i = 0; i < info->res_num; i++) {
		res = &info->res[i];

		if (!res->parent)
			continue;

		if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
			continue;

		release_resource(res);
	}

	free_pci_root_info_res(info);

	teardown_mcfg_map(info);

	kfree(info);
}

static void release_pci_root_info(struct pci_host_bridge *bridge)
{
	struct pci_root_info *info = bridge->release_data;

	__release_pci_root_info(info);
}

static void
probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device,
		    int busnum, int domain)
{
	size_t size;

	sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
	info->bridge = device;

	info->res_num = 0;
	acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
				info);
	if (!info->res_num)
		return;

	size = sizeof(*info->res) * info->res_num;
	info->res = kzalloc(size, GFP_KERNEL);
	if (!info->res) {
		info->res_num = 0;
		return;
	}

	size = sizeof(*info->res_offset) * info->res_num;
	info->res_num = 0;
	info->res_offset = kzalloc(size, GFP_KERNEL);
	if (!info->res_offset) {
		kfree(info->res);
		info->res = NULL;
		return;
	}

	acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
				info);
}

struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
{
	struct acpi_device *device = root->device;
	struct pci_root_info *info = NULL;
	int domain = root->segment;
	int busnum = root->secondary.start;
	LIST_HEAD(resources);
	struct pci_bus *bus = NULL;
	struct pci_sysdata *sd;
	int node;
#ifdef CONFIG_ACPI_NUMA
	int pxm;
#endif

	if (pci_ignore_seg)
		domain = 0;

	if (domain && !pci_domains_supported) {
		printk(KERN_WARNING "pci_bus %04x:%02x: "
		       "ignored (multiple domains not supported)\n",
		       domain, busnum);
		return NULL;
	}

	node = NUMA_NO_NODE;
#ifdef CONFIG_ACPI_NUMA
	pxm = acpi_get_pxm(device->handle);
	if (pxm >= 0)
		node = pxm_to_node(pxm);
#endif
	if (node == NUMA_NO_NODE)
		node = x86_pci_root_bus_node(busnum);

	if (node != NUMA_NO_NODE && !node_online(node))
		node = NUMA_NO_NODE;

	info = kzalloc(sizeof(*info), GFP_KERNEL);
	if (!info) {
		printk(KERN_WARNING "pci_bus %04x:%02x: "
		       "ignored (out of memory)\n", domain, busnum);
		return NULL;
	}

	sd = &info->sd;
	sd->domain = domain;
	sd->node = node;
	sd->companion = device;
	/*
	 * Maybe the desired pci bus has been already scanned. In such case
	 * it is unnecessary to scan the pci bus with the given domain,busnum.
	 */
	bus = pci_find_bus(domain, busnum);
	if (bus) {
		/*
		 * If the desired bus exits, the content of bus->sysdata will
		 * be replaced by sd.
		 */
		memcpy(bus->sysdata, sd, sizeof(*sd));
		kfree(info);
	} else {
		probe_pci_root_info(info, device, busnum, domain);

		/* insert busn res at first */
		pci_add_resource(&resources,  &root->secondary);
		/*
		 * _CRS with no apertures is normal, so only fall back to
		 * defaults or native bridge info if we're ignoring _CRS.
		 */
		if (pci_use_crs)
			add_resources(info, &resources);
		else {
			free_pci_root_info_res(info);
			x86_pci_root_bus_resources(busnum, &resources);
		}

		if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
				    (u8)root->secondary.end, root->mcfg_addr))
			bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
						  sd, &resources);

		if (bus) {
			pci_scan_child_bus(bus);
			pci_set_host_bridge_release(
				to_pci_host_bridge(bus->bridge),
				release_pci_root_info, info);
		} else {
			pci_free_resource_list(&resources);
			__release_pci_root_info(info);
		}
	}

	/* After the PCI-E bus has been walked and all devices discovered,
	 * configure any settings of the fabric that might be necessary.
	 */
	if (bus) {
		struct pci_bus *child;
		list_for_each_entry(child, &bus->children, node)
			pcie_bus_configure_settings(child);
	}

	if (bus && node != NUMA_NO_NODE) {
#ifdef CONFIG_ACPI_NUMA
		if (pxm >= 0)
			dev_printk(KERN_DEBUG, &bus->dev,
				   "on NUMA node %d (pxm %d)\n", node, pxm);
#else
		dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
#endif
	}

	return bus;
}

int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
{
	struct pci_sysdata *sd = bridge->bus->sysdata;

	ACPI_COMPANION_SET(&bridge->dev, sd->companion);
	return 0;
}

int __init pci_acpi_init(void)
{
	struct pci_dev *dev = NULL;

	if (acpi_noirq)
		return -ENODEV;

	printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
	acpi_irq_penalty_init();
	pcibios_enable_irq = acpi_pci_irq_enable;
	pcibios_disable_irq = acpi_pci_irq_disable;
	x86_init.pci.init_irq = x86_init_noop;

	if (pci_routeirq) {
		/*
		 * PCI IRQ routing is set up by pci_enable_device(), but we
		 * also do it here in case there are still broken drivers that
		 * don't use pci_enable_device().
		 */
		printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
		for_each_pci_dev(dev)
			acpi_pci_irq_enable(dev);
	}

	return 0;
}
Commit	Line	Data
1da177e4 LT	1	#include <linux/pci.h>
	2	#include <linux/acpi.h>
	3	#include <linux/init.h>
b33fa1f3	4	#include <linux/irq.h>
036fff4c	5	#include <linux/dmi.h>
5a0e3ad6	6	#include <linux/slab.h>
69e1a33f	7	#include <asm/numa.h>
82487711	8	#include <asm/pci_x86.h>
1da177e4	9
62f420f8	10	struct pci_root_info {
42887b29	11	struct acpi_device *bridge;
fe05725f	12	char name[16];
62f420f8 GH	13	unsigned int res_num;
62f420f8 GH	14	struct resource *res;
b4873931	15	resource_size_t *res_offset;
35cb05e5	16	struct pci_sysdata sd;
c0fa4078 JL	17	#ifdef CONFIG_PCI_MMCONFIG
	18	bool mcfg_added;
	19	u16 segment;
	20	u8 start_bus;
	21	u8 end_bus;
	22	#endif
62f420f8 GH	23	};
62f420f8 GH	24
7bc5e3f2	25	static bool pci_use_crs = true;
1f09b09b	26	static bool pci_ignore_seg = false;
7bc5e3f2 BH	27
	28	static int __init set_use_crs(const struct dmi_system_id *id)
	29	{
	30	pci_use_crs = true;
	31	return 0;
	32	}
	33
28c3c05d DJ	34	static int __init set_nouse_crs(const struct dmi_system_id *id)
	35	{
	36	pci_use_crs = false;
	37	return 0;
	38	}
	39
1f09b09b BH	40	static int __init set_ignore_seg(const struct dmi_system_id *id)
	41	{
	42	printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
	43	pci_ignore_seg = true;
	44	return 0;
	45	}
	46
	47	static const struct dmi_system_id pci_crs_quirks[] __initconst = {
7bc5e3f2 BH	48	/* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
	49	{
	50	.callback = set_use_crs,
	51	.ident = "IBM System x3800",
	52	.matches = {
	53	DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
	54	DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
	55	},
	56	},
2491762c BH	57	/* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
	58	/* 2006 AMD HT/VIA system with two host bridges */
	59	{
	60	.callback = set_use_crs,
	61	.ident = "ASRock ALiveSATA2-GLAN",
	62	.matches = {
	63	DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
	64	},
	65	},
29cf7a30 PM	66	/* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
	67	/* 2006 AMD HT/VIA system with two host bridges */
	68	{
	69	.callback = set_use_crs,
	70	.ident = "ASUS M2V-MX SE",
	71	.matches = {
	72	DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
	73	DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
	74	DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
	75	},
	76	},
84113717 JN	77	/* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
	78	{
	79	.callback = set_use_crs,
	80	.ident = "MSI MS-7253",
	81	.matches = {
	82	DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
	83	DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
	84	DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
84113717 JN	85	},
84113717 JN	86	},
28c3c05d	87
e702781f DJ	88	/* Now for the blacklist.. */
	89
	90	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	91	{
	92	.callback = set_nouse_crs,
	93	.ident = "Dell Studio 1557",
	94	.matches = {
	95	DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
	96	DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
	97	DMI_MATCH(DMI_BIOS_VERSION, "A09"),
	98	},
	99	},
8b6a5af9 DJ	100	/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
	101	{
	102	.callback = set_nouse_crs,
	103	.ident = "Thinkpad SL510",
	104	.matches = {
	105	DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
	106	DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
	107	DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
	108	},
	109	},
1f09b09b BH	110
	111	/* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
	112	{
	113	.callback = set_ignore_seg,
	114	.ident = "HP xw9300",
	115	.matches = {
	116	DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
	117	DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
	118	},
	119	},
7bc5e3f2 BH	120	{}
	121	};
	122
	123	void __init pci_acpi_crs_quirks(void)
	124	{
	125	int year;
	126
	127	if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
	128	pci_use_crs = false;
	129
1f09b09b	130	dmi_check_system(pci_crs_quirks);
7bc5e3f2 BH	131
	132	/*
	133	* If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
	134	* takes precedence over anything we figured out above.
	135	*/
	136	if (pci_probe & PCI_ROOT_NO_CRS)
	137	pci_use_crs = false;
	138	else if (pci_probe & PCI_USE__CRS)
	139	pci_use_crs = true;
	140
	141	printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
	142	"if necessary, use \"pci=%s\" and report a bug\n",
	143	pci_use_crs ? "Using" : "Ignoring",
	144	pci_use_crs ? "nocrs" : "use_crs");
	145	}
	146
c0fa4078	147	#ifdef CONFIG_PCI_MMCONFIG
a18e3690	148	static int check_segment(u16 seg, struct device dev, char estr)
c0fa4078 JL	149	{
	150	if (seg) {
	151	dev_err(dev,
	152	"%s can't access PCI configuration "
	153	"space under this host bridge.\n",
	154	estr);
	155	return -EIO;
	156	}
	157
	158	/*
	159	* Failure in adding MMCFG information is not fatal,
	160	* just can't access extended configuration space of
	161	* devices under this host bridge.
	162	*/
	163	dev_warn(dev,
	164	"%s can't access extended PCI configuration "
	165	"space under this bridge.\n",
	166	estr);
	167
	168	return 0;
	169	}
	170
a18e3690 GKH	171	static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
a18e3690 GKH	172	u8 end, phys_addr_t addr)
c0fa4078 JL	173	{
	174	int result;
	175	struct device *dev = &info->bridge->dev;
	176
	177	info->start_bus = start;
	178	info->end_bus = end;
	179	info->mcfg_added = false;
	180
	181	/* return success if MMCFG is not in use */
	182	if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
	183	return 0;
	184
	185	if (!(pci_probe & PCI_PROBE_MMCONF))
	186	return check_segment(seg, dev, "MMCONFIG is disabled,");
	187
	188	result = pci_mmconfig_insert(dev, seg, start, end, addr);
	189	if (result == 0) {
	190	/* enable MMCFG if it hasn't been enabled yet */
	191	if (raw_pci_ext_ops == NULL)
	192	raw_pci_ext_ops = &pci_mmcfg;
	193	info->mcfg_added = true;
	194	} else if (result != -EEXIST)
	195	return check_segment(seg, dev,
	196	"fail to add MMCONFIG information,");
	197
	198	return 0;
	199	}
	200
	201	static void teardown_mcfg_map(struct pci_root_info *info)
	202	{
	203	if (info->mcfg_added) {
	204	pci_mmconfig_delete(info->segment, info->start_bus,
	205	info->end_bus);
	206	info->mcfg_added = false;
	207	}
	208	}
	209	#else
a18e3690	210	static int setup_mcfg_map(struct pci_root_info *info,
c0fa4078 JL	211	u16 seg, u8 start, u8 end,
	212	phys_addr_t addr)
	213	{
	214	return 0;
	215	}
	216	static void teardown_mcfg_map(struct pci_root_info *info)
	217	{
	218	}
	219	#endif
	220
62f420f8 GH	221	static acpi_status
	222	resource_to_addr(struct acpi_resource *resource,
	223	struct acpi_resource_address64 *addr)
	224	{
	225	acpi_status status;
66528fdd BH	226	struct acpi_resource_memory24 *memory24;
	227	struct acpi_resource_memory32 *memory32;
	228	struct acpi_resource_fixed_memory32 *fixed_memory32;
62f420f8	229
66528fdd BH	230	memset(addr, 0, sizeof(*addr));
	231	switch (resource->type) {
	232	case ACPI_RESOURCE_TYPE_MEMORY24:
	233	memory24 = &resource->data.memory24;
	234	addr->resource_type = ACPI_MEMORY_RANGE;
	235	addr->minimum = memory24->minimum;
	236	addr->address_length = memory24->address_length;
	237	addr->maximum = addr->minimum + addr->address_length - 1;
62f420f8	238	return AE_OK;
66528fdd BH	239	case ACPI_RESOURCE_TYPE_MEMORY32:
	240	memory32 = &resource->data.memory32;
	241	addr->resource_type = ACPI_MEMORY_RANGE;
	242	addr->minimum = memory32->minimum;
	243	addr->address_length = memory32->address_length;
	244	addr->maximum = addr->minimum + addr->address_length - 1;
	245	return AE_OK;
	246	case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
	247	fixed_memory32 = &resource->data.fixed_memory32;
	248	addr->resource_type = ACPI_MEMORY_RANGE;
	249	addr->minimum = fixed_memory32->address;
	250	addr->address_length = fixed_memory32->address_length;
	251	addr->maximum = addr->minimum + addr->address_length - 1;
	252	return AE_OK;
	253	case ACPI_RESOURCE_TYPE_ADDRESS16:
	254	case ACPI_RESOURCE_TYPE_ADDRESS32:
	255	case ACPI_RESOURCE_TYPE_ADDRESS64:
	256	status = acpi_resource_to_address64(resource, addr);
	257	if (ACPI_SUCCESS(status) &&
	258	(addr->resource_type == ACPI_MEMORY_RANGE \|\|
	259	addr->resource_type == ACPI_IO_RANGE) &&
	260	addr->address_length > 0) {
	261	return AE_OK;
	262	}
	263	break;
62f420f8 GH	264	}
	265	return AE_ERROR;
	266	}
	267
	268	static acpi_status
	269	count_resource(struct acpi_resource acpi_res, void data)
	270	{
	271	struct pci_root_info *info = data;
	272	struct acpi_resource_address64 addr;
	273	acpi_status status;
	274
	275	status = resource_to_addr(acpi_res, &addr);
	276	if (ACPI_SUCCESS(status))
	277	info->res_num++;
	278	return AE_OK;
	279	}
	280
	281	static acpi_status
	282	setup_resource(struct acpi_resource acpi_res, void data)
	283	{
	284	struct pci_root_info *info = data;
	285	struct resource *res;
	286	struct acpi_resource_address64 addr;
	287	acpi_status status;
	288	unsigned long flags;
ae5cd864	289	u64 start, orig_end, end;
2cdb3f1d	290
62f420f8 GH	291	status = resource_to_addr(acpi_res, &addr);
	292	if (!ACPI_SUCCESS(status))
	293	return AE_OK;
	294
	295	if (addr.resource_type == ACPI_MEMORY_RANGE) {
62f420f8 GH	296	flags = IORESOURCE_MEM;
	297	if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
	298	flags \|= IORESOURCE_PREFETCH;
	299	} else if (addr.resource_type == ACPI_IO_RANGE) {
62f420f8 GH	300	flags = IORESOURCE_IO;
	301	} else
	302	return AE_OK;
	303
2cdb3f1d	304	start = addr.minimum + addr.translation_offset;
ae5cd864 GH	305	orig_end = end = addr.maximum + addr.translation_offset;
	306
	307	/* Exclude non-addressable range or non-addressable portion of range */
	308	end = min(end, (u64)iomem_resource.end);
	309	if (end <= start) {
	310	dev_info(&info->bridge->dev,
	311	"host bridge window [%#llx-%#llx] "
	312	"(ignored, not CPU addressable)\n", start, orig_end);
	313	return AE_OK;
	314	} else if (orig_end != end) {
	315	dev_info(&info->bridge->dev,
	316	"host bridge window [%#llx-%#llx] "
	317	"([%#llx-%#llx] ignored, not CPU addressable)\n",
	318	start, orig_end, end + 1, orig_end);
	319	}
f9cde5ff	320
2cdb3f1d YL	321	res = &info->res[info->res_num];
	322	res->name = info->name;
	323	res->flags = flags;
	324	res->start = start;
	325	res->end = end;
b4873931	326	info->res_offset[info->res_num] = addr.translation_offset;
ea221e64	327	info->res_num++;
2cdb3f1d	328
ea221e64	329	if (!pci_use_crs)
f1db6fde BH	330	dev_printk(KERN_DEBUG, &info->bridge->dev,
f1db6fde BH	331	"host bridge window %pR (ignored)\n", res);
4723d0f2 BH	332
	333	return AE_OK;
	334	}
	335
6e33a852	336	static void coalesce_windows(struct pci_root_info *info, unsigned long type)
4723d0f2 BH	337	{
	338	int i, j;
	339	struct resource res1, res2;
	340
	341	for (i = 0; i < info->res_num; i++) {
	342	res1 = &info->res[i];
	343	if (!(res1->flags & type))
	344	continue;
	345
	346	for (j = i + 1; j < info->res_num; j++) {
	347	res2 = &info->res[j];
	348	if (!(res2->flags & type))
	349	continue;
	350
	351	/*
	352	* I don't like throwing away windows because then
	353	* our resources no longer match the ACPI _CRS, but
	354	* the kernel resource tree doesn't allow overlaps.
	355	*/
74d24b21	356	if (resource_overlaps(res1, res2)) {
3ad674d6 AN	357	res2->start = min(res1->start, res2->start);
3ad674d6 AN	358	res2->end = max(res1->end, res2->end);
4723d0f2 BH	359	dev_info(&info->bridge->dev,
4723d0f2 BH	360	"host bridge window expanded to %pR; %pR ignored\n",
3ad674d6 AN	361	res2, res1);
3ad674d6 AN	362	res1->flags = 0;
4723d0f2 BH	363	}
	364	}
	365	}
	366	}
	367
9a03d28d YL	368	static void add_resources(struct pci_root_info *info,
9a03d28d YL	369	struct list_head *resources)
4723d0f2 BH	370	{
	371	int i;
	372	struct resource res, root, *conflict;
	373
4723d0f2 BH	374	coalesce_windows(info, IORESOURCE_MEM);
	375	coalesce_windows(info, IORESOURCE_IO);
	376
	377	for (i = 0; i < info->res_num; i++) {
	378	res = &info->res[i];
	379
	380	if (res->flags & IORESOURCE_MEM)
	381	root = &iomem_resource;
	382	else if (res->flags & IORESOURCE_IO)
	383	root = &ioport_resource;
42887b29	384	else
4723d0f2 BH	385	continue;
	386
	387	conflict = insert_resource_conflict(root, res);
	388	if (conflict)
43d786ed BH	389	dev_info(&info->bridge->dev,
	390	"ignoring host bridge window %pR (conflicts with %s %pR)\n",
	391	res, conflict->name, conflict);
4723d0f2	392	else
b4873931 MY	393	pci_add_resource_offset(resources, res,
b4873931 MY	394	info->res_offset[i]);
62f420f8	395	}
62f420f8 GH	396	}
62f420f8 GH	397
fd3b0c1e	398	static void free_pci_root_info_res(struct pci_root_info *info)
baa495d9	399	{
baa495d9	400	kfree(info->res);
fd3b0c1e	401	info->res = NULL;
b4873931 MY	402	kfree(info->res_offset);
b4873931 MY	403	info->res_offset = NULL;
fd3b0c1e YL	404	info->res_num = 0;
	405	}
	406
	407	static void __release_pci_root_info(struct pci_root_info *info)
	408	{
	409	int i;
	410	struct resource *res;
	411
	412	for (i = 0; i < info->res_num; i++) {
	413	res = &info->res[i];
	414
	415	if (!res->parent)
	416	continue;
	417
	418	if (!(res->flags & (IORESOURCE_MEM \| IORESOURCE_IO)))
	419	continue;
	420
	421	release_resource(res);
	422	}
	423
	424	free_pci_root_info_res(info);
	425
c0fa4078 JL	426	teardown_mcfg_map(info);
c0fa4078 JL	427
fd3b0c1e YL	428	kfree(info);
fd3b0c1e YL	429	}
c0fa4078	430
fd3b0c1e YL	431	static void release_pci_root_info(struct pci_host_bridge *bridge)
	432	{
	433	struct pci_root_info *info = bridge->release_data;
	434
	435	__release_pci_root_info(info);
baa495d9 YL	436	}
baa495d9 YL	437
62f420f8	438	static void
9a03d28d YL	439	probe_pci_root_info(struct pci_root_info info, struct acpi_device device,
9a03d28d YL	440	int busnum, int domain)
62f420f8	441	{
62f420f8 GH	442	size_t size;
62f420f8 GH	443
5c1d81d1	444	sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
baa495d9	445	info->bridge = device;
5c1d81d1	446
baa495d9	447	info->res_num = 0;
62f420f8	448	acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
baa495d9 YL	449	info);
baa495d9 YL	450	if (!info->res_num)
62f420f8 GH	451	return;
62f420f8 GH	452
baa495d9	453	size = sizeof(info->res) info->res_num;
4cd8daf0	454	info->res = kzalloc(size, GFP_KERNEL);
b4873931 MY	455	if (!info->res) {
	456	info->res_num = 0;
	457	return;
	458	}
	459
	460	size = sizeof(info->res_offset) info->res_num;
	461	info->res_num = 0;
	462	info->res_offset = kzalloc(size, GFP_KERNEL);
	463	if (!info->res_offset) {
	464	kfree(info->res);
	465	info->res = NULL;
2cd6975a	466	return;
b4873931	467	}
62f420f8	468
62f420f8	469	acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
baa495d9	470	info);
62f420f8 GH	471	}
62f420f8 GH	472
a18e3690	473	struct pci_bus pci_acpi_scan_root(struct acpi_pci_root root)
1da177e4	474	{
57283776	475	struct acpi_device *device = root->device;
fd3b0c1e	476	struct pci_root_info *info = NULL;
57283776 BH	477	int domain = root->segment;
57283776 BH	478	int busnum = root->secondary.start;
2cd6975a	479	LIST_HEAD(resources);
c0fa4078	480	struct pci_bus *bus = NULL;
08f1c192	481	struct pci_sysdata *sd;
871d5f8d YL	482	int node;
871d5f8d YL	483	#ifdef CONFIG_ACPI_NUMA
08f1c192	484	int pxm;
871d5f8d	485	#endif
08f1c192	486
1f09b09b BH	487	if (pci_ignore_seg)
	488	domain = 0;
	489
a79e4198	490	if (domain && !pci_domains_supported) {
2a6bed83 BH	491	printk(KERN_WARNING "pci_bus %04x:%02x: "
	492	"ignored (multiple domains not supported)\n",
	493	domain, busnum);
a79e4198 JG	494	return NULL;
	495	}
	496
8a3d01c7	497	node = NUMA_NO_NODE;
871d5f8d YL	498	#ifdef CONFIG_ACPI_NUMA
	499	pxm = acpi_get_pxm(device->handle);
	500	if (pxm >= 0)
	501	node = pxm_to_node(pxm);
871d5f8d	502	#endif
8a3d01c7	503	if (node == NUMA_NO_NODE)
6616dbdf	504	node = x86_pci_root_bus_node(busnum);
b755de8d	505
8a3d01c7 BH	506	if (node != NUMA_NO_NODE && !node_online(node))
8a3d01c7 BH	507	node = NUMA_NO_NODE;
871d5f8d	508
35cb05e5 YL	509	info = kzalloc(sizeof(*info), GFP_KERNEL);
35cb05e5 YL	510	if (!info) {
2a6bed83 BH	511	printk(KERN_WARNING "pci_bus %04x:%02x: "
2a6bed83 BH	512	"ignored (out of memory)\n", domain, busnum);
08f1c192 MBY	513	return NULL;
08f1c192 MBY	514	}
69e1a33f	515
35cb05e5	516	sd = &info->sd;
a79e4198	517	sd->domain = domain;
871d5f8d	518	sd->node = node;
7b199811	519	sd->companion = device;
b87e81e5	520	/*
	521	* Maybe the desired pci bus has been already scanned. In such case
	522	* it is unnecessary to scan the pci bus with the given domain,busnum.
	523	*/
	524	bus = pci_find_bus(domain, busnum);
	525	if (bus) {
	526	/*
	527	* If the desired bus exits, the content of bus->sysdata will
	528	* be replaced by sd.
	529	*/
	530	memcpy(bus->sysdata, sd, sizeof(*sd));
fd3b0c1e	531	kfree(info);
626fdfec	532	} else {
fd3b0c1e	533	probe_pci_root_info(info, device, busnum, domain);
316d86fe	534
5c1d81d1 YL	535	/* insert busn res at first */
5c1d81d1 YL	536	pci_add_resource(&resources, &root->secondary);
316d86fe BH	537	/*
	538	* _CRS with no apertures is normal, so only fall back to
	539	* defaults or native bridge info if we're ignoring _CRS.
	540	*/
9a03d28d	541	if (pci_use_crs)
fd3b0c1e	542	add_resources(info, &resources);
9a03d28d	543	else {
fd3b0c1e	544	free_pci_root_info_res(info);
2cd6975a	545	x86_pci_root_bus_resources(busnum, &resources);
9a03d28d	546	}
fd3b0c1e	547
c0fa4078 JL	548	if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
	549	(u8)root->secondary.end, root->mcfg_addr))
	550	bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
	551	sd, &resources);
	552
fd3b0c1e	553	if (bus) {
5c1d81d1	554	pci_scan_child_bus(bus);
fd3b0c1e YL	555	pci_set_host_bridge_release(
	556	to_pci_host_bridge(bus->bridge),
	557	release_pci_root_info, info);
	558	} else {
2cd6975a	559	pci_free_resource_list(&resources);
fd3b0c1e YL	560	__release_pci_root_info(info);
fd3b0c1e YL	561	}
626fdfec	562	}
08f1c192	563
b03e7495 JM	564	/* After the PCI-E bus has been walked and all devices discovered,
	565	* configure any settings of the fabric that might be necessary.
	566	*/
	567	if (bus) {
	568	struct pci_bus *child;
a58674ff BH	569	list_for_each_entry(child, &bus->children, node)
a58674ff BH	570	pcie_bus_configure_settings(child);
b03e7495 JM	571	}
b03e7495 JM	572
8a3d01c7	573	if (bus && node != NUMA_NO_NODE) {
69e1a33f	574	#ifdef CONFIG_ACPI_NUMA
dbb6152e	575	if (pxm >= 0)
2b8c2efe BH	576	dev_printk(KERN_DEBUG, &bus->dev,
2b8c2efe BH	577	"on NUMA node %d (pxm %d)\n", node, pxm);
dbb6152e	578	#else
2b8c2efe	579	dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
69e1a33f	580	#endif
dbb6152e	581	}
62f420f8	582
69e1a33f	583	return bus;
1da177e4 LT	584	}
1da177e4 LT	585
6c0cc950 RW	586	int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
	587	{
	588	struct pci_sysdata *sd = bridge->bus->sysdata;
	589
7b199811	590	ACPI_COMPANION_SET(&bridge->dev, sd->companion);
6c0cc950 RW	591	return 0;
	592	}
	593
8dd779b1	594	int __init pci_acpi_init(void)
1da177e4 LT	595	{
	596	struct pci_dev *dev = NULL;
	597
1da177e4	598	if (acpi_noirq)
b72d0db9	599	return -ENODEV;
1da177e4 LT	600
	601	printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
	602	acpi_irq_penalty_init();
1da177e4	603	pcibios_enable_irq = acpi_pci_irq_enable;
87bec66b	604	pcibios_disable_irq = acpi_pci_irq_disable;
ab3b3793	605	x86_init.pci.init_irq = x86_init_noop;
1da177e4 LT	606
	607	if (pci_routeirq) {
	608	/*
	609	* PCI IRQ routing is set up by pci_enable_device(), but we
	610	* also do it here in case there are still broken drivers that
	611	* don't use pci_enable_device().
	612	*/
	613	printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
fb37fb96	614	for_each_pci_dev(dev)
1da177e4	615	acpi_pci_irq_enable(dev);
657472e9	616	}
1da177e4	617
1da177e4 LT	618	return 0;
1da177e4 LT	619	}