Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | #include <linux/pci.h> |
2 | #include <linux/acpi.h> | |
3 | #include <linux/init.h> | |
b33fa1f3 | 4 | #include <linux/irq.h> |
036fff4c | 5 | #include <linux/dmi.h> |
5a0e3ad6 | 6 | #include <linux/slab.h> |
69e1a33f | 7 | #include <asm/numa.h> |
82487711 | 8 | #include <asm/pci_x86.h> |
1da177e4 | 9 | |
62f420f8 | 10 | struct pci_root_info { |
42887b29 | 11 | struct acpi_device *bridge; |
fe05725f | 12 | char name[16]; |
62f420f8 GH |
13 | unsigned int res_num; |
14 | struct resource *res; | |
62f420f8 | 15 | int busnum; |
35cb05e5 | 16 | struct pci_sysdata sd; |
62f420f8 GH |
17 | }; |
18 | ||
7bc5e3f2 BH |
19 | static bool pci_use_crs = true; |
20 | ||
21 | static int __init set_use_crs(const struct dmi_system_id *id) | |
22 | { | |
23 | pci_use_crs = true; | |
24 | return 0; | |
25 | } | |
26 | ||
28c3c05d DJ |
27 | static int __init set_nouse_crs(const struct dmi_system_id *id) |
28 | { | |
29 | pci_use_crs = false; | |
30 | return 0; | |
31 | } | |
32 | ||
7bc5e3f2 BH |
33 | static const struct dmi_system_id pci_use_crs_table[] __initconst = { |
34 | /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */ | |
35 | { | |
36 | .callback = set_use_crs, | |
37 | .ident = "IBM System x3800", | |
38 | .matches = { | |
39 | DMI_MATCH(DMI_SYS_VENDOR, "IBM"), | |
40 | DMI_MATCH(DMI_PRODUCT_NAME, "x3800"), | |
41 | }, | |
42 | }, | |
2491762c BH |
43 | /* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */ |
44 | /* 2006 AMD HT/VIA system with two host bridges */ | |
45 | { | |
46 | .callback = set_use_crs, | |
47 | .ident = "ASRock ALiveSATA2-GLAN", | |
48 | .matches = { | |
49 | DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"), | |
50 | }, | |
51 | }, | |
29cf7a30 PM |
52 | /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */ |
53 | /* 2006 AMD HT/VIA system with two host bridges */ | |
54 | { | |
55 | .callback = set_use_crs, | |
56 | .ident = "ASUS M2V-MX SE", | |
57 | .matches = { | |
58 | DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."), | |
59 | DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"), | |
60 | DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."), | |
61 | }, | |
62 | }, | |
84113717 JN |
63 | /* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */ |
64 | { | |
65 | .callback = set_use_crs, | |
66 | .ident = "MSI MS-7253", | |
67 | .matches = { | |
68 | DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"), | |
69 | DMI_MATCH(DMI_BOARD_NAME, "MS-7253"), | |
70 | DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"), | |
84113717 JN |
71 | }, |
72 | }, | |
28c3c05d | 73 | |
e702781f DJ |
74 | /* Now for the blacklist.. */ |
75 | ||
76 | /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */ | |
77 | { | |
78 | .callback = set_nouse_crs, | |
79 | .ident = "Dell Studio 1557", | |
80 | .matches = { | |
81 | DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."), | |
82 | DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"), | |
83 | DMI_MATCH(DMI_BIOS_VERSION, "A09"), | |
84 | }, | |
85 | }, | |
8b6a5af9 DJ |
86 | /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */ |
87 | { | |
88 | .callback = set_nouse_crs, | |
89 | .ident = "Thinkpad SL510", | |
90 | .matches = { | |
91 | DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), | |
92 | DMI_MATCH(DMI_BOARD_NAME, "2847DFG"), | |
93 | DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"), | |
94 | }, | |
95 | }, | |
7bc5e3f2 BH |
96 | {} |
97 | }; | |
98 | ||
99 | void __init pci_acpi_crs_quirks(void) | |
100 | { | |
101 | int year; | |
102 | ||
103 | if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008) | |
104 | pci_use_crs = false; | |
105 | ||
106 | dmi_check_system(pci_use_crs_table); | |
107 | ||
108 | /* | |
109 | * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that | |
110 | * takes precedence over anything we figured out above. | |
111 | */ | |
112 | if (pci_probe & PCI_ROOT_NO_CRS) | |
113 | pci_use_crs = false; | |
114 | else if (pci_probe & PCI_USE__CRS) | |
115 | pci_use_crs = true; | |
116 | ||
117 | printk(KERN_INFO "PCI: %s host bridge windows from ACPI; " | |
118 | "if necessary, use \"pci=%s\" and report a bug\n", | |
119 | pci_use_crs ? "Using" : "Ignoring", | |
120 | pci_use_crs ? "nocrs" : "use_crs"); | |
121 | } | |
122 | ||
62f420f8 GH |
123 | static acpi_status |
124 | resource_to_addr(struct acpi_resource *resource, | |
125 | struct acpi_resource_address64 *addr) | |
126 | { | |
127 | acpi_status status; | |
66528fdd BH |
128 | struct acpi_resource_memory24 *memory24; |
129 | struct acpi_resource_memory32 *memory32; | |
130 | struct acpi_resource_fixed_memory32 *fixed_memory32; | |
62f420f8 | 131 | |
66528fdd BH |
132 | memset(addr, 0, sizeof(*addr)); |
133 | switch (resource->type) { | |
134 | case ACPI_RESOURCE_TYPE_MEMORY24: | |
135 | memory24 = &resource->data.memory24; | |
136 | addr->resource_type = ACPI_MEMORY_RANGE; | |
137 | addr->minimum = memory24->minimum; | |
138 | addr->address_length = memory24->address_length; | |
139 | addr->maximum = addr->minimum + addr->address_length - 1; | |
62f420f8 | 140 | return AE_OK; |
66528fdd BH |
141 | case ACPI_RESOURCE_TYPE_MEMORY32: |
142 | memory32 = &resource->data.memory32; | |
143 | addr->resource_type = ACPI_MEMORY_RANGE; | |
144 | addr->minimum = memory32->minimum; | |
145 | addr->address_length = memory32->address_length; | |
146 | addr->maximum = addr->minimum + addr->address_length - 1; | |
147 | return AE_OK; | |
148 | case ACPI_RESOURCE_TYPE_FIXED_MEMORY32: | |
149 | fixed_memory32 = &resource->data.fixed_memory32; | |
150 | addr->resource_type = ACPI_MEMORY_RANGE; | |
151 | addr->minimum = fixed_memory32->address; | |
152 | addr->address_length = fixed_memory32->address_length; | |
153 | addr->maximum = addr->minimum + addr->address_length - 1; | |
154 | return AE_OK; | |
155 | case ACPI_RESOURCE_TYPE_ADDRESS16: | |
156 | case ACPI_RESOURCE_TYPE_ADDRESS32: | |
157 | case ACPI_RESOURCE_TYPE_ADDRESS64: | |
158 | status = acpi_resource_to_address64(resource, addr); | |
159 | if (ACPI_SUCCESS(status) && | |
160 | (addr->resource_type == ACPI_MEMORY_RANGE || | |
161 | addr->resource_type == ACPI_IO_RANGE) && | |
162 | addr->address_length > 0) { | |
163 | return AE_OK; | |
164 | } | |
165 | break; | |
62f420f8 GH |
166 | } |
167 | return AE_ERROR; | |
168 | } | |
169 | ||
170 | static acpi_status | |
171 | count_resource(struct acpi_resource *acpi_res, void *data) | |
172 | { | |
173 | struct pci_root_info *info = data; | |
174 | struct acpi_resource_address64 addr; | |
175 | acpi_status status; | |
176 | ||
177 | status = resource_to_addr(acpi_res, &addr); | |
178 | if (ACPI_SUCCESS(status)) | |
179 | info->res_num++; | |
180 | return AE_OK; | |
181 | } | |
182 | ||
183 | static acpi_status | |
184 | setup_resource(struct acpi_resource *acpi_res, void *data) | |
185 | { | |
186 | struct pci_root_info *info = data; | |
187 | struct resource *res; | |
188 | struct acpi_resource_address64 addr; | |
189 | acpi_status status; | |
190 | unsigned long flags; | |
ae5cd864 | 191 | u64 start, orig_end, end; |
2cdb3f1d | 192 | |
62f420f8 GH |
193 | status = resource_to_addr(acpi_res, &addr); |
194 | if (!ACPI_SUCCESS(status)) | |
195 | return AE_OK; | |
196 | ||
197 | if (addr.resource_type == ACPI_MEMORY_RANGE) { | |
62f420f8 GH |
198 | flags = IORESOURCE_MEM; |
199 | if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY) | |
200 | flags |= IORESOURCE_PREFETCH; | |
201 | } else if (addr.resource_type == ACPI_IO_RANGE) { | |
62f420f8 GH |
202 | flags = IORESOURCE_IO; |
203 | } else | |
204 | return AE_OK; | |
205 | ||
2cdb3f1d | 206 | start = addr.minimum + addr.translation_offset; |
ae5cd864 GH |
207 | orig_end = end = addr.maximum + addr.translation_offset; |
208 | ||
209 | /* Exclude non-addressable range or non-addressable portion of range */ | |
210 | end = min(end, (u64)iomem_resource.end); | |
211 | if (end <= start) { | |
212 | dev_info(&info->bridge->dev, | |
213 | "host bridge window [%#llx-%#llx] " | |
214 | "(ignored, not CPU addressable)\n", start, orig_end); | |
215 | return AE_OK; | |
216 | } else if (orig_end != end) { | |
217 | dev_info(&info->bridge->dev, | |
218 | "host bridge window [%#llx-%#llx] " | |
219 | "([%#llx-%#llx] ignored, not CPU addressable)\n", | |
220 | start, orig_end, end + 1, orig_end); | |
221 | } | |
f9cde5ff | 222 | |
2cdb3f1d YL |
223 | res = &info->res[info->res_num]; |
224 | res->name = info->name; | |
225 | res->flags = flags; | |
226 | res->start = start; | |
227 | res->end = end; | |
228 | res->child = NULL; | |
229 | ||
7bc5e3f2 | 230 | if (!pci_use_crs) { |
f1db6fde BH |
231 | dev_printk(KERN_DEBUG, &info->bridge->dev, |
232 | "host bridge window %pR (ignored)\n", res); | |
233 | return AE_OK; | |
234 | } | |
235 | ||
4723d0f2 BH |
236 | info->res_num++; |
237 | if (addr.translation_offset) | |
238 | dev_info(&info->bridge->dev, "host bridge window %pR " | |
239 | "(PCI address [%#llx-%#llx])\n", | |
240 | res, res->start - addr.translation_offset, | |
241 | res->end - addr.translation_offset); | |
242 | else | |
243 | dev_info(&info->bridge->dev, "host bridge window %pR\n", res); | |
244 | ||
245 | return AE_OK; | |
246 | } | |
247 | ||
6e33a852 | 248 | static void coalesce_windows(struct pci_root_info *info, unsigned long type) |
4723d0f2 BH |
249 | { |
250 | int i, j; | |
251 | struct resource *res1, *res2; | |
252 | ||
253 | for (i = 0; i < info->res_num; i++) { | |
254 | res1 = &info->res[i]; | |
255 | if (!(res1->flags & type)) | |
256 | continue; | |
257 | ||
258 | for (j = i + 1; j < info->res_num; j++) { | |
259 | res2 = &info->res[j]; | |
260 | if (!(res2->flags & type)) | |
261 | continue; | |
262 | ||
263 | /* | |
264 | * I don't like throwing away windows because then | |
265 | * our resources no longer match the ACPI _CRS, but | |
266 | * the kernel resource tree doesn't allow overlaps. | |
267 | */ | |
74d24b21 | 268 | if (resource_overlaps(res1, res2)) { |
4723d0f2 BH |
269 | res1->start = min(res1->start, res2->start); |
270 | res1->end = max(res1->end, res2->end); | |
271 | dev_info(&info->bridge->dev, | |
272 | "host bridge window expanded to %pR; %pR ignored\n", | |
273 | res1, res2); | |
274 | res2->flags = 0; | |
275 | } | |
276 | } | |
277 | } | |
278 | } | |
279 | ||
9a03d28d YL |
280 | static void add_resources(struct pci_root_info *info, |
281 | struct list_head *resources) | |
4723d0f2 BH |
282 | { |
283 | int i; | |
284 | struct resource *res, *root, *conflict; | |
285 | ||
4723d0f2 BH |
286 | coalesce_windows(info, IORESOURCE_MEM); |
287 | coalesce_windows(info, IORESOURCE_IO); | |
288 | ||
289 | for (i = 0; i < info->res_num; i++) { | |
290 | res = &info->res[i]; | |
291 | ||
292 | if (res->flags & IORESOURCE_MEM) | |
293 | root = &iomem_resource; | |
294 | else if (res->flags & IORESOURCE_IO) | |
295 | root = &ioport_resource; | |
42887b29 | 296 | else |
4723d0f2 BH |
297 | continue; |
298 | ||
299 | conflict = insert_resource_conflict(root, res); | |
300 | if (conflict) | |
43d786ed BH |
301 | dev_info(&info->bridge->dev, |
302 | "ignoring host bridge window %pR (conflicts with %s %pR)\n", | |
303 | res, conflict->name, conflict); | |
4723d0f2 | 304 | else |
9a03d28d | 305 | pci_add_resource(resources, res); |
62f420f8 | 306 | } |
62f420f8 GH |
307 | } |
308 | ||
fd3b0c1e | 309 | static void free_pci_root_info_res(struct pci_root_info *info) |
baa495d9 | 310 | { |
baa495d9 | 311 | kfree(info->res); |
fd3b0c1e YL |
312 | info->res = NULL; |
313 | info->res_num = 0; | |
314 | } | |
315 | ||
316 | static void __release_pci_root_info(struct pci_root_info *info) | |
317 | { | |
318 | int i; | |
319 | struct resource *res; | |
320 | ||
321 | for (i = 0; i < info->res_num; i++) { | |
322 | res = &info->res[i]; | |
323 | ||
324 | if (!res->parent) | |
325 | continue; | |
326 | ||
327 | if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO))) | |
328 | continue; | |
329 | ||
330 | release_resource(res); | |
331 | } | |
332 | ||
333 | free_pci_root_info_res(info); | |
334 | ||
335 | kfree(info); | |
336 | } | |
337 | static void release_pci_root_info(struct pci_host_bridge *bridge) | |
338 | { | |
339 | struct pci_root_info *info = bridge->release_data; | |
340 | ||
341 | __release_pci_root_info(info); | |
baa495d9 YL |
342 | } |
343 | ||
62f420f8 | 344 | static void |
9a03d28d YL |
345 | probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device, |
346 | int busnum, int domain) | |
62f420f8 | 347 | { |
62f420f8 GH |
348 | size_t size; |
349 | ||
baa495d9 YL |
350 | info->bridge = device; |
351 | info->res_num = 0; | |
62f420f8 | 352 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource, |
baa495d9 YL |
353 | info); |
354 | if (!info->res_num) | |
62f420f8 GH |
355 | return; |
356 | ||
baa495d9 | 357 | size = sizeof(*info->res) * info->res_num; |
9a03d28d | 358 | info->res_num = 0; |
baa495d9 YL |
359 | info->res = kmalloc(size, GFP_KERNEL); |
360 | if (!info->res) | |
2cd6975a | 361 | return; |
62f420f8 | 362 | |
fe05725f | 363 | sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum); |
62f420f8 | 364 | |
62f420f8 | 365 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, |
baa495d9 | 366 | info); |
62f420f8 GH |
367 | } |
368 | ||
57283776 | 369 | struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root) |
1da177e4 | 370 | { |
57283776 | 371 | struct acpi_device *device = root->device; |
fd3b0c1e | 372 | struct pci_root_info *info = NULL; |
57283776 BH |
373 | int domain = root->segment; |
374 | int busnum = root->secondary.start; | |
2cd6975a | 375 | LIST_HEAD(resources); |
69e1a33f | 376 | struct pci_bus *bus; |
08f1c192 | 377 | struct pci_sysdata *sd; |
871d5f8d YL |
378 | int node; |
379 | #ifdef CONFIG_ACPI_NUMA | |
08f1c192 | 380 | int pxm; |
871d5f8d | 381 | #endif |
08f1c192 | 382 | |
a79e4198 | 383 | if (domain && !pci_domains_supported) { |
2a6bed83 BH |
384 | printk(KERN_WARNING "pci_bus %04x:%02x: " |
385 | "ignored (multiple domains not supported)\n", | |
386 | domain, busnum); | |
a79e4198 JG |
387 | return NULL; |
388 | } | |
389 | ||
871d5f8d YL |
390 | node = -1; |
391 | #ifdef CONFIG_ACPI_NUMA | |
392 | pxm = acpi_get_pxm(device->handle); | |
393 | if (pxm >= 0) | |
394 | node = pxm_to_node(pxm); | |
395 | if (node != -1) | |
396 | set_mp_bus_to_node(busnum, node); | |
397 | else | |
871d5f8d | 398 | #endif |
871d5f8d | 399 | node = get_mp_bus_to_node(busnum); |
b755de8d YL |
400 | |
401 | if (node != -1 && !node_online(node)) | |
402 | node = -1; | |
871d5f8d | 403 | |
35cb05e5 YL |
404 | info = kzalloc(sizeof(*info), GFP_KERNEL); |
405 | if (!info) { | |
2a6bed83 BH |
406 | printk(KERN_WARNING "pci_bus %04x:%02x: " |
407 | "ignored (out of memory)\n", domain, busnum); | |
08f1c192 MBY |
408 | return NULL; |
409 | } | |
69e1a33f | 410 | |
35cb05e5 | 411 | sd = &info->sd; |
a79e4198 | 412 | sd->domain = domain; |
871d5f8d | 413 | sd->node = node; |
b87e81e5 | 414 | /* |
415 | * Maybe the desired pci bus has been already scanned. In such case | |
416 | * it is unnecessary to scan the pci bus with the given domain,busnum. | |
417 | */ | |
418 | bus = pci_find_bus(domain, busnum); | |
419 | if (bus) { | |
420 | /* | |
421 | * If the desired bus exits, the content of bus->sysdata will | |
422 | * be replaced by sd. | |
423 | */ | |
424 | memcpy(bus->sysdata, sd, sizeof(*sd)); | |
fd3b0c1e | 425 | kfree(info); |
626fdfec | 426 | } else { |
fd3b0c1e | 427 | probe_pci_root_info(info, device, busnum, domain); |
316d86fe BH |
428 | |
429 | /* | |
430 | * _CRS with no apertures is normal, so only fall back to | |
431 | * defaults or native bridge info if we're ignoring _CRS. | |
432 | */ | |
9a03d28d | 433 | if (pci_use_crs) |
fd3b0c1e | 434 | add_resources(info, &resources); |
9a03d28d | 435 | else { |
fd3b0c1e | 436 | free_pci_root_info_res(info); |
2cd6975a | 437 | x86_pci_root_bus_resources(busnum, &resources); |
9a03d28d | 438 | } |
fd3b0c1e | 439 | |
2cd6975a BH |
440 | bus = pci_create_root_bus(NULL, busnum, &pci_root_ops, sd, |
441 | &resources); | |
fd3b0c1e | 442 | if (bus) { |
b918c62e | 443 | bus->busn_res.end = pci_scan_child_bus(bus); |
fd3b0c1e YL |
444 | pci_set_host_bridge_release( |
445 | to_pci_host_bridge(bus->bridge), | |
446 | release_pci_root_info, info); | |
447 | } else { | |
2cd6975a | 448 | pci_free_resource_list(&resources); |
fd3b0c1e YL |
449 | __release_pci_root_info(info); |
450 | } | |
626fdfec | 451 | } |
08f1c192 | 452 | |
b03e7495 JM |
453 | /* After the PCI-E bus has been walked and all devices discovered, |
454 | * configure any settings of the fabric that might be necessary. | |
455 | */ | |
456 | if (bus) { | |
457 | struct pci_bus *child; | |
5307f6d5 SI |
458 | list_for_each_entry(child, &bus->children, node) { |
459 | struct pci_dev *self = child->self; | |
460 | if (!self) | |
461 | continue; | |
462 | ||
463 | pcie_bus_configure_settings(child, self->pcie_mpss); | |
464 | } | |
b03e7495 JM |
465 | } |
466 | ||
dbb6152e | 467 | if (bus && node != -1) { |
69e1a33f | 468 | #ifdef CONFIG_ACPI_NUMA |
dbb6152e | 469 | if (pxm >= 0) |
2b8c2efe BH |
470 | dev_printk(KERN_DEBUG, &bus->dev, |
471 | "on NUMA node %d (pxm %d)\n", node, pxm); | |
dbb6152e | 472 | #else |
2b8c2efe | 473 | dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node); |
69e1a33f | 474 | #endif |
dbb6152e | 475 | } |
62f420f8 | 476 | |
69e1a33f | 477 | return bus; |
1da177e4 LT |
478 | } |
479 | ||
8dd779b1 | 480 | int __init pci_acpi_init(void) |
1da177e4 LT |
481 | { |
482 | struct pci_dev *dev = NULL; | |
483 | ||
1da177e4 | 484 | if (acpi_noirq) |
b72d0db9 | 485 | return -ENODEV; |
1da177e4 LT |
486 | |
487 | printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n"); | |
488 | acpi_irq_penalty_init(); | |
1da177e4 | 489 | pcibios_enable_irq = acpi_pci_irq_enable; |
87bec66b | 490 | pcibios_disable_irq = acpi_pci_irq_disable; |
ab3b3793 | 491 | x86_init.pci.init_irq = x86_init_noop; |
1da177e4 LT |
492 | |
493 | if (pci_routeirq) { | |
494 | /* | |
495 | * PCI IRQ routing is set up by pci_enable_device(), but we | |
496 | * also do it here in case there are still broken drivers that | |
497 | * don't use pci_enable_device(). | |
498 | */ | |
499 | printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n"); | |
fb37fb96 | 500 | for_each_pci_dev(dev) |
1da177e4 | 501 | acpi_pci_irq_enable(dev); |
657472e9 | 502 | } |
1da177e4 | 503 | |
1da177e4 LT |
504 | return 0; |
505 | } |