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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | /*---------------------------------------------------------------------------+ |
3 | | control_w.h | | |
4 | | | | |
5 | | Copyright (C) 1992,1993 | | |
6 | | W. Metzenthen, 22 Parker St, Ormond, Vic 3163, | | |
7 | | Australia. E-mail billm@vaxc.cc.monash.edu.au | | |
8 | | | | |
9 | +---------------------------------------------------------------------------*/ | |
10 | ||
11 | #ifndef _CONTROLW_H_ | |
12 | #define _CONTROLW_H_ | |
13 | ||
14 | #ifdef __ASSEMBLY__ | |
15 | #define _Const_(x) $##x | |
16 | #else | |
17 | #define _Const_(x) x | |
18 | #endif | |
19 | ||
20 | #define CW_RC _Const_(0x0C00) /* rounding control */ | |
21 | #define CW_PC _Const_(0x0300) /* precision control */ | |
22 | ||
23 | #define CW_Precision Const_(0x0020) /* loss of precision mask */ | |
24 | #define CW_Underflow Const_(0x0010) /* underflow mask */ | |
25 | #define CW_Overflow Const_(0x0008) /* overflow mask */ | |
26 | #define CW_ZeroDiv Const_(0x0004) /* divide by zero mask */ | |
27 | #define CW_Denormal Const_(0x0002) /* denormalized operand mask */ | |
28 | #define CW_Invalid Const_(0x0001) /* invalid operation mask */ | |
29 | ||
30 | #define CW_Exceptions _Const_(0x003f) /* all masks */ | |
31 | ||
32 | #define RC_RND _Const_(0x0000) | |
33 | #define RC_DOWN _Const_(0x0400) | |
34 | #define RC_UP _Const_(0x0800) | |
35 | #define RC_CHOP _Const_(0x0C00) | |
36 | ||
37 | /* p 15-5: Precision control bits affect only the following: | |
38 | ADD, SUB(R), MUL, DIV(R), and SQRT */ | |
39 | #define PR_24_BITS _Const_(0x000) | |
40 | #define PR_53_BITS _Const_(0x200) | |
41 | #define PR_64_BITS _Const_(0x300) | |
42 | #define PR_RESERVED_BITS _Const_(0x100) | |
43 | /* FULL_PRECISION simulates all exceptions masked */ | |
44 | #define FULL_PRECISION (PR_64_BITS | RC_RND | 0x3f) | |
45 | ||
46 | #endif /* _CONTROLW_H_ */ |