Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Machine specific setup for generic | |
3 | */ | |
4 | ||
1da177e4 LT |
5 | #include <linux/smp.h> |
6 | #include <linux/init.h> | |
1da177e4 LT |
7 | #include <linux/interrupt.h> |
8 | #include <asm/acpi.h> | |
9 | #include <asm/arch_hooks.h> | |
e75eac33 JF |
10 | #include <asm/e820.h> |
11 | #include <asm/setup.h> | |
1da177e4 | 12 | |
71e3b818 JS |
13 | #include <mach_ipi.h> |
14 | ||
67664c8f AR |
15 | #ifdef CONFIG_HOTPLUG_CPU |
16 | #define DEFAULT_SEND_IPI (1) | |
17 | #else | |
18 | #define DEFAULT_SEND_IPI (0) | |
19 | #endif | |
20 | ||
71e3b818 | 21 | int no_broadcast = DEFAULT_SEND_IPI; |
67664c8f | 22 | |
1da177e4 LT |
23 | /** |
24 | * pre_intr_init_hook - initialisation prior to setting up interrupt vectors | |
25 | * | |
26 | * Description: | |
27 | * Perform any necessary interrupt initialisation prior to setting up | |
28 | * the "ordinary" interrupt call gates. For legacy reasons, the ISA | |
29 | * interrupts should be initialised here if the machine emulates a PC | |
30 | * in any way. | |
31 | **/ | |
32 | void __init pre_intr_init_hook(void) | |
33 | { | |
3c9cb6de YL |
34 | if (x86_quirks->arch_pre_intr_init) { |
35 | if (x86_quirks->arch_pre_intr_init()) | |
078c0bba IM |
36 | return; |
37 | } | |
1da177e4 LT |
38 | init_ISA_irqs(); |
39 | } | |
40 | ||
92ab7831 JB |
41 | /* |
42 | * IRQ2 is cascade interrupt to second interrupt controller | |
43 | */ | |
44 | static struct irqaction irq2 = { | |
45 | .handler = no_action, | |
46 | .mask = CPU_MASK_NONE, | |
47 | .name = "cascade", | |
48 | }; | |
49 | ||
1da177e4 LT |
50 | /** |
51 | * intr_init_hook - post gate setup interrupt initialisation | |
52 | * | |
53 | * Description: | |
54 | * Fill in any interrupts that may have been left out by the general | |
55 | * init_IRQ() routine. interrupts having to do with the machine rather | |
56 | * than the devices on the I/O bus (like APIC interrupts in intel MP | |
57 | * systems) are started here. | |
58 | **/ | |
59 | void __init intr_init_hook(void) | |
60 | { | |
3c9cb6de YL |
61 | if (x86_quirks->arch_intr_init) { |
62 | if (x86_quirks->arch_intr_init()) | |
078c0bba IM |
63 | return; |
64 | } | |
92ab7831 JB |
65 | if (!acpi_ioapic) |
66 | setup_irq(2, &irq2); | |
67 | ||
1da177e4 LT |
68 | } |
69 | ||
70 | /** | |
71 | * pre_setup_arch_hook - hook called prior to any setup_arch() execution | |
72 | * | |
73 | * Description: | |
74 | * generally used to activate any machine specific identification | |
15e551d2 | 75 | * routines that may be needed before setup_arch() runs. On Voyager |
1da177e4 LT |
76 | * this is used to get the board revision and type. |
77 | **/ | |
78 | void __init pre_setup_arch_hook(void) | |
79 | { | |
80 | } | |
81 | ||
82 | /** | |
83 | * trap_init_hook - initialise system specific traps | |
84 | * | |
85 | * Description: | |
86 | * Called as the final act of trap_init(). Used in VISWS to initialise | |
87 | * the various board specific APIC traps. | |
88 | **/ | |
89 | void __init trap_init_hook(void) | |
90 | { | |
3c9cb6de YL |
91 | if (x86_quirks->arch_trap_init) { |
92 | if (x86_quirks->arch_trap_init()) | |
078c0bba IM |
93 | return; |
94 | } | |
1da177e4 LT |
95 | } |
96 | ||
e9e2cdb4 TG |
97 | static struct irqaction irq0 = { |
98 | .handler = timer_interrupt, | |
936577c6 | 99 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER, |
e9e2cdb4 TG |
100 | .mask = CPU_MASK_NONE, |
101 | .name = "timer" | |
102 | }; | |
1da177e4 | 103 | |
63b5d7af YL |
104 | /** |
105 | * pre_time_init_hook - do any specific initialisations before. | |
106 | * | |
107 | **/ | |
108 | void __init pre_time_init_hook(void) | |
109 | { | |
110 | if (x86_quirks->arch_pre_time_init) | |
111 | x86_quirks->arch_pre_time_init(); | |
112 | } | |
113 | ||
1da177e4 LT |
114 | /** |
115 | * time_init_hook - do any specific initialisations for the system timer. | |
116 | * | |
117 | * Description: | |
118 | * Must plug the system timer interrupt source at HZ into the IRQ listed | |
119 | * in irq_vectors.h:TIMER_IRQ | |
120 | **/ | |
121 | void __init time_init_hook(void) | |
122 | { | |
3c9cb6de | 123 | if (x86_quirks->arch_time_init) { |
078c0bba IM |
124 | /* |
125 | * A nonzero return code does not mean failure, it means | |
126 | * that the architecture quirk does not want any | |
127 | * generic (timer) setup to be performed after this: | |
128 | */ | |
3c9cb6de | 129 | if (x86_quirks->arch_time_init()) |
078c0bba IM |
130 | return; |
131 | } | |
132 | ||
e9e2cdb4 | 133 | irq0.mask = cpumask_of_cpu(0); |
1da177e4 LT |
134 | setup_irq(0, &irq0); |
135 | } | |
136 | ||
137 | #ifdef CONFIG_MCA | |
138 | /** | |
139 | * mca_nmi_hook - hook into MCA specific NMI chain | |
140 | * | |
141 | * Description: | |
27b46d76 | 142 | * The MCA (Microchannel Architecture) has an NMI chain for NMI sources |
1da177e4 LT |
143 | * along the MCA bus. Use this to hook into that chain if you will need |
144 | * it. | |
145 | **/ | |
aaba6d4b | 146 | void mca_nmi_hook(void) |
1da177e4 | 147 | { |
c805b730 CG |
148 | /* |
149 | * If I recall correctly, there's a whole bunch of other things that | |
1da177e4 LT |
150 | * we can do to check for NMI problems, but that's all I know about |
151 | * at the moment. | |
152 | */ | |
c805b730 | 153 | pr_warning("NMI generated from unknown source!\n"); |
1da177e4 LT |
154 | } |
155 | #endif | |
67664c8f AR |
156 | |
157 | static __init int no_ipi_broadcast(char *str) | |
158 | { | |
159 | get_option(&str, &no_broadcast); | |
c805b730 CG |
160 | pr_info("Using %s mode\n", |
161 | no_broadcast ? "No IPI Broadcast" : "IPI Broadcast"); | |
67664c8f AR |
162 | return 1; |
163 | } | |
4aad794a | 164 | __setup("no_ipi_broadcast=", no_ipi_broadcast); |
67664c8f AR |
165 | |
166 | static int __init print_ipi_mode(void) | |
167 | { | |
c805b730 CG |
168 | pr_info("Using IPI %s mode\n", |
169 | no_broadcast ? "No-Shortcut" : "Shortcut"); | |
67664c8f AR |
170 | return 0; |
171 | } | |
172 | ||
173 | late_initcall(print_ipi_mode); | |
e75eac33 | 174 |