timekeeping: Use inject_offset in warp_clock
[linux-2.6-block.git] / arch / x86 / kernel / rtc.c
CommitLineData
1da177e4 1/*
fe599f9f 2 * RTC related functions
1da177e4 3 */
8383d821
JSR
4#include <linux/platform_device.h>
5#include <linux/mc146818rtc.h>
1122b134 6#include <linux/acpi.h>
fe599f9f 7#include <linux/bcd.h>
69c60c88 8#include <linux/export.h>
1da2e3d6 9#include <linux/pnp.h>
3bcbaf6e 10#include <linux/of.h>
1da177e4 11
cdc7957d 12#include <asm/vsyscall.h>
7bd867df 13#include <asm/x86_init.h>
8383d821 14#include <asm/time.h>
35d47699 15#include <asm/mrst.h>
1da177e4 16
1122b134 17#ifdef CONFIG_X86_32
1122b134
TG
18/*
19 * This is a special lock that is owned by the CPU and holds the index
20 * register we are working with. It is required for NMI access to the
21 * CMOS/RTC registers. See include/asm-i386/mc146818rtc.h for details.
22 */
8383d821 23volatile unsigned long cmos_lock;
1122b134 24EXPORT_SYMBOL(cmos_lock);
8383d821 25#endif /* CONFIG_X86_32 */
1122b134 26
b62576a2
AK
27/* For two digit years assume time is always after that */
28#define CMOS_YEARS_OFFS 2000
29
1122b134
TG
30DEFINE_SPINLOCK(rtc_lock);
31EXPORT_SYMBOL(rtc_lock);
32
1da177e4
LT
33/*
34 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
35 * called 500 ms after the second nowtime has started, because when
36 * nowtime is written into the registers of the CMOS clock, it will
37 * jump to the next second precisely 500 ms later. Check the Motorola
38 * MC146818A or Dallas DS12887 data sheet for details.
39 *
40 * BUG: This routine does not handle hour overflow properly; it just
41 * sets the minutes. Usually you'll only notice that after reboot!
42 */
fe599f9f 43int mach_set_rtc_mmss(unsigned long nowtime)
1da177e4 44{
1da177e4
LT
45 int real_seconds, real_minutes, cmos_minutes;
46 unsigned char save_control, save_freq_select;
47997d75 47 unsigned long flags;
8383d821 48 int retval = 0;
1da177e4 49
47997d75
MF
50 spin_lock_irqsave(&rtc_lock, flags);
51
1122b134
TG
52 /* tell the clock it's being set */
53 save_control = CMOS_READ(RTC_CONTROL);
1da177e4
LT
54 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
55
1122b134
TG
56 /* stop and reset prescaler */
57 save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
1da177e4
LT
58 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
59
60 cmos_minutes = CMOS_READ(RTC_MINUTES);
61 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
357c6e63 62 cmos_minutes = bcd2bin(cmos_minutes);
1da177e4
LT
63
64 /*
65 * since we're only adjusting minutes and seconds,
66 * don't interfere with hour overflow. This avoids
67 * messing with unknown time zones but requires your
68 * RTC not to be off by more than 15 minutes
69 */
70 real_seconds = nowtime % 60;
71 real_minutes = nowtime / 60;
1122b134 72 /* correct for half hour time zone */
1da177e4 73 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
1122b134 74 real_minutes += 30;
1da177e4
LT
75 real_minutes %= 60;
76
77 if (abs(real_minutes - cmos_minutes) < 30) {
78 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
357c6e63
AB
79 real_seconds = bin2bcd(real_seconds);
80 real_minutes = bin2bcd(real_minutes);
1da177e4 81 }
8383d821
JSR
82 CMOS_WRITE(real_seconds, RTC_SECONDS);
83 CMOS_WRITE(real_minutes, RTC_MINUTES);
1da177e4 84 } else {
3e5c1240 85 printk_once(KERN_NOTICE
1da177e4
LT
86 "set_rtc_mmss: can't update from %d to %d\n",
87 cmos_minutes, real_minutes);
88 retval = -1;
89 }
90
91 /* The following flags have to be released exactly in this order,
92 * otherwise the DS12887 (popular MC146818A clone with integrated
93 * battery and quartz) will not reset the oscillator and will not
94 * update precisely 500 ms later. You won't find this mentioned in
95 * the Dallas Semiconductor data sheets, but who believes data
96 * sheets anyway ... -- Markus Kuhn
97 */
98 CMOS_WRITE(save_control, RTC_CONTROL);
99 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
100
47997d75
MF
101 spin_unlock_irqrestore(&rtc_lock, flags);
102
1da177e4
LT
103 return retval;
104}
105
fe599f9f 106unsigned long mach_get_cmos_time(void)
1da177e4 107{
068c9222 108 unsigned int status, year, mon, day, hour, min, sec, century = 0;
47997d75
MF
109 unsigned long flags;
110
111 spin_lock_irqsave(&rtc_lock, flags);
1122b134
TG
112
113 /*
114 * If UIP is clear, then we have >= 244 microseconds before
115 * RTC registers will be updated. Spec sheet says that this
116 * is the reliable way to read RTC - registers. If UIP is set
117 * then the register access might be invalid.
118 */
119 while ((CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
120 cpu_relax();
121
122 sec = CMOS_READ(RTC_SECONDS);
123 min = CMOS_READ(RTC_MINUTES);
124 hour = CMOS_READ(RTC_HOURS);
125 day = CMOS_READ(RTC_DAY_OF_MONTH);
126 mon = CMOS_READ(RTC_MONTH);
127 year = CMOS_READ(RTC_YEAR);
128
45de7079 129#ifdef CONFIG_ACPI
1122b134
TG
130 if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
131 acpi_gbl_FADT.century)
132 century = CMOS_READ(acpi_gbl_FADT.century);
133#endif
134
068c9222 135 status = CMOS_READ(RTC_CONTROL);
45de7079 136 WARN_ON_ONCE(RTC_ALWAYS_BCD && (status & RTC_DM_BINARY));
068c9222 137
47997d75
MF
138 spin_unlock_irqrestore(&rtc_lock, flags);
139
068c9222 140 if (RTC_ALWAYS_BCD || !(status & RTC_DM_BINARY)) {
357c6e63
AB
141 sec = bcd2bin(sec);
142 min = bcd2bin(min);
143 hour = bcd2bin(hour);
144 day = bcd2bin(day);
145 mon = bcd2bin(mon);
146 year = bcd2bin(year);
41623b06
MM
147 }
148
1122b134 149 if (century) {
357c6e63 150 century = bcd2bin(century);
1122b134 151 year += century * 100;
b62576a2 152 } else
1122b134 153 year += CMOS_YEARS_OFFS;
1da177e4
LT
154
155 return mktime(year, mon, day, hour, min, sec);
156}
157
fe599f9f
TG
158/* Routines for accessing the CMOS RAM/RTC. */
159unsigned char rtc_cmos_read(unsigned char addr)
160{
161 unsigned char val;
162
163 lock_cmos_prefix(addr);
04aaa7ba
DR
164 outb(addr, RTC_PORT(0));
165 val = inb(RTC_PORT(1));
fe599f9f 166 lock_cmos_suffix(addr);
8383d821 167
fe599f9f
TG
168 return val;
169}
170EXPORT_SYMBOL(rtc_cmos_read);
171
172void rtc_cmos_write(unsigned char val, unsigned char addr)
173{
174 lock_cmos_prefix(addr);
04aaa7ba
DR
175 outb(addr, RTC_PORT(0));
176 outb(val, RTC_PORT(1));
fe599f9f
TG
177 lock_cmos_suffix(addr);
178}
179EXPORT_SYMBOL(rtc_cmos_write);
180
7bd867df 181int update_persistent_clock(struct timespec now)
fe599f9f 182{
47997d75 183 return x86_platform.set_wallclock(now.tv_sec);
fe599f9f
TG
184}
185
186/* not static: needed by APM */
d4f587c6 187void read_persistent_clock(struct timespec *ts)
fe599f9f 188{
47997d75 189 unsigned long retval;
fe599f9f 190
7bd867df 191 retval = x86_platform.get_wallclock();
fe599f9f 192
d4f587c6
MS
193 ts->tv_sec = retval;
194 ts->tv_nsec = 0;
fe599f9f
TG
195}
196
1da2e3d6
SS
197
198static struct resource rtc_resources[] = {
199 [0] = {
200 .start = RTC_PORT(0),
201 .end = RTC_PORT(1),
202 .flags = IORESOURCE_IO,
203 },
204 [1] = {
205 .start = RTC_IRQ,
206 .end = RTC_IRQ,
207 .flags = IORESOURCE_IRQ,
208 }
209};
210
211static struct platform_device rtc_device = {
212 .name = "rtc_cmos",
213 .id = -1,
214 .resource = rtc_resources,
215 .num_resources = ARRAY_SIZE(rtc_resources),
216};
217
218static __init int add_rtc_cmos(void)
219{
220#ifdef CONFIG_PNP
75fdd155 221 static const char * const const ids[] __initconst =
758a7f7b
BH
222 { "PNP0b00", "PNP0b01", "PNP0b02", };
223 struct pnp_dev *dev;
224 struct pnp_id *id;
225 int i;
226
227 pnp_for_each_dev(dev) {
228 for (id = dev->id; id; id = id->next) {
229 for (i = 0; i < ARRAY_SIZE(ids); i++) {
230 if (compare_pnp_id(id, ids[i]) != 0)
231 return 0;
232 }
233 }
234 }
235#endif
3bcbaf6e
SAS
236 if (of_have_populated_dt())
237 return 0;
758a7f7b 238
35d47699
MN
239 /* Intel MID platforms don't have ioport rtc */
240 if (mrst_identify_cpu())
241 return -ENODEV;
242
1da2e3d6 243 platform_device_register(&rtc_device);
758a7f7b
BH
244 dev_info(&rtc_device.dev,
245 "registered platform RTC device (no PNP device found)\n");
8383d821 246
1da2e3d6
SS
247 return 0;
248}
249device_initcall(add_rtc_cmos);