Merge branch 'for-33' of git://repo.or.cz/linux-kbuild
[linux-2.6-block.git] / arch / x86 / kernel / mpparse.c
CommitLineData
1da177e4 1/*
11113f84 2 * Intel Multiprocessor Specification 1.1 and 1.4
1da177e4
LT
3 * compliant MP-table parsing routines.
4 *
87c6fe26 5 * (c) 1995 Alan Cox, Building #3 <alan@lxorguk.ukuu.org.uk>
8f47e163 6 * (c) 1998, 1999, 2000, 2009 Ingo Molnar <mingo@redhat.com>
85bdddec 7 * (c) 2008 Alexey Starikovskiy <astarikovskiy@suse.de>
1da177e4
LT
8 */
9
10#include <linux/mm.h>
1da177e4 11#include <linux/init.h>
1da177e4 12#include <linux/delay.h>
1da177e4 13#include <linux/bootmem.h>
1da177e4
LT
14#include <linux/kernel_stat.h>
15#include <linux/mc146818rtc.h>
16#include <linux/bitops.h>
85bdddec
AS
17#include <linux/acpi.h>
18#include <linux/module.h>
103ceffb 19#include <linux/smp.h>
629e15d2 20#include <linux/pci.h>
1da177e4 21
1da177e4
LT
22#include <asm/mtrr.h>
23#include <asm/mpspec.h>
85bdddec 24#include <asm/pgalloc.h>
1da177e4 25#include <asm/io_apic.h>
85bdddec 26#include <asm/proto.h>
ce3fe6b2 27#include <asm/bios_ebda.h>
2944e16b
YL
28#include <asm/e820.h>
29#include <asm/trampoline.h>
3c9cb6de 30#include <asm/setup.h>
4884d8e6 31#include <asm/smp.h>
1da177e4 32
7b6aa335 33#include <asm/apic.h>
1da177e4
LT
34/*
35 * Checksum an MP configuration block.
36 */
37
38static int __init mpf_checksum(unsigned char *mp, int len)
39{
40 int sum = 0;
41
42 while (len--)
43 sum += *mp++;
44
45 return sum & 0xFF;
46}
47
fd6c6661
TG
48int __init default_mpc_apic_id(struct mpc_cpu *m)
49{
50 return m->apicid;
51}
52
f4f21b71 53static void __init MP_processor_info(struct mpc_cpu *m)
c853c676
AS
54{
55 int apicid;
746f2244 56 char *bootup_cpu = "";
c853c676 57
c4563826 58 if (!(m->cpuflag & CPU_ENABLED)) {
7b1292e2 59 disabled_cpus++;
1da177e4 60 return;
7b1292e2 61 }
64898a8b 62
fd6c6661 63 apicid = x86_init.mpparse.mpc_apic_id(m);
64898a8b 64
c4563826 65 if (m->cpuflag & CPU_BOOTPROCESSOR) {
746f2244 66 bootup_cpu = " (Bootup-CPU)";
c4563826 67 boot_cpu_physical_apicid = m->apicid;
1da177e4
LT
68 }
69
c4563826
JSR
70 printk(KERN_INFO "Processor #%d%s\n", m->apicid, bootup_cpu);
71 generic_processor_info(apicid, m->apicver);
1da177e4
LT
72}
73
85cc35fa 74#ifdef CONFIG_X86_IO_APIC
90e1c696 75void __init default_mpc_oem_bus_info(struct mpc_bus *m, char *str)
1da177e4 76{
d4c715fa 77 memcpy(str, m->bustype, 6);
1da177e4 78 str[6] = 0;
90e1c696
TG
79 apic_printk(APIC_VERBOSE, "Bus #%d is %s\n", m->busid, str);
80}
1da177e4 81
90e1c696
TG
82static void __init MP_bus_info(struct mpc_bus *m)
83{
84 char str[7];
1da177e4 85
90e1c696 86 x86_init.mpparse.mpc_oem_bus_info(m, str);
1da177e4 87
5e4edbb7 88#if MAX_MP_BUSSES < 256
d4c715fa 89 if (m->busid >= MAX_MP_BUSSES) {
c0ec31ad 90 printk(KERN_WARNING "MP table busid value (%d) for bustype %s "
4ef81297 91 " is too large, max. supported is %d\n",
d4c715fa 92 m->busid, str, MAX_MP_BUSSES - 1);
c0ec31ad
RD
93 return;
94 }
5e4edbb7 95#endif
c0ec31ad 96
f8924e77 97 if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
d4c715fa 98 set_bit(m->busid, mp_bus_not_pci);
103ceffb 99#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
d4c715fa 100 mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
f8924e77
AS
101#endif
102 } else if (strncmp(str, BUSTYPE_PCI, sizeof(BUSTYPE_PCI) - 1) == 0) {
52fdb568
TG
103 if (x86_init.mpparse.mpc_oem_pci_bus)
104 x86_init.mpparse.mpc_oem_pci_bus(m);
64898a8b 105
d4c715fa 106 clear_bit(m->busid, mp_bus_not_pci);
103ceffb 107#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
d4c715fa 108 mp_bus_id_to_type[m->busid] = MP_BUS_PCI;
4ef81297 109 } else if (strncmp(str, BUSTYPE_EISA, sizeof(BUSTYPE_EISA) - 1) == 0) {
d4c715fa 110 mp_bus_id_to_type[m->busid] = MP_BUS_EISA;
4ef81297 111 } else if (strncmp(str, BUSTYPE_MCA, sizeof(BUSTYPE_MCA) - 1) == 0) {
d4c715fa 112 mp_bus_id_to_type[m->busid] = MP_BUS_MCA;
c0a282c2 113#endif
f8924e77
AS
114 } else
115 printk(KERN_WARNING "Unknown bustype %s - ignoring\n", str);
1da177e4 116}
61048c63 117
857033a6
AS
118static int bad_ioapic(unsigned long address)
119{
120 if (nr_ioapics >= MAX_IO_APICS) {
121 printk(KERN_ERR "ERROR: Max # of I/O APICs (%d) exceeded "
122 "(found %d)\n", MAX_IO_APICS, nr_ioapics);
123 panic("Recompile kernel with bigger MAX_IO_APICS!\n");
124 }
125 if (!address) {
126 printk(KERN_ERR "WARNING: Bogus (zero) I/O APIC address"
127 " found in table, skipping!\n");
128 return 1;
129 }
130 return 0;
131}
132
2b85b5fb 133static void __init MP_ioapic_info(struct mpc_ioapic *m)
1da177e4 134{
5df82c7d 135 if (!(m->flags & MPC_APIC_USABLE))
1da177e4
LT
136 return;
137
64883ab0 138 printk(KERN_INFO "I/O APIC #%d Version %d at 0x%X.\n",
5df82c7d 139 m->apicid, m->apicver, m->apicaddr);
857033a6 140
5df82c7d 141 if (bad_ioapic(m->apicaddr))
1da177e4 142 return;
857033a6 143
b5ba7e6d
JSR
144 mp_ioapics[nr_ioapics].apicaddr = m->apicaddr;
145 mp_ioapics[nr_ioapics].apicid = m->apicid;
146 mp_ioapics[nr_ioapics].type = m->type;
147 mp_ioapics[nr_ioapics].apicver = m->apicver;
148 mp_ioapics[nr_ioapics].flags = m->flags;
1da177e4
LT
149 nr_ioapics++;
150}
151
540d4e72 152static void print_MP_intsrc_info(struct mpc_intsrc *m)
1da177e4 153{
eeb0d7d1 154 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
1da177e4 155 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
e253b396
JSR
156 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbus,
157 m->srcbusirq, m->dstapic, m->dstirq);
2944e16b
YL
158}
159
c2c21745 160static void __init print_mp_irq_info(struct mpc_intsrc *mp_irq)
2944e16b 161{
eeb0d7d1 162 apic_printk(APIC_VERBOSE, "Int: type %d, pol %d, trig %d, bus %02x,"
2944e16b 163 " IRQ %02x, APIC ID %x, APIC INT %02x\n",
c2c21745
JSR
164 mp_irq->irqtype, mp_irq->irqflag & 3,
165 (mp_irq->irqflag >> 2) & 3, mp_irq->srcbus,
166 mp_irq->srcbusirq, mp_irq->dstapic, mp_irq->dstirq);
2944e16b
YL
167}
168
540d4e72 169static void __init assign_to_mp_irq(struct mpc_intsrc *m,
c2c21745 170 struct mpc_intsrc *mp_irq)
2944e16b 171{
c2c21745
JSR
172 mp_irq->dstapic = m->dstapic;
173 mp_irq->type = m->type;
174 mp_irq->irqtype = m->irqtype;
175 mp_irq->irqflag = m->irqflag;
176 mp_irq->srcbus = m->srcbus;
177 mp_irq->srcbusirq = m->srcbusirq;
178 mp_irq->dstirq = m->dstirq;
2944e16b
YL
179}
180
c2c21745 181static void __init assign_to_mpc_intsrc(struct mpc_intsrc *mp_irq,
540d4e72 182 struct mpc_intsrc *m)
2944e16b 183{
c2c21745
JSR
184 m->dstapic = mp_irq->dstapic;
185 m->type = mp_irq->type;
186 m->irqtype = mp_irq->irqtype;
187 m->irqflag = mp_irq->irqflag;
188 m->srcbus = mp_irq->srcbus;
189 m->srcbusirq = mp_irq->srcbusirq;
190 m->dstirq = mp_irq->dstirq;
2944e16b
YL
191}
192
c2c21745 193static int __init mp_irq_mpc_intsrc_cmp(struct mpc_intsrc *mp_irq,
540d4e72 194 struct mpc_intsrc *m)
2944e16b 195{
c2c21745 196 if (mp_irq->dstapic != m->dstapic)
2944e16b 197 return 1;
c2c21745 198 if (mp_irq->type != m->type)
2944e16b 199 return 2;
c2c21745 200 if (mp_irq->irqtype != m->irqtype)
2944e16b 201 return 3;
c2c21745 202 if (mp_irq->irqflag != m->irqflag)
2944e16b 203 return 4;
c2c21745 204 if (mp_irq->srcbus != m->srcbus)
2944e16b 205 return 5;
c2c21745 206 if (mp_irq->srcbusirq != m->srcbusirq)
2944e16b 207 return 6;
c2c21745 208 if (mp_irq->dstirq != m->dstirq)
2944e16b
YL
209 return 7;
210
211 return 0;
212}
213
540d4e72 214static void __init MP_intsrc_info(struct mpc_intsrc *m)
2944e16b
YL
215{
216 int i;
217
218 print_MP_intsrc_info(m);
219
fcfa146e
YL
220 for (i = 0; i < mp_irq_entries; i++) {
221 if (!mp_irq_mpc_intsrc_cmp(&mp_irqs[i], m))
222 return;
223 }
2944e16b
YL
224
225 assign_to_mp_irq(m, &mp_irqs[mp_irq_entries]);
1da177e4
LT
226 if (++mp_irq_entries == MAX_IRQ_SOURCES)
227 panic("Max # of irq sources exceeded!!\n");
228}
a6830278
JSR
229#else /* CONFIG_X86_IO_APIC */
230static inline void __init MP_bus_info(struct mpc_bus *m) {}
231static inline void __init MP_ioapic_info(struct mpc_ioapic *m) {}
232static inline void __init MP_intsrc_info(struct mpc_intsrc *m) {}
233#endif /* CONFIG_X86_IO_APIC */
1da177e4 234
61048c63 235
8fb2952b 236static void __init MP_lintsrc_info(struct mpc_lintsrc *m)
1da177e4 237{
eeb0d7d1 238 apic_printk(APIC_VERBOSE, "Lint: type %d, pol %d, trig %d, bus %02x,"
1da177e4 239 " IRQ %02x, APIC ID %x, APIC LINT %02x\n",
b5ced7cd
JSR
240 m->irqtype, m->irqflag & 3, (m->irqflag >> 2) & 3, m->srcbusid,
241 m->srcbusirq, m->destapic, m->destapiclint);
1da177e4
LT
242}
243
1da177e4
LT
244/*
245 * Read/parse the MPC
246 */
247
f29521e4 248static int __init smp_check_mpc(struct mpc_table *mpc, char *oem, char *str)
1da177e4 249{
1da177e4 250
6c65da50 251 if (memcmp(mpc->signature, MPC_SIGNATURE, 4)) {
e950bea8 252 printk(KERN_ERR "MPTABLE: bad signature [%c%c%c%c]!\n",
6c65da50
JSR
253 mpc->signature[0], mpc->signature[1],
254 mpc->signature[2], mpc->signature[3]);
1da177e4
LT
255 return 0;
256 }
6c65da50 257 if (mpf_checksum((unsigned char *)mpc, mpc->length)) {
e950bea8 258 printk(KERN_ERR "MPTABLE: checksum error!\n");
1da177e4
LT
259 return 0;
260 }
6c65da50 261 if (mpc->spec != 0x01 && mpc->spec != 0x04) {
e950bea8 262 printk(KERN_ERR "MPTABLE: bad table version (%d)!!\n",
6c65da50 263 mpc->spec);
1da177e4
LT
264 return 0;
265 }
6c65da50 266 if (!mpc->lapic) {
e950bea8 267 printk(KERN_ERR "MPTABLE: null local APIC address!\n");
1da177e4
LT
268 return 0;
269 }
6c65da50 270 memcpy(oem, mpc->oem, 8);
4ef81297 271 oem[8] = 0;
11a62a05 272 printk(KERN_INFO "MPTABLE: OEM ID: %s\n", oem);
1da177e4 273
6c65da50 274 memcpy(str, mpc->productid, 12);
4ef81297 275 str[12] = 0;
1da177e4 276
11a62a05 277 printk(KERN_INFO "MPTABLE: Product ID: %s\n", str);
1da177e4 278
6c65da50 279 printk(KERN_INFO "MPTABLE: APIC at: 0x%X\n", mpc->lapic);
1da177e4 280
2944e16b
YL
281 return 1;
282}
283
a6830278
JSR
284static void skip_entry(unsigned char **ptr, int *count, int size)
285{
286 *ptr += size;
287 *count += size;
288}
289
5a5737ea
JSR
290static void __init smp_dump_mptable(struct mpc_table *mpc, unsigned char *mpt)
291{
292 printk(KERN_ERR "Your mptable is wrong, contact your HW vendor!\n"
293 "type %x\n", *mpt);
294 print_hex_dump(KERN_ERR, " ", DUMP_PREFIX_ADDRESS, 16,
295 1, mpc, mpc->length, 1);
296}
297
72302142
TG
298void __init default_smp_read_mpc_oem(struct mpc_table *mpc) { }
299
f29521e4 300static int __init smp_read_mpc(struct mpc_table *mpc, unsigned early)
2944e16b
YL
301{
302 char str[16];
303 char oem[10];
304
305 int count = sizeof(*mpc);
306 unsigned char *mpt = ((unsigned char *)mpc) + count;
307
308 if (!smp_check_mpc(mpc, oem, str))
309 return 0;
310
311#ifdef CONFIG_X86_32
9c764247 312 generic_mps_oem_check(mpc, oem, str);
2944e16b 313#endif
e950bea8 314 /* save the local APIC address, it might be non-default */
1da177e4 315 if (!acpi_lapic)
6c65da50 316 mp_lapic_addr = mpc->lapic;
1da177e4 317
888032cd
AS
318 if (early)
319 return 1;
320
72302142
TG
321 if (mpc->oemptr)
322 x86_init.mpparse.smp_read_mpc_oem(mpc);
64898a8b 323
1da177e4 324 /*
4ef81297 325 * Now process the configuration blocks.
1da177e4 326 */
f4848472 327 x86_init.mpparse.mpc_record(0);
64898a8b 328
6c65da50 329 while (count < mpc->length) {
4ef81297
AS
330 switch (*mpt) {
331 case MP_PROCESSOR:
a6830278
JSR
332 /* ACPI may have already provided this data */
333 if (!acpi_lapic)
c58603e8 334 MP_processor_info((struct mpc_cpu *)mpt);
a6830278
JSR
335 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
336 break;
4ef81297 337 case MP_BUS:
c58603e8 338 MP_bus_info((struct mpc_bus *)mpt);
a6830278
JSR
339 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
340 break;
4ef81297 341 case MP_IOAPIC:
c58603e8 342 MP_ioapic_info((struct mpc_ioapic *)mpt);
a6830278
JSR
343 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
344 break;
4ef81297 345 case MP_INTSRC:
c58603e8 346 MP_intsrc_info((struct mpc_intsrc *)mpt);
a6830278
JSR
347 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
348 break;
4ef81297 349 case MP_LINTSRC:
c58603e8 350 MP_lintsrc_info((struct mpc_lintsrc *)mpt);
a6830278
JSR
351 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
352 break;
4ef81297 353 default:
711554db 354 /* wrong mptable */
5a5737ea 355 smp_dump_mptable(mpc, mpt);
6c65da50 356 count = mpc->length;
711554db 357 break;
1da177e4 358 }
f4848472 359 x86_init.mpparse.mpc_record(1);
1da177e4 360 }
e0da3364 361
26f7ef14
YL
362#ifdef CONFIG_X86_BIGSMP
363 generic_bigsmp_probe();
e0da3364
YL
364#endif
365
72ce0165
IM
366 if (apic->setup_apic_routing)
367 apic->setup_apic_routing();
368
1da177e4 369 if (!num_processors)
e950bea8 370 printk(KERN_ERR "MPTABLE: no processors registered!\n");
1da177e4
LT
371 return num_processors;
372}
373
61048c63
AS
374#ifdef CONFIG_X86_IO_APIC
375
1da177e4
LT
376static int __init ELCR_trigger(unsigned int irq)
377{
378 unsigned int port;
379
380 port = 0x4d0 + (irq >> 3);
381 return (inb(port) >> (irq & 7)) & 1;
382}
383
384static void __init construct_default_ioirq_mptable(int mpc_default_type)
385{
540d4e72 386 struct mpc_intsrc intsrc;
1da177e4
LT
387 int i;
388 int ELCR_fallback = 0;
389
e253b396
JSR
390 intsrc.type = MP_INTSRC;
391 intsrc.irqflag = 0; /* conforming */
392 intsrc.srcbus = 0;
b5ba7e6d 393 intsrc.dstapic = mp_ioapics[0].apicid;
1da177e4 394
e253b396 395 intsrc.irqtype = mp_INT;
1da177e4
LT
396
397 /*
398 * If true, we have an ISA/PCI system with no IRQ entries
399 * in the MP table. To prevent the PCI interrupts from being set up
400 * incorrectly, we try to use the ELCR. The sanity check to see if
401 * there is good ELCR data is very simple - IRQ0, 1, 2 and 13 can
402 * never be level sensitive, so we simply see if the ELCR agrees.
403 * If it does, we assume it's valid.
404 */
405 if (mpc_default_type == 5) {
62441bf1
AS
406 printk(KERN_INFO "ISA/PCI bus type with no IRQ information... "
407 "falling back to ELCR\n");
1da177e4 408
62441bf1
AS
409 if (ELCR_trigger(0) || ELCR_trigger(1) || ELCR_trigger(2) ||
410 ELCR_trigger(13))
411 printk(KERN_ERR "ELCR contains invalid data... "
412 "not using ELCR\n");
1da177e4 413 else {
4ef81297
AS
414 printk(KERN_INFO
415 "Using ELCR to identify PCI interrupts\n");
1da177e4
LT
416 ELCR_fallback = 1;
417 }
418 }
419
420 for (i = 0; i < 16; i++) {
421 switch (mpc_default_type) {
422 case 2:
423 if (i == 0 || i == 13)
424 continue; /* IRQ0 & IRQ13 not connected */
425 /* fall through */
426 default:
427 if (i == 2)
428 continue; /* IRQ2 is never connected */
429 }
430
431 if (ELCR_fallback) {
432 /*
433 * If the ELCR indicates a level-sensitive interrupt, we
434 * copy that information over to the MP table in the
435 * irqflag field (level sensitive, active high polarity).
436 */
437 if (ELCR_trigger(i))
e253b396 438 intsrc.irqflag = 13;
1da177e4 439 else
e253b396 440 intsrc.irqflag = 0;
1da177e4
LT
441 }
442
e253b396
JSR
443 intsrc.srcbusirq = i;
444 intsrc.dstirq = i ? i : 2; /* IRQ0 to INTIN2 */
1da177e4
LT
445 MP_intsrc_info(&intsrc);
446 }
447
e253b396
JSR
448 intsrc.irqtype = mp_ExtINT;
449 intsrc.srcbusirq = 0;
450 intsrc.dstirq = 0; /* 8259A to INTIN0 */
1da177e4
LT
451 MP_intsrc_info(&intsrc);
452}
453
61048c63 454
39e00fe2 455static void __init construct_ioapic_table(int mpc_default_type)
1da177e4 456{
2b85b5fb 457 struct mpc_ioapic ioapic;
00fb8606 458 struct mpc_bus bus;
1da177e4 459
d4c715fa
JSR
460 bus.type = MP_BUS;
461 bus.busid = 0;
1da177e4 462 switch (mpc_default_type) {
4ef81297 463 default:
62441bf1 464 printk(KERN_ERR "???\nUnknown standard configuration %d\n",
4ef81297
AS
465 mpc_default_type);
466 /* fall through */
467 case 1:
468 case 5:
d4c715fa 469 memcpy(bus.bustype, "ISA ", 6);
4ef81297
AS
470 break;
471 case 2:
472 case 6:
473 case 3:
d4c715fa 474 memcpy(bus.bustype, "EISA ", 6);
4ef81297
AS
475 break;
476 case 4:
477 case 7:
d4c715fa 478 memcpy(bus.bustype, "MCA ", 6);
1da177e4
LT
479 }
480 MP_bus_info(&bus);
481 if (mpc_default_type > 4) {
d4c715fa
JSR
482 bus.busid = 1;
483 memcpy(bus.bustype, "PCI ", 6);
1da177e4
LT
484 MP_bus_info(&bus);
485 }
486
8f3e1df4
CG
487 ioapic.type = MP_IOAPIC;
488 ioapic.apicid = 2;
489 ioapic.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
490 ioapic.flags = MPC_APIC_USABLE;
491 ioapic.apicaddr = IO_APIC_DEFAULT_PHYS_BASE;
1da177e4
LT
492 MP_ioapic_info(&ioapic);
493
494 /*
495 * We set up most of the low 16 IO-APIC pins according to MPS rules.
496 */
497 construct_default_ioirq_mptable(mpc_default_type);
85cc35fa
TG
498}
499#else
39e00fe2 500static inline void __init construct_ioapic_table(int mpc_default_type) { }
61048c63 501#endif
85cc35fa
TG
502
503static inline void __init construct_default_ISA_mptable(int mpc_default_type)
504{
f4f21b71 505 struct mpc_cpu processor;
8fb2952b 506 struct mpc_lintsrc lintsrc;
85cc35fa
TG
507 int linttypes[2] = { mp_ExtINT, mp_NMI };
508 int i;
509
510 /*
511 * local APIC has default address
512 */
513 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
514
515 /*
516 * 2 CPUs, numbered 0 & 1.
517 */
c4563826 518 processor.type = MP_PROCESSOR;
85cc35fa 519 /* Either an integrated APIC or a discrete 82489DX. */
c4563826
JSR
520 processor.apicver = mpc_default_type > 4 ? 0x10 : 0x01;
521 processor.cpuflag = CPU_ENABLED;
522 processor.cpufeature = (boot_cpu_data.x86 << 8) |
85cc35fa 523 (boot_cpu_data.x86_model << 4) | boot_cpu_data.x86_mask;
c4563826
JSR
524 processor.featureflag = boot_cpu_data.x86_capability[0];
525 processor.reserved[0] = 0;
526 processor.reserved[1] = 0;
85cc35fa 527 for (i = 0; i < 2; i++) {
c4563826 528 processor.apicid = i;
85cc35fa
TG
529 MP_processor_info(&processor);
530 }
531
532 construct_ioapic_table(mpc_default_type);
533
b5ced7cd
JSR
534 lintsrc.type = MP_LINTSRC;
535 lintsrc.irqflag = 0; /* conforming */
536 lintsrc.srcbusid = 0;
537 lintsrc.srcbusirq = 0;
538 lintsrc.destapic = MP_APIC_ALL;
1da177e4 539 for (i = 0; i < 2; i++) {
b5ced7cd
JSR
540 lintsrc.irqtype = linttypes[i];
541 lintsrc.destapiclint = i;
1da177e4
LT
542 MP_lintsrc_info(&lintsrc);
543 }
544}
545
41401db6 546static struct mpf_intel *mpf_found;
1da177e4 547
8d4dd919
YL
548static unsigned long __init get_mpc_size(unsigned long physptr)
549{
550 struct mpc_table *mpc;
551 unsigned long size;
552
553 mpc = early_ioremap(physptr, PAGE_SIZE);
554 size = mpc->length;
555 early_iounmap(mpc, PAGE_SIZE);
556 apic_printk(APIC_VERBOSE, " mpc: %lx-%lx\n", physptr, physptr + size);
557
558 return size;
559}
560
0b3ba0c3
JSR
561static int __init check_physptr(struct mpf_intel *mpf, unsigned int early)
562{
563 struct mpc_table *mpc;
564 unsigned long size;
565
566 size = get_mpc_size(mpf->physptr);
567 mpc = early_ioremap(mpf->physptr, size);
568 /*
569 * Read the physical hardware table. Anything here will
570 * override the defaults.
571 */
572 if (!smp_read_mpc(mpc, early)) {
573#ifdef CONFIG_X86_LOCAL_APIC
574 smp_found_config = 0;
575#endif
576 printk(KERN_ERR "BIOS bug, MP table errors detected!...\n"
577 "... disabling SMP support. (tell your hw vendor)\n");
578 early_iounmap(mpc, size);
579 return -1;
580 }
581 early_iounmap(mpc, size);
582
583 if (early)
584 return -1;
585
586#ifdef CONFIG_X86_IO_APIC
587 /*
588 * If there are no explicit MP IRQ entries, then we are
589 * broken. We set up most of the low 16 IO-APIC pins to
590 * ISA defaults and hope it will work.
591 */
592 if (!mp_irq_entries) {
593 struct mpc_bus bus;
594
595 printk(KERN_ERR "BIOS bug, no explicit IRQ entries, "
596 "using default mptable. (tell your hw vendor)\n");
597
598 bus.type = MP_BUS;
599 bus.busid = 0;
600 memcpy(bus.bustype, "ISA ", 6);
601 MP_bus_info(&bus);
602
603 construct_default_ioirq_mptable(0);
604 }
605#endif
606
607 return 0;
608}
609
1da177e4
LT
610/*
611 * Scan the memory blocks for an SMP configuration block.
612 */
b3f1b617 613void __init default_get_smp_config(unsigned int early)
1da177e4 614{
41401db6 615 struct mpf_intel *mpf = mpf_found;
1da177e4 616
69b88afa
YL
617 if (!mpf)
618 return;
619
888032cd
AS
620 if (acpi_lapic && early)
621 return;
69b88afa 622
1da177e4 623 /*
69b88afa
YL
624 * MPS doesn't support hyperthreading, aka only have
625 * thread 0 apic id in MPS table
1da177e4 626 */
69b88afa 627 if (acpi_lapic && acpi_ioapic)
1da177e4 628 return;
1da177e4 629
4ef81297 630 printk(KERN_INFO "Intel MultiProcessor Specification v1.%d\n",
1eb1b3b6 631 mpf->specification);
b3e24164 632#if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32)
1eb1b3b6 633 if (mpf->feature2 & (1 << 7)) {
1da177e4
LT
634 printk(KERN_INFO " IMCR and PIC compatibility mode.\n");
635 pic_mode = 1;
636 } else {
637 printk(KERN_INFO " Virtual Wire compatibility mode.\n");
638 pic_mode = 0;
639 }
4421b1c8 640#endif
1da177e4
LT
641 /*
642 * Now see if we need to read further.
643 */
1eb1b3b6 644 if (mpf->feature1 != 0) {
888032cd
AS
645 if (early) {
646 /*
647 * local APIC has default address
648 */
649 mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
650 return;
651 }
1da177e4 652
4ef81297 653 printk(KERN_INFO "Default MP configuration #%d\n",
1eb1b3b6
JSR
654 mpf->feature1);
655 construct_default_ISA_mptable(mpf->feature1);
1da177e4 656
1eb1b3b6 657 } else if (mpf->physptr) {
0b3ba0c3 658 if (check_physptr(mpf, early))
1da177e4 659 return;
1da177e4
LT
660 } else
661 BUG();
662
888032cd
AS
663 if (!early)
664 printk(KERN_INFO "Processors: %d\n", num_processors);
1da177e4
LT
665 /*
666 * Only use the first configuration found.
667 */
668}
669
b24c2a92 670static void __init smp_reserve_memory(struct mpf_intel *mpf)
a6830278
JSR
671{
672 unsigned long size = get_mpc_size(mpf->physptr);
a6830278 673
b24c2a92 674 reserve_early(mpf->physptr, mpf->physptr+size, "MP-table mpc");
a6830278
JSR
675}
676
b24c2a92 677static int __init smp_scan_config(unsigned long base, unsigned long length)
1da177e4 678{
92fd4b7a 679 unsigned int *bp = phys_to_virt(base);
41401db6 680 struct mpf_intel *mpf;
b24c2a92 681 unsigned long mem;
1da177e4 682
eeb0d7d1
RH
683 apic_printk(APIC_VERBOSE, "Scan SMP from %p for %ld bytes.\n",
684 bp, length);
5d47a271 685 BUILD_BUG_ON(sizeof(*mpf) != 16);
1da177e4
LT
686
687 while (length > 0) {
41401db6 688 mpf = (struct mpf_intel *)bp;
1da177e4 689 if ((*bp == SMP_MAGIC_IDENT) &&
1eb1b3b6 690 (mpf->length == 1) &&
4ef81297 691 !mpf_checksum((unsigned char *)bp, 16) &&
1eb1b3b6
JSR
692 ((mpf->specification == 1)
693 || (mpf->specification == 4))) {
bab4b27c 694#ifdef CONFIG_X86_LOCAL_APIC
1da177e4 695 smp_found_config = 1;
bab4b27c 696#endif
92fd4b7a 697 mpf_found = mpf;
b1f006b6 698
ba1511bf
JSR
699 printk(KERN_INFO "found SMP MP-table at [%p] %llx\n",
700 mpf, (u64)virt_to_phys(mpf));
b1f006b6 701
b24c2a92
YL
702 mem = virt_to_phys(mpf);
703 reserve_early(mem, mem + sizeof(*mpf), "MP-table mpf");
a6830278 704 if (mpf->physptr)
b24c2a92 705 smp_reserve_memory(mpf);
1da177e4 706
d2dbf343 707 return 1;
1da177e4
LT
708 }
709 bp += 4;
710 length -= 16;
711 }
712 return 0;
713}
714
b24c2a92 715void __init default_find_smp_config(void)
1da177e4
LT
716{
717 unsigned int address;
718
719 /*
720 * FIXME: Linux assumes you have 640K of base ram..
721 * this continues the error...
722 *
723 * 1) Scan the bottom 1K for a signature
724 * 2) Scan the top 1K of base RAM
725 * 3) Scan the 64K of bios
726 */
b24c2a92
YL
727 if (smp_scan_config(0x0, 0x400) ||
728 smp_scan_config(639 * 0x400, 0x400) ||
729 smp_scan_config(0xF0000, 0x10000))
1da177e4
LT
730 return;
731 /*
732 * If it is an SMP machine we should know now, unless the
733 * configuration is in an EISA/MCA bus machine with an
734 * extended bios data area.
735 *
736 * there is a real-mode segmented pointer pointing to the
737 * 4K EBDA area at 0x40E, calculate and scan it here.
738 *
739 * NOTE! There are Linux loaders that will corrupt the EBDA
740 * area, and as such this kind of SMP config may be less
741 * trustworthy, simply because the SMP table may have been
742 * stomped on during early boot. These loaders are buggy and
743 * should be fixed.
744 *
745 * MP1.4 SPEC states to only scan first 1K of 4K EBDA.
746 */
747
748 address = get_bios_ebda();
749 if (address)
b24c2a92 750 smp_scan_config(address, 0x400);
888032cd
AS
751}
752
2944e16b
YL
753#ifdef CONFIG_X86_IO_APIC
754static u8 __initdata irq_used[MAX_IRQ_SOURCES];
755
540d4e72 756static int __init get_MP_intsrc_index(struct mpc_intsrc *m)
2944e16b
YL
757{
758 int i;
759
e253b396 760 if (m->irqtype != mp_INT)
2944e16b
YL
761 return 0;
762
e253b396 763 if (m->irqflag != 0x0f)
2944e16b
YL
764 return 0;
765
766 /* not legacy */
767
768 for (i = 0; i < mp_irq_entries; i++) {
c2c21745 769 if (mp_irqs[i].irqtype != mp_INT)
2944e16b
YL
770 continue;
771
c2c21745 772 if (mp_irqs[i].irqflag != 0x0f)
2944e16b
YL
773 continue;
774
c2c21745 775 if (mp_irqs[i].srcbus != m->srcbus)
2944e16b 776 continue;
c2c21745 777 if (mp_irqs[i].srcbusirq != m->srcbusirq)
2944e16b
YL
778 continue;
779 if (irq_used[i]) {
780 /* already claimed */
781 return -2;
782 }
783 irq_used[i] = 1;
784 return i;
785 }
786
787 /* not found */
788 return -1;
789}
790
791#define SPARE_SLOT_NUM 20
792
540d4e72 793static struct mpc_intsrc __initdata *m_spare[SPARE_SLOT_NUM];
a6830278 794
57592224 795static void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare)
a6830278
JSR
796{
797 int i;
798
799 apic_printk(APIC_VERBOSE, "OLD ");
800 print_MP_intsrc_info(m);
801
802 i = get_MP_intsrc_index(m);
803 if (i > 0) {
804 assign_to_mpc_intsrc(&mp_irqs[i], m);
805 apic_printk(APIC_VERBOSE, "NEW ");
806 print_mp_irq_info(&mp_irqs[i]);
807 return;
808 }
809 if (!i) {
810 /* legacy, do nothing */
811 return;
812 }
813 if (*nr_m_spare < SPARE_SLOT_NUM) {
814 /*
815 * not found (-1), or duplicated (-2) are invalid entries,
816 * we need to use the slot later
817 */
818 m_spare[*nr_m_spare] = m;
819 *nr_m_spare += 1;
820 }
821}
822#else /* CONFIG_X86_IO_APIC */
57592224
RM
823static
824inline void __init check_irq_src(struct mpc_intsrc *m, int *nr_m_spare) {}
a6830278
JSR
825#endif /* CONFIG_X86_IO_APIC */
826
ee214558
YL
827static int
828check_slot(unsigned long mpc_new_phys, unsigned long mpc_new_length, int count)
a6830278 829{
ee214558
YL
830 int ret = 0;
831
832 if (!mpc_new_phys || count <= mpc_new_length) {
833 WARN(1, "update_mptable: No spare slots (length: %x)\n", count);
834 return -1;
a6830278
JSR
835 }
836
ee214558 837 return ret;
a6830278 838}
2944e16b 839
f29521e4 840static int __init replace_intsrc_all(struct mpc_table *mpc,
2944e16b
YL
841 unsigned long mpc_new_phys,
842 unsigned long mpc_new_length)
843{
844#ifdef CONFIG_X86_IO_APIC
845 int i;
2944e16b 846#endif
2944e16b 847 int count = sizeof(*mpc);
a6830278 848 int nr_m_spare = 0;
2944e16b
YL
849 unsigned char *mpt = ((unsigned char *)mpc) + count;
850
6c65da50
JSR
851 printk(KERN_INFO "mpc_length %x\n", mpc->length);
852 while (count < mpc->length) {
2944e16b
YL
853 switch (*mpt) {
854 case MP_PROCESSOR:
a6830278
JSR
855 skip_entry(&mpt, &count, sizeof(struct mpc_cpu));
856 break;
2944e16b 857 case MP_BUS:
a6830278
JSR
858 skip_entry(&mpt, &count, sizeof(struct mpc_bus));
859 break;
2944e16b 860 case MP_IOAPIC:
a6830278
JSR
861 skip_entry(&mpt, &count, sizeof(struct mpc_ioapic));
862 break;
2944e16b 863 case MP_INTSRC:
c58603e8 864 check_irq_src((struct mpc_intsrc *)mpt, &nr_m_spare);
a6830278
JSR
865 skip_entry(&mpt, &count, sizeof(struct mpc_intsrc));
866 break;
2944e16b 867 case MP_LINTSRC:
a6830278
JSR
868 skip_entry(&mpt, &count, sizeof(struct mpc_lintsrc));
869 break;
2944e16b
YL
870 default:
871 /* wrong mptable */
5a5737ea 872 smp_dump_mptable(mpc, mpt);
2944e16b
YL
873 goto out;
874 }
875 }
876
877#ifdef CONFIG_X86_IO_APIC
878 for (i = 0; i < mp_irq_entries; i++) {
879 if (irq_used[i])
880 continue;
881
c2c21745 882 if (mp_irqs[i].irqtype != mp_INT)
2944e16b
YL
883 continue;
884
c2c21745 885 if (mp_irqs[i].irqflag != 0x0f)
2944e16b
YL
886 continue;
887
888 if (nr_m_spare > 0) {
82034d6f 889 apic_printk(APIC_VERBOSE, "*NEW* found\n");
2944e16b
YL
890 nr_m_spare--;
891 assign_to_mpc_intsrc(&mp_irqs[i], m_spare[nr_m_spare]);
892 m_spare[nr_m_spare] = NULL;
893 } else {
540d4e72
JSR
894 struct mpc_intsrc *m = (struct mpc_intsrc *)mpt;
895 count += sizeof(struct mpc_intsrc);
ee214558 896 if (check_slot(mpc_new_phys, mpc_new_length, count) < 0)
a6830278 897 goto out;
2944e16b 898 assign_to_mpc_intsrc(&mp_irqs[i], m);
6c65da50 899 mpc->length = count;
540d4e72 900 mpt += sizeof(struct mpc_intsrc);
2944e16b
YL
901 }
902 print_mp_irq_info(&mp_irqs[i]);
903 }
904#endif
905out:
906 /* update checksum */
6c65da50
JSR
907 mpc->checksum = 0;
908 mpc->checksum -= mpf_checksum((unsigned char *)mpc, mpc->length);
2944e16b
YL
909
910 return 0;
911}
912
f1bdb523 913int enable_update_mptable;
fcfa146e 914
2944e16b
YL
915static int __init update_mptable_setup(char *str)
916{
917 enable_update_mptable = 1;
629e15d2
YL
918#ifdef CONFIG_PCI
919 pci_routeirq = 1;
920#endif
2944e16b
YL
921 return 0;
922}
923early_param("update_mptable", update_mptable_setup);
924
925static unsigned long __initdata mpc_new_phys;
926static unsigned long mpc_new_length __initdata = 4096;
927
928/* alloc_mptable or alloc_mptable=4k */
929static int __initdata alloc_mptable;
930static int __init parse_alloc_mptable_opt(char *p)
931{
932 enable_update_mptable = 1;
629e15d2
YL
933#ifdef CONFIG_PCI
934 pci_routeirq = 1;
935#endif
2944e16b
YL
936 alloc_mptable = 1;
937 if (!p)
938 return 0;
939 mpc_new_length = memparse(p, &p);
940 return 0;
941}
942early_param("alloc_mptable", parse_alloc_mptable_opt);
943
944void __init early_reserve_e820_mpc_new(void)
945{
946 if (enable_update_mptable && alloc_mptable) {
947 u64 startt = 0;
2944e16b
YL
948 mpc_new_phys = early_reserve_e820(startt, mpc_new_length, 4);
949 }
950}
951
952static int __init update_mp_table(void)
953{
954 char str[16];
955 char oem[10];
41401db6 956 struct mpf_intel *mpf;
f29521e4 957 struct mpc_table *mpc, *mpc_new;
2944e16b
YL
958
959 if (!enable_update_mptable)
960 return 0;
961
962 mpf = mpf_found;
963 if (!mpf)
964 return 0;
965
966 /*
967 * Now see if we need to go further.
968 */
1eb1b3b6 969 if (mpf->feature1 != 0)
2944e16b
YL
970 return 0;
971
1eb1b3b6 972 if (!mpf->physptr)
2944e16b
YL
973 return 0;
974
1eb1b3b6 975 mpc = phys_to_virt(mpf->physptr);
2944e16b
YL
976
977 if (!smp_check_mpc(mpc, oem, str))
978 return 0;
979
ba1511bf 980 printk(KERN_INFO "mpf: %llx\n", (u64)virt_to_phys(mpf));
1eb1b3b6 981 printk(KERN_INFO "physptr: %x\n", mpf->physptr);
2944e16b 982
6c65da50 983 if (mpc_new_phys && mpc->length > mpc_new_length) {
2944e16b
YL
984 mpc_new_phys = 0;
985 printk(KERN_INFO "mpc_new_length is %ld, please use alloc_mptable=8k\n",
986 mpc_new_length);
987 }
988
989 if (!mpc_new_phys) {
990 unsigned char old, new;
991 /* check if we can change the postion */
6c65da50
JSR
992 mpc->checksum = 0;
993 old = mpf_checksum((unsigned char *)mpc, mpc->length);
994 mpc->checksum = 0xff;
995 new = mpf_checksum((unsigned char *)mpc, mpc->length);
2944e16b
YL
996 if (old == new) {
997 printk(KERN_INFO "mpc is readonly, please try alloc_mptable instead\n");
998 return 0;
999 }
1000 printk(KERN_INFO "use in-positon replacing\n");
1001 } else {
1eb1b3b6 1002 mpf->physptr = mpc_new_phys;
2944e16b 1003 mpc_new = phys_to_virt(mpc_new_phys);
6c65da50 1004 memcpy(mpc_new, mpc, mpc->length);
2944e16b
YL
1005 mpc = mpc_new;
1006 /* check if we can modify that */
1eb1b3b6 1007 if (mpc_new_phys - mpf->physptr) {
41401db6 1008 struct mpf_intel *mpf_new;
2944e16b
YL
1009 /* steal 16 bytes from [0, 1k) */
1010 printk(KERN_INFO "mpf new: %x\n", 0x400 - 16);
1011 mpf_new = phys_to_virt(0x400 - 16);
1012 memcpy(mpf_new, mpf, 16);
1013 mpf = mpf_new;
1eb1b3b6 1014 mpf->physptr = mpc_new_phys;
2944e16b 1015 }
1eb1b3b6
JSR
1016 mpf->checksum = 0;
1017 mpf->checksum -= mpf_checksum((unsigned char *)mpf, 16);
1018 printk(KERN_INFO "physptr new: %x\n", mpf->physptr);
2944e16b
YL
1019 }
1020
1021 /*
1022 * only replace the one with mp_INT and
1023 * MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
1024 * already in mp_irqs , stored by ... and mp_config_acpi_gsi,
1025 * may need pci=routeirq for all coverage
1026 */
1027 replace_intsrc_all(mpc, mpc_new_phys, mpc_new_length);
1028
1029 return 0;
1030}
1031
1032late_initcall(update_mp_table);