[linux-2.6-block.git] / arch / x86 / kernel / early_printk.c

// SPDX-License-Identifier: GPL-2.0
#include <linux/console.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/screen_info.h>
#include <linux/usb/ch9.h>
#include <linux/pci_regs.h>
#include <linux/pci_ids.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/fcntl.h>
#include <asm/setup.h>
#include <xen/hvc-console.h>
#include <asm/pci-direct.h>
#include <asm/fixmap.h>
#include <asm/intel-mid.h>
#include <asm/pgtable.h>
#include <linux/usb/ehci_def.h>
#include <linux/usb/xhci-dbgp.h>
#include <linux/efi.h>
#include <asm/efi.h>
#include <asm/pci_x86.h>

/* Simple VGA output */
#define VGABASE		(__ISA_IO_base + 0xb8000)

static int max_ypos = 25, max_xpos = 80;
static int current_ypos = 25, current_xpos;

static void early_vga_write(struct console *con, const char *str, unsigned n)
{
	char c;
	int  i, k, j;

	while ((c = *str++) != '\0' && n-- > 0) {
		if (current_ypos >= max_ypos) {
			/* scroll 1 line up */
			for (k = 1, j = 0; k < max_ypos; k++, j++) {
				for (i = 0; i < max_xpos; i++) {
					writew(readw(VGABASE+2*(max_xpos*k+i)),
					       VGABASE + 2*(max_xpos*j + i));
				}
			}
			for (i = 0; i < max_xpos; i++)
				writew(0x720, VGABASE + 2*(max_xpos*j + i));
			current_ypos = max_ypos-1;
		}
#ifdef CONFIG_KGDB_KDB
		if (c == '\b') {
			if (current_xpos > 0)
				current_xpos--;
		} else if (c == '\r') {
			current_xpos = 0;
		} else
#endif
		if (c == '\n') {
			current_xpos = 0;
			current_ypos++;
		} else if (c != '\r')  {
			writew(((0x7 << 8) | (unsigned short) c),
			       VGABASE + 2*(max_xpos*current_ypos +
						current_xpos++));
			if (current_xpos >= max_xpos) {
				current_xpos = 0;
				current_ypos++;
			}
		}
	}
}

static struct console early_vga_console = {
	.name =		"earlyvga",
	.write =	early_vga_write,
	.flags =	CON_PRINTBUFFER,
	.index =	-1,
};

/* Serial functions loosely based on a similar package from Klaus P. Gerlicher */

static unsigned long early_serial_base = 0x3f8;  /* ttyS0 */

#define XMTRDY          0x20

#define DLAB		0x80

#define TXR             0       /*  Transmit register (WRITE) */
#define RXR             0       /*  Receive register  (READ)  */
#define IER             1       /*  Interrupt Enable          */
#define IIR             2       /*  Interrupt ID              */
#define FCR             2       /*  FIFO control              */
#define LCR             3       /*  Line control              */
#define MCR             4       /*  Modem control             */
#define LSR             5       /*  Line Status               */
#define MSR             6       /*  Modem Status              */
#define DLL             0       /*  Divisor Latch Low         */
#define DLH             1       /*  Divisor latch High        */

static unsigned int io_serial_in(unsigned long addr, int offset)
{
	return inb(addr + offset);
}

static void io_serial_out(unsigned long addr, int offset, int value)
{
	outb(value, addr + offset);
}

static unsigned int (*serial_in)(unsigned long addr, int offset) = io_serial_in;
static void (*serial_out)(unsigned long addr, int offset, int value) = io_serial_out;

static int early_serial_putc(unsigned char ch)
{
	unsigned timeout = 0xffff;

	while ((serial_in(early_serial_base, LSR) & XMTRDY) == 0 && --timeout)
		cpu_relax();
	serial_out(early_serial_base, TXR, ch);
	return timeout ? 0 : -1;
}

static void early_serial_write(struct console *con, const char *s, unsigned n)
{
	while (*s && n-- > 0) {
		if (*s == '\n')
			early_serial_putc('\r');
		early_serial_putc(*s);
		s++;
	}
}

static __init void early_serial_hw_init(unsigned divisor)
{
	unsigned char c;

	serial_out(early_serial_base, LCR, 0x3);	/* 8n1 */
	serial_out(early_serial_base, IER, 0);	/* no interrupt */
	serial_out(early_serial_base, FCR, 0);	/* no fifo */
	serial_out(early_serial_base, MCR, 0x3);	/* DTR + RTS */

	c = serial_in(early_serial_base, LCR);
	serial_out(early_serial_base, LCR, c | DLAB);
	serial_out(early_serial_base, DLL, divisor & 0xff);
	serial_out(early_serial_base, DLH, (divisor >> 8) & 0xff);
	serial_out(early_serial_base, LCR, c & ~DLAB);
}

#define DEFAULT_BAUD 9600

static __init void early_serial_init(char *s)
{
	unsigned divisor;
	unsigned long baud = DEFAULT_BAUD;
	char *e;

	if (*s == ',')
		++s;

	if (*s) {
		unsigned port;
		if (!strncmp(s, "0x", 2)) {
			early_serial_base = simple_strtoul(s, &e, 16);
		} else {
			static const int __initconst bases[] = { 0x3f8, 0x2f8 };

			if (!strncmp(s, "ttyS", 4))
				s += 4;
			port = simple_strtoul(s, &e, 10);
			if (port > 1 || s == e)
				port = 0;
			early_serial_base = bases[port];
		}
		s += strcspn(s, ",");
		if (*s == ',')
			s++;
	}

	if (*s) {
		baud = simple_strtoull(s, &e, 0);

		if (baud == 0 || s == e)
			baud = DEFAULT_BAUD;
	}

	/* Convert from baud to divisor value */
	divisor = 115200 / baud;

	/* These will always be IO based ports */
	serial_in = io_serial_in;
	serial_out = io_serial_out;

	/* Set up the HW */
	early_serial_hw_init(divisor);
}

#ifdef CONFIG_PCI
static void mem32_serial_out(unsigned long addr, int offset, int value)
{
	u32 __iomem *vaddr = (u32 __iomem *)addr;
	/* shift implied by pointer type */
	writel(value, vaddr + offset);
}

static unsigned int mem32_serial_in(unsigned long addr, int offset)
{
	u32 __iomem *vaddr = (u32 __iomem *)addr;
	/* shift implied by pointer type */
	return readl(vaddr + offset);
}

/*
 * early_pci_serial_init()
 *
 * This function is invoked when the early_printk param starts with "pciserial"
 * The rest of the param should be ",B:D.F,baud" where B, D & F describe the
 * location of a PCI device that must be a UART device.
 */
static __init void early_pci_serial_init(char *s)
{
	unsigned divisor;
	unsigned long baud = DEFAULT_BAUD;
	u8 bus, slot, func;
	u32 classcode, bar0;
	u16 cmdreg;
	char *e;


	/*
	 * First, part the param to get the BDF values
	 */
	if (*s == ',')
		++s;

	if (*s == 0)
		return;

	bus = (u8)simple_strtoul(s, &e, 16);
	s = e;
	if (*s != ':')
		return;
	++s;
	slot = (u8)simple_strtoul(s, &e, 16);
	s = e;
	if (*s != '.')
		return;
	++s;
	func = (u8)simple_strtoul(s, &e, 16);
	s = e;

	/* A baud might be following */
	if (*s == ',')
		s++;

	/*
	 * Second, find the device from the BDF
	 */
	cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND);
	classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
	bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);

	/*
	 * Verify it is a UART type device
	 */
	if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) &&
	     (classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) ||
	   (((classcode >> 8) & 0xff) != 0x02)) /* 16550 I/F at BAR0 */
		return;

	/*
	 * Determine if it is IO or memory mapped
	 */
	if (bar0 & 0x01) {
		/* it is IO mapped */
		serial_in = io_serial_in;
		serial_out = io_serial_out;
		early_serial_base = bar0&0xfffffffc;
		write_pci_config(bus, slot, func, PCI_COMMAND,
						cmdreg|PCI_COMMAND_IO);
	} else {
		/* It is memory mapped - assume 32-bit alignment */
		serial_in = mem32_serial_in;
		serial_out = mem32_serial_out;
		/* WARNING! assuming the address is always in the first 4G */
		early_serial_base =
			(unsigned long)early_ioremap(bar0 & 0xfffffff0, 0x10);
		write_pci_config(bus, slot, func, PCI_COMMAND,
						cmdreg|PCI_COMMAND_MEMORY);
	}

	/*
	 * Lastly, initialize the hardware
	 */
	if (*s) {
		if (strcmp(s, "nocfg") == 0)
			/* Sometimes, we want to leave the UART alone
			 * and assume the BIOS has set it up correctly.
			 * "nocfg" tells us this is the case, and we
			 * should do no more setup.
			 */
			return;
		if (kstrtoul(s, 0, &baud) < 0 || baud == 0)
			baud = DEFAULT_BAUD;
	}

	/* Convert from baud to divisor value */
	divisor = 115200 / baud;

	/* Set up the HW */
	early_serial_hw_init(divisor);
}
#endif

static struct console early_serial_console = {
	.name =		"earlyser",
	.write =	early_serial_write,
	.flags =	CON_PRINTBUFFER,
	.index =	-1,
};

static void early_console_register(struct console *con, int keep_early)
{
	if (con->index != -1) {
		printk(KERN_CRIT "ERROR: earlyprintk= %s already used\n",
		       con->name);
		return;
	}
	early_console = con;
	if (keep_early)
		early_console->flags &= ~CON_BOOT;
	else
		early_console->flags |= CON_BOOT;
	register_console(early_console);
}

static int __init setup_early_printk(char *buf)
{
	int keep;

	if (!buf)
		return 0;

	if (early_console)
		return 0;

	keep = (strstr(buf, "keep") != NULL);

	while (*buf != '\0') {
		if (!strncmp(buf, "serial", 6)) {
			buf += 6;
			early_serial_init(buf);
			early_console_register(&early_serial_console, keep);
			if (!strncmp(buf, ",ttyS", 5))
				buf += 5;
		}
		if (!strncmp(buf, "ttyS", 4)) {
			early_serial_init(buf + 4);
			early_console_register(&early_serial_console, keep);
		}
#ifdef CONFIG_PCI
		if (!strncmp(buf, "pciserial", 9)) {
			early_pci_serial_init(buf + 9);
			early_console_register(&early_serial_console, keep);
			buf += 9; /* Keep from match the above "serial" */
		}
#endif
		if (!strncmp(buf, "vga", 3) &&
		    boot_params.screen_info.orig_video_isVGA == 1) {
			max_xpos = boot_params.screen_info.orig_video_cols;
			max_ypos = boot_params.screen_info.orig_video_lines;
			current_ypos = boot_params.screen_info.orig_y;
			early_console_register(&early_vga_console, keep);
		}
#ifdef CONFIG_EARLY_PRINTK_DBGP
		if (!strncmp(buf, "dbgp", 4) && !early_dbgp_init(buf + 4))
			early_console_register(&early_dbgp_console, keep);
#endif
#ifdef CONFIG_HVC_XEN
		if (!strncmp(buf, "xen", 3))
			early_console_register(&xenboot_console, keep);
#endif
#ifdef CONFIG_EARLY_PRINTK_EFI
		if (!strncmp(buf, "efi", 3))
			early_console_register(&early_efi_console, keep);
#endif
#ifdef CONFIG_EARLY_PRINTK_USB_XDBC
		if (!strncmp(buf, "xdbc", 4))
			early_xdbc_parse_parameter(buf + 4);
#endif

		buf++;
	}
	return 0;
}

early_param("earlyprintk", setup_early_printk);
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
250c2277 TG	2	#include <linux/console.h>
	3	#include <linux/kernel.h>
	4	#include <linux/init.h>
	5	#include <linux/string.h>
	6	#include <linux/screen_info.h>
5c05917e YL	7	#include <linux/usb/ch9.h>
	8	#include <linux/pci_regs.h>
	9	#include <linux/pci_ids.h>
	10	#include <linux/errno.h>
250c2277 TG	11	#include <asm/io.h>
	12	#include <asm/processor.h>
	13	#include <asm/fcntl.h>
30c82645	14	#include <asm/setup.h>
250c2277	15	#include <xen/hvc-console.h>
5c05917e	16	#include <asm/pci-direct.h>
5c05917e	17	#include <asm/fixmap.h>
05454c26	18	#include <asm/intel-mid.h>
726c0d95	19	#include <asm/pgtable.h>
5c05917e	20	#include <linux/usb/ehci_def.h>
1b5aeebf	21	#include <linux/usb/xhci-dbgp.h>
72548e83 MF	22	#include <linux/efi.h>
72548e83 MF	23	#include <asm/efi.h>
ea9e9d80	24	#include <asm/pci_x86.h>
1da177e4	25
250c2277	26	/* Simple VGA output */
250c2277 TG	27	#define VGABASE (__ISA_IO_base + 0xb8000)
	28
	29	static int max_ypos = 25, max_xpos = 80;
c9cf39ae	30	static int current_ypos = 25, current_xpos;
250c2277 TG	31
	32	static void early_vga_write(struct console con, const char str, unsigned n)
	33	{
	34	char c;
	35	int i, k, j;
	36
	37	while ((c = *str++) != '\0' && n-- > 0) {
	38	if (current_ypos >= max_ypos) {
	39	/* scroll 1 line up */
	40	for (k = 1, j = 0; k < max_ypos; k++, j++) {
	41	for (i = 0; i < max_xpos; i++) {
	42	writew(readw(VGABASE+2(max_xposk+i)),
	43	VGABASE + 2(max_xposj + i));
	44	}
	45	}
	46	for (i = 0; i < max_xpos; i++)
	47	writew(0x720, VGABASE + 2(max_xposj + i));
	48	current_ypos = max_ypos-1;
	49	}
61eaf539 JW	50	#ifdef CONFIG_KGDB_KDB
	51	if (c == '\b') {
	52	if (current_xpos > 0)
	53	current_xpos--;
	54	} else if (c == '\r') {
	55	current_xpos = 0;
	56	} else
	57	#endif
250c2277 TG	58	if (c == '\n') {
	59	current_xpos = 0;
	60	current_ypos++;
	61	} else if (c != '\r') {
	62	writew(((0x7 << 8) \| (unsigned short) c),
	63	VGABASE + 2(max_xposcurrent_ypos +
	64	current_xpos++));
	65	if (current_xpos >= max_xpos) {
	66	current_xpos = 0;
	67	current_ypos++;
	68	}
	69	}
	70	}
	71	}
	72
	73	static struct console early_vga_console = {
	74	.name = "earlyvga",
	75	.write = early_vga_write,
	76	.flags = CON_PRINTBUFFER,
	77	.index = -1,
	78	};
	79
	80	/* Serial functions loosely based on a similar package from Klaus P. Gerlicher */
	81
ea9e9d80	82	static unsigned long early_serial_base = 0x3f8; /* ttyS0 */
250c2277 TG	83
	84	#define XMTRDY 0x20
	85
	86	#define DLAB 0x80
	87
	88	#define TXR 0 /* Transmit register (WRITE) */
	89	#define RXR 0 /* Receive register (READ) */
	90	#define IER 1 /* Interrupt Enable */
	91	#define IIR 2 /* Interrupt ID */
	92	#define FCR 2 /* FIFO control */
	93	#define LCR 3 /* Line control */
	94	#define MCR 4 /* Modem control */
	95	#define LSR 5 /* Line Status */
	96	#define MSR 6 /* Modem Status */
	97	#define DLL 0 /* Divisor Latch Low */
	98	#define DLH 1 /* Divisor latch High */
	99
ea9e9d80 SA	100	static unsigned int io_serial_in(unsigned long addr, int offset)
	101	{
	102	return inb(addr + offset);
	103	}
	104
	105	static void io_serial_out(unsigned long addr, int offset, int value)
	106	{
	107	outb(value, addr + offset);
	108	}
	109
	110	static unsigned int (*serial_in)(unsigned long addr, int offset) = io_serial_in;
	111	static void (*serial_out)(unsigned long addr, int offset, int value) = io_serial_out;
	112
250c2277 TG	113	static int early_serial_putc(unsigned char ch)
	114	{
	115	unsigned timeout = 0xffff;
5c05917e	116
ea9e9d80	117	while ((serial_in(early_serial_base, LSR) & XMTRDY) == 0 && --timeout)
250c2277	118	cpu_relax();
ea9e9d80	119	serial_out(early_serial_base, TXR, ch);
250c2277 TG	120	return timeout ? 0 : -1;
	121	}
	122
	123	static void early_serial_write(struct console con, const char s, unsigned n)
	124	{
	125	while (*s && n-- > 0) {
	126	if (*s == '\n')
	127	early_serial_putc('\r');
	128	early_serial_putc(*s);
	129	s++;
	130	}
	131	}
	132
ea9e9d80 SA	133	static __init void early_serial_hw_init(unsigned divisor)
	134	{
	135	unsigned char c;
	136
	137	serial_out(early_serial_base, LCR, 0x3); /* 8n1 */
	138	serial_out(early_serial_base, IER, 0); /* no interrupt */
	139	serial_out(early_serial_base, FCR, 0); /* no fifo */
	140	serial_out(early_serial_base, MCR, 0x3); /* DTR + RTS */
	141
	142	c = serial_in(early_serial_base, LCR);
	143	serial_out(early_serial_base, LCR, c \| DLAB);
	144	serial_out(early_serial_base, DLL, divisor & 0xff);
	145	serial_out(early_serial_base, DLH, (divisor >> 8) & 0xff);
	146	serial_out(early_serial_base, LCR, c & ~DLAB);
	147	}
	148
250c2277 TG	149	#define DEFAULT_BAUD 9600
	150
	151	static __init void early_serial_init(char *s)
	152	{
250c2277	153	unsigned divisor;
ea9e9d80	154	unsigned long baud = DEFAULT_BAUD;
250c2277 TG	155	char *e;
	156
	157	if (*s == ',')
	158	++s;
	159
	160	if (*s) {
	161	unsigned port;
e941f27a	162	if (!strncmp(s, "0x", 2)) {
250c2277 TG	163	early_serial_base = simple_strtoul(s, &e, 16);
250c2277 TG	164	} else {
30cec979	165	static const int __initconst bases[] = { 0x3f8, 0x2f8 };
250c2277	166
e941f27a	167	if (!strncmp(s, "ttyS", 4))
250c2277 TG	168	s += 4;
	169	port = simple_strtoul(s, &e, 10);
	170	if (port > 1 \|\| s == e)
	171	port = 0;
	172	early_serial_base = bases[port];
	173	}
	174	s += strcspn(s, ",");
	175	if (*s == ',')
	176	s++;
	177	}
	178
ea9e9d80	179	if (*s) {
827a82ff SR	180	baud = simple_strtoull(s, &e, 0);
	181
	182	if (baud == 0 \|\| s == e)
ea9e9d80 SA	183	baud = DEFAULT_BAUD;
	184	}
	185
	186	/* Convert from baud to divisor value */
	187	divisor = 115200 / baud;
	188
	189	/* These will always be IO based ports */
	190	serial_in = io_serial_in;
	191	serial_out = io_serial_out;
	192
	193	/* Set up the HW */
	194	early_serial_hw_init(divisor);
	195	}
	196
	197	#ifdef CONFIG_PCI
7f99f8b9 ME	198	static void mem32_serial_out(unsigned long addr, int offset, int value)
7f99f8b9 ME	199	{
3435dd08	200	u32 __iomem vaddr = (u32 __iomem )addr;
7f99f8b9 ME	201	/* shift implied by pointer type */
	202	writel(value, vaddr + offset);
	203	}
	204
	205	static unsigned int mem32_serial_in(unsigned long addr, int offset)
	206	{
3435dd08	207	u32 __iomem vaddr = (u32 __iomem )addr;
7f99f8b9 ME	208	/* shift implied by pointer type */
	209	return readl(vaddr + offset);
	210	}
	211
ea9e9d80 SA	212	/*
	213	* early_pci_serial_init()
	214	*
	215	* This function is invoked when the early_printk param starts with "pciserial"
	216	* The rest of the param should be ",B:D.F,baud" where B, D & F describe the
	217	* location of a PCI device that must be a UART device.
	218	*/
	219	static __init void early_pci_serial_init(char *s)
	220	{
	221	unsigned divisor;
	222	unsigned long baud = DEFAULT_BAUD;
	223	u8 bus, slot, func;
7f99f8b9 ME	224	u32 classcode, bar0;
7f99f8b9 ME	225	u16 cmdreg;
ea9e9d80 SA	226	char *e;
	227
	228
	229	/*
	230	* First, part the param to get the BDF values
	231	*/
	232	if (*s == ',')
	233	++s;
	234
	235	if (*s == 0)
	236	return;
	237
	238	bus = (u8)simple_strtoul(s, &e, 16);
	239	s = e;
	240	if (*s != ':')
	241	return;
	242	++s;
	243	slot = (u8)simple_strtoul(s, &e, 16);
	244	s = e;
	245	if (*s != '.')
	246	return;
	247	++s;
	248	func = (u8)simple_strtoul(s, &e, 16);
	249	s = e;
250c2277	250
ea9e9d80 SA	251	/* A baud might be following */
	252	if (*s == ',')
	253	s++;
	254
	255	/*
	256	* Second, find the device from the BDF
	257	*/
	258	cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND);
	259	classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
	260	bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
	261
	262	/*
	263	* Verify it is a UART type device
	264	*/
	265	if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) &&
	266	(classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) \|\|
	267	(((classcode >> 8) & 0xff) != 0x02)) /* 16550 I/F at BAR0 */
	268	return;
	269
	270	/*
	271	* Determine if it is IO or memory mapped
	272	*/
	273	if (bar0 & 0x01) {
	274	/* it is IO mapped */
	275	serial_in = io_serial_in;
	276	serial_out = io_serial_out;
	277	early_serial_base = bar0&0xfffffffc;
	278	write_pci_config(bus, slot, func, PCI_COMMAND,
	279	cmdreg\|PCI_COMMAND_IO);
	280	} else {
	281	/* It is memory mapped - assume 32-bit alignment */
	282	serial_in = mem32_serial_in;
	283	serial_out = mem32_serial_out;
	284	/* WARNING! assuming the address is always in the first 4G */
	285	early_serial_base =
	286	(unsigned long)early_ioremap(bar0 & 0xfffffff0, 0x10);
	287	write_pci_config(bus, slot, func, PCI_COMMAND,
	288	cmdreg\|PCI_COMMAND_MEMORY);
	289	}
	290
	291	/*
6a6256f9	292	* Lastly, initialize the hardware
ea9e9d80	293	*/
250c2277	294	if (*s) {
ea9e9d80 SA	295	if (strcmp(s, "nocfg") == 0)
	296	/* Sometimes, we want to leave the UART alone
	297	* and assume the BIOS has set it up correctly.
	298	* "nocfg" tells us this is the case, and we
	299	* should do no more setup.
	300	*/
	301	return;
	302	if (kstrtoul(s, 0, &baud) < 0 \|\| baud == 0)
250c2277 TG	303	baud = DEFAULT_BAUD;
	304	}
	305
ea9e9d80	306	/* Convert from baud to divisor value */
250c2277	307	divisor = 115200 / baud;
ea9e9d80 SA	308
	309	/* Set up the HW */
	310	early_serial_hw_init(divisor);
250c2277	311	}
ea9e9d80	312	#endif
250c2277 TG	313
	314	static struct console early_serial_console = {
	315	.name = "earlyser",
	316	.write = early_serial_write,
	317	.flags = CON_PRINTBUFFER,
	318	.index = -1,
	319	};
	320
c368ef28	321	static void early_console_register(struct console *con, int keep_early)
c9530948	322	{
d0380e6c	323	if (con->index != -1) {
429a6e5e JW	324	printk(KERN_CRIT "ERROR: earlyprintk= %s already used\n",
	325	con->name);
	326	return;
	327	}
c9530948 JW	328	early_console = con;
	329	if (keep_early)
	330	early_console->flags &= ~CON_BOOT;
	331	else
	332	early_console->flags \|= CON_BOOT;
	333	register_console(early_console);
	334	}
250c2277 TG	335
	336	static int __init setup_early_printk(char *buf)
	337	{
c9530948	338	int keep;
5c05917e	339
250c2277 TG	340	if (!buf)
	341	return 0;
	342
d0380e6c	343	if (early_console)
250c2277	344	return 0;
250c2277	345
c9530948 JW	346	keep = (strstr(buf, "keep") != NULL);
	347
	348	while (*buf != '\0') {
	349	if (!strncmp(buf, "serial", 6)) {
ea3acb19 JW	350	buf += 6;
ea3acb19 JW	351	early_serial_init(buf);
c9530948	352	early_console_register(&early_serial_console, keep);
ea3acb19 JW	353	if (!strncmp(buf, ",ttyS", 5))
ea3acb19 JW	354	buf += 5;
c9530948 JW	355	}
	356	if (!strncmp(buf, "ttyS", 4)) {
	357	early_serial_init(buf + 4);
	358	early_console_register(&early_serial_console, keep);
	359	}
ea9e9d80 SA	360	#ifdef CONFIG_PCI
	361	if (!strncmp(buf, "pciserial", 9)) {
	362	early_pci_serial_init(buf + 9);
	363	early_console_register(&early_serial_console, keep);
	364	buf += 9; /* Keep from match the above "serial" */
	365	}
	366	#endif
c9530948 JW	367	if (!strncmp(buf, "vga", 3) &&
	368	boot_params.screen_info.orig_video_isVGA == 1) {
	369	max_xpos = boot_params.screen_info.orig_video_cols;
	370	max_ypos = boot_params.screen_info.orig_video_lines;
	371	current_ypos = boot_params.screen_info.orig_y;
	372	early_console_register(&early_vga_console, keep);
	373	}
5c05917e	374	#ifdef CONFIG_EARLY_PRINTK_DBGP
c9530948 JW	375	if (!strncmp(buf, "dbgp", 4) && !early_dbgp_init(buf + 4))
c9530948 JW	376	early_console_register(&early_dbgp_console, keep);
5c05917e	377	#endif
250c2277	378	#ifdef CONFIG_HVC_XEN
c9530948 JW	379	if (!strncmp(buf, "xen", 3))
c9530948 JW	380	early_console_register(&xenboot_console, keep);
c20b5c33	381	#endif
72548e83 MF	382	#ifdef CONFIG_EARLY_PRINTK_EFI
	383	if (!strncmp(buf, "efi", 3))
	384	early_console_register(&early_efi_console, keep);
	385	#endif
1b5aeebf LB	386	#ifdef CONFIG_EARLY_PRINTK_USB_XDBC
	387	if (!strncmp(buf, "xdbc", 4))
	388	early_xdbc_parse_parameter(buf + 4);
	389	#endif
72548e83	390
c9530948	391	buf++;
250c2277	392	}
250c2277 TG	393	return 0;
250c2277 TG	394	}
5c05917e	395
250c2277	396	early_param("earlyprintk", setup_early_printk);