[linux-2.6-block.git] / arch / x86 / kernel / cpu / topology.c

/*
 * Check for extended topology enumeration cpuid leaf 0xb and if it
 * exists, use it for populating initial_apicid and cpu topology
 * detection.
 */

#include <linux/cpu.h>
#include <asm/apic.h>
#include <asm/pat.h>
#include <asm/processor.h>

/* leaf 0xb SMT level */
#define SMT_LEVEL	0

/* leaf 0xb sub-leaf types */
#define INVALID_TYPE	0
#define SMT_TYPE	1
#define CORE_TYPE	2

#define LEAFB_SUBTYPE(ecx)		(((ecx) >> 8) & 0xff)
#define BITS_SHIFT_NEXT_LEVEL(eax)	((eax) & 0x1f)
#define LEVEL_MAX_SIBLINGS(ebx)		((ebx) & 0xffff)

/*
 * Check for extended topology enumeration cpuid leaf 0xb and if it
 * exists, use it for populating initial_apicid and cpu topology
 * detection.
 */
void detect_extended_topology(struct cpuinfo_x86 *c)
{
#ifdef CONFIG_SMP
	unsigned int eax, ebx, ecx, edx, sub_index;
	unsigned int ht_mask_width, core_plus_mask_width;
	unsigned int core_select_mask, core_level_siblings;
	static bool printed;

	if (c->cpuid_level < 0xb)
		return;

	cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);

	/*
	 * check if the cpuid leaf 0xb is actually implemented.
	 */
	if (ebx == 0 || (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
		return;

	set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);

	/*
	 * initial apic id, which also represents 32-bit extended x2apic id.
	 */
	c->initial_apicid = edx;

	/*
	 * Populate HT related information from sub-leaf level 0.
	 */
	core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
	core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);

	sub_index = 1;
	do {
		cpuid_count(0xb, sub_index, &eax, &ebx, &ecx, &edx);

		/*
		 * Check for the Core type in the implemented sub leaves.
		 */
		if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) {
			core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
			core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
			break;
		}

		sub_index++;
	} while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE);

	core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;

	c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width)
						 & core_select_mask;
	c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width);
	/*
	 * Reinit the apicid, now that we have extended initial_apicid.
	 */
	c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);

	c->x86_max_cores = (core_level_siblings / smp_num_siblings);

	if (!printed) {
		pr_info("CPU: Physical Processor ID: %d\n",
		       c->phys_proc_id);
		if (c->x86_max_cores > 1)
			pr_info("CPU: Processor Core ID: %d\n",
			       c->cpu_core_id);
		printed = 1;
	}
	return;
#endif
}
Commit	Line	Data
1d67953f	1	/*
2decb194 PA	2	* Check for extended topology enumeration cpuid leaf 0xb and if it
	3	* exists, use it for populating initial_apicid and cpu topology
	4	* detection.
1d67953f	5	*/
1d67953f	6
2decb194 PA	7	#include <linux/cpu.h>
2decb194 PA	8	#include <asm/apic.h>
8d4a4300	9	#include <asm/pat.h>
1d67953f VP	10	#include <asm/processor.h>
1d67953f VP	11
bbb65d2d SS	12	/* leaf 0xb SMT level */
	13	#define SMT_LEVEL 0
	14
	15	/* leaf 0xb sub-leaf types */
	16	#define INVALID_TYPE 0
	17	#define SMT_TYPE 1
	18	#define CORE_TYPE 2
	19
	20	#define LEAFB_SUBTYPE(ecx) (((ecx) >> 8) & 0xff)
	21	#define BITS_SHIFT_NEXT_LEVEL(eax) ((eax) & 0x1f)
	22	#define LEVEL_MAX_SIBLINGS(ebx) ((ebx) & 0xffff)
	23
	24	/*
	25	* Check for extended topology enumeration cpuid leaf 0xb and if it
	26	* exists, use it for populating initial_apicid and cpu topology
	27	* detection.
	28	*/
148f9bb8	29	void detect_extended_topology(struct cpuinfo_x86 *c)
bbb65d2d	30	{
3e5095d1	31	#ifdef CONFIG_SMP
bbb65d2d SS	32	unsigned int eax, ebx, ecx, edx, sub_index;
	33	unsigned int ht_mask_width, core_plus_mask_width;
	34	unsigned int core_select_mask, core_level_siblings;
2eaad1fd	35	static bool printed;
bbb65d2d SS	36
	37	if (c->cpuid_level < 0xb)
	38	return;
	39
	40	cpuid_count(0xb, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
	41
	42	/*
	43	* check if the cpuid leaf 0xb is actually implemented.
	44	*/
	45	if (ebx == 0 \|\| (LEAFB_SUBTYPE(ecx) != SMT_TYPE))
	46	return;
	47
	48	set_cpu_cap(c, X86_FEATURE_XTOPOLOGY);
	49
	50	/*
	51	* initial apic id, which also represents 32-bit extended x2apic id.
	52	*/
	53	c->initial_apicid = edx;
	54
	55	/*
	56	* Populate HT related information from sub-leaf level 0.
	57	*/
	58	core_level_siblings = smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
	59	core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
	60
	61	sub_index = 1;
	62	do {
	63	cpuid_count(0xb, sub_index, &eax, &ebx, &ecx, &edx);
	64
	65	/*
	66	* Check for the Core type in the implemented sub leaves.
	67	*/
	68	if (LEAFB_SUBTYPE(ecx) == CORE_TYPE) {
	69	core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
	70	core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax);
	71	break;
	72	}
	73
	74	sub_index++;
	75	} while (LEAFB_SUBTYPE(ecx) != INVALID_TYPE);
	76
	77	core_select_mask = (~(-1 << core_plus_mask_width)) >> ht_mask_width;
	78
cb8cc442	79	c->cpu_core_id = apic->phys_pkg_id(c->initial_apicid, ht_mask_width)
bbb65d2d	80	& core_select_mask;
cb8cc442	81	c->phys_proc_id = apic->phys_pkg_id(c->initial_apicid, core_plus_mask_width);
345077cd SS	82	/*
	83	* Reinit the apicid, now that we have extended initial_apicid.
	84	*/
cb8cc442	85	c->apicid = apic->phys_pkg_id(c->initial_apicid, 0);
d4c9a9f3	86
bbb65d2d SS	87	c->x86_max_cores = (core_level_siblings / smp_num_siblings);
bbb65d2d SS	88
2eaad1fd	89	if (!printed) {
1b74dde7	90	pr_info("CPU: Physical Processor ID: %d\n",
2eaad1fd MT	91	c->phys_proc_id);
2eaad1fd MT	92	if (c->x86_max_cores > 1)
1b74dde7	93	pr_info("CPU: Processor Core ID: %d\n",
2eaad1fd MT	94	c->cpu_core_id);
	95	printed = 1;
	96	}
bbb65d2d	97	return;
11c231a9	98	#endif
bbb65d2d	99	}