Commit | Line | Data |
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b886d83c | 1 | // SPDX-License-Identifier: GPL-2.0-only |
a2a47c6c KS |
2 | /* |
3 | * HyperV Detection code. | |
4 | * | |
5 | * Copyright (C) 2010, Novell, Inc. | |
6 | * Author : K. Y. Srinivasan <ksrinivasan@novell.com> | |
a2a47c6c KS |
7 | */ |
8 | ||
9 | #include <linux/types.h> | |
6f4151c8 S |
10 | #include <linux/time.h> |
11 | #include <linux/clocksource.h> | |
186f4360 PG |
12 | #include <linux/init.h> |
13 | #include <linux/export.h> | |
bc2b0331 | 14 | #include <linux/hardirq.h> |
9e7827b5 | 15 | #include <linux/efi.h> |
bc2b0331 | 16 | #include <linux/interrupt.h> |
1aec1696 | 17 | #include <linux/irq.h> |
2517281d | 18 | #include <linux/kexec.h> |
1de72c70 | 19 | #include <linux/i8253.h> |
fd1fea68 | 20 | #include <linux/random.h> |
a2a47c6c | 21 | #include <asm/processor.h> |
e08cae41 | 22 | #include <asm/hypervisor.h> |
5a485803 | 23 | #include <asm/hyperv-tlfs.h> |
a2a47c6c | 24 | #include <asm/mshyperv.h> |
bc2b0331 | 25 | #include <asm/desc.h> |
bc2b0331 | 26 | #include <asm/irq_regs.h> |
9e7827b5 | 27 | #include <asm/i8259.h> |
d68ce017 | 28 | #include <asm/apic.h> |
ca3ba2a2 | 29 | #include <asm/timer.h> |
2517281d | 30 | #include <asm/reboot.h> |
59107e2f | 31 | #include <asm/nmi.h> |
bd00cd52 | 32 | #include <clocksource/hyperv_timer.h> |
a2a47c6c | 33 | |
e08cae41 | 34 | struct ms_hyperv_info ms_hyperv; |
9279aa55 | 35 | EXPORT_SYMBOL_GPL(ms_hyperv); |
a2a47c6c | 36 | |
3c433679 | 37 | #if IS_ENABLED(CONFIG_HYPERV) |
76d388cd | 38 | static void (*vmbus_handler)(void); |
248e742a | 39 | static void (*hv_stimer0_handler)(void); |
1e034743 VK |
40 | static void (*hv_kexec_handler)(void); |
41 | static void (*hv_crash_handler)(struct pt_regs *regs); | |
1aec1696 | 42 | |
e9a7fda2 | 43 | __visible void __irq_entry hyperv_vector_handler(struct pt_regs *regs) |
1aec1696 TG |
44 | { |
45 | struct pt_regs *old_regs = set_irq_regs(regs); | |
46 | ||
6af7faf6 | 47 | entering_irq(); |
1aec1696 TG |
48 | inc_irq_stat(irq_hv_callback_count); |
49 | if (vmbus_handler) | |
50 | vmbus_handler(); | |
51 | ||
7dc9b6b8 | 52 | if (ms_hyperv.hints & HV_DEPRECATING_AEOI_RECOMMENDED) |
a33fd4c2 S |
53 | ack_APIC_irq(); |
54 | ||
6af7faf6 | 55 | exiting_irq(); |
1aec1696 TG |
56 | set_irq_regs(old_regs); |
57 | } | |
58 | ||
76d388cd | 59 | void hv_setup_vmbus_irq(void (*handler)(void)) |
1aec1696 TG |
60 | { |
61 | vmbus_handler = handler; | |
1aec1696 TG |
62 | } |
63 | ||
76d388cd | 64 | void hv_remove_vmbus_irq(void) |
1aec1696 TG |
65 | { |
66 | /* We have no way to deallocate the interrupt gate */ | |
67 | vmbus_handler = NULL; | |
68 | } | |
69 | EXPORT_SYMBOL_GPL(hv_setup_vmbus_irq); | |
70 | EXPORT_SYMBOL_GPL(hv_remove_vmbus_irq); | |
2517281d | 71 | |
248e742a MK |
72 | /* |
73 | * Routines to do per-architecture handling of stimer0 | |
74 | * interrupts when in Direct Mode | |
75 | */ | |
76 | ||
77 | __visible void __irq_entry hv_stimer0_vector_handler(struct pt_regs *regs) | |
78 | { | |
79 | struct pt_regs *old_regs = set_irq_regs(regs); | |
80 | ||
81 | entering_irq(); | |
82 | inc_irq_stat(hyperv_stimer0_count); | |
83 | if (hv_stimer0_handler) | |
84 | hv_stimer0_handler(); | |
fd1fea68 | 85 | add_interrupt_randomness(HYPERV_STIMER0_VECTOR, 0); |
248e742a MK |
86 | ack_APIC_irq(); |
87 | ||
88 | exiting_irq(); | |
89 | set_irq_regs(old_regs); | |
90 | } | |
91 | ||
92 | int hv_setup_stimer0_irq(int *irq, int *vector, void (*handler)(void)) | |
93 | { | |
94 | *vector = HYPERV_STIMER0_VECTOR; | |
fd1fea68 | 95 | *irq = -1; /* Unused on x86/x64 */ |
248e742a MK |
96 | hv_stimer0_handler = handler; |
97 | return 0; | |
98 | } | |
99 | EXPORT_SYMBOL_GPL(hv_setup_stimer0_irq); | |
100 | ||
101 | void hv_remove_stimer0_irq(int irq) | |
102 | { | |
103 | /* We have no way to deallocate the interrupt gate */ | |
104 | hv_stimer0_handler = NULL; | |
105 | } | |
106 | EXPORT_SYMBOL_GPL(hv_remove_stimer0_irq); | |
107 | ||
2517281d VK |
108 | void hv_setup_kexec_handler(void (*handler)(void)) |
109 | { | |
110 | hv_kexec_handler = handler; | |
111 | } | |
112 | EXPORT_SYMBOL_GPL(hv_setup_kexec_handler); | |
113 | ||
114 | void hv_remove_kexec_handler(void) | |
115 | { | |
116 | hv_kexec_handler = NULL; | |
117 | } | |
118 | EXPORT_SYMBOL_GPL(hv_remove_kexec_handler); | |
b4370df2 VK |
119 | |
120 | void hv_setup_crash_handler(void (*handler)(struct pt_regs *regs)) | |
121 | { | |
122 | hv_crash_handler = handler; | |
123 | } | |
124 | EXPORT_SYMBOL_GPL(hv_setup_crash_handler); | |
125 | ||
126 | void hv_remove_crash_handler(void) | |
127 | { | |
128 | hv_crash_handler = NULL; | |
129 | } | |
130 | EXPORT_SYMBOL_GPL(hv_remove_crash_handler); | |
1aec1696 | 131 | |
1e034743 | 132 | #ifdef CONFIG_KEXEC_CORE |
2517281d VK |
133 | static void hv_machine_shutdown(void) |
134 | { | |
135 | if (kexec_in_progress && hv_kexec_handler) | |
136 | hv_kexec_handler(); | |
137 | native_machine_shutdown(); | |
138 | } | |
139 | ||
b4370df2 VK |
140 | static void hv_machine_crash_shutdown(struct pt_regs *regs) |
141 | { | |
142 | if (hv_crash_handler) | |
143 | hv_crash_handler(regs); | |
144 | native_machine_crash_shutdown(regs); | |
145 | } | |
1e034743 VK |
146 | #endif /* CONFIG_KEXEC_CORE */ |
147 | #endif /* CONFIG_HYPERV */ | |
b4370df2 | 148 | |
9df56f19 | 149 | static uint32_t __init ms_hyperv_platform(void) |
a2a47c6c | 150 | { |
e08cae41 PA |
151 | u32 eax; |
152 | u32 hyp_signature[3]; | |
a2a47c6c | 153 | |
e08cae41 | 154 | if (!boot_cpu_has(X86_FEATURE_HYPERVISOR)) |
9df56f19 | 155 | return 0; |
a2a47c6c | 156 | |
e08cae41 PA |
157 | cpuid(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS, |
158 | &eax, &hyp_signature[0], &hyp_signature[1], &hyp_signature[2]); | |
a2a47c6c | 159 | |
9df56f19 JW |
160 | if (eax >= HYPERV_CPUID_MIN && |
161 | eax <= HYPERV_CPUID_MAX && | |
162 | !memcmp("Microsoft Hv", hyp_signature, 12)) | |
163 | return HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS; | |
164 | ||
165 | return 0; | |
a2a47c6c KS |
166 | } |
167 | ||
1e2ae9ec VK |
168 | static unsigned char hv_get_nmi_reason(void) |
169 | { | |
170 | return 0; | |
171 | } | |
172 | ||
59107e2f VK |
173 | #ifdef CONFIG_X86_LOCAL_APIC |
174 | /* | |
175 | * Prior to WS2016 Debug-VM sends NMIs to all CPUs which makes | |
176 | * it dificult to process CHANNELMSG_UNLOAD in case of crash. Handle | |
177 | * unknown NMI on the first CPU which gets it. | |
178 | */ | |
179 | static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs) | |
180 | { | |
181 | static atomic_t nmi_cpu = ATOMIC_INIT(-1); | |
182 | ||
183 | if (!unknown_nmi_panic) | |
184 | return NMI_DONE; | |
185 | ||
186 | if (atomic_cmpxchg(&nmi_cpu, -1, raw_smp_processor_id()) != -1) | |
187 | return NMI_HANDLED; | |
188 | ||
189 | return NMI_DONE; | |
190 | } | |
191 | #endif | |
192 | ||
71c2a2d0 VK |
193 | static unsigned long hv_get_tsc_khz(void) |
194 | { | |
195 | unsigned long freq; | |
196 | ||
197 | rdmsrl(HV_X64_MSR_TSC_FREQUENCY, freq); | |
198 | ||
199 | return freq / 1000; | |
200 | } | |
201 | ||
3a025de6 YS |
202 | #if defined(CONFIG_SMP) && IS_ENABLED(CONFIG_HYPERV) |
203 | static void __init hv_smp_prepare_boot_cpu(void) | |
204 | { | |
205 | native_smp_prepare_boot_cpu(); | |
206 | #if defined(CONFIG_X86_64) && defined(CONFIG_PARAVIRT_SPINLOCKS) | |
207 | hv_init_spinlocks(); | |
208 | #endif | |
209 | } | |
210 | #endif | |
211 | ||
e08cae41 | 212 | static void __init ms_hyperv_init_platform(void) |
a2a47c6c | 213 | { |
8de8af7e S |
214 | int hv_host_info_eax; |
215 | int hv_host_info_ebx; | |
216 | int hv_host_info_ecx; | |
217 | int hv_host_info_edx; | |
218 | ||
f7c0f50f AP |
219 | #ifdef CONFIG_PARAVIRT |
220 | pv_info.name = "Hyper-V"; | |
221 | #endif | |
222 | ||
a2a47c6c | 223 | /* |
e08cae41 | 224 | * Extract the features and hints |
a2a47c6c | 225 | */ |
e08cae41 | 226 | ms_hyperv.features = cpuid_eax(HYPERV_CPUID_FEATURES); |
cc2dd402 | 227 | ms_hyperv.misc_features = cpuid_edx(HYPERV_CPUID_FEATURES); |
e08cae41 | 228 | ms_hyperv.hints = cpuid_eax(HYPERV_CPUID_ENLIGHTMENT_INFO); |
a2a47c6c | 229 | |
dd018597 | 230 | pr_info("Hyper-V: features 0x%x, hints 0x%x\n", |
1b74dde7 | 231 | ms_hyperv.features, ms_hyperv.hints); |
6f4151c8 | 232 | |
415bd1cd VK |
233 | ms_hyperv.max_vp_index = cpuid_eax(HYPERV_CPUID_IMPLEMENT_LIMITS); |
234 | ms_hyperv.max_lp_index = cpuid_ebx(HYPERV_CPUID_IMPLEMENT_LIMITS); | |
dd018597 VK |
235 | |
236 | pr_debug("Hyper-V: max %u virtual processors, %u logical processors\n", | |
237 | ms_hyperv.max_vp_index, ms_hyperv.max_lp_index); | |
238 | ||
8de8af7e S |
239 | /* |
240 | * Extract host information. | |
241 | */ | |
415bd1cd VK |
242 | if (cpuid_eax(HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS) >= |
243 | HYPERV_CPUID_VERSION) { | |
244 | hv_host_info_eax = cpuid_eax(HYPERV_CPUID_VERSION); | |
245 | hv_host_info_ebx = cpuid_ebx(HYPERV_CPUID_VERSION); | |
246 | hv_host_info_ecx = cpuid_ecx(HYPERV_CPUID_VERSION); | |
247 | hv_host_info_edx = cpuid_edx(HYPERV_CPUID_VERSION); | |
8de8af7e S |
248 | |
249 | pr_info("Hyper-V Host Build:%d-%d.%d-%d-%d.%d\n", | |
250 | hv_host_info_eax, hv_host_info_ebx >> 16, | |
251 | hv_host_info_ebx & 0xFFFF, hv_host_info_ecx, | |
252 | hv_host_info_edx >> 24, hv_host_info_edx & 0xFFFFFF); | |
253 | } | |
254 | ||
71c2a2d0 VK |
255 | if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS && |
256 | ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { | |
257 | x86_platform.calibrate_tsc = hv_get_tsc_khz; | |
258 | x86_platform.calibrate_cpu = hv_get_tsc_khz; | |
259 | } | |
260 | ||
5431390b VK |
261 | if (ms_hyperv.hints & HV_X64_ENLIGHTENED_VMCS_RECOMMENDED) { |
262 | ms_hyperv.nested_features = | |
263 | cpuid_eax(HYPERV_CPUID_NESTED_FEATURES); | |
264 | } | |
265 | ||
90ab9d55 | 266 | #ifdef CONFIG_X86_LOCAL_APIC |
2cf02842 VK |
267 | if (ms_hyperv.features & HV_X64_ACCESS_FREQUENCY_MSRS && |
268 | ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { | |
9e7827b5 S |
269 | /* |
270 | * Get the APIC frequency. | |
271 | */ | |
4c08edd3 PA |
272 | u64 hv_lapic_frequency; |
273 | ||
9e7827b5 S |
274 | rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency); |
275 | hv_lapic_frequency = div_u64(hv_lapic_frequency, HZ); | |
52ae346b | 276 | lapic_timer_period = hv_lapic_frequency; |
dd018597 | 277 | pr_info("Hyper-V: LAPIC Timer Frequency: %#x\n", |
52ae346b | 278 | lapic_timer_period); |
9e7827b5 | 279 | } |
59107e2f VK |
280 | |
281 | register_nmi_handler(NMI_UNKNOWN, hv_nmi_unknown, NMI_FLAG_FIRST, | |
282 | "hv_nmi_unknown"); | |
90ab9d55 | 283 | #endif |
9e7827b5 | 284 | |
ca3ba2a2 JW |
285 | #ifdef CONFIG_X86_IO_APIC |
286 | no_timer_check = 1; | |
287 | #endif | |
288 | ||
1e034743 | 289 | #if IS_ENABLED(CONFIG_HYPERV) && defined(CONFIG_KEXEC_CORE) |
2517281d | 290 | machine_ops.shutdown = hv_machine_shutdown; |
b4370df2 | 291 | machine_ops.crash_shutdown = hv_machine_crash_shutdown; |
1e034743 | 292 | #endif |
dce7cd62 AP |
293 | if (ms_hyperv.features & HV_X64_ACCESS_TSC_INVARIANT) { |
294 | wrmsrl(HV_X64_MSR_TSC_INVARIANT_CONTROL, 0x1); | |
295 | setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); | |
296 | } else { | |
297 | mark_tsc_unstable("running on Hyper-V"); | |
298 | } | |
1e2ae9ec VK |
299 | |
300 | /* | |
301 | * Generation 2 instances don't support reading the NMI status from | |
302 | * 0x61 port. | |
303 | */ | |
304 | if (efi_enabled(EFI_BOOT)) | |
305 | x86_platform.get_nmi_reason = hv_get_nmi_reason; | |
8730046c | 306 | |
1de72c70 MK |
307 | /* |
308 | * Hyper-V VMs have a PIT emulation quirk such that zeroing the | |
309 | * counter register during PIT shutdown restarts the PIT. So it | |
310 | * continues to interrupt @18.2 HZ. Setting i8253_clear_counter | |
311 | * to false tells pit_shutdown() not to zero the counter so that | |
312 | * the PIT really is shutdown. Generation 2 VMs don't have a PIT, | |
313 | * and setting this value has no effect. | |
314 | */ | |
315 | i8253_clear_counter_on_shutdown = false; | |
316 | ||
8730046c S |
317 | #if IS_ENABLED(CONFIG_HYPERV) |
318 | /* | |
319 | * Setup the hook to get control post apic initialization. | |
320 | */ | |
321 | x86_platform.apic_post_init = hyperv_init; | |
2ffd9e33 | 322 | hyperv_setup_mmu_ops(); |
213ff44a S |
323 | /* Setup the IDT for hypervisor callback */ |
324 | alloc_intr_gate(HYPERVISOR_CALLBACK_VECTOR, hyperv_callback_vector); | |
93286261 VK |
325 | |
326 | /* Setup the IDT for reenlightenment notifications */ | |
327 | if (ms_hyperv.features & HV_X64_ACCESS_REENLIGHTENMENT) | |
328 | alloc_intr_gate(HYPERV_REENLIGHTENMENT_VECTOR, | |
329 | hyperv_reenlightenment_vector); | |
330 | ||
248e742a | 331 | /* Setup the IDT for stimer0 */ |
7dc9b6b8 | 332 | if (ms_hyperv.misc_features & HV_STIMER_DIRECT_MODE_AVAILABLE) |
248e742a MK |
333 | alloc_intr_gate(HYPERV_STIMER0_VECTOR, |
334 | hv_stimer0_callback_vector); | |
3a025de6 YS |
335 | |
336 | # ifdef CONFIG_SMP | |
337 | smp_ops.smp_prepare_boot_cpu = hv_smp_prepare_boot_cpu; | |
338 | # endif | |
84fdfafa LT |
339 | |
340 | /* | |
341 | * Hyper-V doesn't provide irq remapping for IO-APIC. To enable x2apic, | |
342 | * set x2apic destination mode to physcial mode when x2apic is available | |
343 | * and Hyper-V IOMMU driver makes sure cpus assigned with IO-APIC irqs | |
344 | * have 8-bit APIC id. | |
345 | */ | |
346 | # ifdef CONFIG_X86_X2APIC | |
347 | if (x2apic_supported()) | |
348 | x2apic_phys = 1; | |
349 | # endif | |
350 | ||
bd00cd52 TL |
351 | /* Register Hyper-V specific clocksource */ |
352 | hv_init_clocksource(); | |
8730046c | 353 | #endif |
a2a47c6c | 354 | } |
e08cae41 | 355 | |
bd00cd52 TL |
356 | void hv_setup_sched_clock(void *sched_clock) |
357 | { | |
41cfe2a2 | 358 | #ifdef CONFIG_PARAVIRT |
bd00cd52 | 359 | pv_ops.time.sched_clock = sched_clock; |
8730046c | 360 | #endif |
a2a47c6c | 361 | } |
e08cae41 | 362 | |
03b2a320 | 363 | const __initconst struct hypervisor_x86 x86_hyper_ms_hyperv = { |
dd018597 | 364 | .name = "Microsoft Hyper-V", |
e08cae41 | 365 | .detect = ms_hyperv_platform, |
03b2a320 | 366 | .type = X86_HYPER_MS_HYPERV, |
f72e38e8 | 367 | .init.init_platform = ms_hyperv_init_platform, |
e08cae41 | 368 | }; |