Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski...
[linux-2.6-block.git] / arch / x86 / kernel / cpu / mcheck / mce-severity.c
CommitLineData
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1/*
2 * MCE grading rules.
3 * Copyright 2008, 2009 Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; version 2
8 * of the License.
9 *
10 * Author: Andi Kleen
11 */
12#include <linux/kernel.h>
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13#include <linux/seq_file.h>
14#include <linux/init.h>
15#include <linux/debugfs.h>
817f32d0 16#include <asm/mce.h>
b2f9d678 17#include <asm/uaccess.h>
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18
19#include "mce-internal.h"
20
21/*
22 * Grade an mce by severity. In general the most severe ones are processed
23 * first. Since there are quite a lot of combinations test the bits in a
24 * table-driven way. The rules are simply processed in order, first
25 * match wins.
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26 *
27 * Note this is only used for machine check exceptions, the corrected
28 * errors use much simpler rules. The exceptions still check for the corrected
29 * errors, but only to leave them alone for the CMCI handler (except for
30 * panic situations)
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31 */
32
b2f9d678 33enum context { IN_KERNEL = 1, IN_USER = 2, IN_KERNEL_RECOV = 3 };
ed7290d0 34enum ser { SER_REQUIRED = 1, NO_SER = 2 };
e3480271 35enum exception { EXCP_CONTEXT = 1, NO_EXCP = 2 };
ed7290d0 36
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37static struct severity {
38 u64 mask;
39 u64 result;
40 unsigned char sev;
41 unsigned char mcgmask;
42 unsigned char mcgres;
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43 unsigned char ser;
44 unsigned char context;
e3480271 45 unsigned char excp;
4611a6fa 46 unsigned char covered;
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47 char *msg;
48} severities[] = {
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49#define MCESEV(s, m, c...) { .sev = MCE_ ## s ## _SEVERITY, .msg = m, ## c }
50#define KERNEL .context = IN_KERNEL
51#define USER .context = IN_USER
b2f9d678 52#define KERNEL_RECOV .context = IN_KERNEL_RECOV
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53#define SER .ser = SER_REQUIRED
54#define NOSER .ser = NO_SER
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55#define EXCP .excp = EXCP_CONTEXT
56#define NOEXCP .excp = NO_EXCP
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57#define BITCLR(x) .mask = x, .result = 0
58#define BITSET(x) .mask = x, .result = x
59#define MCGMASK(x, y) .mcgmask = x, .mcgres = y
60#define MASK(x, y) .mask = x, .result = y
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61#define MCI_UC_S (MCI_STATUS_UC|MCI_STATUS_S)
62#define MCI_UC_SAR (MCI_STATUS_UC|MCI_STATUS_S|MCI_STATUS_AR)
5f7b88d5 63#define MCI_ADDR (MCI_STATUS_ADDRV|MCI_STATUS_MISCV)
ed7290d0 64
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65 MCESEV(
66 NO, "Invalid",
67 BITCLR(MCI_STATUS_VAL)
901d7691 68 ),
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69 MCESEV(
70 NO, "Not enabled",
e3480271 71 EXCP, BITCLR(MCI_STATUS_EN)
901d7691 72 ),
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73 MCESEV(
74 PANIC, "Processor context corrupt",
75 BITSET(MCI_STATUS_PCC)
901d7691 76 ),
ed7290d0 77 /* When MCIP is not set something is very confused */
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78 MCESEV(
79 PANIC, "MCIP not set in MCA handler",
e3480271 80 EXCP, MCGMASK(MCG_STATUS_MCIP, 0)
901d7691 81 ),
ed7290d0 82 /* Neither return not error IP -- no chance to recover -> PANIC */
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83 MCESEV(
84 PANIC, "Neither restart nor error IP",
e3480271 85 EXCP, MCGMASK(MCG_STATUS_RIPV|MCG_STATUS_EIPV, 0)
901d7691 86 ),
a17957cd 87 MCESEV(
901d7691 88 PANIC, "In kernel and no restart IP",
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89 EXCP, KERNEL, MCGMASK(MCG_STATUS_RIPV, 0)
90 ),
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91 MCESEV(
92 PANIC, "In kernel and no restart IP",
93 EXCP, KERNEL_RECOV, MCGMASK(MCG_STATUS_RIPV, 0)
94 ),
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95 MCESEV(
96 DEFERRED, "Deferred error",
97 NOSER, MASK(MCI_STATUS_UC|MCI_STATUS_DEFERRED|MCI_STATUS_POISON, MCI_STATUS_DEFERRED)
901d7691 98 ),
a17957cd 99 MCESEV(
901d7691 100 KEEP, "Corrected error",
a17957cd 101 NOSER, BITCLR(MCI_STATUS_UC)
901d7691 102 ),
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103
104 /* ignore OVER for UCNA */
a17957cd 105 MCESEV(
e3480271 106 UCNA, "Uncorrected no action required",
a17957cd 107 SER, MASK(MCI_UC_SAR, MCI_STATUS_UC)
901d7691 108 ),
a17957cd 109 MCESEV(
901d7691 110 PANIC, "Illegal combination (UCNA with AR=1)",
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111 SER,
112 MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_UC|MCI_STATUS_AR)
901d7691 113 ),
a17957cd 114 MCESEV(
901d7691 115 KEEP, "Non signalled machine check",
7639bfc7 116 SER, BITCLR(MCI_STATUS_S)
901d7691 117 ),
ed7290d0 118
a17957cd 119 MCESEV(
901d7691 120 PANIC, "Action required with lost events",
7639bfc7 121 SER, BITSET(MCI_STATUS_OVER|MCI_UC_SAR)
901d7691 122 ),
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123
124 /* known AR MCACODs: */
125#ifdef CONFIG_MEMORY_FAILURE
126 MCESEV(
33d7885b 127 KEEP, "Action required but unaffected thread is continuable",
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128 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR, MCI_UC_SAR|MCI_ADDR),
129 MCGMASK(MCG_STATUS_RIPV|MCG_STATUS_EIPV, MCG_STATUS_RIPV)
5f7b88d5 130 ),
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131 MCESEV(
132 AR, "Action required: data load in error recoverable area of kernel",
133 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
134 KERNEL_RECOV
135 ),
5f7b88d5 136 MCESEV(
33d7885b 137 AR, "Action required: data load error in a user process",
08dda402 138 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
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139 USER
140 ),
37c3459b 141 MCESEV(
33d7885b 142 AR, "Action required: instruction fetch error in a user process",
37c3459b
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143 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),
144 USER
145 ),
5f7b88d5 146#endif
a17957cd 147 MCESEV(
7639bfc7 148 PANIC, "Action required: unknown MCACOD",
a17957cd 149 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_SAR)
901d7691 150 ),
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151
152 /* known AO MCACODs: */
a17957cd 153 MCESEV(
901d7691 154 AO, "Action optional: memory scrubbing error",
08dda402 155 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD_SCRUBMSK, MCI_UC_S|MCACOD_SCRUB)
901d7691 156 ),
a17957cd 157 MCESEV(
901d7691 158 AO, "Action optional: last level cache writeback error",
08dda402 159 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCACOD, MCI_UC_S|MCACOD_L3WB)
901d7691 160 ),
a17957cd 161 MCESEV(
7639bfc7 162 SOME, "Action optional: unknown MCACOD",
a17957cd 163 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_UC_S)
901d7691 164 ),
a17957cd 165 MCESEV(
901d7691 166 SOME, "Action optional with lost events",
7639bfc7 167 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_OVER|MCI_UC_S)
901d7691 168 ),
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169
170 MCESEV(
171 PANIC, "Overflowed uncorrected",
7639bfc7 172 BITSET(MCI_STATUS_OVER|MCI_STATUS_UC)
901d7691 173 ),
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174 MCESEV(
175 UC, "Uncorrected",
176 BITSET(MCI_STATUS_UC)
901d7691 177 ),
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178 MCESEV(
179 SOME, "No match",
180 BITSET(0)
901d7691 181 ) /* always matches. keep at end */
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182};
183
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184#define mc_recoverable(mcg) (((mcg) & (MCG_STATUS_RIPV|MCG_STATUS_EIPV)) == \
185 (MCG_STATUS_RIPV|MCG_STATUS_EIPV))
186
ed7290d0 187/*
875e2664
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188 * If mcgstatus indicated that ip/cs on the stack were
189 * no good, then "m->cs" will be zero and we will have
190 * to assume the worst case (IN_KERNEL) as we actually
191 * have no idea what we were executing when the machine
192 * check hit.
193 * If we do have a good "m->cs" (or a faked one in the
194 * case we were executing in VM86 mode) we can use it to
195 * distinguish an exception taken in user from from one
196 * taken in the kernel.
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197 */
198static int error_context(struct mce *m)
199{
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200 if ((m->cs & 3) == 3)
201 return IN_USER;
202 if (mc_recoverable(m->mcgstatus) && ex_has_fault_handler(m->ip))
203 return IN_KERNEL_RECOV;
204 return IN_KERNEL;
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205}
206
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207static int mce_severity_amd_smca(struct mce *m, int err_ctx)
208{
209 u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank);
210 u32 low, high;
211
212 /*
213 * We need to look at the following bits:
214 * - "succor" bit (data poisoning support), and
215 * - TCC bit (Task Context Corrupt)
216 * in MCi_STATUS to determine error severity.
217 */
218 if (!mce_flags.succor)
219 return MCE_PANIC_SEVERITY;
220
221 if (rdmsr_safe(addr, &low, &high))
222 return MCE_PANIC_SEVERITY;
223
224 /* TCC (Task context corrupt). If set and if IN_KERNEL, panic. */
225 if ((low & MCI_CONFIG_MCAX) &&
226 (m->status & MCI_STATUS_TCC) &&
227 (err_ctx == IN_KERNEL))
228 return MCE_PANIC_SEVERITY;
229
230 /* ...otherwise invoke hwpoison handler. */
231 return MCE_AR_SEVERITY;
232}
233
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234/*
235 * See AMD Error Scope Hierarchy table in a newer BKDG. For example
236 * 49125_15h_Models_30h-3Fh_BKDG.pdf, section "RAS Features"
237 */
43eaa2a1 238static int mce_severity_amd(struct mce *m, int tolerant, char **msg, bool is_excp)
bf80bbd7 239{
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240 enum context ctx = error_context(m);
241
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242 /* Processor Context Corrupt, no need to fumble too much, die! */
243 if (m->status & MCI_STATUS_PCC)
244 return MCE_PANIC_SEVERITY;
245
246 if (m->status & MCI_STATUS_UC) {
247
248 /*
249 * On older systems where overflow_recov flag is not present, we
250 * should simply panic if an error overflow occurs. If
251 * overflow_recov flag is present and set, then software can try
252 * to at least kill process to prolong system operation.
253 */
254 if (mce_flags.overflow_recov) {
6bda529e
AG
255 if (mce_flags.smca)
256 return mce_severity_amd_smca(m, ctx);
257
bf80bbd7 258 /* software can try to contain */
cee8f5a6
AG
259 if (!(m->mcgstatus & MCG_STATUS_RIPV) && (ctx == IN_KERNEL))
260 return MCE_PANIC_SEVERITY;
bf80bbd7 261
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262 /* kill current process */
263 return MCE_AR_SEVERITY;
bf80bbd7
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264 } else {
265 /* at least one error was not logged */
266 if (m->status & MCI_STATUS_OVER)
267 return MCE_PANIC_SEVERITY;
268 }
269
270 /*
271 * For any other case, return MCE_UC_SEVERITY so that we log the
272 * error and exit #MC handler.
273 */
274 return MCE_UC_SEVERITY;
275 }
276
277 /*
278 * deferred error: poll handler catches these and adds to mce_ring so
279 * memory-failure can take recovery actions.
280 */
281 if (m->status & MCI_STATUS_DEFERRED)
282 return MCE_DEFERRED_SEVERITY;
283
284 /*
285 * corrected error: poll handler catches these and passes responsibility
286 * of decoding the error to EDAC
287 */
288 return MCE_KEEP_SEVERITY;
289}
290
43eaa2a1 291static int mce_severity_intel(struct mce *m, int tolerant, char **msg, bool is_excp)
817f32d0 292{
e3480271 293 enum exception excp = (is_excp ? EXCP_CONTEXT : NO_EXCP);
7639bfc7 294 enum context ctx = error_context(m);
817f32d0 295 struct severity *s;
ed7290d0 296
817f32d0 297 for (s = severities;; s++) {
7639bfc7 298 if ((m->status & s->mask) != s->result)
817f32d0 299 continue;
7639bfc7 300 if ((m->mcgstatus & s->mcgmask) != s->mcgres)
817f32d0 301 continue;
1462594b 302 if (s->ser == SER_REQUIRED && !mca_cfg.ser)
ed7290d0 303 continue;
1462594b 304 if (s->ser == NO_SER && mca_cfg.ser)
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305 continue;
306 if (s->context && ctx != s->context)
307 continue;
e3480271
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308 if (s->excp && excp != s->excp)
309 continue;
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310 if (msg)
311 *msg = s->msg;
4611a6fa 312 s->covered = 1;
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313 if (s->sev >= MCE_UC_SEVERITY && ctx == IN_KERNEL) {
314 if (panic_on_oops || tolerant < 1)
315 return MCE_PANIC_SEVERITY;
316 }
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317 return s->sev;
318 }
319}
4611a6fa 320
43eaa2a1
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321/* Default to mce_severity_intel */
322int (*mce_severity)(struct mce *m, int tolerant, char **msg, bool is_excp) =
323 mce_severity_intel;
324
325void __init mcheck_vendor_init_severity(void)
326{
327 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
328 mce_severity = mce_severity_amd;
329}
330
e34e77ce 331#ifdef CONFIG_DEBUG_FS
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332static void *s_start(struct seq_file *f, loff_t *pos)
333{
334 if (*pos >= ARRAY_SIZE(severities))
335 return NULL;
336 return &severities[*pos];
337}
338
339static void *s_next(struct seq_file *f, void *data, loff_t *pos)
340{
341 if (++(*pos) >= ARRAY_SIZE(severities))
342 return NULL;
343 return &severities[*pos];
344}
345
346static void s_stop(struct seq_file *f, void *data)
347{
348}
349
350static int s_show(struct seq_file *f, void *data)
351{
352 struct severity *ser = data;
353 seq_printf(f, "%d\t%s\n", ser->covered, ser->msg);
354 return 0;
355}
356
357static const struct seq_operations severities_seq_ops = {
358 .start = s_start,
359 .next = s_next,
360 .stop = s_stop,
361 .show = s_show,
362};
363
364static int severities_coverage_open(struct inode *inode, struct file *file)
365{
366 return seq_open(file, &severities_seq_ops);
367}
368
369static ssize_t severities_coverage_write(struct file *file,
370 const char __user *ubuf,
371 size_t count, loff_t *ppos)
372{
373 int i;
374 for (i = 0; i < ARRAY_SIZE(severities); i++)
375 severities[i].covered = 0;
376 return count;
377}
378
379static const struct file_operations severities_coverage_fops = {
380 .open = severities_coverage_open,
381 .release = seq_release,
382 .read = seq_read,
383 .write = severities_coverage_write,
6038f373 384 .llseek = seq_lseek,
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385};
386
387static int __init severities_debugfs_init(void)
388{
7639bfc7 389 struct dentry *dmce, *fsev;
4611a6fa 390
5be9ed25 391 dmce = mce_get_debugfs_dir();
7639bfc7 392 if (!dmce)
4611a6fa 393 goto err_out;
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HS
394
395 fsev = debugfs_create_file("severities-coverage", 0444, dmce, NULL,
396 &severities_coverage_fops);
397 if (!fsev)
4611a6fa
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398 goto err_out;
399
400 return 0;
401
402err_out:
4611a6fa
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403 return -ENOMEM;
404}
405late_initcall(severities_debugfs_init);
7639bfc7 406#endif /* CONFIG_DEBUG_FS */