x86, apic: Remove enable_apic_mode callback
[linux-2.6-block.git] / arch / x86 / kernel / apic / x2apic_phys.c
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1#include <linux/threads.h>
2#include <linux/cpumask.h>
3#include <linux/string.h>
4#include <linux/kernel.h>
5#include <linux/ctype.h>
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6#include <linux/dmar.h>
7
2d9579a1 8#include <asm/smp.h>
79deb8e5 9#include <asm/x2apic.h>
2d9579a1 10
ef1f87aa 11int x2apic_phys;
1b9b89e7 12
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13static struct apic apic_x2apic_phys;
14
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15static int set_x2apic_phys_mode(char *arg)
16{
17 x2apic_phys = 1;
18 return 0;
19}
20early_param("x2apic_phys", set_x2apic_phys_mode);
21
cb214ede 22static bool x2apic_fadt_phys(void)
1b9b89e7 23{
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24 if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) &&
25 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
ea0dcf90 26 printk(KERN_DEBUG "System requires x2apic physical mode\n");
cb214ede 27 return true;
ea0dcf90 28 }
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29 return false;
30}
31
32static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
33{
34 return x2apic_enabled() && (x2apic_phys || x2apic_fadt_phys());
1b9b89e7 35}
2d9579a1 36
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37static void
38__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
2d9579a1 39{
2d9579a1 40 unsigned long query_cpu;
a27d0b5e 41 unsigned long this_cpu;
dac5f412 42 unsigned long flags;
2d9579a1 43
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44 x2apic_wrmsr_fence();
45
2d9579a1 46 local_irq_save(flags);
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47
48 this_cpu = smp_processor_id();
bcda016e 49 for_each_cpu(query_cpu, mask) {
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50 if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu)
51 continue;
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52 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
53 vector, APIC_DEST_PHYSICAL);
54 }
55 local_irq_restore(flags);
56}
57
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58static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
59{
60 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
61}
62
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63static void
64 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
2d9579a1 65{
a27d0b5e 66 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
e7986739 67}
2d9579a1 68
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69static void x2apic_send_IPI_allbutself(int vector)
70{
a27d0b5e 71 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
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72}
73
74static void x2apic_send_IPI_all(int vector)
75{
a27d0b5e 76 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
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77}
78
4d08d97f 79static void init_x2apic_ldr(void)
2d9579a1 80{
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81}
82
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83static int x2apic_phys_probe(void)
84{
cb214ede 85 if (x2apic_mode && (x2apic_phys || x2apic_fadt_phys()))
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86 return 1;
87
88 return apic == &apic_x2apic_phys;
89}
90
1a8880a1 91static struct apic apic_x2apic_phys = {
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92
93 .name = "physical x2apic",
9ebd680b 94 .probe = x2apic_phys_probe,
05c155c2 95 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
b7157acf 96 .apic_id_valid = x2apic_apic_id_valid,
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97 .apic_id_registered = x2apic_apic_id_registered,
98
f8987a10 99 .irq_delivery_mode = dest_Fixed,
0b06e734 100 .irq_dest_mode = 0, /* physical */
05c155c2 101
bf721d3a 102 .target_cpus = online_target_cpus,
08125d3e 103 .disable_esr = 0,
bdb1a9b6 104 .dest_logical = 0,
05c155c2 105 .check_apicid_used = NULL,
05c155c2 106
9d8e1066 107 .vector_allocation_domain = default_vector_allocation_domain,
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108 .init_apic_ldr = init_x2apic_ldr,
109
110 .ioapic_phys_id_map = NULL,
111 .setup_apic_routing = NULL,
a21769a4 112 .cpu_present_to_apicid = default_cpu_present_to_apicid,
05c155c2 113 .apicid_to_cpu_present = NULL,
a27a6210 114 .check_phys_apicid_present = default_check_phys_apicid_present,
d4c9a9f3 115 .phys_pkg_id = x2apic_phys_pkg_id,
05c155c2 116
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117 .get_apic_id = x2apic_get_apic_id,
118 .set_apic_id = x2apic_set_apic_id,
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119 .apic_id_mask = 0xFFFFFFFFu,
120
6398268d 121 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
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122
123 .send_IPI_mask = x2apic_send_IPI_mask,
124 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
125 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
126 .send_IPI_all = x2apic_send_IPI_all,
127 .send_IPI_self = x2apic_send_IPI_self,
128
465822cf 129 .wait_for_init_deassert = false,
05c155c2 130 .inquire_remote_apic = NULL,
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131
132 .read = native_apic_msr_read,
133 .write = native_apic_msr_write,
0ab711ae 134 .eoi_write = native_apic_msr_eoi_write,
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135 .icr_read = native_x2apic_icr_read,
136 .icr_write = native_x2apic_icr_write,
137 .wait_icr_idle = native_x2apic_wait_icr_idle,
138 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
2d9579a1 139};
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140
141apic_driver(apic_x2apic_phys);