Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * Written by: Garry Forsgren, Unisys Corporation | |
3 | * Natalie Protasevich, Unisys Corporation | |
7da18ed9 | 4 | * |
1da177e4 LT |
5 | * This file contains the code to configure and interface |
6 | * with Unisys ES7000 series hardware system manager. | |
7 | * | |
7da18ed9 IM |
8 | * Copyright (c) 2003 Unisys Corporation. |
9 | * Copyright (C) 2009, Red Hat, Inc., Ingo Molnar | |
10 | * | |
11 | * All Rights Reserved. | |
1da177e4 LT |
12 | * |
13 | * This program is free software; you can redistribute it and/or modify it | |
14 | * under the terms of version 2 of the GNU General Public License as | |
15 | * published by the Free Software Foundation. | |
16 | * | |
17 | * This program is distributed in the hope that it would be useful, but | |
18 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | |
20 | * | |
21 | * You should have received a copy of the GNU General Public License along | |
22 | * with this program; if not, write the Free Software Foundation, Inc., 59 | |
23 | * Temple Place - Suite 330, Boston MA 02111-1307, USA. | |
24 | * | |
25 | * Contact information: Unisys Corporation, Township Line & Union Meeting | |
26 | * Roads-A, Unisys Way, Blue Bell, Pennsylvania, 19424, or: | |
27 | * | |
28 | * http://www.unisys.com | |
29 | */ | |
2c4ce18c IM |
30 | #include <linux/notifier.h> |
31 | #include <linux/spinlock.h> | |
32 | #include <linux/cpumask.h> | |
33 | #include <linux/threads.h> | |
1da177e4 | 34 | #include <linux/kernel.h> |
2c4ce18c IM |
35 | #include <linux/module.h> |
36 | #include <linux/reboot.h> | |
1da177e4 | 37 | #include <linux/string.h> |
2c4ce18c | 38 | #include <linux/types.h> |
1da177e4 | 39 | #include <linux/errno.h> |
1da177e4 | 40 | #include <linux/acpi.h> |
2c4ce18c | 41 | #include <linux/init.h> |
7da18ed9 | 42 | #include <linux/nmi.h> |
2c4ce18c | 43 | #include <linux/smp.h> |
7da18ed9 | 44 | #include <linux/io.h> |
2c4ce18c | 45 | |
1da177e4 | 46 | #include <asm/apicdef.h> |
2c4ce18c IM |
47 | #include <asm/atomic.h> |
48 | #include <asm/fixmap.h> | |
49 | #include <asm/mpspec.h> | |
569712b2 | 50 | #include <asm/setup.h> |
2c4ce18c IM |
51 | #include <asm/apic.h> |
52 | #include <asm/ipi.h> | |
1da177e4 | 53 | |
1625324d YL |
54 | /* |
55 | * ES7000 chipsets | |
56 | */ | |
57 | ||
2c4ce18c IM |
58 | #define NON_UNISYS 0 |
59 | #define ES7000_CLASSIC 1 | |
60 | #define ES7000_ZORRO 2 | |
1625324d | 61 | |
2c4ce18c IM |
62 | #define MIP_REG 1 |
63 | #define MIP_PSAI_REG 4 | |
1625324d | 64 | |
2c4ce18c IM |
65 | #define MIP_BUSY 1 |
66 | #define MIP_SPIN 0xf0000 | |
67 | #define MIP_VALID 0x0100000000000000ULL | |
352887d1 | 68 | #define MIP_SW_APIC 0x1020b |
1625324d | 69 | |
2c4ce18c | 70 | #define MIP_PORT(val) ((val >> 32) & 0xffff) |
1625324d | 71 | |
2c4ce18c | 72 | #define MIP_RD_LO(val) (val & 0xffffffff) |
1625324d | 73 | |
352887d1 IM |
74 | struct mip_reg { |
75 | unsigned long long off_0x00; | |
76 | unsigned long long off_0x08; | |
77 | unsigned long long off_0x10; | |
78 | unsigned long long off_0x18; | |
79 | unsigned long long off_0x20; | |
80 | unsigned long long off_0x28; | |
81 | unsigned long long off_0x30; | |
82 | unsigned long long off_0x38; | |
83 | }; | |
84 | ||
1625324d | 85 | struct mip_reg_info { |
2c4ce18c IM |
86 | unsigned long long mip_info; |
87 | unsigned long long delivery_info; | |
88 | unsigned long long host_reg; | |
89 | unsigned long long mip_reg; | |
1625324d YL |
90 | }; |
91 | ||
1625324d | 92 | struct psai { |
2c4ce18c IM |
93 | unsigned long long entry_type; |
94 | unsigned long long addr; | |
95 | unsigned long long bep_addr; | |
1625324d YL |
96 | }; |
97 | ||
1625324d | 98 | #ifdef CONFIG_ACPI |
7da18ed9 | 99 | |
352887d1 | 100 | struct es7000_oem_table { |
2c4ce18c IM |
101 | struct acpi_table_header Header; |
102 | u32 OEMTableAddr; | |
103 | u32 OEMTableSize; | |
1625324d | 104 | }; |
7da18ed9 IM |
105 | |
106 | static unsigned long oem_addrX; | |
107 | static unsigned long oem_size; | |
108 | ||
1625324d YL |
109 | #endif |
110 | ||
1da177e4 LT |
111 | /* |
112 | * ES7000 Globals | |
113 | */ | |
114 | ||
7da18ed9 | 115 | static volatile unsigned long *psai; |
2c4ce18c IM |
116 | static struct mip_reg *mip_reg; |
117 | static struct mip_reg *host_reg; | |
118 | static int mip_port; | |
7da18ed9 IM |
119 | static unsigned long mip_addr; |
120 | static unsigned long host_addr; | |
1da177e4 | 121 | |
2c4ce18c | 122 | int es7000_plat; |
32c50612 | 123 | |
1da177e4 LT |
124 | /* |
125 | * GSI override for ES7000 platforms. | |
126 | */ | |
127 | ||
2c4ce18c | 128 | static unsigned int base; |
1da177e4 LT |
129 | |
130 | static int | |
131 | es7000_rename_gsi(int ioapic, int gsi) | |
132 | { | |
9338316c NP |
133 | if (es7000_plat == ES7000_ZORRO) |
134 | return gsi; | |
135 | ||
1da177e4 LT |
136 | if (!base) { |
137 | int i; | |
138 | for (i = 0; i < nr_ioapics; i++) | |
139 | base += nr_ioapic_registers[i]; | |
140 | } | |
141 | ||
c7e7964c | 142 | if (!ioapic && (gsi < 16)) |
1da177e4 | 143 | gsi += base; |
2c4ce18c | 144 | |
1da177e4 LT |
145 | return gsi; |
146 | } | |
147 | ||
569712b2 YL |
148 | static int wakeup_secondary_cpu_via_mip(int cpu, unsigned long eip) |
149 | { | |
150 | unsigned long vect = 0, psaival = 0; | |
151 | ||
152 | if (psai == NULL) | |
153 | return -1; | |
154 | ||
155 | vect = ((unsigned long)__pa(eip)/0x1000) << 16; | |
156 | psaival = (0x1000000 | vect | cpu); | |
157 | ||
158 | while (*psai & 0x1000000) | |
159 | ; | |
160 | ||
161 | *psai = psaival; | |
162 | ||
163 | return 0; | |
164 | } | |
54ac14a8 | 165 | |
871d78c6 | 166 | static int es7000_apic_is_cluster(void) |
54ac14a8 | 167 | { |
b5fe363b YL |
168 | /* MPENTIUMIII */ |
169 | if (boot_cpu_data.x86 == 6 && | |
2b6163bf YL |
170 | (boot_cpu_data.x86_model >= 7 || boot_cpu_data.x86_model <= 11)) |
171 | return 1; | |
b5fe363b | 172 | |
54ac14a8 YL |
173 | return 0; |
174 | } | |
569712b2 | 175 | |
871d78c6 | 176 | static void setup_unisys(void) |
56f1d5d5 NP |
177 | { |
178 | /* | |
179 | * Determine the generation of the ES7000 currently running. | |
180 | * | |
181 | * es7000_plat = 1 if the machine is a 5xx ES7000 box | |
182 | * es7000_plat = 2 if the machine is a x86_64 ES7000 box | |
183 | * | |
184 | */ | |
185 | if (!(boot_cpu_data.x86 <= 15 && boot_cpu_data.x86_model <= 2)) | |
9338316c | 186 | es7000_plat = ES7000_ZORRO; |
56f1d5d5 | 187 | else |
9338316c | 188 | es7000_plat = ES7000_CLASSIC; |
56f1d5d5 NP |
189 | ioapic_renumber_irq = es7000_rename_gsi; |
190 | } | |
191 | ||
1da177e4 | 192 | /* |
d3185b37 | 193 | * Parse the OEM Table: |
1da177e4 | 194 | */ |
871d78c6 | 195 | static int parse_unisys_oem(char *oemptr) |
1da177e4 | 196 | { |
352887d1 | 197 | int i; |
1da177e4 | 198 | int success = 0; |
352887d1 IM |
199 | unsigned char type, size; |
200 | unsigned long val; | |
201 | char *tp = NULL; | |
202 | struct psai *psaip = NULL; | |
1da177e4 LT |
203 | struct mip_reg_info *mi; |
204 | struct mip_reg *host, *mip; | |
205 | ||
206 | tp = oemptr; | |
207 | ||
208 | tp += 8; | |
209 | ||
352887d1 | 210 | for (i = 0; i <= 6; i++) { |
1da177e4 LT |
211 | type = *tp++; |
212 | size = *tp++; | |
213 | tp -= 2; | |
214 | switch (type) { | |
215 | case MIP_REG: | |
216 | mi = (struct mip_reg_info *)tp; | |
217 | val = MIP_RD_LO(mi->host_reg); | |
218 | host_addr = val; | |
219 | host = (struct mip_reg *)val; | |
220 | host_reg = __va(host); | |
221 | val = MIP_RD_LO(mi->mip_reg); | |
222 | mip_port = MIP_PORT(mi->mip_info); | |
223 | mip_addr = val; | |
224 | mip = (struct mip_reg *)val; | |
225 | mip_reg = __va(mip); | |
5171c304 TG |
226 | pr_debug("es7000_mipcfg: host_reg = 0x%lx \n", |
227 | (unsigned long)host_reg); | |
228 | pr_debug("es7000_mipcfg: mip_reg = 0x%lx \n", | |
229 | (unsigned long)mip_reg); | |
1da177e4 LT |
230 | success++; |
231 | break; | |
232 | case MIP_PSAI_REG: | |
233 | psaip = (struct psai *)tp; | |
234 | if (tp != NULL) { | |
235 | if (psaip->addr) | |
236 | psai = __va(psaip->addr); | |
237 | else | |
238 | psai = NULL; | |
239 | success++; | |
240 | } | |
241 | break; | |
242 | default: | |
243 | break; | |
244 | } | |
1da177e4 LT |
245 | tp += size; |
246 | } | |
247 | ||
d3185b37 | 248 | if (success < 2) |
9338316c | 249 | es7000_plat = NON_UNISYS; |
d3185b37 | 250 | else |
56f1d5d5 | 251 | setup_unisys(); |
2c4ce18c | 252 | |
1da177e4 LT |
253 | return es7000_plat; |
254 | } | |
255 | ||
e5428ede | 256 | #ifdef CONFIG_ACPI |
871d78c6 | 257 | static int find_unisys_acpi_oem_table(unsigned long *oem_addr) |
1da177e4 | 258 | { |
ceb6c468 | 259 | struct acpi_table_header *header = NULL; |
7da18ed9 | 260 | struct es7000_oem_table *table; |
b825e6cc | 261 | acpi_size tbl_size; |
7da18ed9 IM |
262 | acpi_status ret; |
263 | int i = 0; | |
a73aaedd | 264 | |
7da18ed9 IM |
265 | for (;;) { |
266 | ret = acpi_get_table_with_size("OEM1", i++, &header, &tbl_size); | |
267 | if (!ACPI_SUCCESS(ret)) | |
268 | return -1; | |
a73aaedd | 269 | |
7da18ed9 IM |
270 | if (!memcmp((char *) &header->oem_id, "UNISYS", 6)) |
271 | break; | |
a73aaedd | 272 | |
b825e6cc | 273 | early_acpi_os_unmap_memory(header, tbl_size); |
1da177e4 | 274 | } |
7da18ed9 IM |
275 | |
276 | table = (void *)header; | |
277 | ||
278 | oem_addrX = table->OEMTableAddr; | |
279 | oem_size = table->OEMTableSize; | |
280 | ||
281 | early_acpi_os_unmap_memory(header, tbl_size); | |
282 | ||
283 | *oem_addr = (unsigned long)__acpi_map_table(oem_addrX, oem_size); | |
284 | ||
285 | return 0; | |
1da177e4 | 286 | } |
a73aaedd | 287 | |
871d78c6 | 288 | static void unmap_unisys_acpi_oem_table(unsigned long oem_addr) |
a73aaedd | 289 | { |
b825e6cc YL |
290 | if (!oem_addr) |
291 | return; | |
292 | ||
293 | __acpi_unmap_table((char *)oem_addr, oem_size); | |
a73aaedd | 294 | } |
7da18ed9 IM |
295 | |
296 | static int es7000_check_dsdt(void) | |
297 | { | |
298 | struct acpi_table_header header; | |
299 | ||
300 | if (ACPI_SUCCESS(acpi_get_table_header(ACPI_SIG_DSDT, 0, &header)) && | |
301 | !strncmp(header.oem_id, "UNISYS", 6)) | |
302 | return 1; | |
303 | return 0; | |
304 | } | |
305 | ||
871d78c6 | 306 | static int es7000_acpi_ret; |
2b6163bf | 307 | |
7da18ed9 | 308 | /* Hook from generic ACPI tables.c */ |
871d78c6 | 309 | static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
7da18ed9 IM |
310 | { |
311 | unsigned long oem_addr = 0; | |
312 | int check_dsdt; | |
313 | int ret = 0; | |
314 | ||
315 | /* check dsdt at first to avoid clear fix_map for oem_addr */ | |
316 | check_dsdt = es7000_check_dsdt(); | |
317 | ||
318 | if (!find_unisys_acpi_oem_table(&oem_addr)) { | |
319 | if (check_dsdt) { | |
320 | ret = parse_unisys_oem((char *)oem_addr); | |
321 | } else { | |
322 | setup_unisys(); | |
323 | ret = 1; | |
324 | } | |
325 | /* | |
326 | * we need to unmap it | |
327 | */ | |
328 | unmap_unisys_acpi_oem_table(oem_addr); | |
329 | } | |
2b6163bf YL |
330 | |
331 | es7000_acpi_ret = ret; | |
332 | ||
333 | return ret && !es7000_apic_is_cluster(); | |
7da18ed9 | 334 | } |
3b900d44 | 335 | |
871d78c6 | 336 | static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id) |
2b6163bf YL |
337 | { |
338 | int ret = es7000_acpi_ret; | |
339 | ||
340 | return ret && es7000_apic_is_cluster(); | |
341 | } | |
342 | ||
7da18ed9 | 343 | #else /* !CONFIG_ACPI: */ |
871d78c6 | 344 | static int es7000_acpi_madt_oem_check(char *oem_id, char *oem_table_id) |
7da18ed9 IM |
345 | { |
346 | return 0; | |
347 | } | |
3b900d44 | 348 | |
871d78c6 | 349 | static int es7000_acpi_madt_oem_check_cluster(char *oem_id, char *oem_table_id) |
3b900d44 IM |
350 | { |
351 | return 0; | |
352 | } | |
7da18ed9 | 353 | #endif /* !CONFIG_ACPI */ |
1da177e4 | 354 | |
2c4ce18c | 355 | static void es7000_spin(int n) |
1da177e4 LT |
356 | { |
357 | int i = 0; | |
358 | ||
359 | while (i++ < n) | |
360 | rep_nop(); | |
361 | } | |
362 | ||
871d78c6 | 363 | static int es7000_mip_write(struct mip_reg *mip_reg) |
1da177e4 | 364 | { |
2c4ce18c IM |
365 | int status = 0; |
366 | int spin; | |
1da177e4 LT |
367 | |
368 | spin = MIP_SPIN; | |
2c4ce18c IM |
369 | while ((host_reg->off_0x38 & MIP_VALID) != 0) { |
370 | if (--spin <= 0) { | |
7da18ed9 | 371 | WARN(1, "Timeout waiting for Host Valid Flag\n"); |
2c4ce18c IM |
372 | return -1; |
373 | } | |
1da177e4 LT |
374 | es7000_spin(MIP_SPIN); |
375 | } | |
376 | ||
377 | memcpy(host_reg, mip_reg, sizeof(struct mip_reg)); | |
378 | outb(1, mip_port); | |
379 | ||
380 | spin = MIP_SPIN; | |
381 | ||
2c4ce18c | 382 | while ((mip_reg->off_0x38 & MIP_VALID) == 0) { |
1da177e4 | 383 | if (--spin <= 0) { |
7da18ed9 | 384 | WARN(1, "Timeout waiting for MIP Valid Flag\n"); |
1da177e4 LT |
385 | return -1; |
386 | } | |
387 | es7000_spin(MIP_SPIN); | |
388 | } | |
389 | ||
2c4ce18c IM |
390 | status = (mip_reg->off_0x00 & 0xffff0000000000ULL) >> 48; |
391 | mip_reg->off_0x38 &= ~MIP_VALID; | |
392 | ||
1da177e4 LT |
393 | return status; |
394 | } | |
395 | ||
871d78c6 | 396 | static void es7000_enable_apic_mode(void) |
1da177e4 | 397 | { |
b0b20e5a IM |
398 | struct mip_reg es7000_mip_reg; |
399 | int mip_status; | |
400 | ||
401 | if (!es7000_plat) | |
1da177e4 | 402 | return; |
b0b20e5a | 403 | |
7da18ed9 | 404 | printk(KERN_INFO "ES7000: Enabling APIC mode.\n"); |
352887d1 IM |
405 | memset(&es7000_mip_reg, 0, sizeof(struct mip_reg)); |
406 | es7000_mip_reg.off_0x00 = MIP_SW_APIC; | |
407 | es7000_mip_reg.off_0x38 = MIP_VALID; | |
b0b20e5a | 408 | |
7da18ed9 IM |
409 | while ((mip_status = es7000_mip_write(&es7000_mip_reg)) != 0) |
410 | WARN(1, "Command failed, status = %x\n", mip_status); | |
1da177e4 | 411 | } |
2e096df8 | 412 | |
2e096df8 IM |
413 | static void es7000_vector_allocation_domain(int cpu, cpumask_t *retmask) |
414 | { | |
415 | /* Careful. Some cpus do not strictly honor the set of cpus | |
416 | * specified in the interrupt destination when using lowest | |
417 | * priority interrupt delivery mode. | |
418 | * | |
419 | * In particular there was a hyperthreading cpu observed to | |
420 | * deliver interrupts to the wrong hyperthread when only one | |
421 | * hyperthread was specified in the interrupt desitination. | |
422 | */ | |
423 | *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } }; | |
424 | } | |
425 | ||
426 | ||
427 | static void es7000_wait_for_init_deassert(atomic_t *deassert) | |
428 | { | |
2e096df8 IM |
429 | while (!atomic_read(deassert)) |
430 | cpu_relax(); | |
2e096df8 IM |
431 | } |
432 | ||
433 | static unsigned int es7000_get_apic_id(unsigned long x) | |
434 | { | |
435 | return (x >> 24) & 0xFF; | |
436 | } | |
437 | ||
2e096df8 IM |
438 | static void es7000_send_IPI_mask(const struct cpumask *mask, int vector) |
439 | { | |
43f39890 | 440 | default_send_IPI_mask_sequence_phys(mask, vector); |
2e096df8 IM |
441 | } |
442 | ||
443 | static void es7000_send_IPI_allbutself(int vector) | |
444 | { | |
43f39890 | 445 | default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector); |
2e096df8 IM |
446 | } |
447 | ||
448 | static void es7000_send_IPI_all(int vector) | |
449 | { | |
450 | es7000_send_IPI_mask(cpu_online_mask, vector); | |
451 | } | |
452 | ||
453 | static int es7000_apic_id_registered(void) | |
454 | { | |
352887d1 | 455 | return 1; |
2e096df8 IM |
456 | } |
457 | ||
458 | static const cpumask_t *target_cpus_cluster(void) | |
459 | { | |
101aaca1 | 460 | return cpu_all_mask; |
2e096df8 IM |
461 | } |
462 | ||
4f062896 | 463 | static const struct cpumask *es7000_target_cpus(void) |
2e096df8 | 464 | { |
4f062896 | 465 | return cpumask_of(smp_processor_id()); |
2e096df8 IM |
466 | } |
467 | ||
468 | static unsigned long | |
469 | es7000_check_apicid_used(physid_mask_t bitmap, int apicid) | |
470 | { | |
471 | return 0; | |
472 | } | |
473 | static unsigned long es7000_check_apicid_present(int bit) | |
474 | { | |
475 | return physid_isset(bit, phys_cpu_present_map); | |
476 | } | |
477 | ||
478 | static unsigned long calculate_ldr(int cpu) | |
479 | { | |
2c4ce18c | 480 | unsigned long id = per_cpu(x86_bios_cpu_apicid, cpu); |
2e096df8 | 481 | |
2c4ce18c | 482 | return SET_APIC_LOGICAL_ID(id); |
2e096df8 IM |
483 | } |
484 | ||
485 | /* | |
486 | * Set up the logical destination ID. | |
487 | * | |
488 | * Intel recommends to set DFR, LdR and TPR before enabling | |
489 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel | |
490 | * document number 292116). So here it goes... | |
491 | */ | |
492 | static void es7000_init_apic_ldr_cluster(void) | |
493 | { | |
494 | unsigned long val; | |
495 | int cpu = smp_processor_id(); | |
496 | ||
352887d1 | 497 | apic_write(APIC_DFR, APIC_DFR_CLUSTER); |
2e096df8 IM |
498 | val = calculate_ldr(cpu); |
499 | apic_write(APIC_LDR, val); | |
500 | } | |
501 | ||
502 | static void es7000_init_apic_ldr(void) | |
503 | { | |
504 | unsigned long val; | |
505 | int cpu = smp_processor_id(); | |
506 | ||
352887d1 | 507 | apic_write(APIC_DFR, APIC_DFR_FLAT); |
2e096df8 IM |
508 | val = calculate_ldr(cpu); |
509 | apic_write(APIC_LDR, val); | |
510 | } | |
511 | ||
512 | static void es7000_setup_apic_routing(void) | |
513 | { | |
514 | int apic = per_cpu(x86_bios_cpu_apicid, smp_processor_id()); | |
7da18ed9 IM |
515 | |
516 | printk(KERN_INFO | |
517 | "Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n", | |
2e096df8 IM |
518 | (apic_version[apic] == 0x14) ? |
519 | "Physical Cluster" : "Logical Cluster", | |
4f062896 | 520 | nr_ioapics, cpumask_bits(es7000_target_cpus())[0]); |
2e096df8 IM |
521 | } |
522 | ||
523 | static int es7000_apicid_to_node(int logical_apicid) | |
524 | { | |
525 | return 0; | |
526 | } | |
527 | ||
528 | ||
529 | static int es7000_cpu_present_to_apicid(int mps_cpu) | |
530 | { | |
531 | if (!mps_cpu) | |
532 | return boot_cpu_physical_apicid; | |
533 | else if (mps_cpu < nr_cpu_ids) | |
2c4ce18c | 534 | return per_cpu(x86_bios_cpu_apicid, mps_cpu); |
2e096df8 IM |
535 | else |
536 | return BAD_APICID; | |
537 | } | |
538 | ||
7da18ed9 IM |
539 | static int cpu_id; |
540 | ||
2e096df8 IM |
541 | static physid_mask_t es7000_apicid_to_cpu_present(int phys_apicid) |
542 | { | |
2e096df8 IM |
543 | physid_mask_t mask; |
544 | ||
7da18ed9 IM |
545 | mask = physid_mask_of_physid(cpu_id); |
546 | ++cpu_id; | |
2e096df8 IM |
547 | |
548 | return mask; | |
549 | } | |
550 | ||
551 | /* Mapping from cpu number to logical apicid */ | |
552 | static int es7000_cpu_to_logical_apicid(int cpu) | |
553 | { | |
554 | #ifdef CONFIG_SMP | |
555 | if (cpu >= nr_cpu_ids) | |
556 | return BAD_APICID; | |
2f205bc4 | 557 | return cpu_2_logical_apicid[cpu]; |
2e096df8 IM |
558 | #else |
559 | return logical_smp_processor_id(); | |
560 | #endif | |
561 | } | |
562 | ||
563 | static physid_mask_t es7000_ioapic_phys_id_map(physid_mask_t phys_map) | |
564 | { | |
565 | /* For clustered we don't have a good way to do this yet - hack */ | |
566 | return physids_promote(0xff); | |
567 | } | |
568 | ||
569 | static int es7000_check_phys_apicid_present(int cpu_physical_apicid) | |
570 | { | |
571 | boot_cpu_physical_apicid = read_apic_id(); | |
2c4ce18c | 572 | return 1; |
2e096df8 IM |
573 | } |
574 | ||
c2b20cbd | 575 | static unsigned int es7000_cpu_mask_to_apicid(const cpumask_t *cpumask) |
2e096df8 | 576 | { |
0edc0b32 JS |
577 | unsigned int round = 0; |
578 | int cpu, uninitialized_var(apicid); | |
2e096df8 | 579 | |
2e096df8 | 580 | /* |
0edc0b32 | 581 | * The cpus in the mask must all be on the apic cluster. |
2e096df8 | 582 | */ |
0edc0b32 JS |
583 | for_each_cpu(cpu, cpumask) { |
584 | int new_apicid = es7000_cpu_to_logical_apicid(cpu); | |
2e096df8 | 585 | |
0edc0b32 JS |
586 | if (round && APIC_CLUSTER(apicid) != APIC_CLUSTER(new_apicid)) { |
587 | WARN(1, "Not a valid mask!"); | |
2e096df8 | 588 | |
0edc0b32 | 589 | return BAD_APICID; |
2e096df8 | 590 | } |
0edc0b32 JS |
591 | apicid = new_apicid; |
592 | round++; | |
2e096df8 IM |
593 | } |
594 | return apicid; | |
595 | } | |
596 | ||
597 | static unsigned int | |
598 | es7000_cpu_mask_to_apicid_and(const struct cpumask *inmask, | |
599 | const struct cpumask *andmask) | |
600 | { | |
601 | int apicid = es7000_cpu_to_logical_apicid(0); | |
602 | cpumask_var_t cpumask; | |
603 | ||
604 | if (!alloc_cpumask_var(&cpumask, GFP_ATOMIC)) | |
605 | return apicid; | |
606 | ||
607 | cpumask_and(cpumask, inmask, andmask); | |
608 | cpumask_and(cpumask, cpumask, cpu_online_mask); | |
609 | apicid = es7000_cpu_mask_to_apicid(cpumask); | |
610 | ||
611 | free_cpumask_var(cpumask); | |
612 | ||
613 | return apicid; | |
614 | } | |
615 | ||
616 | static int es7000_phys_pkg_id(int cpuid_apic, int index_msb) | |
617 | { | |
618 | return cpuid_apic >> index_msb; | |
619 | } | |
620 | ||
2e096df8 IM |
621 | static int probe_es7000(void) |
622 | { | |
623 | /* probed later in mptable/ACPI hooks */ | |
624 | return 0; | |
625 | } | |
626 | ||
871d78c6 JS |
627 | static int es7000_mps_ret; |
628 | static int es7000_mps_oem_check(struct mpc_table *mpc, char *oem, | |
629 | char *productid) | |
2e096df8 | 630 | { |
2b6163bf YL |
631 | int ret = 0; |
632 | ||
2e096df8 IM |
633 | if (mpc->oemptr) { |
634 | struct mpc_oemtable *oem_table = | |
635 | (struct mpc_oemtable *)mpc->oemptr; | |
636 | ||
637 | if (!strncmp(oem, "UNISYS", 6)) | |
2b6163bf | 638 | ret = parse_unisys_oem((char *)oem_table); |
2e096df8 | 639 | } |
2b6163bf YL |
640 | |
641 | es7000_mps_ret = ret; | |
642 | ||
643 | return ret && !es7000_apic_is_cluster(); | |
644 | } | |
645 | ||
871d78c6 JS |
646 | static int es7000_mps_oem_check_cluster(struct mpc_table *mpc, char *oem, |
647 | char *productid) | |
2b6163bf YL |
648 | { |
649 | int ret = es7000_mps_ret; | |
650 | ||
651 | return ret && es7000_apic_is_cluster(); | |
2e096df8 IM |
652 | } |
653 | ||
2b6163bf YL |
654 | struct apic apic_es7000_cluster = { |
655 | ||
656 | .name = "es7000", | |
657 | .probe = probe_es7000, | |
658 | .acpi_madt_oem_check = es7000_acpi_madt_oem_check_cluster, | |
659 | .apic_id_registered = es7000_apic_id_registered, | |
660 | ||
661 | .irq_delivery_mode = dest_LowestPrio, | |
662 | /* logical delivery broadcast to all procs: */ | |
663 | .irq_dest_mode = 1, | |
664 | ||
665 | .target_cpus = target_cpus_cluster, | |
666 | .disable_esr = 1, | |
667 | .dest_logical = 0, | |
668 | .check_apicid_used = es7000_check_apicid_used, | |
669 | .check_apicid_present = es7000_check_apicid_present, | |
670 | ||
671 | .vector_allocation_domain = es7000_vector_allocation_domain, | |
672 | .init_apic_ldr = es7000_init_apic_ldr_cluster, | |
673 | ||
674 | .ioapic_phys_id_map = es7000_ioapic_phys_id_map, | |
675 | .setup_apic_routing = es7000_setup_apic_routing, | |
676 | .multi_timer_check = NULL, | |
677 | .apicid_to_node = es7000_apicid_to_node, | |
678 | .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid, | |
679 | .cpu_present_to_apicid = es7000_cpu_present_to_apicid, | |
680 | .apicid_to_cpu_present = es7000_apicid_to_cpu_present, | |
681 | .setup_portio_remap = NULL, | |
682 | .check_phys_apicid_present = es7000_check_phys_apicid_present, | |
683 | .enable_apic_mode = es7000_enable_apic_mode, | |
684 | .phys_pkg_id = es7000_phys_pkg_id, | |
685 | .mps_oem_check = es7000_mps_oem_check_cluster, | |
686 | ||
687 | .get_apic_id = es7000_get_apic_id, | |
688 | .set_apic_id = NULL, | |
689 | .apic_id_mask = 0xFF << 24, | |
690 | ||
c2b20cbd | 691 | .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid, |
2b6163bf YL |
692 | .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and, |
693 | ||
694 | .send_IPI_mask = es7000_send_IPI_mask, | |
695 | .send_IPI_mask_allbutself = NULL, | |
696 | .send_IPI_allbutself = es7000_send_IPI_allbutself, | |
697 | .send_IPI_all = es7000_send_IPI_all, | |
698 | .send_IPI_self = default_send_IPI_self, | |
699 | ||
1f5bcabf | 700 | .wakeup_secondary_cpu = wakeup_secondary_cpu_via_mip, |
2b6163bf YL |
701 | |
702 | .trampoline_phys_low = 0x467, | |
703 | .trampoline_phys_high = 0x469, | |
704 | ||
705 | .wait_for_init_deassert = NULL, | |
706 | ||
707 | /* Nothing to do for most platforms, since cleared by the INIT cycle: */ | |
708 | .smp_callin_clear_local_apic = NULL, | |
709 | .inquire_remote_apic = default_inquire_remote_apic, | |
710 | ||
711 | .read = native_apic_mem_read, | |
712 | .write = native_apic_mem_write, | |
713 | .icr_read = native_apic_icr_read, | |
714 | .icr_write = native_apic_icr_write, | |
715 | .wait_icr_idle = native_apic_wait_icr_idle, | |
716 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | |
717 | }; | |
2e096df8 | 718 | |
be163a15 | 719 | struct apic apic_es7000 = { |
2e096df8 IM |
720 | |
721 | .name = "es7000", | |
722 | .probe = probe_es7000, | |
723 | .acpi_madt_oem_check = es7000_acpi_madt_oem_check, | |
724 | .apic_id_registered = es7000_apic_id_registered, | |
725 | ||
726 | .irq_delivery_mode = dest_Fixed, | |
727 | /* phys delivery to target CPUs: */ | |
728 | .irq_dest_mode = 0, | |
729 | ||
730 | .target_cpus = es7000_target_cpus, | |
731 | .disable_esr = 1, | |
732 | .dest_logical = 0, | |
733 | .check_apicid_used = es7000_check_apicid_used, | |
734 | .check_apicid_present = es7000_check_apicid_present, | |
735 | ||
736 | .vector_allocation_domain = es7000_vector_allocation_domain, | |
737 | .init_apic_ldr = es7000_init_apic_ldr, | |
738 | ||
739 | .ioapic_phys_id_map = es7000_ioapic_phys_id_map, | |
740 | .setup_apic_routing = es7000_setup_apic_routing, | |
741 | .multi_timer_check = NULL, | |
742 | .apicid_to_node = es7000_apicid_to_node, | |
743 | .cpu_to_logical_apicid = es7000_cpu_to_logical_apicid, | |
744 | .cpu_present_to_apicid = es7000_cpu_present_to_apicid, | |
745 | .apicid_to_cpu_present = es7000_apicid_to_cpu_present, | |
746 | .setup_portio_remap = NULL, | |
747 | .check_phys_apicid_present = es7000_check_phys_apicid_present, | |
748 | .enable_apic_mode = es7000_enable_apic_mode, | |
749 | .phys_pkg_id = es7000_phys_pkg_id, | |
750 | .mps_oem_check = es7000_mps_oem_check, | |
751 | ||
752 | .get_apic_id = es7000_get_apic_id, | |
753 | .set_apic_id = NULL, | |
754 | .apic_id_mask = 0xFF << 24, | |
755 | ||
756 | .cpu_mask_to_apicid = es7000_cpu_mask_to_apicid, | |
757 | .cpu_mask_to_apicid_and = es7000_cpu_mask_to_apicid_and, | |
758 | ||
759 | .send_IPI_mask = es7000_send_IPI_mask, | |
760 | .send_IPI_mask_allbutself = NULL, | |
761 | .send_IPI_allbutself = es7000_send_IPI_allbutself, | |
762 | .send_IPI_all = es7000_send_IPI_all, | |
6b64ee02 | 763 | .send_IPI_self = default_send_IPI_self, |
2e096df8 | 764 | |
2e096df8 IM |
765 | .trampoline_phys_low = 0x467, |
766 | .trampoline_phys_high = 0x469, | |
767 | ||
768 | .wait_for_init_deassert = es7000_wait_for_init_deassert, | |
769 | ||
770 | /* Nothing to do for most platforms, since cleared by the INIT cycle: */ | |
771 | .smp_callin_clear_local_apic = NULL, | |
2e096df8 | 772 | .inquire_remote_apic = default_inquire_remote_apic, |
c1eeb2de YL |
773 | |
774 | .read = native_apic_mem_read, | |
775 | .write = native_apic_mem_write, | |
776 | .icr_read = native_apic_icr_read, | |
777 | .icr_write = native_apic_icr_write, | |
778 | .wait_icr_idle = native_apic_wait_icr_idle, | |
779 | .safe_wait_icr_idle = native_safe_apic_wait_icr_idle, | |
2e096df8 | 780 | }; |