Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
a49976d1 | 2 | * Copyright (C) 1991,1992 Linus Torvalds |
1da177e4 | 3 | * |
a49976d1 | 4 | * entry_32.S contains the system-call and low-level fault and trap handling routines. |
1da177e4 | 5 | * |
39e8701f | 6 | * Stack layout while running C code: |
a49976d1 IM |
7 | * ptrace needs to have all registers on the stack. |
8 | * If the order here is changed, it needs to be | |
9 | * updated in fork.c:copy_process(), signal.c:do_signal(), | |
1da177e4 LT |
10 | * ptrace.c and ptrace.h |
11 | * | |
12 | * 0(%esp) - %ebx | |
13 | * 4(%esp) - %ecx | |
14 | * 8(%esp) - %edx | |
9b47feb7 | 15 | * C(%esp) - %esi |
1da177e4 LT |
16 | * 10(%esp) - %edi |
17 | * 14(%esp) - %ebp | |
18 | * 18(%esp) - %eax | |
19 | * 1C(%esp) - %ds | |
20 | * 20(%esp) - %es | |
464d1a78 | 21 | * 24(%esp) - %fs |
ccbeed3a TH |
22 | * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS |
23 | * 2C(%esp) - orig_eax | |
24 | * 30(%esp) - %eip | |
25 | * 34(%esp) - %cs | |
26 | * 38(%esp) - %eflags | |
27 | * 3C(%esp) - %oldesp | |
28 | * 40(%esp) - %oldss | |
1da177e4 LT |
29 | */ |
30 | ||
1da177e4 | 31 | #include <linux/linkage.h> |
d7e7528b | 32 | #include <linux/err.h> |
1da177e4 | 33 | #include <asm/thread_info.h> |
55f327fa | 34 | #include <asm/irqflags.h> |
1da177e4 LT |
35 | #include <asm/errno.h> |
36 | #include <asm/segment.h> | |
37 | #include <asm/smp.h> | |
0341c14d | 38 | #include <asm/page_types.h> |
be44d2aa | 39 | #include <asm/percpu.h> |
ab68ed98 | 40 | #include <asm/processor-flags.h> |
395a59d0 | 41 | #include <asm/ftrace.h> |
9b7dc567 | 42 | #include <asm/irq_vectors.h> |
cd4d09ec | 43 | #include <asm/cpufeatures.h> |
b4ca46e4 | 44 | #include <asm/alternative-asm.h> |
6837a54d | 45 | #include <asm/asm.h> |
e59d1b0a | 46 | #include <asm/smap.h> |
1da177e4 | 47 | |
ea714547 JO |
48 | .section .entry.text, "ax" |
49 | ||
139ec7c4 RR |
50 | /* |
51 | * We use macros for low-level operations which need to be overridden | |
52 | * for paravirtualization. The following will never clobber any registers: | |
53 | * INTERRUPT_RETURN (aka. "iret") | |
54 | * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax") | |
d75cd22f | 55 | * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit"). |
139ec7c4 RR |
56 | * |
57 | * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must | |
58 | * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY). | |
59 | * Allowing a register to be clobbered can shrink the paravirt replacement | |
60 | * enough to patch inline, increasing performance. | |
61 | */ | |
62 | ||
1da177e4 | 63 | #ifdef CONFIG_PREEMPT |
a49976d1 | 64 | # define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF |
1da177e4 | 65 | #else |
a49976d1 IM |
66 | # define preempt_stop(clobbers) |
67 | # define resume_kernel restore_all | |
1da177e4 LT |
68 | #endif |
69 | ||
55f327fa IM |
70 | .macro TRACE_IRQS_IRET |
71 | #ifdef CONFIG_TRACE_IRQFLAGS | |
a49976d1 IM |
72 | testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off? |
73 | jz 1f | |
55f327fa IM |
74 | TRACE_IRQS_ON |
75 | 1: | |
76 | #endif | |
77 | .endm | |
78 | ||
ccbeed3a TH |
79 | /* |
80 | * User gs save/restore | |
81 | * | |
82 | * %gs is used for userland TLS and kernel only uses it for stack | |
83 | * canary which is required to be at %gs:20 by gcc. Read the comment | |
84 | * at the top of stackprotector.h for more info. | |
85 | * | |
86 | * Local labels 98 and 99 are used. | |
87 | */ | |
88 | #ifdef CONFIG_X86_32_LAZY_GS | |
89 | ||
90 | /* unfortunately push/pop can't be no-op */ | |
91 | .macro PUSH_GS | |
a49976d1 | 92 | pushl $0 |
ccbeed3a TH |
93 | .endm |
94 | .macro POP_GS pop=0 | |
a49976d1 | 95 | addl $(4 + \pop), %esp |
ccbeed3a TH |
96 | .endm |
97 | .macro POP_GS_EX | |
98 | .endm | |
99 | ||
100 | /* all the rest are no-op */ | |
101 | .macro PTGS_TO_GS | |
102 | .endm | |
103 | .macro PTGS_TO_GS_EX | |
104 | .endm | |
105 | .macro GS_TO_REG reg | |
106 | .endm | |
107 | .macro REG_TO_PTGS reg | |
108 | .endm | |
109 | .macro SET_KERNEL_GS reg | |
110 | .endm | |
111 | ||
112 | #else /* CONFIG_X86_32_LAZY_GS */ | |
113 | ||
114 | .macro PUSH_GS | |
a49976d1 | 115 | pushl %gs |
ccbeed3a TH |
116 | .endm |
117 | ||
118 | .macro POP_GS pop=0 | |
a49976d1 | 119 | 98: popl %gs |
ccbeed3a | 120 | .if \pop <> 0 |
9b47feb7 | 121 | add $\pop, %esp |
ccbeed3a TH |
122 | .endif |
123 | .endm | |
124 | .macro POP_GS_EX | |
125 | .pushsection .fixup, "ax" | |
a49976d1 IM |
126 | 99: movl $0, (%esp) |
127 | jmp 98b | |
ccbeed3a | 128 | .popsection |
a49976d1 | 129 | _ASM_EXTABLE(98b, 99b) |
ccbeed3a TH |
130 | .endm |
131 | ||
132 | .macro PTGS_TO_GS | |
a49976d1 | 133 | 98: mov PT_GS(%esp), %gs |
ccbeed3a TH |
134 | .endm |
135 | .macro PTGS_TO_GS_EX | |
136 | .pushsection .fixup, "ax" | |
a49976d1 IM |
137 | 99: movl $0, PT_GS(%esp) |
138 | jmp 98b | |
ccbeed3a | 139 | .popsection |
a49976d1 | 140 | _ASM_EXTABLE(98b, 99b) |
ccbeed3a TH |
141 | .endm |
142 | ||
143 | .macro GS_TO_REG reg | |
a49976d1 | 144 | movl %gs, \reg |
ccbeed3a TH |
145 | .endm |
146 | .macro REG_TO_PTGS reg | |
a49976d1 | 147 | movl \reg, PT_GS(%esp) |
ccbeed3a TH |
148 | .endm |
149 | .macro SET_KERNEL_GS reg | |
a49976d1 IM |
150 | movl $(__KERNEL_STACK_CANARY), \reg |
151 | movl \reg, %gs | |
ccbeed3a TH |
152 | .endm |
153 | ||
a49976d1 | 154 | #endif /* CONFIG_X86_32_LAZY_GS */ |
ccbeed3a | 155 | |
150ac78d | 156 | .macro SAVE_ALL pt_regs_ax=%eax |
f0d96110 | 157 | cld |
ccbeed3a | 158 | PUSH_GS |
a49976d1 IM |
159 | pushl %fs |
160 | pushl %es | |
161 | pushl %ds | |
150ac78d | 162 | pushl \pt_regs_ax |
a49976d1 IM |
163 | pushl %ebp |
164 | pushl %edi | |
165 | pushl %esi | |
166 | pushl %edx | |
167 | pushl %ecx | |
168 | pushl %ebx | |
169 | movl $(__USER_DS), %edx | |
170 | movl %edx, %ds | |
171 | movl %edx, %es | |
172 | movl $(__KERNEL_PERCPU), %edx | |
173 | movl %edx, %fs | |
ccbeed3a | 174 | SET_KERNEL_GS %edx |
f0d96110 | 175 | .endm |
1da177e4 | 176 | |
f0d96110 | 177 | .macro RESTORE_INT_REGS |
a49976d1 IM |
178 | popl %ebx |
179 | popl %ecx | |
180 | popl %edx | |
181 | popl %esi | |
182 | popl %edi | |
183 | popl %ebp | |
184 | popl %eax | |
f0d96110 | 185 | .endm |
1da177e4 | 186 | |
ccbeed3a | 187 | .macro RESTORE_REGS pop=0 |
f0d96110 | 188 | RESTORE_INT_REGS |
a49976d1 IM |
189 | 1: popl %ds |
190 | 2: popl %es | |
191 | 3: popl %fs | |
ccbeed3a | 192 | POP_GS \pop |
f0d96110 | 193 | .pushsection .fixup, "ax" |
a49976d1 IM |
194 | 4: movl $0, (%esp) |
195 | jmp 1b | |
196 | 5: movl $0, (%esp) | |
197 | jmp 2b | |
198 | 6: movl $0, (%esp) | |
199 | jmp 3b | |
f95d47ca | 200 | .popsection |
a49976d1 IM |
201 | _ASM_EXTABLE(1b, 4b) |
202 | _ASM_EXTABLE(2b, 5b) | |
203 | _ASM_EXTABLE(3b, 6b) | |
ccbeed3a | 204 | POP_GS_EX |
f0d96110 | 205 | .endm |
1da177e4 | 206 | |
1da177e4 | 207 | ENTRY(ret_from_fork) |
a49976d1 IM |
208 | pushl %eax |
209 | call schedule_tail | |
1da177e4 | 210 | GET_THREAD_INFO(%ebp) |
a49976d1 IM |
211 | popl %eax |
212 | pushl $0x0202 # Reset kernel eflags | |
131484c8 | 213 | popfl |
39e8701f AL |
214 | |
215 | /* When we fork, we trace the syscall return in the child, too. */ | |
216 | movl %esp, %eax | |
217 | call syscall_return_slowpath | |
218 | jmp restore_all | |
47a55cd7 | 219 | END(ret_from_fork) |
1da177e4 | 220 | |
22e2430d | 221 | ENTRY(ret_from_kernel_thread) |
a49976d1 IM |
222 | pushl %eax |
223 | call schedule_tail | |
6783eaa2 | 224 | GET_THREAD_INFO(%ebp) |
a49976d1 IM |
225 | popl %eax |
226 | pushl $0x0202 # Reset kernel eflags | |
131484c8 | 227 | popfl |
a49976d1 IM |
228 | movl PT_EBP(%esp), %eax |
229 | call *PT_EBX(%esp) | |
230 | movl $0, PT_EAX(%esp) | |
39e8701f AL |
231 | |
232 | /* | |
233 | * Kernel threads return to userspace as if returning from a syscall. | |
234 | * We should check whether anything actually uses this path and, if so, | |
235 | * consider switching it over to ret_from_fork. | |
236 | */ | |
237 | movl %esp, %eax | |
238 | call syscall_return_slowpath | |
239 | jmp restore_all | |
22e2430d | 240 | ENDPROC(ret_from_kernel_thread) |
6783eaa2 | 241 | |
1da177e4 LT |
242 | /* |
243 | * Return to user mode is not as complex as all this looks, | |
244 | * but we want the default path for a system call return to | |
245 | * go as quickly as possible which is why some of this is | |
246 | * less clear than it otherwise should be. | |
247 | */ | |
248 | ||
249 | # userspace resumption stub bypassing syscall exit tracing | |
250 | ALIGN | |
251 | ret_from_exception: | |
139ec7c4 | 252 | preempt_stop(CLBR_ANY) |
1da177e4 LT |
253 | ret_from_intr: |
254 | GET_THREAD_INFO(%ebp) | |
29a2e283 | 255 | #ifdef CONFIG_VM86 |
a49976d1 IM |
256 | movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS |
257 | movb PT_CS(%esp), %al | |
258 | andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax | |
29a2e283 DA |
259 | #else |
260 | /* | |
6783eaa2 | 261 | * We can be coming here from child spawned by kernel_thread(). |
29a2e283 | 262 | */ |
a49976d1 IM |
263 | movl PT_CS(%esp), %eax |
264 | andl $SEGMENT_RPL_MASK, %eax | |
29a2e283 | 265 | #endif |
a49976d1 IM |
266 | cmpl $USER_RPL, %eax |
267 | jb resume_kernel # not returning to v8086 or userspace | |
f95d47ca | 268 | |
1da177e4 | 269 | ENTRY(resume_userspace) |
5d73fc70 | 270 | DISABLE_INTERRUPTS(CLBR_ANY) |
e32e58a9 | 271 | TRACE_IRQS_OFF |
5d73fc70 AL |
272 | movl %esp, %eax |
273 | call prepare_exit_to_usermode | |
a49976d1 | 274 | jmp restore_all |
47a55cd7 | 275 | END(ret_from_exception) |
1da177e4 LT |
276 | |
277 | #ifdef CONFIG_PREEMPT | |
278 | ENTRY(resume_kernel) | |
139ec7c4 | 279 | DISABLE_INTERRUPTS(CLBR_ANY) |
1da177e4 | 280 | need_resched: |
a49976d1 IM |
281 | cmpl $0, PER_CPU_VAR(__preempt_count) |
282 | jnz restore_all | |
283 | testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ? | |
284 | jz restore_all | |
285 | call preempt_schedule_irq | |
286 | jmp need_resched | |
47a55cd7 | 287 | END(resume_kernel) |
1da177e4 LT |
288 | #endif |
289 | ||
a49976d1 | 290 | # SYSENTER call handler stub |
4c8cd0c5 | 291 | ENTRY(entry_SYSENTER_32) |
a49976d1 | 292 | movl TSS_sysenter_sp0(%esp), %esp |
1da177e4 | 293 | sysenter_past_esp: |
5f310f73 | 294 | pushl $__USER_DS /* pt_regs->ss */ |
30bfa7b3 | 295 | pushl %ebp /* pt_regs->sp (stashed in bp) */ |
5f310f73 AL |
296 | pushfl /* pt_regs->flags (except IF = 0) */ |
297 | orl $X86_EFLAGS_IF, (%esp) /* Fix IF */ | |
298 | pushl $__USER_CS /* pt_regs->cs */ | |
299 | pushl $0 /* pt_regs->ip = 0 (placeholder) */ | |
300 | pushl %eax /* pt_regs->orig_ax */ | |
301 | SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */ | |
302 | ||
67f590e8 AL |
303 | /* |
304 | * SYSENTER doesn't filter flags, so we need to clear NT and AC | |
305 | * ourselves. To save a few cycles, we can check whether | |
306 | * either was set instead of doing an unconditional popfq. | |
307 | * This needs to happen before enabling interrupts so that | |
308 | * we don't get preempted with NT set. | |
309 | * | |
310 | * NB.: .Lsysenter_fix_flags is a label with the code under it moved | |
311 | * out-of-line as an optimization: NT is unlikely to be set in the | |
312 | * majority of the cases and instead of polluting the I$ unnecessarily, | |
313 | * we're keeping that code behind a branch which will predict as | |
314 | * not-taken and therefore its instructions won't be fetched. | |
315 | */ | |
316 | testl $X86_EFLAGS_NT|X86_EFLAGS_AC, PT_EFLAGS(%esp) | |
317 | jnz .Lsysenter_fix_flags | |
318 | .Lsysenter_flags_fixed: | |
319 | ||
55f327fa | 320 | /* |
5f310f73 AL |
321 | * User mode is traced as though IRQs are on, and SYSENTER |
322 | * turned them off. | |
e6e5494c | 323 | */ |
55f327fa | 324 | TRACE_IRQS_OFF |
5f310f73 AL |
325 | |
326 | movl %esp, %eax | |
327 | call do_fast_syscall_32 | |
91e2eea9 BO |
328 | /* XEN PV guests always use IRET path */ |
329 | ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \ | |
330 | "jmp .Lsyscall_32_done", X86_FEATURE_XENPV | |
5f310f73 AL |
331 | |
332 | /* Opportunistic SYSEXIT */ | |
333 | TRACE_IRQS_ON /* User mode traces as IRQs on. */ | |
334 | movl PT_EIP(%esp), %edx /* pt_regs->ip */ | |
335 | movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */ | |
3bd29515 AL |
336 | 1: mov PT_FS(%esp), %fs |
337 | PTGS_TO_GS | |
5f310f73 AL |
338 | popl %ebx /* pt_regs->bx */ |
339 | addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */ | |
340 | popl %esi /* pt_regs->si */ | |
341 | popl %edi /* pt_regs->di */ | |
342 | popl %ebp /* pt_regs->bp */ | |
343 | popl %eax /* pt_regs->ax */ | |
5f310f73 AL |
344 | |
345 | /* | |
346 | * Return back to the vDSO, which will pop ecx and edx. | |
347 | * Don't bother with DS and ES (they already contain __USER_DS). | |
348 | */ | |
88c15ec9 BO |
349 | sti |
350 | sysexit | |
af0575bb | 351 | |
a49976d1 IM |
352 | .pushsection .fixup, "ax" |
353 | 2: movl $0, PT_FS(%esp) | |
354 | jmp 1b | |
f95d47ca | 355 | .popsection |
a49976d1 | 356 | _ASM_EXTABLE(1b, 2b) |
ccbeed3a | 357 | PTGS_TO_GS_EX |
67f590e8 AL |
358 | |
359 | .Lsysenter_fix_flags: | |
360 | pushl $X86_EFLAGS_FIXED | |
361 | popfl | |
362 | jmp .Lsysenter_flags_fixed | |
4c8cd0c5 | 363 | ENDPROC(entry_SYSENTER_32) |
1da177e4 LT |
364 | |
365 | # system call handler stub | |
b2502b41 | 366 | ENTRY(entry_INT80_32) |
e59d1b0a | 367 | ASM_CLAC |
150ac78d | 368 | pushl %eax /* pt_regs->orig_ax */ |
5f310f73 | 369 | SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */ |
150ac78d AL |
370 | |
371 | /* | |
657c1eea AL |
372 | * User mode is traced as though IRQs are on. Unlike the 64-bit |
373 | * case, INT80 is a trap gate on 32-bit kernels, so interrupts | |
374 | * are already on (unless user code is messing around with iopl). | |
150ac78d | 375 | */ |
150ac78d AL |
376 | |
377 | movl %esp, %eax | |
657c1eea | 378 | call do_syscall_32_irqs_on |
5f310f73 | 379 | .Lsyscall_32_done: |
1da177e4 LT |
380 | |
381 | restore_all: | |
2e04bc76 AH |
382 | TRACE_IRQS_IRET |
383 | restore_all_notrace: | |
34273f41 | 384 | #ifdef CONFIG_X86_ESPFIX32 |
58a5aac5 AL |
385 | ALTERNATIVE "jmp restore_nocheck", "", X86_BUG_ESPFIX |
386 | ||
a49976d1 IM |
387 | movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS |
388 | /* | |
389 | * Warning: PT_OLDSS(%esp) contains the wrong/random values if we | |
390 | * are returning to the kernel. | |
391 | * See comments in process.c:copy_thread() for details. | |
392 | */ | |
393 | movb PT_OLDSS(%esp), %ah | |
394 | movb PT_CS(%esp), %al | |
395 | andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax | |
396 | cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax | |
397 | je ldt_ss # returning to user-space with LDT SS | |
34273f41 | 398 | #endif |
1da177e4 | 399 | restore_nocheck: |
a49976d1 | 400 | RESTORE_REGS 4 # skip orig_eax/error_code |
f7f3d791 | 401 | irq_return: |
3701d863 | 402 | INTERRUPT_RETURN |
a49976d1 IM |
403 | .section .fixup, "ax" |
404 | ENTRY(iret_exc ) | |
405 | pushl $0 # no error code | |
406 | pushl $do_iret_error | |
407 | jmp error_code | |
1da177e4 | 408 | .previous |
a49976d1 | 409 | _ASM_EXTABLE(irq_return, iret_exc) |
1da177e4 | 410 | |
34273f41 | 411 | #ifdef CONFIG_X86_ESPFIX32 |
1da177e4 | 412 | ldt_ss: |
dc4c2a0a AH |
413 | /* |
414 | * Setup and switch to ESPFIX stack | |
415 | * | |
416 | * We're returning to userspace with a 16 bit stack. The CPU will not | |
417 | * restore the high word of ESP for us on executing iret... This is an | |
418 | * "official" bug of all the x86-compatible CPUs, which we can work | |
419 | * around to make dosemu and wine happy. We do this by preloading the | |
420 | * high word of ESP with the high word of the userspace ESP while | |
421 | * compensating for the offset by changing to the ESPFIX segment with | |
422 | * a base address that matches for the difference. | |
423 | */ | |
72c511dd | 424 | #define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8) |
a49976d1 IM |
425 | mov %esp, %edx /* load kernel esp */ |
426 | mov PT_OLDESP(%esp), %eax /* load userspace esp */ | |
427 | mov %dx, %ax /* eax: new kernel esp */ | |
9b47feb7 DV |
428 | sub %eax, %edx /* offset (low word is 0) */ |
429 | shr $16, %edx | |
a49976d1 IM |
430 | mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */ |
431 | mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */ | |
432 | pushl $__ESPFIX_SS | |
433 | pushl %eax /* new kernel esp */ | |
434 | /* | |
435 | * Disable interrupts, but do not irqtrace this section: we | |
2e04bc76 | 436 | * will soon execute iret and the tracer was already set to |
a49976d1 IM |
437 | * the irqstate after the IRET: |
438 | */ | |
139ec7c4 | 439 | DISABLE_INTERRUPTS(CLBR_EAX) |
a49976d1 IM |
440 | lss (%esp), %esp /* switch to espfix segment */ |
441 | jmp restore_nocheck | |
34273f41 | 442 | #endif |
b2502b41 | 443 | ENDPROC(entry_INT80_32) |
1da177e4 | 444 | |
f0d96110 | 445 | .macro FIXUP_ESPFIX_STACK |
dc4c2a0a AH |
446 | /* |
447 | * Switch back for ESPFIX stack to the normal zerobased stack | |
448 | * | |
449 | * We can't call C functions using the ESPFIX stack. This code reads | |
450 | * the high word of the segment base from the GDT and swiches to the | |
451 | * normal stack and adjusts ESP with the matching offset. | |
452 | */ | |
34273f41 | 453 | #ifdef CONFIG_X86_ESPFIX32 |
dc4c2a0a | 454 | /* fixup the stack */ |
a49976d1 IM |
455 | mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */ |
456 | mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */ | |
9b47feb7 | 457 | shl $16, %eax |
a49976d1 IM |
458 | addl %esp, %eax /* the adjusted stack pointer */ |
459 | pushl $__KERNEL_DS | |
460 | pushl %eax | |
461 | lss (%esp), %esp /* switch to the normal stack segment */ | |
34273f41 | 462 | #endif |
f0d96110 TH |
463 | .endm |
464 | .macro UNWIND_ESPFIX_STACK | |
34273f41 | 465 | #ifdef CONFIG_X86_ESPFIX32 |
a49976d1 | 466 | movl %ss, %eax |
f0d96110 | 467 | /* see if on espfix stack */ |
a49976d1 IM |
468 | cmpw $__ESPFIX_SS, %ax |
469 | jne 27f | |
470 | movl $__KERNEL_DS, %eax | |
471 | movl %eax, %ds | |
472 | movl %eax, %es | |
f0d96110 TH |
473 | /* switch to normal stack */ |
474 | FIXUP_ESPFIX_STACK | |
475 | 27: | |
34273f41 | 476 | #endif |
f0d96110 | 477 | .endm |
1da177e4 LT |
478 | |
479 | /* | |
3304c9c3 DV |
480 | * Build the entry stubs with some assembler magic. |
481 | * We pack 1 stub into every 8-byte block. | |
1da177e4 | 482 | */ |
3304c9c3 | 483 | .align 8 |
1da177e4 | 484 | ENTRY(irq_entries_start) |
3304c9c3 DV |
485 | vector=FIRST_EXTERNAL_VECTOR |
486 | .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR) | |
a49976d1 | 487 | pushl $(~vector+0x80) /* Note: always in signed byte range */ |
3304c9c3 DV |
488 | vector=vector+1 |
489 | jmp common_interrupt | |
3304c9c3 DV |
490 | .align 8 |
491 | .endr | |
47a55cd7 JB |
492 | END(irq_entries_start) |
493 | ||
55f327fa IM |
494 | /* |
495 | * the CPU automatically disables interrupts when executing an IRQ vector, | |
496 | * so IRQ-flags tracing has to follow that: | |
497 | */ | |
b7c6244f | 498 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
1da177e4 | 499 | common_interrupt: |
e59d1b0a | 500 | ASM_CLAC |
a49976d1 | 501 | addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */ |
1da177e4 | 502 | SAVE_ALL |
55f327fa | 503 | TRACE_IRQS_OFF |
a49976d1 IM |
504 | movl %esp, %eax |
505 | call do_IRQ | |
506 | jmp ret_from_intr | |
47a55cd7 | 507 | ENDPROC(common_interrupt) |
1da177e4 | 508 | |
02cf94c3 | 509 | #define BUILD_INTERRUPT3(name, nr, fn) \ |
1da177e4 | 510 | ENTRY(name) \ |
e59d1b0a | 511 | ASM_CLAC; \ |
a49976d1 | 512 | pushl $~(nr); \ |
fe7cacc1 | 513 | SAVE_ALL; \ |
55f327fa | 514 | TRACE_IRQS_OFF \ |
a49976d1 IM |
515 | movl %esp, %eax; \ |
516 | call fn; \ | |
517 | jmp ret_from_intr; \ | |
47a55cd7 | 518 | ENDPROC(name) |
1da177e4 | 519 | |
cf910e83 SA |
520 | |
521 | #ifdef CONFIG_TRACING | |
a49976d1 | 522 | # define TRACE_BUILD_INTERRUPT(name, nr) BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name) |
cf910e83 | 523 | #else |
a49976d1 | 524 | # define TRACE_BUILD_INTERRUPT(name, nr) |
cf910e83 SA |
525 | #endif |
526 | ||
a49976d1 IM |
527 | #define BUILD_INTERRUPT(name, nr) \ |
528 | BUILD_INTERRUPT3(name, nr, smp_##name); \ | |
cf910e83 | 529 | TRACE_BUILD_INTERRUPT(name, nr) |
02cf94c3 | 530 | |
1da177e4 | 531 | /* The include is where all of the SMP etc. interrupts come from */ |
1164dd00 | 532 | #include <asm/entry_arch.h> |
1da177e4 | 533 | |
1da177e4 | 534 | ENTRY(coprocessor_error) |
e59d1b0a | 535 | ASM_CLAC |
a49976d1 IM |
536 | pushl $0 |
537 | pushl $do_coprocessor_error | |
538 | jmp error_code | |
47a55cd7 | 539 | END(coprocessor_error) |
1da177e4 LT |
540 | |
541 | ENTRY(simd_coprocessor_error) | |
e59d1b0a | 542 | ASM_CLAC |
a49976d1 | 543 | pushl $0 |
40d2e763 BG |
544 | #ifdef CONFIG_X86_INVD_BUG |
545 | /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */ | |
a49976d1 IM |
546 | ALTERNATIVE "pushl $do_general_protection", \ |
547 | "pushl $do_simd_coprocessor_error", \ | |
8e65f6e0 | 548 | X86_FEATURE_XMM |
40d2e763 | 549 | #else |
a49976d1 | 550 | pushl $do_simd_coprocessor_error |
40d2e763 | 551 | #endif |
a49976d1 | 552 | jmp error_code |
47a55cd7 | 553 | END(simd_coprocessor_error) |
1da177e4 LT |
554 | |
555 | ENTRY(device_not_available) | |
e59d1b0a | 556 | ASM_CLAC |
a49976d1 IM |
557 | pushl $-1 # mark this as an int |
558 | pushl $do_device_not_available | |
559 | jmp error_code | |
47a55cd7 | 560 | END(device_not_available) |
1da177e4 | 561 | |
d3561b7f RR |
562 | #ifdef CONFIG_PARAVIRT |
563 | ENTRY(native_iret) | |
3701d863 | 564 | iret |
6837a54d | 565 | _ASM_EXTABLE(native_iret, iret_exc) |
47a55cd7 | 566 | END(native_iret) |
d3561b7f RR |
567 | #endif |
568 | ||
1da177e4 | 569 | ENTRY(overflow) |
e59d1b0a | 570 | ASM_CLAC |
a49976d1 IM |
571 | pushl $0 |
572 | pushl $do_overflow | |
573 | jmp error_code | |
47a55cd7 | 574 | END(overflow) |
1da177e4 LT |
575 | |
576 | ENTRY(bounds) | |
e59d1b0a | 577 | ASM_CLAC |
a49976d1 IM |
578 | pushl $0 |
579 | pushl $do_bounds | |
580 | jmp error_code | |
47a55cd7 | 581 | END(bounds) |
1da177e4 LT |
582 | |
583 | ENTRY(invalid_op) | |
e59d1b0a | 584 | ASM_CLAC |
a49976d1 IM |
585 | pushl $0 |
586 | pushl $do_invalid_op | |
587 | jmp error_code | |
47a55cd7 | 588 | END(invalid_op) |
1da177e4 LT |
589 | |
590 | ENTRY(coprocessor_segment_overrun) | |
e59d1b0a | 591 | ASM_CLAC |
a49976d1 IM |
592 | pushl $0 |
593 | pushl $do_coprocessor_segment_overrun | |
594 | jmp error_code | |
47a55cd7 | 595 | END(coprocessor_segment_overrun) |
1da177e4 LT |
596 | |
597 | ENTRY(invalid_TSS) | |
e59d1b0a | 598 | ASM_CLAC |
a49976d1 IM |
599 | pushl $do_invalid_TSS |
600 | jmp error_code | |
47a55cd7 | 601 | END(invalid_TSS) |
1da177e4 LT |
602 | |
603 | ENTRY(segment_not_present) | |
e59d1b0a | 604 | ASM_CLAC |
a49976d1 IM |
605 | pushl $do_segment_not_present |
606 | jmp error_code | |
47a55cd7 | 607 | END(segment_not_present) |
1da177e4 LT |
608 | |
609 | ENTRY(stack_segment) | |
e59d1b0a | 610 | ASM_CLAC |
a49976d1 IM |
611 | pushl $do_stack_segment |
612 | jmp error_code | |
47a55cd7 | 613 | END(stack_segment) |
1da177e4 | 614 | |
1da177e4 | 615 | ENTRY(alignment_check) |
e59d1b0a | 616 | ASM_CLAC |
a49976d1 IM |
617 | pushl $do_alignment_check |
618 | jmp error_code | |
47a55cd7 | 619 | END(alignment_check) |
1da177e4 | 620 | |
d28c4393 | 621 | ENTRY(divide_error) |
e59d1b0a | 622 | ASM_CLAC |
a49976d1 IM |
623 | pushl $0 # no error code |
624 | pushl $do_divide_error | |
625 | jmp error_code | |
47a55cd7 | 626 | END(divide_error) |
1da177e4 LT |
627 | |
628 | #ifdef CONFIG_X86_MCE | |
629 | ENTRY(machine_check) | |
e59d1b0a | 630 | ASM_CLAC |
a49976d1 IM |
631 | pushl $0 |
632 | pushl machine_check_vector | |
633 | jmp error_code | |
47a55cd7 | 634 | END(machine_check) |
1da177e4 LT |
635 | #endif |
636 | ||
637 | ENTRY(spurious_interrupt_bug) | |
e59d1b0a | 638 | ASM_CLAC |
a49976d1 IM |
639 | pushl $0 |
640 | pushl $do_spurious_interrupt_bug | |
641 | jmp error_code | |
47a55cd7 | 642 | END(spurious_interrupt_bug) |
1da177e4 | 643 | |
5ead97c8 | 644 | #ifdef CONFIG_XEN |
a49976d1 IM |
645 | /* |
646 | * Xen doesn't set %esp to be precisely what the normal SYSENTER | |
647 | * entry point expects, so fix it up before using the normal path. | |
648 | */ | |
e2a81baf | 649 | ENTRY(xen_sysenter_target) |
a49976d1 IM |
650 | addl $5*4, %esp /* remove xen-provided frame */ |
651 | jmp sysenter_past_esp | |
e2a81baf | 652 | |
5ead97c8 | 653 | ENTRY(xen_hypervisor_callback) |
a49976d1 | 654 | pushl $-1 /* orig_ax = -1 => not a system call */ |
5ead97c8 JF |
655 | SAVE_ALL |
656 | TRACE_IRQS_OFF | |
9ec2b804 | 657 | |
a49976d1 IM |
658 | /* |
659 | * Check to see if we got the event in the critical | |
660 | * region in xen_iret_direct, after we've reenabled | |
661 | * events and checked for pending events. This simulates | |
662 | * iret instruction's behaviour where it delivers a | |
663 | * pending interrupt when enabling interrupts: | |
664 | */ | |
665 | movl PT_EIP(%esp), %eax | |
666 | cmpl $xen_iret_start_crit, %eax | |
667 | jb 1f | |
668 | cmpl $xen_iret_end_crit, %eax | |
669 | jae 1f | |
9ec2b804 | 670 | |
a49976d1 | 671 | jmp xen_iret_crit_fixup |
e2a81baf | 672 | |
e2a81baf | 673 | ENTRY(xen_do_upcall) |
a49976d1 IM |
674 | 1: mov %esp, %eax |
675 | call xen_evtchn_do_upcall | |
fdfd811d | 676 | #ifndef CONFIG_PREEMPT |
a49976d1 | 677 | call xen_maybe_preempt_hcall |
fdfd811d | 678 | #endif |
a49976d1 | 679 | jmp ret_from_intr |
5ead97c8 JF |
680 | ENDPROC(xen_hypervisor_callback) |
681 | ||
a49976d1 IM |
682 | /* |
683 | * Hypervisor uses this for application faults while it executes. | |
684 | * We get here for two reasons: | |
685 | * 1. Fault while reloading DS, ES, FS or GS | |
686 | * 2. Fault while executing IRET | |
687 | * Category 1 we fix up by reattempting the load, and zeroing the segment | |
688 | * register if the load fails. | |
689 | * Category 2 we fix up by jumping to do_iret_error. We cannot use the | |
690 | * normal Linux return path in this case because if we use the IRET hypercall | |
691 | * to pop the stack frame we end up in an infinite loop of failsafe callbacks. | |
692 | * We distinguish between categories by maintaining a status value in EAX. | |
693 | */ | |
5ead97c8 | 694 | ENTRY(xen_failsafe_callback) |
a49976d1 IM |
695 | pushl %eax |
696 | movl $1, %eax | |
697 | 1: mov 4(%esp), %ds | |
698 | 2: mov 8(%esp), %es | |
699 | 3: mov 12(%esp), %fs | |
700 | 4: mov 16(%esp), %gs | |
a349e23d DV |
701 | /* EAX == 0 => Category 1 (Bad segment) |
702 | EAX != 0 => Category 2 (Bad IRET) */ | |
a49976d1 IM |
703 | testl %eax, %eax |
704 | popl %eax | |
705 | lea 16(%esp), %esp | |
706 | jz 5f | |
707 | jmp iret_exc | |
708 | 5: pushl $-1 /* orig_ax = -1 => not a system call */ | |
5ead97c8 | 709 | SAVE_ALL |
a49976d1 IM |
710 | jmp ret_from_exception |
711 | ||
712 | .section .fixup, "ax" | |
713 | 6: xorl %eax, %eax | |
714 | movl %eax, 4(%esp) | |
715 | jmp 1b | |
716 | 7: xorl %eax, %eax | |
717 | movl %eax, 8(%esp) | |
718 | jmp 2b | |
719 | 8: xorl %eax, %eax | |
720 | movl %eax, 12(%esp) | |
721 | jmp 3b | |
722 | 9: xorl %eax, %eax | |
723 | movl %eax, 16(%esp) | |
724 | jmp 4b | |
5ead97c8 | 725 | .previous |
a49976d1 IM |
726 | _ASM_EXTABLE(1b, 6b) |
727 | _ASM_EXTABLE(2b, 7b) | |
728 | _ASM_EXTABLE(3b, 8b) | |
729 | _ASM_EXTABLE(4b, 9b) | |
5ead97c8 JF |
730 | ENDPROC(xen_failsafe_callback) |
731 | ||
bc2b0331 | 732 | BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR, |
38e20b07 SY |
733 | xen_evtchn_do_upcall) |
734 | ||
a49976d1 | 735 | #endif /* CONFIG_XEN */ |
bc2b0331 S |
736 | |
737 | #if IS_ENABLED(CONFIG_HYPERV) | |
738 | ||
739 | BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR, | |
740 | hyperv_vector_handler) | |
741 | ||
742 | #endif /* CONFIG_HYPERV */ | |
5ead97c8 | 743 | |
606576ce | 744 | #ifdef CONFIG_FUNCTION_TRACER |
d61f82d0 SR |
745 | #ifdef CONFIG_DYNAMIC_FTRACE |
746 | ||
747 | ENTRY(mcount) | |
d61f82d0 SR |
748 | ret |
749 | END(mcount) | |
750 | ||
751 | ENTRY(ftrace_caller) | |
a49976d1 IM |
752 | pushl %eax |
753 | pushl %ecx | |
754 | pushl %edx | |
755 | pushl $0 /* Pass NULL as regs pointer */ | |
756 | movl 4*4(%esp), %eax | |
757 | movl 0x4(%ebp), %edx | |
758 | movl function_trace_op, %ecx | |
759 | subl $MCOUNT_INSN_SIZE, %eax | |
d61f82d0 SR |
760 | |
761 | .globl ftrace_call | |
762 | ftrace_call: | |
a49976d1 | 763 | call ftrace_stub |
d61f82d0 | 764 | |
a49976d1 IM |
765 | addl $4, %esp /* skip NULL pointer */ |
766 | popl %edx | |
767 | popl %ecx | |
768 | popl %eax | |
4de72395 | 769 | ftrace_ret: |
5a45cfe1 SR |
770 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
771 | .globl ftrace_graph_call | |
772 | ftrace_graph_call: | |
a49976d1 | 773 | jmp ftrace_stub |
5a45cfe1 | 774 | #endif |
d61f82d0 SR |
775 | |
776 | .globl ftrace_stub | |
777 | ftrace_stub: | |
778 | ret | |
779 | END(ftrace_caller) | |
780 | ||
4de72395 SR |
781 | ENTRY(ftrace_regs_caller) |
782 | pushf /* push flags before compare (in cs location) */ | |
4de72395 SR |
783 | |
784 | /* | |
785 | * i386 does not save SS and ESP when coming from kernel. | |
786 | * Instead, to get sp, ®s->sp is used (see ptrace.h). | |
787 | * Unfortunately, that means eflags must be at the same location | |
788 | * as the current return ip is. We move the return ip into the | |
789 | * ip location, and move flags into the return ip location. | |
790 | */ | |
a49976d1 IM |
791 | pushl 4(%esp) /* save return ip into ip slot */ |
792 | ||
793 | pushl $0 /* Load 0 into orig_ax */ | |
794 | pushl %gs | |
795 | pushl %fs | |
796 | pushl %es | |
797 | pushl %ds | |
798 | pushl %eax | |
799 | pushl %ebp | |
800 | pushl %edi | |
801 | pushl %esi | |
802 | pushl %edx | |
803 | pushl %ecx | |
804 | pushl %ebx | |
805 | ||
806 | movl 13*4(%esp), %eax /* Get the saved flags */ | |
807 | movl %eax, 14*4(%esp) /* Move saved flags into regs->flags location */ | |
808 | /* clobbering return ip */ | |
809 | movl $__KERNEL_CS, 13*4(%esp) | |
810 | ||
811 | movl 12*4(%esp), %eax /* Load ip (1st parameter) */ | |
812 | subl $MCOUNT_INSN_SIZE, %eax /* Adjust ip */ | |
813 | movl 0x4(%ebp), %edx /* Load parent ip (2nd parameter) */ | |
814 | movl function_trace_op, %ecx /* Save ftrace_pos in 3rd parameter */ | |
815 | pushl %esp /* Save pt_regs as 4th parameter */ | |
4de72395 SR |
816 | |
817 | GLOBAL(ftrace_regs_call) | |
a49976d1 IM |
818 | call ftrace_stub |
819 | ||
820 | addl $4, %esp /* Skip pt_regs */ | |
821 | movl 14*4(%esp), %eax /* Move flags back into cs */ | |
822 | movl %eax, 13*4(%esp) /* Needed to keep addl from modifying flags */ | |
823 | movl 12*4(%esp), %eax /* Get return ip from regs->ip */ | |
824 | movl %eax, 14*4(%esp) /* Put return ip back for ret */ | |
825 | ||
826 | popl %ebx | |
827 | popl %ecx | |
828 | popl %edx | |
829 | popl %esi | |
830 | popl %edi | |
831 | popl %ebp | |
832 | popl %eax | |
833 | popl %ds | |
834 | popl %es | |
835 | popl %fs | |
836 | popl %gs | |
837 | addl $8, %esp /* Skip orig_ax and ip */ | |
838 | popf /* Pop flags at end (no addl to corrupt flags) */ | |
839 | jmp ftrace_ret | |
4de72395 | 840 | |
4de72395 | 841 | popf |
a49976d1 | 842 | jmp ftrace_stub |
d61f82d0 SR |
843 | #else /* ! CONFIG_DYNAMIC_FTRACE */ |
844 | ||
16444a8a | 845 | ENTRY(mcount) |
a49976d1 IM |
846 | cmpl $__PAGE_OFFSET, %esp |
847 | jb ftrace_stub /* Paging not enabled yet? */ | |
af058ab0 | 848 | |
a49976d1 IM |
849 | cmpl $ftrace_stub, ftrace_trace_function |
850 | jnz trace | |
fb52607a | 851 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
a49976d1 IM |
852 | cmpl $ftrace_stub, ftrace_graph_return |
853 | jnz ftrace_graph_caller | |
e49dc19c | 854 | |
a49976d1 IM |
855 | cmpl $ftrace_graph_entry_stub, ftrace_graph_entry |
856 | jnz ftrace_graph_caller | |
caf4b323 | 857 | #endif |
16444a8a ACM |
858 | .globl ftrace_stub |
859 | ftrace_stub: | |
860 | ret | |
861 | ||
862 | /* taken from glibc */ | |
863 | trace: | |
a49976d1 IM |
864 | pushl %eax |
865 | pushl %ecx | |
866 | pushl %edx | |
867 | movl 0xc(%esp), %eax | |
868 | movl 0x4(%ebp), %edx | |
869 | subl $MCOUNT_INSN_SIZE, %eax | |
870 | ||
871 | call *ftrace_trace_function | |
872 | ||
873 | popl %edx | |
874 | popl %ecx | |
875 | popl %eax | |
876 | jmp ftrace_stub | |
16444a8a | 877 | END(mcount) |
d61f82d0 | 878 | #endif /* CONFIG_DYNAMIC_FTRACE */ |
606576ce | 879 | #endif /* CONFIG_FUNCTION_TRACER */ |
16444a8a | 880 | |
fb52607a FW |
881 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER |
882 | ENTRY(ftrace_graph_caller) | |
a49976d1 IM |
883 | pushl %eax |
884 | pushl %ecx | |
885 | pushl %edx | |
886 | movl 0xc(%esp), %eax | |
887 | lea 0x4(%ebp), %edx | |
888 | movl (%ebp), %ecx | |
889 | subl $MCOUNT_INSN_SIZE, %eax | |
890 | call prepare_ftrace_return | |
891 | popl %edx | |
892 | popl %ecx | |
893 | popl %eax | |
e7d3737e | 894 | ret |
fb52607a | 895 | END(ftrace_graph_caller) |
caf4b323 FW |
896 | |
897 | .globl return_to_handler | |
898 | return_to_handler: | |
a49976d1 IM |
899 | pushl %eax |
900 | pushl %edx | |
901 | movl %ebp, %eax | |
902 | call ftrace_return_to_handler | |
903 | movl %eax, %ecx | |
904 | popl %edx | |
905 | popl %eax | |
906 | jmp *%ecx | |
e7d3737e | 907 | #endif |
16444a8a | 908 | |
25c74b10 SA |
909 | #ifdef CONFIG_TRACING |
910 | ENTRY(trace_page_fault) | |
25c74b10 | 911 | ASM_CLAC |
a49976d1 IM |
912 | pushl $trace_do_page_fault |
913 | jmp error_code | |
25c74b10 SA |
914 | END(trace_page_fault) |
915 | #endif | |
916 | ||
d211af05 | 917 | ENTRY(page_fault) |
e59d1b0a | 918 | ASM_CLAC |
a49976d1 | 919 | pushl $do_page_fault |
d211af05 AH |
920 | ALIGN |
921 | error_code: | |
ccbeed3a | 922 | /* the function address is in %gs's slot on the stack */ |
a49976d1 IM |
923 | pushl %fs |
924 | pushl %es | |
925 | pushl %ds | |
926 | pushl %eax | |
927 | pushl %ebp | |
928 | pushl %edi | |
929 | pushl %esi | |
930 | pushl %edx | |
931 | pushl %ecx | |
932 | pushl %ebx | |
d211af05 | 933 | cld |
a49976d1 IM |
934 | movl $(__KERNEL_PERCPU), %ecx |
935 | movl %ecx, %fs | |
d211af05 | 936 | UNWIND_ESPFIX_STACK |
ccbeed3a | 937 | GS_TO_REG %ecx |
a49976d1 IM |
938 | movl PT_GS(%esp), %edi # get the function address |
939 | movl PT_ORIG_EAX(%esp), %edx # get the error code | |
940 | movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart | |
ccbeed3a TH |
941 | REG_TO_PTGS %ecx |
942 | SET_KERNEL_GS %ecx | |
a49976d1 IM |
943 | movl $(__USER_DS), %ecx |
944 | movl %ecx, %ds | |
945 | movl %ecx, %es | |
d211af05 | 946 | TRACE_IRQS_OFF |
a49976d1 IM |
947 | movl %esp, %eax # pt_regs pointer |
948 | call *%edi | |
949 | jmp ret_from_exception | |
d211af05 AH |
950 | END(page_fault) |
951 | ||
952 | /* | |
953 | * Debug traps and NMI can happen at the one SYSENTER instruction | |
954 | * that sets up the real kernel stack. Check here, since we can't | |
955 | * allow the wrong stack to be used. | |
956 | * | |
957 | * "TSS_sysenter_sp0+12" is because the NMI/debug handler will have | |
958 | * already pushed 3 words if it hits on the sysenter instruction: | |
959 | * eflags, cs and eip. | |
960 | * | |
961 | * We just load the right stack, and push the three (known) values | |
962 | * by hand onto the new stack - while updating the return eip past | |
963 | * the instruction that would have done it for sysenter. | |
964 | */ | |
f0d96110 | 965 | .macro FIX_STACK offset ok label |
a49976d1 IM |
966 | cmpw $__KERNEL_CS, 4(%esp) |
967 | jne \ok | |
f0d96110 | 968 | \label: |
a49976d1 | 969 | movl TSS_sysenter_sp0 + \offset(%esp), %esp |
131484c8 | 970 | pushfl |
a49976d1 IM |
971 | pushl $__KERNEL_CS |
972 | pushl $sysenter_past_esp | |
f0d96110 | 973 | .endm |
d211af05 AH |
974 | |
975 | ENTRY(debug) | |
e59d1b0a | 976 | ASM_CLAC |
a49976d1 IM |
977 | cmpl $entry_SYSENTER_32, (%esp) |
978 | jne debug_stack_correct | |
f0d96110 | 979 | FIX_STACK 12, debug_stack_correct, debug_esp_fix_insn |
d211af05 | 980 | debug_stack_correct: |
a49976d1 | 981 | pushl $-1 # mark this as an int |
d211af05 AH |
982 | SAVE_ALL |
983 | TRACE_IRQS_OFF | |
a49976d1 IM |
984 | xorl %edx, %edx # error code 0 |
985 | movl %esp, %eax # pt_regs pointer | |
986 | call do_debug | |
987 | jmp ret_from_exception | |
d211af05 AH |
988 | END(debug) |
989 | ||
990 | /* | |
991 | * NMI is doubly nasty. It can happen _while_ we're handling | |
992 | * a debug fault, and the debug fault hasn't yet been able to | |
993 | * clear up the stack. So we first check whether we got an | |
994 | * NMI on the sysenter entry path, but after that we need to | |
995 | * check whether we got an NMI on the debug path where the debug | |
996 | * fault happened on the sysenter path. | |
997 | */ | |
998 | ENTRY(nmi) | |
e59d1b0a | 999 | ASM_CLAC |
34273f41 | 1000 | #ifdef CONFIG_X86_ESPFIX32 |
a49976d1 IM |
1001 | pushl %eax |
1002 | movl %ss, %eax | |
1003 | cmpw $__ESPFIX_SS, %ax | |
1004 | popl %eax | |
1005 | je nmi_espfix_stack | |
34273f41 | 1006 | #endif |
a49976d1 IM |
1007 | cmpl $entry_SYSENTER_32, (%esp) |
1008 | je nmi_stack_fixup | |
1009 | pushl %eax | |
1010 | movl %esp, %eax | |
1011 | /* | |
1012 | * Do not access memory above the end of our stack page, | |
d211af05 AH |
1013 | * it might not exist. |
1014 | */ | |
a49976d1 IM |
1015 | andl $(THREAD_SIZE-1), %eax |
1016 | cmpl $(THREAD_SIZE-20), %eax | |
1017 | popl %eax | |
1018 | jae nmi_stack_correct | |
1019 | cmpl $entry_SYSENTER_32, 12(%esp) | |
1020 | je nmi_debug_stack_check | |
d211af05 | 1021 | nmi_stack_correct: |
a49976d1 | 1022 | pushl %eax |
d211af05 | 1023 | SAVE_ALL |
a49976d1 IM |
1024 | xorl %edx, %edx # zero error code |
1025 | movl %esp, %eax # pt_regs pointer | |
1026 | call do_nmi | |
1027 | jmp restore_all_notrace | |
d211af05 AH |
1028 | |
1029 | nmi_stack_fixup: | |
f0d96110 | 1030 | FIX_STACK 12, nmi_stack_correct, 1 |
a49976d1 | 1031 | jmp nmi_stack_correct |
d211af05 AH |
1032 | |
1033 | nmi_debug_stack_check: | |
a49976d1 IM |
1034 | cmpw $__KERNEL_CS, 16(%esp) |
1035 | jne nmi_stack_correct | |
1036 | cmpl $debug, (%esp) | |
1037 | jb nmi_stack_correct | |
1038 | cmpl $debug_esp_fix_insn, (%esp) | |
1039 | ja nmi_stack_correct | |
f0d96110 | 1040 | FIX_STACK 24, nmi_stack_correct, 1 |
a49976d1 | 1041 | jmp nmi_stack_correct |
d211af05 | 1042 | |
34273f41 | 1043 | #ifdef CONFIG_X86_ESPFIX32 |
d211af05 | 1044 | nmi_espfix_stack: |
131484c8 | 1045 | /* |
d211af05 AH |
1046 | * create the pointer to lss back |
1047 | */ | |
a49976d1 IM |
1048 | pushl %ss |
1049 | pushl %esp | |
1050 | addl $4, (%esp) | |
d211af05 AH |
1051 | /* copy the iret frame of 12 bytes */ |
1052 | .rept 3 | |
a49976d1 | 1053 | pushl 16(%esp) |
d211af05 | 1054 | .endr |
a49976d1 | 1055 | pushl %eax |
d211af05 | 1056 | SAVE_ALL |
a49976d1 IM |
1057 | FIXUP_ESPFIX_STACK # %eax == %esp |
1058 | xorl %edx, %edx # zero error code | |
1059 | call do_nmi | |
d211af05 | 1060 | RESTORE_REGS |
a49976d1 IM |
1061 | lss 12+4(%esp), %esp # back to espfix stack |
1062 | jmp irq_return | |
34273f41 | 1063 | #endif |
d211af05 AH |
1064 | END(nmi) |
1065 | ||
1066 | ENTRY(int3) | |
e59d1b0a | 1067 | ASM_CLAC |
a49976d1 | 1068 | pushl $-1 # mark this as an int |
d211af05 AH |
1069 | SAVE_ALL |
1070 | TRACE_IRQS_OFF | |
a49976d1 IM |
1071 | xorl %edx, %edx # zero error code |
1072 | movl %esp, %eax # pt_regs pointer | |
1073 | call do_int3 | |
1074 | jmp ret_from_exception | |
d211af05 AH |
1075 | END(int3) |
1076 | ||
1077 | ENTRY(general_protection) | |
a49976d1 IM |
1078 | pushl $do_general_protection |
1079 | jmp error_code | |
d211af05 AH |
1080 | END(general_protection) |
1081 | ||
631bc487 GN |
1082 | #ifdef CONFIG_KVM_GUEST |
1083 | ENTRY(async_page_fault) | |
e59d1b0a | 1084 | ASM_CLAC |
a49976d1 IM |
1085 | pushl $do_async_page_fault |
1086 | jmp error_code | |
2ae9d293 | 1087 | END(async_page_fault) |
631bc487 | 1088 | #endif |