dma-mapping: use unsigned long for dma_attrs
[linux-2.6-block.git] / arch / sparc / kernel / ioport.c
CommitLineData
88278ca2 1/*
1da177e4
LT
2 * ioport.c: Simple io mapping allocator.
3 *
4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 *
7 * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev.
8 *
9 * 2000/01/29
10 * <rth> zait: as long as pci_alloc_consistent produces something addressable,
11 * things are ok.
12 * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a
13 * pointer into the big page mapping
14 * <rth> zait: so what?
15 * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page()))
16 * <zaitcev> Hmm
17 * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())).
18 * So far so good.
19 * <zaitcev> Now, driver calls pci_free_consistent(with result of
20 * remap_it_my_way()).
21 * <zaitcev> How do you find the address to pass to free_pages()?
22 * <rth> zait: walk the page tables? It's only two or three level after all.
23 * <rth> zait: you have to walk them anyway to remove the mapping.
24 * <zaitcev> Hmm
25 * <zaitcev> Sounds reasonable
26 */
27
3ca9fab4 28#include <linux/module.h>
1da177e4
LT
29#include <linux/sched.h>
30#include <linux/kernel.h>
31#include <linux/errno.h>
32#include <linux/types.h>
33#include <linux/ioport.h>
34#include <linux/mm.h>
35#include <linux/slab.h>
36#include <linux/pci.h> /* struct pci_dev */
37#include <linux/proc_fs.h>
e7a088f9 38#include <linux/seq_file.h>
0912a5db 39#include <linux/scatterlist.h>
764f2579 40#include <linux/of_device.h>
1da177e4
LT
41
42#include <asm/io.h>
43#include <asm/vaddrs.h>
44#include <asm/oplib.h>
576c352e 45#include <asm/prom.h>
1da177e4
LT
46#include <asm/page.h>
47#include <asm/pgalloc.h>
48#include <asm/dma.h>
e0039348
DM
49#include <asm/iommu.h>
50#include <asm/io-unit.h>
8401707f 51#include <asm/leon.h>
1da177e4 52
d894d964
DM
53const struct sparc32_dma_ops *sparc32_dma_ops;
54
d81f087f
KG
55/* This function must make sure that caches and memory are coherent after DMA
56 * On LEON systems without cache snooping it flushes the entire D-CACHE.
57 */
d81f087f
KG
58static inline void dma_make_coherent(unsigned long pa, unsigned long len)
59{
95835335
SR
60 if (sparc_cpu_model == sparc_leon) {
61 if (!sparc_leon3_snooping_enabled())
62 leon_flush_dcache_all();
63 }
d81f087f 64}
1da177e4 65
1da177e4
LT
66static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);
67static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
68 unsigned long size, char *name);
69static void _sparc_free_io(struct resource *res);
70
c61c65cd
AB
71static void register_proc_sparc_ioport(void);
72
1da177e4
LT
73/* This points to the next to use virtual memory for DVMA mappings */
74static struct resource _sparc_dvma = {
75 .name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1
76};
77/* This points to the start of I/O mappings, cluable from outside. */
78/*ext*/ struct resource sparc_iomap = {
79 .name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1
80};
81
82/*
83 * Our mini-allocator...
84 * Boy this is gross! We need it because we must map I/O for
85 * timers and interrupt controller before the kmalloc is available.
86 */
87
88#define XNMLN 15
89#define XNRES 10 /* SS-10 uses 8 */
90
91struct xresource {
92 struct resource xres; /* Must be first */
93 int xflag; /* 1 == used */
94 char xname[XNMLN+1];
95};
96
97static struct xresource xresv[XNRES];
98
99static struct xresource *xres_alloc(void) {
100 struct xresource *xrp;
101 int n;
102
103 xrp = xresv;
104 for (n = 0; n < XNRES; n++) {
105 if (xrp->xflag == 0) {
106 xrp->xflag = 1;
107 return xrp;
108 }
109 xrp++;
110 }
111 return NULL;
112}
113
114static void xres_free(struct xresource *xrp) {
115 xrp->xflag = 0;
116}
117
118/*
119 * These are typically used in PCI drivers
120 * which are trying to be cross-platform.
121 *
122 * Bus type is always zero on IIep.
123 */
124void __iomem *ioremap(unsigned long offset, unsigned long size)
125{
126 char name[14];
127
128 sprintf(name, "phys_%08x", (u32)offset);
129 return _sparc_alloc_io(0, offset, size, name);
130}
6943f3da 131EXPORT_SYMBOL(ioremap);
1da177e4
LT
132
133/*
08f80073 134 * Complementary to ioremap().
1da177e4
LT
135 */
136void iounmap(volatile void __iomem *virtual)
137{
138 unsigned long vaddr = (unsigned long) virtual & PAGE_MASK;
139 struct resource *res;
140
a0e997c2
GU
141 /*
142 * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case.
143 * This probably warrants some sort of hashing.
144 */
145 if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) {
1da177e4
LT
146 printk("free_io/iounmap: cannot free %lx\n", vaddr);
147 return;
148 }
149 _sparc_free_io(res);
150
151 if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) {
152 xres_free((struct xresource *)res);
153 } else {
154 kfree(res);
155 }
156}
6943f3da 157EXPORT_SYMBOL(iounmap);
1da177e4 158
3ca9fab4
DM
159void __iomem *of_ioremap(struct resource *res, unsigned long offset,
160 unsigned long size, char *name)
161{
162 return _sparc_alloc_io(res->flags & 0xF,
163 res->start + offset,
164 size, name);
165}
166EXPORT_SYMBOL(of_ioremap);
167
e3a411a3 168void of_iounmap(struct resource *res, void __iomem *base, unsigned long size)
3ca9fab4
DM
169{
170 iounmap(base);
171}
172EXPORT_SYMBOL(of_iounmap);
173
1da177e4
LT
174/*
175 * Meat of mapping
176 */
177static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
178 unsigned long size, char *name)
179{
180 static int printed_full;
181 struct xresource *xres;
182 struct resource *res;
183 char *tack;
184 int tlen;
185 void __iomem *va; /* P3 diag */
186
187 if (name == NULL) name = "???";
188
c31f7651 189 if ((xres = xres_alloc()) != NULL) {
1da177e4
LT
190 tack = xres->xname;
191 res = &xres->xres;
192 } else {
193 if (!printed_full) {
194 printk("ioremap: done with statics, switching to malloc\n");
195 printed_full = 1;
196 }
197 tlen = strlen(name);
198 tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL);
199 if (tack == NULL) return NULL;
200 memset(tack, 0, sizeof(struct resource));
201 res = (struct resource *) tack;
202 tack += sizeof (struct resource);
203 }
204
205 strlcpy(tack, name, XNMLN+1);
206 res->name = tack;
207
208 va = _sparc_ioremap(res, busno, phys, size);
209 /* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */
210 return va;
211}
212
213/*
214 */
215static void __iomem *
216_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz)
217{
218 unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
219
220 if (allocate_resource(&sparc_iomap, res,
221 (offset + sz + PAGE_SIZE-1) & PAGE_MASK,
222 sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) {
223 /* Usually we cannot see printks in this case. */
224 prom_printf("alloc_io_res(%s): cannot occupy\n",
225 (res->name != NULL)? res->name: "???");
226 prom_halt();
227 }
228
229 pa &= PAGE_MASK;
9701b264 230 srmmu_mapiorange(bus, pa, res->start, resource_size(res));
1da177e4 231
d75fc8bb 232 return (void __iomem *)(unsigned long)(res->start + offset);
1da177e4
LT
233}
234
235/*
08f80073 236 * Complementary to _sparc_ioremap().
1da177e4
LT
237 */
238static void _sparc_free_io(struct resource *res)
239{
240 unsigned long plen;
241
28f65c11 242 plen = resource_size(res);
30d4d1ff 243 BUG_ON((plen & (PAGE_SIZE-1)) != 0);
9701b264 244 srmmu_unmapiorange(res->start, plen);
1da177e4
LT
245 release_resource(res);
246}
247
248#ifdef CONFIG_SBUS
249
63237eeb 250void sbus_set_sbus64(struct device *dev, int x)
8fae097d 251{
1da177e4
LT
252 printk("sbus_set_sbus64: unsupported\n");
253}
6943f3da 254EXPORT_SYMBOL(sbus_set_sbus64);
1da177e4
LT
255
256/*
257 * Allocate a chunk of memory suitable for DMA.
258 * Typically devices use them for control blocks.
259 * CPU may access them without any explicit flushing.
1da177e4 260 */
ee664a92 261static void *sbus_alloc_coherent(struct device *dev, size_t len,
c416258a 262 dma_addr_t *dma_addrp, gfp_t gfp,
00085f1e 263 unsigned long attrs)
1da177e4 264{
cd4cd730 265 struct platform_device *op = to_platform_device(dev);
5c8345bb 266 unsigned long len_total = PAGE_ALIGN(len);
1da177e4
LT
267 unsigned long va;
268 struct resource *res;
269 int order;
270
efad798b 271 /* XXX why are some lengths signed, others unsigned? */
1da177e4
LT
272 if (len <= 0) {
273 return NULL;
274 }
275 /* XXX So what is maxphys for us and how do drivers know it? */
276 if (len > 256*1024) { /* __get_free_pages() limit */
277 return NULL;
278 }
279
280 order = get_order(len_total);
d1105287
DH
281 va = __get_free_pages(gfp, order);
282 if (va == 0)
1da177e4
LT
283 goto err_nopages;
284
c80892d1 285 if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL)
1da177e4 286 goto err_nomem;
1da177e4
LT
287
288 if (allocate_resource(&_sparc_dvma, res, len_total,
289 _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
290 printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total);
291 goto err_nova;
292 }
5c8345bb 293
d894d964 294 // XXX The sbus_map_dma_area does this for us below, see comments.
9701b264 295 // srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
1da177e4
LT
296 /*
297 * XXX That's where sdev would be used. Currently we load
298 * all iommu tables with the same translations.
299 */
d894d964 300 if (sbus_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0)
1da177e4
LT
301 goto err_noiommu;
302
61c7a080 303 res->name = op->dev.of_node->name;
4cfbd7eb 304
d75fc8bb 305 return (void *)(unsigned long)res->start;
1da177e4
LT
306
307err_noiommu:
308 release_resource(res);
309err_nova:
1da177e4 310 kfree(res);
0c7c6a3c
KG
311err_nomem:
312 free_pages(va, order);
1da177e4
LT
313err_nopages:
314 return NULL;
315}
316
ee664a92 317static void sbus_free_coherent(struct device *dev, size_t n, void *p,
00085f1e 318 dma_addr_t ba, unsigned long attrs)
1da177e4
LT
319{
320 struct resource *res;
321 struct page *pgv;
322
a0e997c2 323 if ((res = lookup_resource(&_sparc_dvma,
1da177e4
LT
324 (unsigned long)p)) == NULL) {
325 printk("sbus_free_consistent: cannot free %p\n", p);
326 return;
327 }
328
329 if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
330 printk("sbus_free_consistent: unaligned va %p\n", p);
331 return;
332 }
333
5c8345bb 334 n = PAGE_ALIGN(n);
28f65c11 335 if (resource_size(res) != n) {
ee664a92 336 printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n",
28f65c11 337 (long)resource_size(res), n);
1da177e4
LT
338 return;
339 }
340
341 release_resource(res);
342 kfree(res);
343
aba945e7 344 pgv = virt_to_page(p);
d894d964 345 sbus_unmap_dma_area(dev, ba, n);
1da177e4
LT
346
347 __free_pages(pgv, get_order(n));
348}
349
350/*
351 * Map a chunk of memory so that devices can see it.
352 * CPU view of this memory may be inconsistent with
353 * a device view and explicit flushing is necessary.
354 */
ee664a92
FT
355static dma_addr_t sbus_map_page(struct device *dev, struct page *page,
356 unsigned long offset, size_t len,
357 enum dma_data_direction dir,
00085f1e 358 unsigned long attrs)
1da177e4 359{
c2c07dbd
FT
360 void *va = page_address(page) + offset;
361
efad798b 362 /* XXX why are some lengths signed, others unsigned? */
1da177e4
LT
363 if (len <= 0) {
364 return 0;
365 }
366 /* XXX So what is maxphys for us and how do drivers know it? */
367 if (len > 256*1024) { /* __get_free_pages() limit */
368 return 0;
369 }
260489fa 370 return mmu_get_scsi_one(dev, va, len);
1da177e4
LT
371}
372
ee664a92 373static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n,
00085f1e 374 enum dma_data_direction dir, unsigned long attrs)
1da177e4 375{
260489fa 376 mmu_release_scsi_one(dev, ba, n);
1da177e4
LT
377}
378
ee664a92 379static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,
00085f1e 380 enum dma_data_direction dir, unsigned long attrs)
1da177e4 381{
260489fa 382 mmu_get_scsi_sgl(dev, sg, n);
1da177e4
LT
383 return n;
384}
385
ee664a92 386static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n,
00085f1e 387 enum dma_data_direction dir, unsigned long attrs)
1da177e4 388{
260489fa 389 mmu_release_scsi_sgl(dev, sg, n);
1da177e4
LT
390}
391
ee664a92
FT
392static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
393 int n, enum dma_data_direction dir)
1da177e4 394{
ee664a92 395 BUG();
1da177e4
LT
396}
397
ee664a92
FT
398static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
399 int n, enum dma_data_direction dir)
1da177e4 400{
ee664a92 401 BUG();
1da177e4
LT
402}
403
c31f7651 404static struct dma_map_ops sbus_dma_ops = {
c416258a
AP
405 .alloc = sbus_alloc_coherent,
406 .free = sbus_free_coherent,
ee664a92
FT
407 .map_page = sbus_map_page,
408 .unmap_page = sbus_unmap_page,
409 .map_sg = sbus_map_sg,
410 .unmap_sg = sbus_unmap_sg,
411 .sync_sg_for_cpu = sbus_sync_sg_for_cpu,
412 .sync_sg_for_device = sbus_sync_sg_for_device,
413};
414
f8e4d32c 415static int __init sparc_register_ioport(void)
576c352e 416{
576c352e
DM
417 register_proc_sparc_ioport();
418
576c352e 419 return 0;
576c352e
DM
420}
421
f8e4d32c
DM
422arch_initcall(sparc_register_ioport);
423
1da177e4
LT
424#endif /* CONFIG_SBUS */
425
18304746 426
1da177e4
LT
427/* Allocate and map kernel buffer using consistent mode DMA for a device.
428 * hwdev should be valid struct pci_dev pointer for PCI devices.
429 */
ee664a92 430static void *pci32_alloc_coherent(struct device *dev, size_t len,
c416258a 431 dma_addr_t *pba, gfp_t gfp,
00085f1e 432 unsigned long attrs)
1da177e4 433{
5c8345bb 434 unsigned long len_total = PAGE_ALIGN(len);
7feee249 435 void *va;
1da177e4
LT
436 struct resource *res;
437 int order;
438
439 if (len == 0) {
440 return NULL;
441 }
442 if (len > 256*1024) { /* __get_free_pages() limit */
443 return NULL;
444 }
445
446 order = get_order(len_total);
d1105287 447 va = (void *) __get_free_pages(gfp, order);
7feee249 448 if (va == NULL) {
1da177e4 449 printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT);
7feee249 450 goto err_nopages;
1da177e4
LT
451 }
452
c80892d1 453 if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) {
1da177e4 454 printk("pci_alloc_consistent: no core\n");
7feee249 455 goto err_nomem;
1da177e4 456 }
1da177e4
LT
457
458 if (allocate_resource(&_sparc_dvma, res, len_total,
459 _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
460 printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total);
7feee249 461 goto err_nova;
1da177e4 462 }
9701b264 463 srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
1da177e4
LT
464
465 *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */
466 return (void *) res->start;
7feee249
KG
467
468err_nova:
469 kfree(res);
470err_nomem:
471 free_pages((unsigned long)va, order);
472err_nopages:
473 return NULL;
1da177e4
LT
474}
475
476/* Free and unmap a consistent DMA buffer.
477 * cpu_addr is what was returned from pci_alloc_consistent,
478 * size must be the same as what as passed into pci_alloc_consistent,
479 * and likewise dma_addr must be the same as what *dma_addrp was set to.
480 *
d1a78c32 481 * References to the memory and mappings associated with cpu_addr/dma_addr
1da177e4
LT
482 * past this call are illegal.
483 */
ee664a92 484static void pci32_free_coherent(struct device *dev, size_t n, void *p,
00085f1e 485 dma_addr_t ba, unsigned long attrs)
1da177e4
LT
486{
487 struct resource *res;
1da177e4 488
a0e997c2 489 if ((res = lookup_resource(&_sparc_dvma,
1da177e4
LT
490 (unsigned long)p)) == NULL) {
491 printk("pci_free_consistent: cannot free %p\n", p);
492 return;
493 }
494
495 if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
496 printk("pci_free_consistent: unaligned va %p\n", p);
497 return;
498 }
499
5c8345bb 500 n = PAGE_ALIGN(n);
28f65c11 501 if (resource_size(res) != n) {
1da177e4 502 printk("pci_free_consistent: region 0x%lx asked 0x%lx\n",
28f65c11 503 (long)resource_size(res), (long)n);
1da177e4
LT
504 return;
505 }
506
d81f087f 507 dma_make_coherent(ba, n);
9701b264 508 srmmu_unmapiorange((unsigned long)p, n);
1da177e4
LT
509
510 release_resource(res);
511 kfree(res);
d81f087f 512 free_pages((unsigned long)phys_to_virt(ba), get_order(n));
1da177e4 513}
1da177e4
LT
514
515/*
516 * Same as pci_map_single, but with pages.
517 */
ee664a92
FT
518static dma_addr_t pci32_map_page(struct device *dev, struct page *page,
519 unsigned long offset, size_t size,
520 enum dma_data_direction dir,
00085f1e 521 unsigned long attrs)
1da177e4 522{
1da177e4
LT
523 /* IIep is write-through, not flushing. */
524 return page_to_phys(page) + offset;
525}
1da177e4 526
b8682cef 527static void pci32_unmap_page(struct device *dev, dma_addr_t ba, size_t size,
00085f1e 528 enum dma_data_direction dir, unsigned long attrs)
b8682cef
KG
529{
530 if (dir != PCI_DMA_TODEVICE)
d81f087f 531 dma_make_coherent(ba, PAGE_ALIGN(size));
b8682cef
KG
532}
533
1da177e4 534/* Map a set of buffers described by scatterlist in streaming
08f80073 535 * mode for DMA. This is the scatter-gather version of the
1da177e4
LT
536 * above pci_map_single interface. Here the scatter gather list
537 * elements are each tagged with the appropriate dma address
538 * and length. They are obtained via sg_dma_{address,length}(SG).
539 *
540 * NOTE: An implementation may be able to use a smaller number of
541 * DMA address/length pairs than there are SG table elements.
542 * (for example via virtual mapping capabilities)
543 * The routine returns the number of addr/length pairs actually
544 * used, at most nents.
545 *
546 * Device ownership issues as mentioned above for pci_map_single are
547 * the same here.
548 */
ee664a92
FT
549static int pci32_map_sg(struct device *device, struct scatterlist *sgl,
550 int nents, enum dma_data_direction dir,
00085f1e 551 unsigned long attrs)
1da177e4 552{
0912a5db 553 struct scatterlist *sg;
1da177e4
LT
554 int n;
555
1da177e4 556 /* IIep is write-through, not flushing. */
0912a5db 557 for_each_sg(sgl, sg, nents, n) {
d81f087f 558 sg->dma_address = sg_phys(sg);
aa83a26a 559 sg->dma_length = sg->length;
1da177e4
LT
560 }
561 return nents;
562}
563
564/* Unmap a set of streaming mode DMA translations.
565 * Again, cpu read rules concerning calls here are the same as for
566 * pci_unmap_single() above.
567 */
ee664a92
FT
568static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl,
569 int nents, enum dma_data_direction dir,
00085f1e 570 unsigned long attrs)
1da177e4 571{
0912a5db 572 struct scatterlist *sg;
1da177e4
LT
573 int n;
574
ee664a92 575 if (dir != PCI_DMA_TODEVICE) {
0912a5db 576 for_each_sg(sgl, sg, nents, n) {
d81f087f 577 dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
1da177e4
LT
578 }
579 }
580}
581
582/* Make physical memory consistent for a single
583 * streaming mode DMA translation before or after a transfer.
584 *
585 * If you perform a pci_map_single() but wish to interrogate the
586 * buffer using the cpu, yet do not wish to teardown the PCI dma
587 * mapping, you must call this function before doing so. At the
588 * next point you give the PCI dma address back to the card, you
589 * must first perform a pci_dma_sync_for_device, and then the
590 * device again owns the buffer.
591 */
ee664a92
FT
592static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
593 size_t size, enum dma_data_direction dir)
1da177e4 594{
ee664a92 595 if (dir != PCI_DMA_TODEVICE) {
d81f087f 596 dma_make_coherent(ba, PAGE_ALIGN(size));
1da177e4
LT
597 }
598}
599
ee664a92
FT
600static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba,
601 size_t size, enum dma_data_direction dir)
1da177e4 602{
ee664a92 603 if (dir != PCI_DMA_TODEVICE) {
d81f087f 604 dma_make_coherent(ba, PAGE_ALIGN(size));
1da177e4
LT
605 }
606}
607
608/* Make physical memory consistent for a set of streaming
609 * mode DMA translations after a transfer.
610 *
611 * The same as pci_dma_sync_single_* but for a scatter-gather list,
612 * same rules and usage.
613 */
ee664a92
FT
614static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
615 int nents, enum dma_data_direction dir)
1da177e4 616{
0912a5db 617 struct scatterlist *sg;
1da177e4
LT
618 int n;
619
ee664a92 620 if (dir != PCI_DMA_TODEVICE) {
0912a5db 621 for_each_sg(sgl, sg, nents, n) {
d81f087f 622 dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
1da177e4
LT
623 }
624 }
625}
626
ee664a92
FT
627static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl,
628 int nents, enum dma_data_direction dir)
1da177e4 629{
0912a5db 630 struct scatterlist *sg;
1da177e4
LT
631 int n;
632
ee664a92 633 if (dir != PCI_DMA_TODEVICE) {
0912a5db 634 for_each_sg(sgl, sg, nents, n) {
d81f087f 635 dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
1da177e4
LT
636 }
637 }
638}
ee664a92
FT
639
640struct dma_map_ops pci32_dma_ops = {
c416258a
AP
641 .alloc = pci32_alloc_coherent,
642 .free = pci32_free_coherent,
ee664a92 643 .map_page = pci32_map_page,
b8682cef 644 .unmap_page = pci32_unmap_page,
ee664a92
FT
645 .map_sg = pci32_map_sg,
646 .unmap_sg = pci32_unmap_sg,
647 .sync_single_for_cpu = pci32_sync_single_for_cpu,
648 .sync_single_for_device = pci32_sync_single_for_device,
649 .sync_sg_for_cpu = pci32_sync_sg_for_cpu,
650 .sync_sg_for_device = pci32_sync_sg_for_device,
651};
652EXPORT_SYMBOL(pci32_dma_ops);
653
87e677c4
SR
654/* leon re-uses pci32_dma_ops */
655struct dma_map_ops *leon_dma_ops = &pci32_dma_ops;
d4511e69 656EXPORT_SYMBOL(leon_dma_ops);
18304746 657
d4511e69 658struct dma_map_ops *dma_ops = &sbus_dma_ops;
18304746
KG
659EXPORT_SYMBOL(dma_ops);
660
1da177e4 661
451d7400
FT
662/*
663 * Return whether the given PCI device DMA address mask can be
664 * supported properly. For example, if your device can only drive the
665 * low 24-bits during PCI bus mastering, then you would pass
666 * 0x00ffffff as the mask to this function.
667 */
668int dma_supported(struct device *dev, u64 mask)
669{
bf70053c 670 if (dev_is_pci(dev))
451d7400 671 return 1;
bf70053c 672
451d7400
FT
673 return 0;
674}
675EXPORT_SYMBOL(dma_supported);
676
1da177e4
LT
677#ifdef CONFIG_PROC_FS
678
e7a088f9 679static int sparc_io_proc_show(struct seq_file *m, void *v)
1da177e4 680{
e7a088f9 681 struct resource *root = m->private, *r;
1da177e4
LT
682 const char *nm;
683
e7a088f9 684 for (r = root->child; r != NULL; r = r->sibling) {
c31f7651 685 if ((nm = r->name) == NULL) nm = "???";
e7a088f9 686 seq_printf(m, "%016llx-%016llx: %s\n",
685143ac
GKH
687 (unsigned long long)r->start,
688 (unsigned long long)r->end, nm);
1da177e4
LT
689 }
690
e7a088f9 691 return 0;
1da177e4
LT
692}
693
e7a088f9
AD
694static int sparc_io_proc_open(struct inode *inode, struct file *file)
695{
d9dda78b 696 return single_open(file, sparc_io_proc_show, PDE_DATA(inode));
e7a088f9
AD
697}
698
699static const struct file_operations sparc_io_proc_fops = {
700 .owner = THIS_MODULE,
701 .open = sparc_io_proc_open,
702 .read = seq_read,
703 .llseek = seq_lseek,
704 .release = single_release,
705};
1da177e4
LT
706#endif /* CONFIG_PROC_FS */
707
c61c65cd 708static void register_proc_sparc_ioport(void)
1da177e4
LT
709{
710#ifdef CONFIG_PROC_FS
e7a088f9
AD
711 proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap);
712 proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma);
1da177e4
LT
713#endif
714}