[linux-2.6-block.git] / arch / sparc / include / asm / cacheflush_64.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _SPARC64_CACHEFLUSH_H
#define _SPARC64_CACHEFLUSH_H

#include <asm/page.h>

#ifndef __ASSEMBLY__

#include <linux/mm.h>

/* Cache flush operations. */
#define flushw_all()	__asm__ __volatile__("flushw")

void __flushw_user(void);
#define flushw_user() __flushw_user()

#define flush_user_windows flushw_user
#define flush_register_windows flushw_all

/* These are the same regardless of whether this is an SMP kernel or not. */
#define flush_cache_mm(__mm) \
	do { if ((__mm) == current->mm) flushw_user(); } while(0)
#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
#define flush_cache_range(vma, start, end) \
	flush_cache_mm((vma)->vm_mm)
#define flush_cache_page(vma, page, pfn) \
	flush_cache_mm((vma)->vm_mm)

/*
 * On spitfire, the icache doesn't snoop local stores and we don't
 * use block commit stores (which invalidate icache lines) during
 * module load, so we need this.
 */
void flush_icache_range(unsigned long start, unsigned long end);
void __flush_icache_page(unsigned long);

void __flush_dcache_page(void *addr, int flush_icache);
void flush_dcache_page_impl(struct page *page);
#ifdef CONFIG_SMP
void smp_flush_dcache_page_impl(struct page *page, int cpu);
void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
#else
#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
#endif

void __flush_dcache_range(unsigned long start, unsigned long end);
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
void flush_dcache_page(struct page *page);

#define flush_icache_page(vma, pg)	do { } while(0)
#define flush_icache_user_range(vma,pg,adr,len)	do { } while (0)

void flush_ptrace_access(struct vm_area_struct *, struct page *,
			 unsigned long uaddr, void *kaddr,
			 unsigned long len, int write);

#define copy_to_user_page(vma, page, vaddr, dst, src, len)		\
	do {								\
		flush_cache_page(vma, vaddr, page_to_pfn(page));	\
		memcpy(dst, src, len);					\
		flush_ptrace_access(vma, page, vaddr, src, len, 0);	\
	} while (0)

#define copy_from_user_page(vma, page, vaddr, dst, src, len) 		\
	do {								\
		flush_cache_page(vma, vaddr, page_to_pfn(page));	\
		memcpy(dst, src, len);					\
		flush_ptrace_access(vma, page, vaddr, dst, len, 1);	\
	} while (0)

#define flush_dcache_mmap_lock(mapping)		do { } while (0)
#define flush_dcache_mmap_unlock(mapping)	do { } while (0)

#define flush_cache_vmap(start, end)		do { } while (0)
#define flush_cache_vunmap(start, end)		do { } while (0)

#endif /* !__ASSEMBLY__ */

#endif /* _SPARC64_CACHEFLUSH_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
f5e706ad SR	2	#ifndef _SPARC64_CACHEFLUSH_H
	3	#define _SPARC64_CACHEFLUSH_H
	4
	5	#include <asm/page.h>
	6
	7	#ifndef __ASSEMBLY__
	8
	9	#include <linux/mm.h>
	10
	11	/* Cache flush operations. */
d550bbd4 DH	12	#define flushw_all() __asm__ __volatile__("flushw")
d550bbd4 DH	13
f05a6865	14	void __flushw_user(void);
d550bbd4 DH	15	#define flushw_user() __flushw_user()
	16
	17	#define flush_user_windows flushw_user
	18	#define flush_register_windows flushw_all
	19
f5e706ad SR	20	/* These are the same regardless of whether this is an SMP kernel or not. */
	21	#define flush_cache_mm(__mm) \
	22	do { if ((__mm) == current->mm) flushw_user(); } while(0)
	23	#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
	24	#define flush_cache_range(vma, start, end) \
	25	flush_cache_mm((vma)->vm_mm)
	26	#define flush_cache_page(vma, page, pfn) \
	27	flush_cache_mm((vma)->vm_mm)
	28
	29	/*
	30	* On spitfire, the icache doesn't snoop local stores and we don't
	31	* use block commit stores (which invalidate icache lines) during
	32	* module load, so we need this.
	33	*/
f05a6865 SR	34	void flush_icache_range(unsigned long start, unsigned long end);
f05a6865 SR	35	void __flush_icache_page(unsigned long);
f5e706ad	36
f05a6865 SR	37	void __flush_dcache_page(void *addr, int flush_icache);
f05a6865 SR	38	void flush_dcache_page_impl(struct page *page);
f5e706ad	39	#ifdef CONFIG_SMP
f05a6865 SR	40	void smp_flush_dcache_page_impl(struct page *page, int cpu);
f05a6865 SR	41	void flush_dcache_page_all(struct mm_struct mm, struct page page);
f5e706ad SR	42	#else
	43	#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
	44	#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
	45	#endif
	46
f05a6865	47	void __flush_dcache_range(unsigned long start, unsigned long end);
2d4dc890	48	#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
f05a6865	49	void flush_dcache_page(struct page *page);
f5e706ad SR	50
	51	#define flush_icache_page(vma, pg) do { } while(0)
	52	#define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
	53
f05a6865 SR	54	void flush_ptrace_access(struct vm_area_struct , struct page ,
	55	unsigned long uaddr, void *kaddr,
	56	unsigned long len, int write);
f5e706ad SR	57
	58	#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
	59	do { \
	60	flush_cache_page(vma, vaddr, page_to_pfn(page)); \
	61	memcpy(dst, src, len); \
	62	flush_ptrace_access(vma, page, vaddr, src, len, 0); \
	63	} while (0)
	64
	65	#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
	66	do { \
	67	flush_cache_page(vma, vaddr, page_to_pfn(page)); \
	68	memcpy(dst, src, len); \
	69	flush_ptrace_access(vma, page, vaddr, dst, len, 1); \
	70	} while (0)
	71
	72	#define flush_dcache_mmap_lock(mapping) do { } while (0)
	73	#define flush_dcache_mmap_unlock(mapping) do { } while (0)
	74
	75	#define flush_cache_vmap(start, end) do { } while (0)
	76	#define flush_cache_vunmap(start, end) do { } while (0)
	77
f5e706ad SR	78	#endif /* !__ASSEMBLY__ */
	79
	80	#endif /* _SPARC64_CACHEFLUSH_H */