Commit | Line | Data |
---|---|---|
26ff6c11 PM |
1 | /* |
2 | * Page fault handler for SH with an MMU. | |
1da177e4 | 3 | * |
1da177e4 | 4 | * Copyright (C) 1999 Niibe Yutaka |
3a2e117e | 5 | * Copyright (C) 2003 - 2007 Paul Mundt |
1da177e4 LT |
6 | * |
7 | * Based on linux/arch/i386/mm/fault.c: | |
8 | * Copyright (C) 1995 Linus Torvalds | |
26ff6c11 PM |
9 | * |
10 | * This file is subject to the terms and conditions of the GNU General Public | |
11 | * License. See the file "COPYING" in the main directory of this archive | |
12 | * for more details. | |
1da177e4 | 13 | */ |
1da177e4 | 14 | #include <linux/kernel.h> |
1da177e4 | 15 | #include <linux/mm.h> |
0f08f338 PM |
16 | #include <linux/hardirq.h> |
17 | #include <linux/kprobes.h> | |
e7cc9a73 | 18 | #include <asm/io_trapped.h> |
1da177e4 | 19 | #include <asm/system.h> |
1da177e4 | 20 | #include <asm/mmu_context.h> |
db2e1fa3 | 21 | #include <asm/tlbflush.h> |
1da177e4 LT |
22 | #include <asm/kgdb.h> |
23 | ||
1da177e4 LT |
24 | /* |
25 | * This routine handles page faults. It determines the address, | |
26 | * and the problem, and then passes it off to one of the appropriate | |
27 | * routines. | |
28 | */ | |
b5a1bcbe SM |
29 | asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, |
30 | unsigned long writeaccess, | |
31 | unsigned long address) | |
1da177e4 LT |
32 | { |
33 | struct task_struct *tsk; | |
34 | struct mm_struct *mm; | |
35 | struct vm_area_struct * vma; | |
b5a1bcbe | 36 | int si_code; |
83c54070 | 37 | int fault; |
b5a1bcbe | 38 | siginfo_t info; |
1da177e4 LT |
39 | |
40 | #ifdef CONFIG_SH_KGDB | |
41 | if (kgdb_nofault && kgdb_bus_err_hook) | |
42 | kgdb_bus_err_hook(); | |
43 | #endif | |
44 | ||
45 | tsk = current; | |
b5a1bcbe | 46 | si_code = SEGV_MAPERR; |
1da177e4 | 47 | |
99a596f9 SM |
48 | if (unlikely(address >= TASK_SIZE)) { |
49 | /* | |
50 | * Synchronize this task's top level page-table | |
51 | * with the 'reference' page table. | |
52 | * | |
53 | * Do _not_ use "tsk" here. We might be inside | |
54 | * an interrupt in the middle of a task switch.. | |
55 | */ | |
56 | int offset = pgd_index(address); | |
57 | pgd_t *pgd, *pgd_k; | |
58 | pud_t *pud, *pud_k; | |
59 | pmd_t *pmd, *pmd_k; | |
60 | ||
61 | pgd = get_TTB() + offset; | |
62 | pgd_k = swapper_pg_dir + offset; | |
63 | ||
99a596f9 SM |
64 | if (!pgd_present(*pgd)) { |
65 | if (!pgd_present(*pgd_k)) | |
66 | goto bad_area_nosemaphore; | |
67 | set_pgd(pgd, *pgd_k); | |
68 | return; | |
69 | } | |
70 | ||
71 | pud = pud_offset(pgd, address); | |
72 | pud_k = pud_offset(pgd_k, address); | |
96e14e54 SM |
73 | |
74 | if (!pud_present(*pud)) { | |
75 | if (!pud_present(*pud_k)) | |
76 | goto bad_area_nosemaphore; | |
77 | set_pud(pud, *pud_k); | |
78 | return; | |
79 | } | |
99a596f9 SM |
80 | |
81 | pmd = pmd_offset(pud, address); | |
82 | pmd_k = pmd_offset(pud_k, address); | |
83 | if (pmd_present(*pmd) || !pmd_present(*pmd_k)) | |
84 | goto bad_area_nosemaphore; | |
85 | set_pmd(pmd, *pmd_k); | |
86 | ||
87 | return; | |
88 | } | |
89 | ||
f2fb4e4f SM |
90 | /* Only enable interrupts if they were on before the fault */ |
91 | if ((regs->sr & SR_IMASK) != SR_IMASK) { | |
92 | trace_hardirqs_on(); | |
93 | local_irq_enable(); | |
94 | } | |
95 | ||
96 | mm = tsk->mm; | |
97 | ||
1da177e4 LT |
98 | /* |
99 | * If we're in an interrupt or have no user | |
100 | * context, we must not take the fault.. | |
101 | */ | |
102 | if (in_atomic() || !mm) | |
103 | goto no_context; | |
104 | ||
105 | down_read(&mm->mmap_sem); | |
106 | ||
107 | vma = find_vma(mm, address); | |
108 | if (!vma) | |
109 | goto bad_area; | |
110 | if (vma->vm_start <= address) | |
111 | goto good_area; | |
112 | if (!(vma->vm_flags & VM_GROWSDOWN)) | |
113 | goto bad_area; | |
114 | if (expand_stack(vma, address)) | |
115 | goto bad_area; | |
116 | /* | |
117 | * Ok, we have a good vm_area for this memory access, so | |
118 | * we can handle it.. | |
119 | */ | |
120 | good_area: | |
b5a1bcbe | 121 | si_code = SEGV_ACCERR; |
1da177e4 LT |
122 | if (writeaccess) { |
123 | if (!(vma->vm_flags & VM_WRITE)) | |
124 | goto bad_area; | |
125 | } else { | |
df67b3da | 126 | if (!(vma->vm_flags & (VM_READ | VM_EXEC | VM_WRITE))) |
1da177e4 LT |
127 | goto bad_area; |
128 | } | |
129 | ||
130 | /* | |
131 | * If for any reason at all we couldn't handle the fault, | |
132 | * make sure we exit gracefully rather than endlessly redo | |
133 | * the fault. | |
134 | */ | |
135 | survive: | |
83c54070 NP |
136 | fault = handle_mm_fault(mm, vma, address, writeaccess); |
137 | if (unlikely(fault & VM_FAULT_ERROR)) { | |
138 | if (fault & VM_FAULT_OOM) | |
1da177e4 | 139 | goto out_of_memory; |
83c54070 NP |
140 | else if (fault & VM_FAULT_SIGBUS) |
141 | goto do_sigbus; | |
142 | BUG(); | |
1da177e4 | 143 | } |
83c54070 NP |
144 | if (fault & VM_FAULT_MAJOR) |
145 | tsk->maj_flt++; | |
146 | else | |
147 | tsk->min_flt++; | |
1da177e4 LT |
148 | |
149 | up_read(&mm->mmap_sem); | |
150 | return; | |
151 | ||
152 | /* | |
153 | * Something tried to access memory that isn't in our memory map.. | |
154 | * Fix it, but check if it's kernel or user first.. | |
155 | */ | |
156 | bad_area: | |
157 | up_read(&mm->mmap_sem); | |
158 | ||
99a596f9 | 159 | bad_area_nosemaphore: |
1da177e4 | 160 | if (user_mode(regs)) { |
b5a1bcbe SM |
161 | info.si_signo = SIGSEGV; |
162 | info.si_errno = 0; | |
163 | info.si_code = si_code; | |
164 | info.si_addr = (void *) address; | |
165 | force_sig_info(SIGSEGV, &info, tsk); | |
1da177e4 LT |
166 | return; |
167 | } | |
168 | ||
169 | no_context: | |
170 | /* Are we prepared to handle this kernel fault? */ | |
171 | if (fixup_exception(regs)) | |
172 | return; | |
173 | ||
e7cc9a73 MD |
174 | if (handle_trapped_io(regs, address)) |
175 | return; | |
1da177e4 LT |
176 | /* |
177 | * Oops. The kernel tried to access some bad page. We'll have to | |
178 | * terminate things with extreme prejudice. | |
179 | * | |
180 | */ | |
0630e45c PM |
181 | |
182 | bust_spinlocks(1); | |
183 | ||
184 | if (oops_may_print()) { | |
b62ad83d | 185 | unsigned long page; |
0630e45c PM |
186 | |
187 | if (address < PAGE_SIZE) | |
188 | printk(KERN_ALERT "Unable to handle kernel NULL " | |
189 | "pointer dereference"); | |
190 | else | |
191 | printk(KERN_ALERT "Unable to handle kernel paging " | |
192 | "request"); | |
193 | printk(" at virtual address %08lx\n", address); | |
194 | printk(KERN_ALERT "pc = %08lx\n", regs->pc); | |
195 | page = (unsigned long)get_TTB(); | |
196 | if (page) { | |
06f862c8 | 197 | page = ((__typeof__(page) *)page)[address >> PGDIR_SHIFT]; |
0630e45c PM |
198 | printk(KERN_ALERT "*pde = %08lx\n", page); |
199 | if (page & _PAGE_PRESENT) { | |
200 | page &= PAGE_MASK; | |
201 | address &= 0x003ff000; | |
202 | page = ((__typeof__(page) *) | |
203 | __va(page))[address >> | |
204 | PAGE_SHIFT]; | |
205 | printk(KERN_ALERT "*pte = %08lx\n", page); | |
206 | } | |
1da177e4 LT |
207 | } |
208 | } | |
0630e45c | 209 | |
1da177e4 | 210 | die("Oops", regs, writeaccess); |
0630e45c | 211 | bust_spinlocks(0); |
1da177e4 LT |
212 | do_exit(SIGKILL); |
213 | ||
214 | /* | |
215 | * We ran out of memory, or some other thing happened to us that made | |
216 | * us unable to handle the page fault gracefully. | |
217 | */ | |
218 | out_of_memory: | |
219 | up_read(&mm->mmap_sem); | |
b460cbc5 | 220 | if (is_global_init(current)) { |
1da177e4 LT |
221 | yield(); |
222 | down_read(&mm->mmap_sem); | |
223 | goto survive; | |
224 | } | |
225 | printk("VM: killing process %s\n", tsk->comm); | |
226 | if (user_mode(regs)) | |
dcca2bde | 227 | do_group_exit(SIGKILL); |
1da177e4 LT |
228 | goto no_context; |
229 | ||
230 | do_sigbus: | |
231 | up_read(&mm->mmap_sem); | |
232 | ||
233 | /* | |
234 | * Send a sigbus, regardless of whether we were in kernel | |
235 | * or user mode. | |
236 | */ | |
b5a1bcbe SM |
237 | info.si_signo = SIGBUS; |
238 | info.si_errno = 0; | |
239 | info.si_code = BUS_ADRERR; | |
240 | info.si_addr = (void *)address; | |
241 | force_sig_info(SIGBUS, &info, tsk); | |
1da177e4 LT |
242 | |
243 | /* Kernel mode? Handle exceptions or die */ | |
244 | if (!user_mode(regs)) | |
245 | goto no_context; | |
246 | } | |
db2e1fa3 PM |
247 | |
248 | #ifdef CONFIG_SH_STORE_QUEUES | |
249 | /* | |
250 | * This is a special case for the SH-4 store queues, as pages for this | |
251 | * space still need to be faulted in before it's possible to flush the | |
252 | * store queue cache for writeout to the remapped region. | |
253 | */ | |
254 | #define P3_ADDR_MAX (P4SEG_STORE_QUE + 0x04000000) | |
255 | #else | |
256 | #define P3_ADDR_MAX P4SEG | |
257 | #endif | |
258 | ||
259 | /* | |
260 | * Called with interrupts disabled. | |
261 | */ | |
262 | asmlinkage int __kprobes __do_page_fault(struct pt_regs *regs, | |
263 | unsigned long writeaccess, | |
264 | unsigned long address) | |
265 | { | |
266 | pgd_t *pgd; | |
267 | pud_t *pud; | |
268 | pmd_t *pmd; | |
269 | pte_t *pte; | |
270 | pte_t entry; | |
db2e1fa3 PM |
271 | |
272 | #ifdef CONFIG_SH_KGDB | |
273 | if (kgdb_nofault && kgdb_bus_err_hook) | |
274 | kgdb_bus_err_hook(); | |
275 | #endif | |
276 | ||
277 | /* | |
278 | * We don't take page faults for P1, P2, and parts of P4, these | |
279 | * are always mapped, whether it be due to legacy behaviour in | |
280 | * 29-bit mode, or due to PMB configuration in 32-bit mode. | |
281 | */ | |
282 | if (address >= P3SEG && address < P3_ADDR_MAX) { | |
283 | pgd = pgd_offset_k(address); | |
db2e1fa3 | 284 | } else { |
0f1a394b | 285 | if (unlikely(address >= TASK_SIZE || !current->mm)) |
db2e1fa3 PM |
286 | return 1; |
287 | ||
0f1a394b | 288 | pgd = pgd_offset(current->mm, address); |
db2e1fa3 PM |
289 | } |
290 | ||
291 | pud = pud_offset(pgd, address); | |
292 | if (pud_none_or_clear_bad(pud)) | |
293 | return 1; | |
294 | pmd = pmd_offset(pud, address); | |
295 | if (pmd_none_or_clear_bad(pmd)) | |
296 | return 1; | |
297 | ||
0f1a394b | 298 | pte = pte_offset_kernel(pmd, address); |
db2e1fa3 PM |
299 | entry = *pte; |
300 | if (unlikely(pte_none(entry) || pte_not_present(entry))) | |
0f1a394b | 301 | return 1; |
db2e1fa3 | 302 | if (unlikely(writeaccess && !pte_write(entry))) |
0f1a394b | 303 | return 1; |
db2e1fa3 PM |
304 | |
305 | if (writeaccess) | |
306 | entry = pte_mkdirty(entry); | |
307 | entry = pte_mkyoung(entry); | |
308 | ||
a602cc05 HS |
309 | #if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP) |
310 | /* | |
311 | * ITLB is not affected by "ldtlb" instruction. | |
312 | * So, we need to flush the entry by ourselves. | |
313 | */ | |
314 | local_flush_tlb_one(get_asid(), address & PAGE_MASK); | |
315 | #endif | |
316 | ||
db2e1fa3 PM |
317 | set_pte(pte, entry); |
318 | update_mmu_cache(NULL, address, entry); | |
0f1a394b PM |
319 | |
320 | return 0; | |
db2e1fa3 | 321 | } |