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41504c39 PM |
1 | /* |
2 | * SH7722 Setup | |
3 | * | |
520588f4 | 4 | * Copyright (C) 2006 - 2007 Paul Mundt |
41504c39 PM |
5 | * |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
10 | #include <linux/platform_device.h> | |
11 | #include <linux/init.h> | |
12 | #include <linux/serial.h> | |
520588f4 | 13 | #include <linux/mm.h> |
5bbeafca | 14 | #include <asm/mmzone.h> |
41504c39 PM |
15 | #include <asm/sci.h> |
16 | ||
17 | static struct plat_sci_port sci_platform_data[] = { | |
18 | { | |
19 | .mapbase = 0xffe00000, | |
20 | .flags = UPF_BOOT_AUTOCONF, | |
21 | .type = PORT_SCIF, | |
53aba19f MD |
22 | .irqs = { 80, 80, 80, 80 }, |
23 | }, | |
24 | { | |
25 | .mapbase = 0xffe10000, | |
26 | .flags = UPF_BOOT_AUTOCONF, | |
27 | .type = PORT_SCIF, | |
28 | .irqs = { 81, 81, 81, 81 }, | |
29 | }, | |
30 | { | |
31 | .mapbase = 0xffe20000, | |
32 | .flags = UPF_BOOT_AUTOCONF, | |
33 | .type = PORT_SCIF, | |
34 | .irqs = { 82, 82, 82, 82 }, | |
35 | }, | |
36 | { | |
41504c39 PM |
37 | .flags = 0, |
38 | } | |
39 | }; | |
40 | ||
41 | static struct platform_device sci_device = { | |
42 | .name = "sh-sci", | |
43 | .id = -1, | |
44 | .dev = { | |
45 | .platform_data = sci_platform_data, | |
46 | }, | |
47 | }; | |
48 | ||
49 | static struct platform_device *sh7722_devices[] __initdata = { | |
50 | &sci_device, | |
51 | }; | |
52 | ||
53 | static int __init sh7722_devices_setup(void) | |
54 | { | |
55 | return platform_add_devices(sh7722_devices, | |
56 | ARRAY_SIZE(sh7722_devices)); | |
57 | } | |
58 | __initcall(sh7722_devices_setup); | |
59 | ||
68abdbbb | 60 | static struct ipr_data ipr_irq_table[] = { |
41504c39 PM |
61 | /* IRQ, IPR-idx, shift, prio */ |
62 | { 16, 0, 12, 2 }, /* TMU0 */ | |
63 | { 17, 0, 8, 2 }, /* TMU1 */ | |
53aba19f MD |
64 | { 80, 6, 12, 3 }, /* SCIF0 */ |
65 | { 81, 6, 8, 3 }, /* SCIF1 */ | |
66 | { 82, 6, 4, 3 }, /* SCIF2 */ | |
41504c39 PM |
67 | }; |
68 | ||
69 | static unsigned long ipr_offsets[] = { | |
70 | 0xa4080000, /* 0: IPRA */ | |
71 | 0xa4080004, /* 1: IPRB */ | |
72 | 0xa4080008, /* 2: IPRC */ | |
73 | 0xa408000c, /* 3: IPRD */ | |
74 | 0xa4080010, /* 4: IPRE */ | |
75 | 0xa4080014, /* 5: IPRF */ | |
76 | 0xa4080018, /* 6: IPRG */ | |
77 | 0xa408001c, /* 7: IPRH */ | |
78 | 0xa4080020, /* 8: IPRI */ | |
79 | 0xa4080024, /* 9: IPRJ */ | |
80 | 0xa4080028, /* 10: IPRK */ | |
81 | 0xa408002c, /* 11: IPRL */ | |
82 | }; | |
83 | ||
68abdbbb MD |
84 | static struct ipr_desc ipr_irq_desc = { |
85 | .ipr_offsets = ipr_offsets, | |
86 | .nr_offsets = ARRAY_SIZE(ipr_offsets), | |
87 | ||
88 | .ipr_data = ipr_irq_table, | |
89 | .nr_irqs = ARRAY_SIZE(ipr_irq_table), | |
90 | ||
91 | .chip = { | |
92 | .name = "IPR-sh7722", | |
93 | }, | |
94 | }; | |
41504c39 PM |
95 | |
96 | void __init init_IRQ_ipr(void) | |
97 | { | |
68abdbbb | 98 | register_ipr_controller(&ipr_irq_desc); |
41504c39 | 99 | } |
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100 | |
101 | void __init plat_mem_setup(void) | |
102 | { | |
103 | /* Register the URAM space as Node 1 */ | |
104 | setup_bootmem_node(1, 0x055f0000, 0x05610000); | |
105 | } |