[linux-2.6-block.git] / arch / sh / kernel / cpu / clock.c

/*
 * arch/sh/kernel/cpu/clock.c - SuperH clock framework
 *
 *  Copyright (C) 2005 - 2009  Paul Mundt
 *
 * This clock framework is derived from the OMAP version by:
 *
 *	Copyright (C) 2004 - 2008 Nokia Corporation
 *	Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
 *
 *  Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
 *
 *  With clkdev bits:
 *
 *	Copyright (C) 2008 Russell King.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/list.h>
#include <linux/kobject.h>
#include <linux/sysdev.h>
#include <linux/seq_file.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/debugfs.h>
#include <linux/cpufreq.h>
#include <asm/clock.h>
#include <asm/machvec.h>

static LIST_HEAD(clock_list);
static DEFINE_SPINLOCK(clock_lock);
static DEFINE_MUTEX(clock_list_sem);

void clk_rate_table_build(struct clk *clk,
			  struct cpufreq_frequency_table *freq_table,
			  int nr_freqs,
			  struct clk_div_mult_table *src_table,
			  unsigned long *bitmap)
{
	unsigned long mult, div;
	unsigned long freq;
	int i;

	for (i = 0; i < nr_freqs; i++) {
		div = 1;
		mult = 1;

		if (src_table->divisors && i < src_table->nr_divisors)
			div = src_table->divisors[i];

		if (src_table->multipliers && i < src_table->nr_multipliers)
			mult = src_table->multipliers[i];

		if (!div || !mult || (bitmap && !test_bit(i, bitmap)))
			freq = CPUFREQ_ENTRY_INVALID;
		else
			freq = clk->parent->rate * mult / div;

		freq_table[i].index = i;
		freq_table[i].frequency = freq;
	}

	/* Termination entry */
	freq_table[i].index = i;
	freq_table[i].frequency = CPUFREQ_TABLE_END;
}

long clk_rate_table_round(struct clk *clk,
			  struct cpufreq_frequency_table *freq_table,
			  unsigned long rate)
{
	unsigned long rate_error, rate_error_prev = ~0UL;
	unsigned long rate_best_fit = rate;
	unsigned long highest, lowest;
	int i;

	highest = lowest = 0;

	for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
		unsigned long freq = freq_table[i].frequency;

		if (freq == CPUFREQ_ENTRY_INVALID)
			continue;

		if (freq > highest)
			highest = freq;
		if (freq < lowest)
			lowest = freq;

		rate_error = abs(freq - rate);
		if (rate_error < rate_error_prev) {
			rate_best_fit = freq;
			rate_error_prev = rate_error;
		}

		if (rate_error == 0)
			break;
	}

	if (rate >= highest)
		rate_best_fit = highest;
	if (rate <= lowest)
		rate_best_fit = lowest;

	return rate_best_fit;
}

int clk_rate_table_find(struct clk *clk,
			struct cpufreq_frequency_table *freq_table,
			unsigned long rate)
{
	int i;

	for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
		unsigned long freq = freq_table[i].frequency;

		if (freq == CPUFREQ_ENTRY_INVALID)
			continue;

		if (freq == rate)
			return i;
	}

	return -ENOENT;
}

/* Used for clocks that always have same value as the parent clock */
unsigned long followparent_recalc(struct clk *clk)
{
	return clk->parent ? clk->parent->rate : 0;
}

int clk_reparent(struct clk *child, struct clk *parent)
{
	list_del_init(&child->sibling);
	if (parent)
		list_add(&child->sibling, &parent->children);
	child->parent = parent;

	/* now do the debugfs renaming to reattach the child
	   to the proper parent */

	return 0;
}

/* Propagate rate to children */
void propagate_rate(struct clk *tclk)
{
	struct clk *clkp;

	list_for_each_entry(clkp, &tclk->children, sibling) {
		if (clkp->ops && clkp->ops->recalc)
			clkp->rate = clkp->ops->recalc(clkp);

		propagate_rate(clkp);
	}
}

static void __clk_disable(struct clk *clk)
{
	if (clk->usecount == 0) {
		printk(KERN_ERR "Trying disable clock %s with 0 usecount\n",
		       clk->name);
		WARN_ON(1);
		return;
	}

	if (!(--clk->usecount)) {
		if (likely(clk->ops && clk->ops->disable))
			clk->ops->disable(clk);
		if (likely(clk->parent))
			__clk_disable(clk->parent);
	}
}

void clk_disable(struct clk *clk)
{
	unsigned long flags;

	if (!clk)
		return;

	spin_lock_irqsave(&clock_lock, flags);
	__clk_disable(clk);
	spin_unlock_irqrestore(&clock_lock, flags);
}
EXPORT_SYMBOL_GPL(clk_disable);

static int __clk_enable(struct clk *clk)
{
	int ret = 0;

	if (clk->usecount++ == 0) {
		if (clk->parent) {
			ret = __clk_enable(clk->parent);
			if (unlikely(ret))
				goto err;
		}

		if (clk->ops && clk->ops->enable) {
			ret = clk->ops->enable(clk);
			if (ret) {
				if (clk->parent)
					__clk_disable(clk->parent);
				goto err;
			}
		}
	}

	return ret;
err:
	clk->usecount--;
	return ret;
}

int clk_enable(struct clk *clk)
{
	unsigned long flags;
	int ret;

	if (!clk)
		return -EINVAL;

	spin_lock_irqsave(&clock_lock, flags);
	ret = __clk_enable(clk);
	spin_unlock_irqrestore(&clock_lock, flags);

	return ret;
}
EXPORT_SYMBOL_GPL(clk_enable);

static LIST_HEAD(root_clks);

/**
 * recalculate_root_clocks - recalculate and propagate all root clocks
 *
 * Recalculates all root clocks (clocks with no parent), which if the
 * clock's .recalc is set correctly, should also propagate their rates.
 * Called at init.
 */
void recalculate_root_clocks(void)
{
	struct clk *clkp;

	list_for_each_entry(clkp, &root_clks, sibling) {
		if (clkp->ops && clkp->ops->recalc)
			clkp->rate = clkp->ops->recalc(clkp);
		propagate_rate(clkp);
	}
}

int clk_register(struct clk *clk)
{
	if (clk == NULL || IS_ERR(clk))
		return -EINVAL;

	/*
	 * trap out already registered clocks
	 */
	if (clk->node.next || clk->node.prev)
		return 0;

	mutex_lock(&clock_list_sem);

	INIT_LIST_HEAD(&clk->children);
	clk->usecount = 0;

	if (clk->parent)
		list_add(&clk->sibling, &clk->parent->children);
	else
		list_add(&clk->sibling, &root_clks);

	list_add(&clk->node, &clock_list);
	if (clk->ops && clk->ops->init)
		clk->ops->init(clk);
	mutex_unlock(&clock_list_sem);

	return 0;
}
EXPORT_SYMBOL_GPL(clk_register);

void clk_unregister(struct clk *clk)
{
	mutex_lock(&clock_list_sem);
	list_del(&clk->sibling);
	list_del(&clk->node);
	mutex_unlock(&clock_list_sem);
}
EXPORT_SYMBOL_GPL(clk_unregister);

static void clk_enable_init_clocks(void)
{
	struct clk *clkp;

	list_for_each_entry(clkp, &clock_list, node)
		if (clkp->flags & CLK_ENABLE_ON_INIT)
			clk_enable(clkp);
}

unsigned long clk_get_rate(struct clk *clk)
{
	return clk->rate;
}
EXPORT_SYMBOL_GPL(clk_get_rate);

int clk_set_rate(struct clk *clk, unsigned long rate)
{
	return clk_set_rate_ex(clk, rate, 0);
}
EXPORT_SYMBOL_GPL(clk_set_rate);

int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
{
	int ret = -EOPNOTSUPP;
	unsigned long flags;

	spin_lock_irqsave(&clock_lock, flags);

	if (likely(clk->ops && clk->ops->set_rate)) {
		ret = clk->ops->set_rate(clk, rate, algo_id);
		if (ret != 0)
			goto out_unlock;
	} else {
		clk->rate = rate;
		ret = 0;
	}

	if (clk->ops && clk->ops->recalc)
		clk->rate = clk->ops->recalc(clk);

	propagate_rate(clk);

out_unlock:
	spin_unlock_irqrestore(&clock_lock, flags);

	return ret;
}
EXPORT_SYMBOL_GPL(clk_set_rate_ex);

int clk_set_parent(struct clk *clk, struct clk *parent)
{
	unsigned long flags;
	int ret = -EINVAL;

	if (!parent || !clk)
		return ret;
	if (clk->parent == parent)
		return 0;

	spin_lock_irqsave(&clock_lock, flags);
	if (clk->usecount == 0) {
		if (clk->ops->set_parent)
			ret = clk->ops->set_parent(clk, parent);
		else
			ret = clk_reparent(clk, parent);

		if (ret == 0) {
			pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
				 clk->name, clk->parent->name, clk->rate);
			if (clk->ops->recalc)
				clk->rate = clk->ops->recalc(clk);
			propagate_rate(clk);
		}
	} else
		ret = -EBUSY;
	spin_unlock_irqrestore(&clock_lock, flags);

	return ret;
}
EXPORT_SYMBOL_GPL(clk_set_parent);

struct clk *clk_get_parent(struct clk *clk)
{
	return clk->parent;
}
EXPORT_SYMBOL_GPL(clk_get_parent);

long clk_round_rate(struct clk *clk, unsigned long rate)
{
	if (likely(clk->ops && clk->ops->round_rate)) {
		unsigned long flags, rounded;

		spin_lock_irqsave(&clock_lock, flags);
		rounded = clk->ops->round_rate(clk, rate);
		spin_unlock_irqrestore(&clock_lock, flags);

		return rounded;
	}

	return clk_get_rate(clk);
}
EXPORT_SYMBOL_GPL(clk_round_rate);

/*
 * Find the correct struct clk for the device and connection ID.
 * We do slightly fuzzy matching here:
 *  An entry with a NULL ID is assumed to be a wildcard.
 *  If an entry has a device ID, it must match
 *  If an entry has a connection ID, it must match
 * Then we take the most specific entry - with the following
 * order of precedence: dev+con > dev only > con only.
 */
static struct clk *clk_find(const char *dev_id, const char *con_id)
{
	struct clk_lookup *p;
	struct clk *clk = NULL;
	int match, best = 0;

	list_for_each_entry(p, &clock_list, node) {
		match = 0;
		if (p->dev_id) {
			if (!dev_id || strcmp(p->dev_id, dev_id))
				continue;
			match += 2;
		}
		if (p->con_id) {
			if (!con_id || strcmp(p->con_id, con_id))
				continue;
			match += 1;
		}
		if (match == 0)
			continue;

		if (match > best) {
			clk = p->clk;
			best = match;
		}
	}
	return clk;
}

struct clk *clk_get_sys(const char *dev_id, const char *con_id)
{
	struct clk *clk;

	mutex_lock(&clock_list_sem);
	clk = clk_find(dev_id, con_id);
	mutex_unlock(&clock_list_sem);

	return clk ? clk : ERR_PTR(-ENOENT);
}
EXPORT_SYMBOL_GPL(clk_get_sys);

/*
 * Returns a clock. Note that we first try to use device id on the bus
 * and clock name. If this fails, we try to use clock name only.
 */
struct clk *clk_get(struct device *dev, const char *id)
{
	const char *dev_id = dev ? dev_name(dev) : NULL;
	struct clk *p, *clk = ERR_PTR(-ENOENT);
	int idno;

	clk = clk_get_sys(dev_id, id);
	if (clk && !IS_ERR(clk))
		return clk;

	if (dev == NULL || dev->bus != &platform_bus_type)
		idno = -1;
	else
		idno = to_platform_device(dev)->id;

	mutex_lock(&clock_list_sem);
	list_for_each_entry(p, &clock_list, node) {
		if (p->id == idno &&
		    strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
			clk = p;
			goto found;
		}
	}

	list_for_each_entry(p, &clock_list, node) {
		if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
			clk = p;
			break;
		}
	}

found:
	mutex_unlock(&clock_list_sem);

	return clk;
}
EXPORT_SYMBOL_GPL(clk_get);

void clk_put(struct clk *clk)
{
	if (clk && !IS_ERR(clk))
		module_put(clk->owner);
}
EXPORT_SYMBOL_GPL(clk_put);

#ifdef CONFIG_PM
static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
{
	static pm_message_t prev_state;
	struct clk *clkp;

	switch (state.event) {
	case PM_EVENT_ON:
		/* Resumeing from hibernation */
		if (prev_state.event != PM_EVENT_FREEZE)
			break;

		list_for_each_entry(clkp, &clock_list, node) {
			if (likely(clkp->ops)) {
				unsigned long rate = clkp->rate;

				if (likely(clkp->ops->set_parent))
					clkp->ops->set_parent(clkp,
						clkp->parent);
				if (likely(clkp->ops->set_rate))
					clkp->ops->set_rate(clkp,
						rate, NO_CHANGE);
				else if (likely(clkp->ops->recalc))
					clkp->rate = clkp->ops->recalc(clkp);
			}
		}
		break;
	case PM_EVENT_FREEZE:
		break;
	case PM_EVENT_SUSPEND:
		break;
	}

	prev_state = state;
	return 0;
}

static int clks_sysdev_resume(struct sys_device *dev)
{
	return clks_sysdev_suspend(dev, PMSG_ON);
}

static struct sysdev_class clks_sysdev_class = {
	.name = "clks",
};

static struct sysdev_driver clks_sysdev_driver = {
	.suspend = clks_sysdev_suspend,
	.resume = clks_sysdev_resume,
};

static struct sys_device clks_sysdev_dev = {
	.cls = &clks_sysdev_class,
};

static int __init clk_sysdev_init(void)
{
	sysdev_class_register(&clks_sysdev_class);
	sysdev_driver_register(&clks_sysdev_class, &clks_sysdev_driver);
	sysdev_register(&clks_sysdev_dev);

	return 0;
}
subsys_initcall(clk_sysdev_init);
#endif

int __init clk_init(void)
{
	int ret;

	ret = arch_clk_init();
	if (unlikely(ret)) {
		pr_err("%s: CPU clock registration failed.\n", __func__);
		return ret;
	}

	if (sh_mv.mv_clk_init) {
		ret = sh_mv.mv_clk_init();
		if (unlikely(ret)) {
			pr_err("%s: machvec clock initialization failed.\n",
			       __func__);
			return ret;
		}
	}

	/* Kick the child clocks.. */
	recalculate_root_clocks();

	/* Enable the necessary init clocks */
	clk_enable_init_clocks();

	return ret;
}

/*
 *	debugfs support to trace clock tree hierarchy and attributes
 */
static struct dentry *clk_debugfs_root;

static int clk_debugfs_register_one(struct clk *c)
{
	int err;
	struct dentry *d, *child, *child_tmp;
	struct clk *pa = c->parent;
	char s[255];
	char *p = s;

	p += sprintf(p, "%s", c->name);
	if (c->id >= 0)
		sprintf(p, ":%d", c->id);
	d = debugfs_create_dir(s, pa ? pa->dentry : clk_debugfs_root);
	if (!d)
		return -ENOMEM;
	c->dentry = d;

	d = debugfs_create_u8("usecount", S_IRUGO, c->dentry, (u8 *)&c->usecount);
	if (!d) {
		err = -ENOMEM;
		goto err_out;
	}
	d = debugfs_create_u32("rate", S_IRUGO, c->dentry, (u32 *)&c->rate);
	if (!d) {
		err = -ENOMEM;
		goto err_out;
	}
	d = debugfs_create_x32("flags", S_IRUGO, c->dentry, (u32 *)&c->flags);
	if (!d) {
		err = -ENOMEM;
		goto err_out;
	}
	return 0;

err_out:
	d = c->dentry;
	list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
		debugfs_remove(child);
	debugfs_remove(c->dentry);
	return err;
}

static int clk_debugfs_register(struct clk *c)
{
	int err;
	struct clk *pa = c->parent;

	if (pa && !pa->dentry) {
		err = clk_debugfs_register(pa);
		if (err)
			return err;
	}

	if (!c->dentry) {
		err = clk_debugfs_register_one(c);
		if (err)
			return err;
	}
	return 0;
}

static int __init clk_debugfs_init(void)
{
	struct clk *c;
	struct dentry *d;
	int err;

	d = debugfs_create_dir("clock", NULL);
	if (!d)
		return -ENOMEM;
	clk_debugfs_root = d;

	list_for_each_entry(c, &clock_list, node) {
		err = clk_debugfs_register(c);
		if (err)
			goto err_out;
	}
	return 0;
err_out:
	debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */
	return err;
}
late_initcall(clk_debugfs_init);
Commit	Line	Data
36ddf31b PM	1	/*
	2	* arch/sh/kernel/cpu/clock.c - SuperH clock framework
	3	*
b1f6cfe4	4	* Copyright (C) 2005 - 2009 Paul Mundt
36ddf31b PM	5	*
	6	* This clock framework is derived from the OMAP version by:
	7	*
b1f6cfe4	8	* Copyright (C) 2004 - 2008 Nokia Corporation
36ddf31b PM	9	* Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
36ddf31b PM	10	*
1d118562 PM	11	* Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
1d118562 PM	12	*
0dae8957 PM	13	* With clkdev bits:
	14	*
	15	* Copyright (C) 2008 Russell King.
	16	*
36ddf31b PM	17	* This file is subject to the terms and conditions of the GNU General Public
	18	* License. See the file "COPYING" in the main directory of this archive
	19	* for more details.
	20	*/
	21	#include <linux/kernel.h>
	22	#include <linux/init.h>
	23	#include <linux/module.h>
237b98f6	24	#include <linux/mutex.h>
36ddf31b	25	#include <linux/list.h>
4a55026f FV	26	#include <linux/kobject.h>
4a55026f FV	27	#include <linux/sysdev.h>
36ddf31b PM	28	#include <linux/seq_file.h>
36ddf31b PM	29	#include <linux/err.h>
1d118562	30	#include <linux/platform_device.h>
cedcf336	31	#include <linux/debugfs.h>
c94a8574	32	#include <linux/cpufreq.h>
36ddf31b	33	#include <asm/clock.h>
253b0887	34	#include <asm/machvec.h>
36ddf31b PM	35
	36	static LIST_HEAD(clock_list);
	37	static DEFINE_SPINLOCK(clock_lock);
237b98f6	38	static DEFINE_MUTEX(clock_list_sem);
36ddf31b	39
c94a8574 MD	40	void clk_rate_table_build(struct clk *clk,
	41	struct cpufreq_frequency_table *freq_table,
	42	int nr_freqs,
	43	struct clk_div_mult_table *src_table,
	44	unsigned long *bitmap)
	45	{
	46	unsigned long mult, div;
	47	unsigned long freq;
	48	int i;
	49
	50	for (i = 0; i < nr_freqs; i++) {
	51	div = 1;
	52	mult = 1;
	53
	54	if (src_table->divisors && i < src_table->nr_divisors)
	55	div = src_table->divisors[i];
	56
	57	if (src_table->multipliers && i < src_table->nr_multipliers)
	58	mult = src_table->multipliers[i];
	59
	60	if (!div \|\| !mult \|\| (bitmap && !test_bit(i, bitmap)))
	61	freq = CPUFREQ_ENTRY_INVALID;
	62	else
	63	freq = clk->parent->rate * mult / div;
	64
	65	freq_table[i].index = i;
	66	freq_table[i].frequency = freq;
	67	}
	68
	69	/* Termination entry */
	70	freq_table[i].index = i;
	71	freq_table[i].frequency = CPUFREQ_TABLE_END;
	72	}
	73
	74	long clk_rate_table_round(struct clk *clk,
	75	struct cpufreq_frequency_table *freq_table,
	76	unsigned long rate)
	77	{
	78	unsigned long rate_error, rate_error_prev = ~0UL;
	79	unsigned long rate_best_fit = rate;
	80	unsigned long highest, lowest;
	81	int i;
	82
	83	highest = lowest = 0;
	84
	85	for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
	86	unsigned long freq = freq_table[i].frequency;
	87
	88	if (freq == CPUFREQ_ENTRY_INVALID)
	89	continue;
	90
	91	if (freq > highest)
	92	highest = freq;
	93	if (freq < lowest)
	94	lowest = freq;
	95
	96	rate_error = abs(freq - rate);
	97	if (rate_error < rate_error_prev) {
	98	rate_best_fit = freq;
	99	rate_error_prev = rate_error;
	100	}
	101
	102	if (rate_error == 0)
	103	break;
104	}
105
106	if (rate >= highest)
107	rate_best_fit = highest;
108	if (rate <= lowest)
109	rate_best_fit = lowest;
110
111	return rate_best_fit;
112	}
113
098dee99 MD	114	int clk_rate_table_find(struct clk *clk,
	115	struct cpufreq_frequency_table *freq_table,
	116	unsigned long rate)
	117	{
	118	int i;
	119
	120	for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
	121	unsigned long freq = freq_table[i].frequency;
	122
	123	if (freq == CPUFREQ_ENTRY_INVALID)
	124	continue;
	125
	126	if (freq == rate)
	127	return i;
	128	}
	129
	130	return -ENOENT;
	131	}
	132
b1f6cfe4 PM	133	/* Used for clocks that always have same value as the parent clock */
	134	unsigned long followparent_recalc(struct clk *clk)
	135	{
549b5e35	136	return clk->parent ? clk->parent->rate : 0;
b1f6cfe4 PM	137	}
b1f6cfe4 PM	138
aa87aa34 PM	139	int clk_reparent(struct clk child, struct clk parent)
	140	{
	141	list_del_init(&child->sibling);
	142	if (parent)
	143	list_add(&child->sibling, &parent->children);
	144	child->parent = parent;
	145
	146	/* now do the debugfs renaming to reattach the child
	147	to the proper parent */
	148
	149	return 0;
	150	}
	151
b68d8201	152	/* Propagate rate to children */
b1f6cfe4	153	void propagate_rate(struct clk *tclk)
36ddf31b PM	154	{
	155	struct clk *clkp;
	156
b1f6cfe4	157	list_for_each_entry(clkp, &tclk->children, sibling) {
d672fef0	158	if (clkp->ops && clkp->ops->recalc)
b68d8201	159	clkp->rate = clkp->ops->recalc(clkp);
cc96eace	160
b1f6cfe4	161	propagate_rate(clkp);
36ddf31b PM	162	}
	163	}
	164
ae891a42	165	static void __clk_disable(struct clk *clk)
4f5ecaa0	166	{
ae891a42 PM	167	if (clk->usecount == 0) {
	168	printk(KERN_ERR "Trying disable clock %s with 0 usecount\n",
	169	clk->name);
	170	WARN_ON(1);
	171	return;
4f5ecaa0	172	}
36ddf31b	173
ae891a42 PM	174	if (!(--clk->usecount)) {
	175	if (likely(clk->ops && clk->ops->disable))
	176	clk->ops->disable(clk);
	177	if (likely(clk->parent))
	178	__clk_disable(clk->parent);
	179	}
36ddf31b PM	180	}
36ddf31b PM	181
ae891a42	182	void clk_disable(struct clk *clk)
36ddf31b PM	183	{
36ddf31b PM	184	unsigned long flags;
36ddf31b	185
4ff29ff8	186	if (!clk)
ae891a42	187	return;
4ff29ff8	188
36ddf31b	189	spin_lock_irqsave(&clock_lock, flags);
ae891a42	190	__clk_disable(clk);
36ddf31b	191	spin_unlock_irqrestore(&clock_lock, flags);
36ddf31b	192	}
ae891a42	193	EXPORT_SYMBOL_GPL(clk_disable);
36ddf31b	194
ae891a42	195	static int __clk_enable(struct clk *clk)
36ddf31b	196	{
ae891a42 PM	197	int ret = 0;
	198
	199	if (clk->usecount++ == 0) {
	200	if (clk->parent) {
	201	ret = __clk_enable(clk->parent);
	202	if (unlikely(ret))
	203	goto err;
	204	}
	205
	206	if (clk->ops && clk->ops->enable) {
	207	ret = clk->ops->enable(clk);
	208	if (ret) {
	209	if (clk->parent)
	210	__clk_disable(clk->parent);
	211	goto err;
	212	}
	213	}
1929cb34	214	}
ae891a42 PM	215
	216	return ret;
	217	err:
	218	clk->usecount--;
	219	return ret;
36ddf31b PM	220	}
36ddf31b PM	221
ae891a42	222	int clk_enable(struct clk *clk)
36ddf31b PM	223	{
36ddf31b PM	224	unsigned long flags;
ae891a42	225	int ret;
36ddf31b	226
4ff29ff8	227	if (!clk)
ae891a42	228	return -EINVAL;
4ff29ff8	229
36ddf31b	230	spin_lock_irqsave(&clock_lock, flags);
ae891a42	231	ret = __clk_enable(clk);
36ddf31b	232	spin_unlock_irqrestore(&clock_lock, flags);
ae891a42 PM	233
ae891a42 PM	234	return ret;
36ddf31b	235	}
ae891a42	236	EXPORT_SYMBOL_GPL(clk_enable);
36ddf31b	237
b1f6cfe4 PM	238	static LIST_HEAD(root_clks);
	239
	240	/**
	241	* recalculate_root_clocks - recalculate and propagate all root clocks
	242	*
	243	* Recalculates all root clocks (clocks with no parent), which if the
	244	* clock's .recalc is set correctly, should also propagate their rates.
	245	* Called at init.
	246	*/
	247	void recalculate_root_clocks(void)
	248	{
	249	struct clk *clkp;
	250
	251	list_for_each_entry(clkp, &root_clks, sibling) {
d672fef0	252	if (clkp->ops && clkp->ops->recalc)
b1f6cfe4 PM	253	clkp->rate = clkp->ops->recalc(clkp);
	254	propagate_rate(clkp);
	255	}
	256	}
	257
36ddf31b PM	258	int clk_register(struct clk *clk)
36ddf31b PM	259	{
b1f6cfe4 PM	260	if (clk == NULL \|\| IS_ERR(clk))
	261	return -EINVAL;
	262
	263	/*
	264	* trap out already registered clocks
	265	*/
	266	if (clk->node.next \|\| clk->node.prev)
	267	return 0;
	268
237b98f6	269	mutex_lock(&clock_list_sem);
36ddf31b	270
b1f6cfe4	271	INIT_LIST_HEAD(&clk->children);
4ff29ff8	272	clk->usecount = 0;
b1f6cfe4 PM	273
	274	if (clk->parent)
	275	list_add(&clk->sibling, &clk->parent->children);
	276	else
	277	list_add(&clk->sibling, &root_clks);
	278
36ddf31b	279	list_add(&clk->node, &clock_list);
d672fef0	280	if (clk->ops && clk->ops->init)
4ff29ff8	281	clk->ops->init(clk);
237b98f6	282	mutex_unlock(&clock_list_sem);
36ddf31b PM	283
	284	return 0;
	285	}
db62e5bd	286	EXPORT_SYMBOL_GPL(clk_register);
36ddf31b PM	287
	288	void clk_unregister(struct clk *clk)
	289	{
237b98f6	290	mutex_lock(&clock_list_sem);
b1f6cfe4	291	list_del(&clk->sibling);
36ddf31b	292	list_del(&clk->node);
237b98f6	293	mutex_unlock(&clock_list_sem);
36ddf31b	294	}
db62e5bd	295	EXPORT_SYMBOL_GPL(clk_unregister);
36ddf31b	296
4ff29ff8 PM	297	static void clk_enable_init_clocks(void)
	298	{
	299	struct clk *clkp;
	300
	301	list_for_each_entry(clkp, &clock_list, node)
	302	if (clkp->flags & CLK_ENABLE_ON_INIT)
	303	clk_enable(clkp);
	304	}
	305
db62e5bd	306	unsigned long clk_get_rate(struct clk *clk)
36ddf31b PM	307	{
	308	return clk->rate;
	309	}
db62e5bd	310	EXPORT_SYMBOL_GPL(clk_get_rate);
36ddf31b PM	311
36ddf31b PM	312	int clk_set_rate(struct clk *clk, unsigned long rate)
1929cb34	313	{
	314	return clk_set_rate_ex(clk, rate, 0);
	315	}
db62e5bd	316	EXPORT_SYMBOL_GPL(clk_set_rate);
1929cb34	317
1929cb34	318	int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
36ddf31b PM	319	{
36ddf31b PM	320	int ret = -EOPNOTSUPP;
100890c5	321	unsigned long flags;
36ddf31b	322
100890c5	323	spin_lock_irqsave(&clock_lock, flags);
36ddf31b	324
100890c5	325	if (likely(clk->ops && clk->ops->set_rate)) {
1929cb34	326	ret = clk->ops->set_rate(clk, rate, algo_id);
100890c5 PM	327	if (ret != 0)
	328	goto out_unlock;
	329	} else {
	330	clk->rate = rate;
	331	ret = 0;
36ddf31b PM	332	}
36ddf31b PM	333
100890c5 PM	334	if (clk->ops && clk->ops->recalc)
	335	clk->rate = clk->ops->recalc(clk);
	336
	337	propagate_rate(clk);
	338
	339	out_unlock:
	340	spin_unlock_irqrestore(&clock_lock, flags);
	341
36ddf31b PM	342	return ret;
36ddf31b PM	343	}
db62e5bd	344	EXPORT_SYMBOL_GPL(clk_set_rate_ex);
36ddf31b	345
d680c76e FV	346	int clk_set_parent(struct clk clk, struct clk parent)
d680c76e FV	347	{
b1f6cfe4	348	unsigned long flags;
d680c76e	349	int ret = -EINVAL;
d680c76e FV	350
	351	if (!parent \|\| !clk)
	352	return ret;
aa87aa34 PM	353	if (clk->parent == parent)
aa87aa34 PM	354	return 0;
d680c76e	355
b1f6cfe4 PM	356	spin_lock_irqsave(&clock_lock, flags);
	357	if (clk->usecount == 0) {
	358	if (clk->ops->set_parent)
	359	ret = clk->ops->set_parent(clk, parent);
aa87aa34 PM	360	else
	361	ret = clk_reparent(clk, parent);
	362
b1f6cfe4	363	if (ret == 0) {
aa87aa34 PM	364	pr_debug("clock: set parent of %s to %s (new rate %ld)\n",
aa87aa34 PM	365	clk->name, clk->parent->name, clk->rate);
b1f6cfe4 PM	366	if (clk->ops->recalc)
	367	clk->rate = clk->ops->recalc(clk);
	368	propagate_rate(clk);
	369	}
	370	} else
	371	ret = -EBUSY;
	372	spin_unlock_irqrestore(&clock_lock, flags);
d680c76e	373
d680c76e FV	374	return ret;
	375	}
	376	EXPORT_SYMBOL_GPL(clk_set_parent);
	377
	378	struct clk clk_get_parent(struct clk clk)
	379	{
	380	return clk->parent;
	381	}
	382	EXPORT_SYMBOL_GPL(clk_get_parent);
	383
f6991b04 PM	384	long clk_round_rate(struct clk *clk, unsigned long rate)
	385	{
	386	if (likely(clk->ops && clk->ops->round_rate)) {
	387	unsigned long flags, rounded;
	388
	389	spin_lock_irqsave(&clock_lock, flags);
	390	rounded = clk->ops->round_rate(clk, rate);
	391	spin_unlock_irqrestore(&clock_lock, flags);
	392
	393	return rounded;
	394	}
	395
	396	return clk_get_rate(clk);
	397	}
	398	EXPORT_SYMBOL_GPL(clk_round_rate);
	399
0dae8957 PM	400	/*
	401	* Find the correct struct clk for the device and connection ID.
	402	* We do slightly fuzzy matching here:
	403	* An entry with a NULL ID is assumed to be a wildcard.
	404	* If an entry has a device ID, it must match
	405	* If an entry has a connection ID, it must match
	406	* Then we take the most specific entry - with the following
659431fc	407	* order of precedence: dev+con > dev only > con only.
0dae8957 PM	408	*/
	409	static struct clk clk_find(const char dev_id, const char *con_id)
	410	{
	411	struct clk_lookup *p;
	412	struct clk *clk = NULL;
	413	int match, best = 0;
	414
	415	list_for_each_entry(p, &clock_list, node) {
	416	match = 0;
	417	if (p->dev_id) {
	418	if (!dev_id \|\| strcmp(p->dev_id, dev_id))
	419	continue;
	420	match += 2;
	421	}
	422	if (p->con_id) {
	423	if (!con_id \|\| strcmp(p->con_id, con_id))
	424	continue;
	425	match += 1;
	426	}
	427	if (match == 0)
	428	continue;
	429
	430	if (match > best) {
	431	clk = p->clk;
	432	best = match;
	433	}
	434	}
	435	return clk;
	436	}
	437
	438	struct clk clk_get_sys(const char dev_id, const char *con_id)
	439	{
	440	struct clk *clk;
	441
	442	mutex_lock(&clock_list_sem);
	443	clk = clk_find(dev_id, con_id);
	444	mutex_unlock(&clock_list_sem);
	445
	446	return clk ? clk : ERR_PTR(-ENOENT);
	447	}
	448	EXPORT_SYMBOL_GPL(clk_get_sys);
	449
1d118562 PM	450	/*
	451	* Returns a clock. Note that we first try to use device id on the bus
	452	* and clock name. If this fails, we try to use clock name only.
	453	*/
	454	struct clk clk_get(struct device dev, const char *id)
36ddf31b	455	{
0dae8957	456	const char *dev_id = dev ? dev_name(dev) : NULL;
36ddf31b	457	struct clk p, clk = ERR_PTR(-ENOENT);
1d118562 PM	458	int idno;
1d118562 PM	459
0dae8957	460	clk = clk_get_sys(dev_id, id);
f3f8290c	461	if (clk && !IS_ERR(clk))
0dae8957 PM	462	return clk;
0dae8957 PM	463
1d118562 PM	464	if (dev == NULL \|\| dev->bus != &platform_bus_type)
	465	idno = -1;
	466	else
	467	idno = to_platform_device(dev)->id;
36ddf31b	468
237b98f6	469	mutex_lock(&clock_list_sem);
1d118562 PM	470	list_for_each_entry(p, &clock_list, node) {
	471	if (p->id == idno &&
	472	strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
	473	clk = p;
	474	goto found;
	475	}
	476	}
	477
36ddf31b PM	478	list_for_each_entry(p, &clock_list, node) {
	479	if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
	480	clk = p;
	481	break;
	482	}
	483	}
1d118562 PM	484
1d118562 PM	485	found:
237b98f6	486	mutex_unlock(&clock_list_sem);
36ddf31b PM	487
	488	return clk;
	489	}
db62e5bd	490	EXPORT_SYMBOL_GPL(clk_get);
36ddf31b PM	491
	492	void clk_put(struct clk *clk)
	493	{
	494	if (clk && !IS_ERR(clk))
	495	module_put(clk->owner);
	496	}
db62e5bd	497	EXPORT_SYMBOL_GPL(clk_put);
36ddf31b	498
4a55026f FV	499	#ifdef CONFIG_PM
	500	static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
	501	{
	502	static pm_message_t prev_state;
	503	struct clk *clkp;
	504
	505	switch (state.event) {
	506	case PM_EVENT_ON:
	507	/* Resumeing from hibernation */
b68d8201 PM	508	if (prev_state.event != PM_EVENT_FREEZE)
	509	break;
	510
	511	list_for_each_entry(clkp, &clock_list, node) {
	512	if (likely(clkp->ops)) {
	513	unsigned long rate = clkp->rate;
	514
	515	if (likely(clkp->ops->set_parent))
	516	clkp->ops->set_parent(clkp,
	517	clkp->parent);
	518	if (likely(clkp->ops->set_rate))
	519	clkp->ops->set_rate(clkp,
	520	rate, NO_CHANGE);
	521	else if (likely(clkp->ops->recalc))
	522	clkp->rate = clkp->ops->recalc(clkp);
	523	}
4a55026f FV	524	}
	525	break;
	526	case PM_EVENT_FREEZE:
	527	break;
	528	case PM_EVENT_SUSPEND:
	529	break;
	530	}
	531
	532	prev_state = state;
	533	return 0;
	534	}
	535
	536	static int clks_sysdev_resume(struct sys_device *dev)
	537	{
	538	return clks_sysdev_suspend(dev, PMSG_ON);
	539	}
	540
	541	static struct sysdev_class clks_sysdev_class = {
	542	.name = "clks",
	543	};
	544
	545	static struct sysdev_driver clks_sysdev_driver = {
	546	.suspend = clks_sysdev_suspend,
	547	.resume = clks_sysdev_resume,
	548	};
	549
	550	static struct sys_device clks_sysdev_dev = {
	551	.cls = &clks_sysdev_class,
	552	};
	553
	554	static int __init clk_sysdev_init(void)
	555	{
	556	sysdev_class_register(&clks_sysdev_class);
	557	sysdev_driver_register(&clks_sysdev_class, &clks_sysdev_driver);
	558	sysdev_register(&clks_sysdev_dev);
	559
	560	return 0;
	561	}
	562	subsys_initcall(clk_sysdev_init);
	563	#endif
	564
36ddf31b PM	565	int __init clk_init(void)
36ddf31b PM	566	{
253b0887	567	int ret;
36ddf31b	568
253b0887 PM	569	ret = arch_clk_init();
	570	if (unlikely(ret)) {
	571	pr_err("%s: CPU clock registration failed.\n", __func__);
	572	return ret;
36ddf31b PM	573	}
36ddf31b PM	574
253b0887 PM	575	if (sh_mv.mv_clk_init) {
	576	ret = sh_mv.mv_clk_init();
	577	if (unlikely(ret)) {
	578	pr_err("%s: machvec clock initialization failed.\n",
	579	__func__);
	580	return ret;
	581	}
	582	}
dfbbbe92	583
36ddf31b	584	/* Kick the child clocks.. */
b1f6cfe4	585	recalculate_root_clocks();
36ddf31b	586
4ff29ff8 PM	587	/* Enable the necessary init clocks */
	588	clk_enable_init_clocks();
	589
36ddf31b PM	590	return ret;
	591	}
	592
cedcf336 PM	593	/*
	594	* debugfs support to trace clock tree hierarchy and attributes
	595	*/
	596	static struct dentry *clk_debugfs_root;
	597
	598	static int clk_debugfs_register_one(struct clk *c)
36ddf31b	599	{
cedcf336	600	int err;
bc10e875	601	struct dentry d, child, *child_tmp;
cedcf336 PM	602	struct clk *pa = c->parent;
	603	char s[255];
	604	char *p = s;
	605
	606	p += sprintf(p, "%s", c->name);
549b5e35	607	if (c->id >= 0)
cedcf336 PM	608	sprintf(p, ":%d", c->id);
	609	d = debugfs_create_dir(s, pa ? pa->dentry : clk_debugfs_root);
	610	if (!d)
	611	return -ENOMEM;
	612	c->dentry = d;
	613
	614	d = debugfs_create_u8("usecount", S_IRUGO, c->dentry, (u8 *)&c->usecount);
	615	if (!d) {
	616	err = -ENOMEM;
	617	goto err_out;
	618	}
	619	d = debugfs_create_u32("rate", S_IRUGO, c->dentry, (u32 *)&c->rate);
	620	if (!d) {
	621	err = -ENOMEM;
	622	goto err_out;
	623	}
	624	d = debugfs_create_x32("flags", S_IRUGO, c->dentry, (u32 *)&c->flags);
	625	if (!d) {
	626	err = -ENOMEM;
	627	goto err_out;
	628	}
	629	return 0;
	630
	631	err_out:
	632	d = c->dentry;
bc10e875	633	list_for_each_entry_safe(child, child_tmp, &d->d_subdirs, d_u.d_child)
cedcf336 PM	634	debugfs_remove(child);
	635	debugfs_remove(c->dentry);
	636	return err;
	637	}
	638
	639	static int clk_debugfs_register(struct clk *c)
	640	{
	641	int err;
	642	struct clk *pa = c->parent;
	643
	644	if (pa && !pa->dentry) {
	645	err = clk_debugfs_register(pa);
	646	if (err)
	647	return err;
	648	}
36ddf31b	649
cedcf336 PM	650	if (!c->dentry) {
	651	err = clk_debugfs_register_one(c);
	652	if (err)
	653	return err;
	654	}
	655	return 0;
	656	}
	657
	658	static int __init clk_debugfs_init(void)
	659	{
	660	struct clk *c;
	661	struct dentry *d;
	662	int err;
	663
	664	d = debugfs_create_dir("clock", NULL);
	665	if (!d)
	666	return -ENOMEM;
	667	clk_debugfs_root = d;
	668
	669	list_for_each_entry(c, &clock_list, node) {
	670	err = clk_debugfs_register(c);
	671	if (err)
	672	goto err_out;
	673	}
36ddf31b	674	return 0;
cedcf336 PM	675	err_out:
	676	debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */
	677	return err;
36ddf31b	678	}
cedcf336	679	late_initcall(clk_debugfs_init);