License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[linux-2.6-block.git] / arch / sh / cchips / hd6446x / hd64461.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4 2/*
1da177e4
LT
3 * Copyright (C) 2000 YAEGASHI Takeshi
4 * Hitachi HD64461 companion chip support
5 */
6
1da177e4
LT
7#include <linux/sched.h>
8#include <linux/module.h>
9#include <linux/kernel.h>
10#include <linux/param.h>
11#include <linux/interrupt.h>
12#include <linux/init.h>
13#include <linux/irq.h>
135210b3 14#include <linux/io.h>
1da177e4 15#include <asm/irq.h>
6d75e650 16#include <asm/hd64461.h>
1da177e4 17
f1382305
KE
18/* This belongs in cpu specific */
19#define INTC_ICR1 0xA4140010UL
20
19add7e1 21static void hd64461_mask_irq(struct irq_data *data)
1da177e4 22{
19add7e1 23 unsigned int irq = data->irq;
1da177e4
LT
24 unsigned short nimr;
25 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
26
135210b3 27 nimr = __raw_readw(HD64461_NIMR);
1da177e4 28 nimr |= mask;
135210b3 29 __raw_writew(nimr, HD64461_NIMR);
1da177e4
LT
30}
31
19add7e1 32static void hd64461_unmask_irq(struct irq_data *data)
1da177e4 33{
19add7e1 34 unsigned int irq = data->irq;
1da177e4
LT
35 unsigned short nimr;
36 unsigned short mask = 1 << (irq - HD64461_IRQBASE);
37
135210b3 38 nimr = __raw_readw(HD64461_NIMR);
1da177e4 39 nimr &= ~mask;
135210b3 40 __raw_writew(nimr, HD64461_NIMR);
1da177e4
LT
41}
42
19add7e1 43static void hd64461_mask_and_ack_irq(struct irq_data *data)
1da177e4 44{
19add7e1
PM
45 hd64461_mask_irq(data);
46
1da177e4 47#ifdef CONFIG_HD64461_ENABLER
19add7e1 48 if (data->irq == HD64461_IRQBASE + 13)
135210b3 49 __raw_writeb(0x00, HD64461_PCC1CSCR);
1da177e4
LT
50#endif
51}
52
135210b3
MF
53static struct irq_chip hd64461_irq_chip = {
54 .name = "HD64461-IRQ",
19add7e1
PM
55 .irq_mask = hd64461_mask_irq,
56 .irq_mask_ack = hd64461_mask_and_ack_irq,
57 .irq_unmask = hd64461_unmask_irq,
1da177e4
LT
58};
59
bd0b9ac4 60static void hd64461_irq_demux(struct irq_desc *desc)
1da177e4 61{
9d56dd3b 62 unsigned short intv = __raw_readw(HD64461_NIRR);
3bf50923
RIZ
63 unsigned int ext_irq = HD64461_IRQBASE;
64
65 intv &= (1 << HD64461_IRQ_NUM) - 1;
66
b06ede84
PM
67 for (; intv; intv >>= 1, ext_irq++) {
68 if (!(intv & 1))
69 continue;
70
71 generic_handle_irq(ext_irq);
1da177e4 72 }
1da177e4
LT
73}
74
1da177e4
LT
75int __init setup_hd64461(void)
76{
051f923d 77 int irq_base, i;
1da177e4
LT
78
79 printk(KERN_INFO
80 "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n",
62669e61 81 HD64461_IOBASE, CONFIG_HD64461_IRQ, HD64461_IRQBASE,
1da177e4
LT
82 HD64461_IRQBASE + 15);
83
135210b3
MF
84/* Should be at processor specific part.. */
85#if defined(CONFIG_CPU_SUBTYPE_SH7709)
86 __raw_writew(0x2240, INTC_ICR1);
1da177e4 87#endif
135210b3 88 __raw_writew(0xffff, HD64461_NIMR);
1da177e4 89
051f923d
PM
90 irq_base = irq_alloc_descs(HD64461_IRQBASE, HD64461_IRQBASE, 16, -1);
91 if (IS_ERR_VALUE(irq_base)) {
92 pr_err("%s: failed hooking irqs for HD64461\n", __func__);
93 return irq_base;
6eb6f983 94 }
1da177e4 95
051f923d
PM
96 for (i = 0; i < 16; i++)
97 irq_set_chip_and_handler(irq_base + i, &hd64461_irq_chip,
98 handle_level_irq);
99
fcb8918f
TG
100 irq_set_chained_handler(CONFIG_HD64461_IRQ, hd64461_irq_demux);
101 irq_set_irq_type(CONFIG_HD64461_IRQ, IRQ_TYPE_LEVEL_LOW);
3bf50923 102
1da177e4
LT
103#ifdef CONFIG_HD64461_ENABLER
104 printk(KERN_INFO "HD64461: enabling PCMCIA devices\n");
135210b3
MF
105 __raw_writeb(0x4c, HD64461_PCC1CSCIER);
106 __raw_writeb(0x00, HD64461_PCC1CSCR);
1da177e4
LT
107#endif
108
109 return 0;
110}
111
112module_init(setup_hd64461);