Remove fs.h from mm.h
[linux-2.6-block.git] / arch / s390 / kernel / smp.c
CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/smp.c
3 *
39ce010d 4 * Copyright IBM Corp. 1999,2007
1da177e4 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
39ce010d
HC
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Heiko Carstens (heiko.carstens@de.ibm.com)
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * We work with logical cpu numbering everywhere we can. The only
14 * functions using the real cpu address (got from STAP) are the sigp
15 * functions. For all other functions we use the identity mapping.
16 * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
17 * used e.g. to find the idle task belonging to a logical cpu. Every array
18 * in the kernel is sorted by the logical cpu number and not by the physical
19 * one which is causing all the confusion with __cpu_logical_map and
20 * cpu_number_map in other architectures.
21 */
22
23#include <linux/module.h>
24#include <linux/init.h>
1da177e4 25#include <linux/mm.h>
4e950f6f 26#include <linux/err.h>
1da177e4
LT
27#include <linux/spinlock.h>
28#include <linux/kernel_stat.h>
1da177e4
LT
29#include <linux/delay.h>
30#include <linux/cache.h>
31#include <linux/interrupt.h>
32#include <linux/cpu.h>
2b67fc46 33#include <linux/timex.h>
411ed322 34#include <linux/bootmem.h>
46b05d26 35#include <asm/ipl.h>
2b67fc46 36#include <asm/setup.h>
1da177e4
LT
37#include <asm/sigp.h>
38#include <asm/pgalloc.h>
39#include <asm/irq.h>
40#include <asm/s390_ext.h>
41#include <asm/cpcmd.h>
42#include <asm/tlbflush.h>
2b67fc46 43#include <asm/timer.h>
411ed322 44#include <asm/lowcore.h>
1da177e4 45
1da177e4
LT
46/*
47 * An array with a pointer the lowcore of every CPU.
48 */
1da177e4 49struct _lowcore *lowcore_ptr[NR_CPUS];
39ce010d 50EXPORT_SYMBOL(lowcore_ptr);
1da177e4 51
255acee7 52cpumask_t cpu_online_map = CPU_MASK_NONE;
39ce010d
HC
53EXPORT_SYMBOL(cpu_online_map);
54
255acee7 55cpumask_t cpu_possible_map = CPU_MASK_NONE;
39ce010d 56EXPORT_SYMBOL(cpu_possible_map);
1da177e4
LT
57
58static struct task_struct *current_set[NR_CPUS];
59
1da177e4 60static void smp_ext_bitcall(int, ec_bit_sig);
1da177e4
LT
61
62/*
63db6e8d
JG
63 * Structure and data for __smp_call_function_map(). This is designed to
64 * minimise static memory requirements. It also looks cleaner.
1da177e4
LT
65 */
66static DEFINE_SPINLOCK(call_lock);
67
68struct call_data_struct {
69 void (*func) (void *info);
70 void *info;
63db6e8d
JG
71 cpumask_t started;
72 cpumask_t finished;
1da177e4
LT
73 int wait;
74};
75
39ce010d 76static struct call_data_struct *call_data;
1da177e4
LT
77
78/*
79 * 'Call function' interrupt callback
80 */
81static void do_call_function(void)
82{
83 void (*func) (void *info) = call_data->func;
84 void *info = call_data->info;
85 int wait = call_data->wait;
86
63db6e8d 87 cpu_set(smp_processor_id(), call_data->started);
1da177e4
LT
88 (*func)(info);
89 if (wait)
63db6e8d 90 cpu_set(smp_processor_id(), call_data->finished);;
1da177e4
LT
91}
92
63db6e8d
JG
93static void __smp_call_function_map(void (*func) (void *info), void *info,
94 int nonatomic, int wait, cpumask_t map)
1da177e4
LT
95{
96 struct call_data_struct data;
63db6e8d 97 int cpu, local = 0;
1da177e4 98
63db6e8d 99 /*
25864162 100 * Can deadlock when interrupts are disabled or if in wrong context.
63db6e8d 101 */
25864162 102 WARN_ON(irqs_disabled() || in_irq());
1da177e4 103
63db6e8d
JG
104 /*
105 * Check for local function call. We have to have the same call order
106 * as in on_each_cpu() because of machine_restart_smp().
107 */
108 if (cpu_isset(smp_processor_id(), map)) {
109 local = 1;
110 cpu_clear(smp_processor_id(), map);
111 }
112
113 cpus_and(map, map, cpu_online_map);
114 if (cpus_empty(map))
115 goto out;
1da177e4
LT
116
117 data.func = func;
118 data.info = info;
63db6e8d 119 data.started = CPU_MASK_NONE;
1da177e4
LT
120 data.wait = wait;
121 if (wait)
63db6e8d 122 data.finished = CPU_MASK_NONE;
1da177e4 123
8da1aecd 124 spin_lock(&call_lock);
1da177e4 125 call_data = &data;
63db6e8d
JG
126
127 for_each_cpu_mask(cpu, map)
128 smp_ext_bitcall(cpu, ec_call_function);
1da177e4
LT
129
130 /* Wait for response */
63db6e8d 131 while (!cpus_equal(map, data.started))
1da177e4 132 cpu_relax();
1da177e4 133 if (wait)
63db6e8d 134 while (!cpus_equal(map, data.finished))
1da177e4 135 cpu_relax();
8da1aecd 136 spin_unlock(&call_lock);
63db6e8d 137out:
8da1aecd
HC
138 if (local) {
139 local_irq_disable();
63db6e8d 140 func(info);
8da1aecd
HC
141 local_irq_enable();
142 }
1da177e4
LT
143}
144
145/*
63db6e8d
JG
146 * smp_call_function:
147 * @func: the function to run; this must be fast and non-blocking
148 * @info: an arbitrary pointer to pass to the function
149 * @nonatomic: unused
150 * @wait: if true, wait (atomically) until function has completed on other CPUs
1da177e4 151 *
63db6e8d 152 * Run a function on all other CPUs.
1da177e4 153 *
39ce010d
HC
154 * You must not call this function with disabled interrupts, from a
155 * hardware interrupt handler or from a bottom half.
1da177e4 156 */
63db6e8d
JG
157int smp_call_function(void (*func) (void *info), void *info, int nonatomic,
158 int wait)
1da177e4 159{
63db6e8d 160 cpumask_t map;
1da177e4 161
25864162 162 preempt_disable();
63db6e8d
JG
163 map = cpu_online_map;
164 cpu_clear(smp_processor_id(), map);
165 __smp_call_function_map(func, info, nonatomic, wait, map);
25864162 166 preempt_enable();
63db6e8d
JG
167 return 0;
168}
169EXPORT_SYMBOL(smp_call_function);
1da177e4 170
63db6e8d 171/*
3bb447fc
HC
172 * smp_call_function_single:
173 * @cpu: the CPU where func should run
63db6e8d
JG
174 * @func: the function to run; this must be fast and non-blocking
175 * @info: an arbitrary pointer to pass to the function
176 * @nonatomic: unused
177 * @wait: if true, wait (atomically) until function has completed on other CPUs
63db6e8d
JG
178 *
179 * Run a function on one processor.
180 *
39ce010d
HC
181 * You must not call this function with disabled interrupts, from a
182 * hardware interrupt handler or from a bottom half.
63db6e8d 183 */
3bb447fc
HC
184int smp_call_function_single(int cpu, void (*func) (void *info), void *info,
185 int nonatomic, int wait)
63db6e8d 186{
25864162 187 preempt_disable();
3bb447fc
HC
188 __smp_call_function_map(func, info, nonatomic, wait,
189 cpumask_of_cpu(cpu));
25864162 190 preempt_enable();
1da177e4
LT
191 return 0;
192}
3bb447fc 193EXPORT_SYMBOL(smp_call_function_single);
1da177e4 194
4d284cac 195static void do_send_stop(void)
1da177e4 196{
39ce010d 197 int cpu, rc;
1da177e4 198
39ce010d 199 /* stop all processors */
1da177e4
LT
200 for_each_online_cpu(cpu) {
201 if (cpu == smp_processor_id())
202 continue;
203 do {
204 rc = signal_processor(cpu, sigp_stop);
205 } while (rc == sigp_busy);
206 }
207}
208
4d284cac 209static void do_store_status(void)
1da177e4 210{
39ce010d 211 int cpu, rc;
1da177e4 212
39ce010d 213 /* store status of all processors in their lowcores (real 0) */
1da177e4
LT
214 for_each_online_cpu(cpu) {
215 if (cpu == smp_processor_id())
216 continue;
217 do {
218 rc = signal_processor_p(
219 (__u32)(unsigned long) lowcore_ptr[cpu], cpu,
220 sigp_store_status_at_address);
39ce010d
HC
221 } while (rc == sigp_busy);
222 }
1da177e4
LT
223}
224
4d284cac 225static void do_wait_for_stop(void)
c6b5b847
HC
226{
227 int cpu;
228
229 /* Wait for all other cpus to enter stopped state */
230 for_each_online_cpu(cpu) {
231 if (cpu == smp_processor_id())
232 continue;
39ce010d 233 while (!smp_cpu_not_running(cpu))
c6b5b847
HC
234 cpu_relax();
235 }
236}
237
1da177e4
LT
238/*
239 * this function sends a 'stop' sigp to all other CPUs in the system.
240 * it goes straight through.
241 */
242void smp_send_stop(void)
243{
c6b5b847 244 /* Disable all interrupts/machine checks */
c1821c2e 245 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
c6b5b847 246
39ce010d 247 /* write magic number to zero page (absolute 0) */
1da177e4
LT
248 lowcore_ptr[smp_processor_id()]->panic_magic = __PANIC_MAGIC;
249
250 /* stop other processors. */
251 do_send_stop();
252
c6b5b847
HC
253 /* wait until other processors are stopped */
254 do_wait_for_stop();
255
1da177e4
LT
256 /* store status of other processors. */
257 do_store_status();
258}
259
260/*
261 * Reboot, halt and power_off routines for SMP.
262 */
39ce010d 263void machine_restart_smp(char *__unused)
1da177e4 264{
c6b5b847
HC
265 smp_send_stop();
266 do_reipl();
1da177e4
LT
267}
268
269void machine_halt_smp(void)
270{
c6b5b847
HC
271 smp_send_stop();
272 if (MACHINE_IS_VM && strlen(vmhalt_cmd) > 0)
273 __cpcmd(vmhalt_cmd, NULL, 0, NULL);
274 signal_processor(smp_processor_id(), sigp_stop_and_store_status);
275 for (;;);
1da177e4
LT
276}
277
278void machine_power_off_smp(void)
279{
c6b5b847
HC
280 smp_send_stop();
281 if (MACHINE_IS_VM && strlen(vmpoff_cmd) > 0)
282 __cpcmd(vmpoff_cmd, NULL, 0, NULL);
283 signal_processor(smp_processor_id(), sigp_stop_and_store_status);
284 for (;;);
1da177e4
LT
285}
286
287/*
288 * This is the main routine where commands issued by other
289 * cpus are handled.
290 */
291
2b67fc46 292static void do_ext_call_interrupt(__u16 code)
1da177e4 293{
39ce010d 294 unsigned long bits;
1da177e4 295
39ce010d
HC
296 /*
297 * handle bit signal external calls
298 *
299 * For the ec_schedule signal we have to do nothing. All the work
300 * is done automatically when we return from the interrupt.
301 */
1da177e4
LT
302 bits = xchg(&S390_lowcore.ext_call_fast, 0);
303
39ce010d 304 if (test_bit(ec_call_function, &bits))
1da177e4
LT
305 do_call_function();
306}
307
308/*
309 * Send an external call sigp to another cpu and return without waiting
310 * for its completion.
311 */
312static void smp_ext_bitcall(int cpu, ec_bit_sig sig)
313{
39ce010d
HC
314 /*
315 * Set signaling bit in lowcore of target cpu and kick it
316 */
1da177e4 317 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
39ce010d 318 while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy)
1da177e4
LT
319 udelay(10);
320}
321
347a8dc3 322#ifndef CONFIG_64BIT
1da177e4
LT
323/*
324 * this function sends a 'purge tlb' signal to another CPU.
325 */
326void smp_ptlb_callback(void *info)
327{
328 local_flush_tlb();
329}
330
331void smp_ptlb_all(void)
332{
39ce010d 333 on_each_cpu(smp_ptlb_callback, NULL, 0, 1);
1da177e4
LT
334}
335EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 336#endif /* ! CONFIG_64BIT */
1da177e4
LT
337
338/*
339 * this function sends a 'reschedule' IPI to another CPU.
340 * it goes straight through and wastes no time serializing
341 * anything. Worst case is that we lose a reschedule ...
342 */
343void smp_send_reschedule(int cpu)
344{
39ce010d 345 smp_ext_bitcall(cpu, ec_schedule);
1da177e4
LT
346}
347
348/*
349 * parameter area for the set/clear control bit callbacks
350 */
94c12cc7 351struct ec_creg_mask_parms {
1da177e4
LT
352 unsigned long orvals[16];
353 unsigned long andvals[16];
94c12cc7 354};
1da177e4
LT
355
356/*
357 * callback for setting/clearing control bits
358 */
39ce010d
HC
359static void smp_ctl_bit_callback(void *info)
360{
94c12cc7 361 struct ec_creg_mask_parms *pp = info;
1da177e4
LT
362 unsigned long cregs[16];
363 int i;
39ce010d 364
94c12cc7
MS
365 __ctl_store(cregs, 0, 15);
366 for (i = 0; i <= 15; i++)
1da177e4 367 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
94c12cc7 368 __ctl_load(cregs, 0, 15);
1da177e4
LT
369}
370
371/*
372 * Set a bit in a control register of all cpus
373 */
94c12cc7
MS
374void smp_ctl_set_bit(int cr, int bit)
375{
376 struct ec_creg_mask_parms parms;
1da177e4 377
94c12cc7
MS
378 memset(&parms.orvals, 0, sizeof(parms.orvals));
379 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 380 parms.orvals[cr] = 1 << bit;
94c12cc7 381 on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1);
1da177e4 382}
39ce010d 383EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
384
385/*
386 * Clear a bit in a control register of all cpus
387 */
94c12cc7
MS
388void smp_ctl_clear_bit(int cr, int bit)
389{
390 struct ec_creg_mask_parms parms;
1da177e4 391
94c12cc7
MS
392 memset(&parms.orvals, 0, sizeof(parms.orvals));
393 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 394 parms.andvals[cr] = ~(1L << bit);
94c12cc7 395 on_each_cpu(smp_ctl_bit_callback, &parms, 0, 1);
1da177e4 396}
39ce010d 397EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 398
411ed322
MH
399#if defined(CONFIG_ZFCPDUMP) || defined(CONFIG_ZFCPDUMP_MODULE)
400
401/*
402 * zfcpdump_prefix_array holds prefix registers for the following scenario:
403 * 64 bit zfcpdump kernel and 31 bit kernel which is to be dumped. We have to
404 * save its prefix registers, since they get lost, when switching from 31 bit
405 * to 64 bit.
406 */
407unsigned int zfcpdump_prefix_array[NR_CPUS + 1] \
408 __attribute__((__section__(".data")));
409
285f6722 410static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
411ed322 411{
411ed322
MH
412 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
413 return;
285f6722
HC
414 if (cpu >= NR_CPUS) {
415 printk(KERN_WARNING "Registers for cpu %i not saved since dump "
416 "kernel was compiled with NR_CPUS=%i\n", cpu, NR_CPUS);
417 return;
411ed322 418 }
285f6722
HC
419 zfcpdump_save_areas[cpu] = alloc_bootmem(sizeof(union save_area));
420 __cpu_logical_map[1] = (__u16) phy_cpu;
421 while (signal_processor(1, sigp_stop_and_store_status) == sigp_busy)
422 cpu_relax();
423 memcpy(zfcpdump_save_areas[cpu],
424 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
425 SAVE_AREA_SIZE);
426#ifdef CONFIG_64BIT
427 /* copy original prefix register */
428 zfcpdump_save_areas[cpu]->s390x.pref_reg = zfcpdump_prefix_array[cpu];
429#endif
411ed322
MH
430}
431
432union save_area *zfcpdump_save_areas[NR_CPUS + 1];
433EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
434
435#else
285f6722
HC
436
437static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
438
439#endif /* CONFIG_ZFCPDUMP || CONFIG_ZFCPDUMP_MODULE */
411ed322 440
1da177e4
LT
441/*
442 * Lets check how many CPUs we have.
443 */
39ce010d 444static unsigned int __init smp_count_cpus(void)
1da177e4 445{
255acee7 446 unsigned int cpu, num_cpus;
1da177e4
LT
447 __u16 boot_cpu_addr;
448
449 /*
450 * cpu 0 is the boot cpu. See smp_prepare_boot_cpu.
451 */
1da177e4
LT
452 boot_cpu_addr = S390_lowcore.cpu_data.cpu_addr;
453 current_thread_info()->cpu = 0;
454 num_cpus = 1;
255acee7 455 for (cpu = 0; cpu <= 65535; cpu++) {
1da177e4
LT
456 if ((__u16) cpu == boot_cpu_addr)
457 continue;
255acee7 458 __cpu_logical_map[1] = (__u16) cpu;
39ce010d 459 if (signal_processor(1, sigp_sense) == sigp_not_operational)
1da177e4 460 continue;
285f6722 461 smp_get_save_area(num_cpus, cpu);
1da177e4
LT
462 num_cpus++;
463 }
39ce010d 464 printk("Detected %d CPU's\n", (int) num_cpus);
1da177e4 465 printk("Boot cpu address %2X\n", boot_cpu_addr);
255acee7 466 return num_cpus;
1da177e4
LT
467}
468
469/*
39ce010d 470 * Activate a secondary processor.
1da177e4 471 */
ea1f4eec 472int __cpuinit start_secondary(void *cpuvoid)
1da177e4 473{
39ce010d
HC
474 /* Setup the cpu */
475 cpu_init();
5bfb5d69 476 preempt_disable();
d54853ef 477 /* Enable TOD clock interrupts on the secondary cpu. */
39ce010d 478 init_cpu_timer();
1da177e4 479#ifdef CONFIG_VIRT_TIMER
d54853ef 480 /* Enable cpu timer interrupts on the secondary cpu. */
39ce010d 481 init_cpu_vtimer();
1da177e4 482#endif
1da177e4 483 /* Enable pfault pseudo page faults on this cpu. */
29b08d2b
HC
484 pfault_init();
485
1da177e4
LT
486 /* Mark this cpu as online */
487 cpu_set(smp_processor_id(), cpu_online_map);
488 /* Switch on interrupts */
489 local_irq_enable();
39ce010d
HC
490 /* Print info about this processor */
491 print_cpu_info(&S390_lowcore.cpu_data);
492 /* cpu_idle will call schedule for us */
493 cpu_idle();
494 return 0;
1da177e4
LT
495}
496
497static void __init smp_create_idle(unsigned int cpu)
498{
499 struct task_struct *p;
500
501 /*
502 * don't care about the psw and regs settings since we'll never
503 * reschedule the forked task.
504 */
505 p = fork_idle(cpu);
506 if (IS_ERR(p))
507 panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
508 current_set[cpu] = p;
509}
510
39ce010d 511static int cpu_stopped(int cpu)
1da177e4
LT
512{
513 __u32 status;
514
515 /* Check for stopped state */
39ce010d
HC
516 if (signal_processor_ps(&status, 0, cpu, sigp_sense) ==
517 sigp_status_stored) {
1da177e4
LT
518 if (status & 0x40)
519 return 1;
520 }
521 return 0;
522}
523
524/* Upping and downing of CPUs */
525
39ce010d 526int __cpu_up(unsigned int cpu)
1da177e4
LT
527{
528 struct task_struct *idle;
39ce010d 529 struct _lowcore *cpu_lowcore;
1da177e4 530 struct stack_frame *sf;
39ce010d
HC
531 sigp_ccode ccode;
532 int curr_cpu;
1da177e4
LT
533
534 for (curr_cpu = 0; curr_cpu <= 65535; curr_cpu++) {
535 __cpu_logical_map[cpu] = (__u16) curr_cpu;
536 if (cpu_stopped(cpu))
537 break;
538 }
539
540 if (!cpu_stopped(cpu))
541 return -ENODEV;
542
543 ccode = signal_processor_p((__u32)(unsigned long)(lowcore_ptr[cpu]),
544 cpu, sigp_set_prefix);
39ce010d 545 if (ccode) {
1da177e4
LT
546 printk("sigp_set_prefix failed for cpu %d "
547 "with condition code %d\n",
548 (int) cpu, (int) ccode);
549 return -EIO;
550 }
551
552 idle = current_set[cpu];
39ce010d 553 cpu_lowcore = lowcore_ptr[cpu];
1da177e4 554 cpu_lowcore->kernel_stack = (unsigned long)
39ce010d 555 task_stack_page(idle) + THREAD_SIZE;
1da177e4
LT
556 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
557 - sizeof(struct pt_regs)
558 - sizeof(struct stack_frame));
559 memset(sf, 0, sizeof(struct stack_frame));
560 sf->gprs[9] = (unsigned long) sf;
561 cpu_lowcore->save_area[15] = (unsigned long) sf;
562 __ctl_store(cpu_lowcore->cregs_save_area[0], 0, 15);
94c12cc7
MS
563 asm volatile(
564 " stam 0,15,0(%0)"
565 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
1da177e4 566 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
39ce010d
HC
567 cpu_lowcore->current_task = (unsigned long) idle;
568 cpu_lowcore->cpu_data.cpu_nr = cpu;
1da177e4 569 eieio();
699ff13f 570
39ce010d 571 while (signal_processor(cpu, sigp_restart) == sigp_busy)
699ff13f 572 udelay(10);
1da177e4
LT
573
574 while (!cpu_online(cpu))
575 cpu_relax();
576 return 0;
577}
578
255acee7 579static unsigned int __initdata additional_cpus;
37a33026 580static unsigned int __initdata possible_cpus;
255acee7
HC
581
582void __init smp_setup_cpu_possible_map(void)
583{
54330456 584 unsigned int phy_cpus, pos_cpus, cpu;
255acee7 585
54330456
HC
586 phy_cpus = smp_count_cpus();
587 pos_cpus = min(phy_cpus + additional_cpus, (unsigned int) NR_CPUS);
255acee7 588
37a33026 589 if (possible_cpus)
54330456 590 pos_cpus = min(possible_cpus, (unsigned int) NR_CPUS);
255acee7 591
54330456 592 for (cpu = 0; cpu < pos_cpus; cpu++)
255acee7
HC
593 cpu_set(cpu, cpu_possible_map);
594
54330456
HC
595 phy_cpus = min(phy_cpus, pos_cpus);
596
597 for (cpu = 0; cpu < phy_cpus; cpu++)
598 cpu_set(cpu, cpu_present_map);
255acee7
HC
599}
600
601#ifdef CONFIG_HOTPLUG_CPU
602
603static int __init setup_additional_cpus(char *s)
604{
605 additional_cpus = simple_strtoul(s, NULL, 0);
606 return 0;
607}
608early_param("additional_cpus", setup_additional_cpus);
609
37a33026
HC
610static int __init setup_possible_cpus(char *s)
611{
612 possible_cpus = simple_strtoul(s, NULL, 0);
613 return 0;
614}
615early_param("possible_cpus", setup_possible_cpus);
616
39ce010d 617int __cpu_disable(void)
1da177e4 618{
94c12cc7 619 struct ec_creg_mask_parms cr_parms;
f3705136 620 int cpu = smp_processor_id();
1da177e4 621
f3705136 622 cpu_clear(cpu, cpu_online_map);
1da177e4 623
1da177e4 624 /* Disable pfault pseudo page faults on this cpu. */
29b08d2b 625 pfault_fini();
1da177e4 626
94c12cc7
MS
627 memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
628 memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
1da177e4 629
94c12cc7 630 /* disable all external interrupts */
1da177e4 631 cr_parms.orvals[0] = 0;
39ce010d
HC
632 cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 |
633 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4);
1da177e4 634 /* disable all I/O interrupts */
1da177e4 635 cr_parms.orvals[6] = 0;
39ce010d
HC
636 cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
637 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
1da177e4 638 /* disable most machine checks */
1da177e4 639 cr_parms.orvals[14] = 0;
39ce010d
HC
640 cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
641 1 << 25 | 1 << 24);
94c12cc7 642
1da177e4
LT
643 smp_ctl_bit_callback(&cr_parms);
644
1da177e4
LT
645 return 0;
646}
647
39ce010d 648void __cpu_die(unsigned int cpu)
1da177e4
LT
649{
650 /* Wait until target cpu is down */
651 while (!smp_cpu_not_running(cpu))
652 cpu_relax();
653 printk("Processor %d spun down\n", cpu);
654}
655
39ce010d 656void cpu_die(void)
1da177e4
LT
657{
658 idle_task_exit();
659 signal_processor(smp_processor_id(), sigp_stop);
660 BUG();
39ce010d 661 for (;;);
1da177e4
LT
662}
663
255acee7
HC
664#endif /* CONFIG_HOTPLUG_CPU */
665
1da177e4
LT
666/*
667 * Cycle through the processors and setup structures.
668 */
669
670void __init smp_prepare_cpus(unsigned int max_cpus)
671{
672 unsigned long stack;
673 unsigned int cpu;
39ce010d
HC
674 int i;
675
676 /* request the 0x1201 emergency signal external interrupt */
677 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
678 panic("Couldn't request external interrupt 0x1201");
679 memset(lowcore_ptr, 0, sizeof(lowcore_ptr));
680 /*
681 * Initialize prefix pages and stacks for all possible cpus
682 */
1da177e4
LT
683 print_cpu_info(&S390_lowcore.cpu_data);
684
39ce010d 685 for_each_possible_cpu(i) {
1da177e4 686 lowcore_ptr[i] = (struct _lowcore *)
39ce010d
HC
687 __get_free_pages(GFP_KERNEL | GFP_DMA,
688 sizeof(void*) == 8 ? 1 : 0);
689 stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
690 if (!lowcore_ptr[i] || !stack)
1da177e4
LT
691 panic("smp_boot_cpus failed to allocate memory\n");
692
693 *(lowcore_ptr[i]) = S390_lowcore;
39ce010d
HC
694 lowcore_ptr[i]->async_stack = stack + ASYNC_SIZE;
695 stack = __get_free_pages(GFP_KERNEL, 0);
696 if (!stack)
1da177e4 697 panic("smp_boot_cpus failed to allocate memory\n");
39ce010d 698 lowcore_ptr[i]->panic_stack = stack + PAGE_SIZE;
347a8dc3 699#ifndef CONFIG_64BIT
77fa2245
HC
700 if (MACHINE_HAS_IEEE) {
701 lowcore_ptr[i]->extended_save_area_addr =
39ce010d
HC
702 (__u32) __get_free_pages(GFP_KERNEL, 0);
703 if (!lowcore_ptr[i]->extended_save_area_addr)
77fa2245
HC
704 panic("smp_boot_cpus failed to "
705 "allocate memory\n");
706 }
1da177e4
LT
707#endif
708 }
347a8dc3 709#ifndef CONFIG_64BIT
77fa2245
HC
710 if (MACHINE_HAS_IEEE)
711 ctl_set_bit(14, 29); /* enable extended save area */
712#endif
1da177e4
LT
713 set_prefix((u32)(unsigned long) lowcore_ptr[smp_processor_id()]);
714
97db7fbf 715 for_each_possible_cpu(cpu)
1da177e4
LT
716 if (cpu != smp_processor_id())
717 smp_create_idle(cpu);
718}
719
ea1f4eec 720void __init smp_prepare_boot_cpu(void)
1da177e4
LT
721{
722 BUG_ON(smp_processor_id() != 0);
723
724 cpu_set(0, cpu_online_map);
1da177e4
LT
725 S390_lowcore.percpu_offset = __per_cpu_offset[0];
726 current_set[0] = current;
727}
728
ea1f4eec 729void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 730{
54330456 731 cpu_present_map = cpu_possible_map;
1da177e4
LT
732}
733
734/*
735 * the frequency of the profiling timer can be changed
736 * by writing a multiplier value into /proc/profile.
737 *
738 * usually you want to run this on all CPUs ;)
739 */
740int setup_profiling_timer(unsigned int multiplier)
741{
39ce010d 742 return 0;
1da177e4
LT
743}
744
745static DEFINE_PER_CPU(struct cpu, cpu_devices);
746
2fc2d1e9
HC
747static ssize_t show_capability(struct sys_device *dev, char *buf)
748{
749 unsigned int capability;
750 int rc;
751
752 rc = get_cpu_capability(&capability);
753 if (rc)
754 return rc;
755 return sprintf(buf, "%u\n", capability);
756}
757static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
758
759static int __cpuinit smp_cpu_notify(struct notifier_block *self,
760 unsigned long action, void *hcpu)
761{
762 unsigned int cpu = (unsigned int)(long)hcpu;
763 struct cpu *c = &per_cpu(cpu_devices, cpu);
764 struct sys_device *s = &c->sysdev;
765
766 switch (action) {
767 case CPU_ONLINE:
8bb78442 768 case CPU_ONLINE_FROZEN:
2fc2d1e9
HC
769 if (sysdev_create_file(s, &attr_capability))
770 return NOTIFY_BAD;
771 break;
772 case CPU_DEAD:
8bb78442 773 case CPU_DEAD_FROZEN:
2fc2d1e9
HC
774 sysdev_remove_file(s, &attr_capability);
775 break;
776 }
777 return NOTIFY_OK;
778}
779
780static struct notifier_block __cpuinitdata smp_cpu_nb = {
39ce010d 781 .notifier_call = smp_cpu_notify,
2fc2d1e9
HC
782};
783
1da177e4
LT
784static int __init topology_init(void)
785{
786 int cpu;
2fc2d1e9
HC
787
788 register_cpu_notifier(&smp_cpu_nb);
1da177e4 789
97db7fbf 790 for_each_possible_cpu(cpu) {
6721f778 791 struct cpu *c = &per_cpu(cpu_devices, cpu);
2fc2d1e9 792 struct sys_device *s = &c->sysdev;
6721f778
HC
793
794 c->hotpluggable = 1;
2fc2d1e9
HC
795 register_cpu(c, cpu);
796 if (!cpu_online(cpu))
797 continue;
798 s = &c->sysdev;
799 sysdev_create_file(s, &attr_capability);
1da177e4
LT
800 }
801 return 0;
802}
1da177e4 803subsys_initcall(topology_init);