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Merge branch 'for-2.6.28' of git://linux-nfs.org/~bfields/linux
[linux-2.6-block.git] / arch / s390 / kernel / entry64.S
CommitLineData
1da177e4 1/*
54dfe5dd 2 * arch/s390/kernel/entry64.S
1da177e4
LT		 3 * S390 low-level entry points.
4 *
54dfe5dd 5 * Copyright (C) IBM Corp. 1999,2006
1da177e4 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
25d83cbf
HC		 7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
77fa2245 9 * Heiko Carstens <heiko.carstens@de.ibm.com>
1da177e4
LT		 10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
2bc89b5e 14#include <linux/init.h>
1da177e4
LT		 15#include <asm/cache.h>
16#include <asm/lowcore.h>
17#include <asm/errno.h>
18#include <asm/ptrace.h>
19#include <asm/thread_info.h>
0013a854 20#include <asm/asm-offsets.h>
1da177e4
LT		 21#include <asm/unistd.h>
22#include <asm/page.h>
23
24/*
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
27 */
25d83cbf
HC		 28SP_PTREGS = STACK_FRAME_OVERHEAD
29SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
35SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
36SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
37SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
38SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
39SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
40SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
41SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
42SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
43SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
44SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
45SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
46SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
47SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
59da2139 49SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
25d83cbf 50SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
1da177e4
LT		 51
52STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
53STACK_SIZE = 1 << STACK_SHIFT
54
753c4dd6 55_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54dfe5dd 56 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
753c4dd6 57_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54dfe5dd 58 _TIF_MCCK_PENDING)
1da177e4
LT		 59
60#define BASED(name) name-system_call(%r13)
61
1f194a4c
HC		 62#ifdef CONFIG_TRACE_IRQFLAGS
63 .macro TRACE_IRQS_ON
50bec4ce
HC		 64 basr %r2,%r0
65 brasl %r14,trace_hardirqs_on_caller
1f194a4c
HC		 66 .endm
67
68 .macro TRACE_IRQS_OFF
50bec4ce
HC		 69 basr %r2,%r0
70 brasl %r14,trace_hardirqs_off_caller
1f194a4c 71 .endm
523b44cf 72
411788ea 73 .macro TRACE_IRQS_CHECK
50bec4ce 74 basr %r2,%r0
411788ea
HC		 75 tm SP_PSW(%r15),0x03 # irqs enabled?
76 jz 0f
50bec4ce 77 brasl %r14,trace_hardirqs_on_caller
411788ea 78 j 1f
50bec4ce 790: brasl %r14,trace_hardirqs_off_caller
411788ea 801:
523b44cf 81 .endm
1f194a4c
HC		 82#else
83#define TRACE_IRQS_ON
84#define TRACE_IRQS_OFF
411788ea
HC		 85#define TRACE_IRQS_CHECK
86#endif
87
88#ifdef CONFIG_LOCKDEP
89 .macro LOCKDEP_SYS_EXIT
90 tm SP_PSW+1(%r15),0x01 # returning to user ?
91 jz 0f
92 brasl %r14,lockdep_sys_exit
930:
94 .endm
95#else
523b44cf 96#define LOCKDEP_SYS_EXIT
1f194a4c
HC		 97#endif
98
25d83cbf 99 .macro STORE_TIMER lc_offset
1da177e4
LT		 100#ifdef CONFIG_VIRT_CPU_ACCOUNTING
101 stpt \lc_offset
102#endif
103 .endm
104
105#ifdef CONFIG_VIRT_CPU_ACCOUNTING
25d83cbf 106 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
1da177e4
LT		 107 lg %r10,\lc_from
108 slg %r10,\lc_to
109 alg %r10,\lc_sum
110 stg %r10,\lc_sum
111 .endm
112#endif
113
114/*
115 * Register usage in interrupt handlers:
116 * R9 - pointer to current task structure
117 * R13 - pointer to literal pool
118 * R14 - return register for function calls
119 * R15 - kernel stack pointer
120 */
121
25d83cbf 122 .macro SAVE_ALL_BASE savearea
1da177e4
LT		 123 stmg %r12,%r15,\savearea
124 larl %r13,system_call
125 .endm
126
987ad70a
MS		 127 .macro SAVE_ALL_SVC psworg,savearea
128 la %r12,\psworg
129 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
130 .endm
131
63b12246 132 .macro SAVE_ALL_SYNC psworg,savearea
1da177e4 133 la %r12,\psworg
1da177e4
LT		 134 tm \psworg+1,0x01 # test problem state bit
135 jz 2f # skip stack setup save
136 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
63b12246
MS		 137#ifdef CONFIG_CHECK_STACK
138 j 3f
1392: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
140 jz stack_overflow
1413:
142#endif
1432:
144 .endm
145
146 .macro SAVE_ALL_ASYNC psworg,savearea
147 la %r12,\psworg
1da177e4
LT		 148 tm \psworg+1,0x01 # test problem state bit
149 jnz 1f # from user -> load kernel stack
150 clc \psworg+8(8),BASED(.Lcritical_end)
151 jhe 0f
152 clc \psworg+8(8),BASED(.Lcritical_start)
153 jl 0f
154 brasl %r14,cleanup_critical
6add9f7f 155 tm 1(%r12),0x01 # retest problem state after cleanup
1da177e4
LT		 156 jnz 1f
1570: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
158 slgr %r14,%r15
159 srag %r14,%r14,STACK_SHIFT
160 jz 2f
1611: lg %r15,__LC_ASYNC_STACK # load async stack
1da177e4
LT		 162#ifdef CONFIG_CHECK_STACK
163 j 3f
1642: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
165 jz stack_overflow
1663:
167#endif
77fa2245
HC		 1682:
169 .endm
170
171 .macro CREATE_STACK_FRAME psworg,savearea
25d83cbf
HC		 172 aghi %r15,-SP_SIZE # make room for registers & psw
173 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
1da177e4 174 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
59da2139 175 icm %r12,3,__LC_SVC_ILC
1da177e4 176 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
59da2139 177 st %r12,SP_SVCNR(%r15)
1da177e4
LT		 178 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
179 la %r12,0
180 stg %r12,__SF_BACKCHAIN(%r15)
25d83cbf 181 .endm
1da177e4 182
ae6aa2ea
MS		 183 .macro RESTORE_ALL psworg,sync
184 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
1da177e4 185 .if !\sync
ae6aa2ea 186 ni \psworg+1,0xfd # clear wait state bit
1da177e4
LT		 187 .endif
188 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15 of user
189 STORE_TIMER __LC_EXIT_TIMER
ae6aa2ea 190 lpswe \psworg # back to caller
1da177e4
LT		 191 .endm
192
193/*
194 * Scheduler resume function, called by switch_to
195 * gpr2 = (task_struct *) prev
196 * gpr3 = (task_struct *) next
197 * Returns:
198 * gpr2 = prev
199 */
25d83cbf 200 .globl __switch_to
1da177e4
LT		 201__switch_to:
202 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
203 jz __switch_to_noper # if not we're fine
25d83cbf
HC		 204 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
205 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
206 je __switch_to_noper # we got away without bashing TLB's
207 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
1da177e4 208__switch_to_noper:
25d83cbf 209 lg %r4,__THREAD_info(%r2) # get thread_info of prev
77fa2245
HC		 210 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
211 jz __switch_to_no_mcck
212 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
213 lg %r4,__THREAD_info(%r3) # get thread_info of next
214 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
215__switch_to_no_mcck:
25d83cbf 216 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
1da177e4
LT		 217 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
218 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
25d83cbf 219 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
1da177e4
LT		 220 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
221 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
25d83cbf 222 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
1da177e4
LT		 223 stg %r3,__LC_THREAD_INFO
224 aghi %r3,STACK_SIZE
225 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
226 br %r14
227
228__critical_start:
229/*
230 * SVC interrupt handler routine. System calls are synchronous events and
231 * are executed with interrupts enabled.
232 */
233
25d83cbf 234 .globl system_call
1da177e4
LT		 235system_call:
236 STORE_TIMER __LC_SYNC_ENTER_TIMER
237sysc_saveall:
238 SAVE_ALL_BASE __LC_SAVE_AREA
987ad70a 239 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
25d83cbf
HC		 240 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
241 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
1da177e4
LT		 242#ifdef CONFIG_VIRT_CPU_ACCOUNTING
243sysc_vtime:
1da177e4
LT		 244 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
245sysc_stime:
246 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
247sysc_update:
248 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
249#endif
250sysc_do_svc:
251 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
59da2139 252 ltgr %r7,%r7 # test for svc 0
1da177e4
LT		 253 jnz sysc_nr_ok
254 # svc 0: system call number in %r1
255 cl %r1,BASED(.Lnr_syscalls)
256 jnl sysc_nr_ok
25d83cbf 257 lgfr %r7,%r1 # clear high word in r1
1da177e4
LT		 258sysc_nr_ok:
259 mvc SP_ARGS(8,%r15),SP_R7(%r15)
260sysc_do_restart:
59da2139
MS		 261 sth %r7,SP_SVCNR(%r15)
262 sllg %r7,%r7,2 # svc number * 4
25d83cbf 263 larl %r10,sys_call_table
347a8dc3 264#ifdef CONFIG_COMPAT
c563077e
HC		 265 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
266 jno sysc_noemu
25d83cbf 267 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
1da177e4
LT		 268sysc_noemu:
269#endif
270 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
25d83cbf
HC		 271 lgf %r8,0(%r7,%r10) # load address of system call routine
272 jnz sysc_tracesys
273 basr %r14,%r8 # call sys_xxxx
274 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
1da177e4
LT		 275
276sysc_return:
1da177e4 277 tm __TI_flags+7(%r9),_TIF_WORK_SVC
25d83cbf 278 jnz sysc_work # there is work to do (signals etc.)
411788ea
HC		 279sysc_restore:
280#ifdef CONFIG_TRACE_IRQFLAGS
281 larl %r1,sysc_restore_trace_psw
282 lpswe 0(%r1)
283sysc_restore_trace:
284 TRACE_IRQS_CHECK
523b44cf 285 LOCKDEP_SYS_EXIT
411788ea 286#endif
1da177e4 287sysc_leave:
25d83cbf 288 RESTORE_ALL __LC_RETURN_PSW,1
411788ea
HC		 289sysc_done:
290
291#ifdef CONFIG_TRACE_IRQFLAGS
292 .align 8
293 .globl sysc_restore_trace_psw
294sysc_restore_trace_psw:
295 .quad 0, sysc_restore_trace
296#endif
1da177e4
LT		 297
298#
299# recheck if there is more work to do
300#
301sysc_work_loop:
302 tm __TI_flags+7(%r9),_TIF_WORK_SVC
411788ea 303 jz sysc_restore # there is no work to do
1da177e4
LT		 304#
305# One of the work bits is on. Find out which one.
306#
307sysc_work:
2688905e
MS		 308 tm SP_PSW+1(%r15),0x01 # returning to user ?
309 jno sysc_restore
77fa2245
HC		 310 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
311 jo sysc_mcck_pending
1da177e4
LT		 312 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
313 jo sysc_reschedule
02a029b3 314 tm __TI_flags+7(%r9),_TIF_SIGPENDING
54dfe5dd 315 jnz sysc_sigpending
753c4dd6
MS		 316 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
317 jnz sysc_notify_resume
1da177e4
LT		 318 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
319 jo sysc_restart
320 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
321 jo sysc_singlestep
411788ea
HC		 322 j sysc_restore
323sysc_work_done:
1da177e4
LT		 324
325#
326# _TIF_NEED_RESCHED is set, call schedule
25d83cbf
HC		 327#
328sysc_reschedule:
329 larl %r14,sysc_work_loop
330 jg schedule # return point is sysc_return
1da177e4 331
77fa2245
HC		 332#
333# _TIF_MCCK_PENDING is set, call handler
334#
335sysc_mcck_pending:
336 larl %r14,sysc_work_loop
25d83cbf 337 jg s390_handle_mcck # TIF bit will be cleared by handler
77fa2245 338
1da177e4 339#
02a029b3 340# _TIF_SIGPENDING is set, call do_signal
1da177e4 341#
25d83cbf 342sysc_sigpending:
1da177e4 343 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
25d83cbf
HC		 344 la %r2,SP_PTREGS(%r15) # load pt_regs
345 brasl %r14,do_signal # call do_signal
1da177e4
LT		 346 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
347 jo sysc_restart
348 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
349 jo sysc_singlestep
e1c3ad96 350 j sysc_work_loop
1da177e4 351
753c4dd6
MS		 352#
353# _TIF_NOTIFY_RESUME is set, call do_notify_resume
354#
355sysc_notify_resume:
356 la %r2,SP_PTREGS(%r15) # load pt_regs
357 larl %r14,sysc_work_loop
358 jg do_notify_resume # call do_notify_resume
359
1da177e4
LT		 360#
361# _TIF_RESTART_SVC is set, set up registers and restart svc
362#
363sysc_restart:
364 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
25d83cbf 365 lg %r7,SP_R2(%r15) # load new svc number
1da177e4 366 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
25d83cbf
HC		 367 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
368 j sysc_do_restart # restart svc
1da177e4
LT		 369
370#
371# _TIF_SINGLE_STEP is set, call do_single_step
372#
373sysc_singlestep:
59da2139
MS		 374 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
375 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
1da177e4
LT		 376 la %r2,SP_PTREGS(%r15) # address of register-save area
377 larl %r14,sysc_return # load adr. of system return
378 jg do_single_step # branch to do_sigtrap
379
1da177e4 380#
753c4dd6
MS		 381# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
382# and after the system call
1da177e4
LT		 383#
384sysc_tracesys:
25d83cbf 385 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT		 386 la %r3,0
387 srl %r7,2
25d83cbf 388 stg %r7,SP_R2(%r15)
753c4dd6 389 brasl %r14,do_syscall_trace_enter
1da177e4 390 lghi %r0,NR_syscalls
753c4dd6 391 clgr %r0,%r2
1da177e4 392 jnh sysc_tracenogo
59da2139 393 sllg %r7,%r2,2 # svc number *4
1da177e4
LT		 394 lgf %r8,0(%r7,%r10)
395sysc_tracego:
25d83cbf
HC		 396 lmg %r3,%r6,SP_R3(%r15)
397 lg %r2,SP_ORIG_R2(%r15)
398 basr %r14,%r8 # call sys_xxx
399 stg %r2,SP_R2(%r15) # store return value
1da177e4
LT		 400sysc_tracenogo:
401 tm __TI_flags+7(%r9),(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT)
25d83cbf
HC		 402 jz sysc_return
403 la %r2,SP_PTREGS(%r15) # load pt_regs
25d83cbf 404 larl %r14,sysc_return # return point is sysc_return
753c4dd6 405 jg do_syscall_trace_exit
1da177e4
LT		 406
407#
408# a new process exits the kernel with ret_from_fork
409#
25d83cbf 410 .globl ret_from_fork
1da177e4
LT		 411ret_from_fork:
412 lg %r13,__LC_SVC_NEW_PSW+8
413 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
414 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
415 jo 0f
416 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
25d83cbf 4170: brasl %r14,schedule_tail
1f194a4c 418 TRACE_IRQS_ON
25d83cbf 419 stosm 24(%r15),0x03 # reenable interrupts
1da177e4
LT		 420 j sysc_return
421
422#
03ff9a23
MS		 423# kernel_execve function needs to deal with pt_regs that is not
424# at the usual place
1da177e4 425#
03ff9a23
MS		 426 .globl kernel_execve
427kernel_execve:
428 stmg %r12,%r15,96(%r15)
429 lgr %r14,%r15
430 aghi %r15,-SP_SIZE
431 stg %r14,__SF_BACKCHAIN(%r15)
432 la %r12,SP_PTREGS(%r15)
433 xc 0(__PT_SIZE,%r12),0(%r12)
434 lgr %r5,%r12
435 brasl %r14,do_execve
436 ltgfr %r2,%r2
437 je 0f
438 aghi %r15,SP_SIZE
439 lmg %r12,%r15,96(%r15)
440 br %r14
441 # execve succeeded.
4420: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
443 lg %r15,__LC_KERNEL_STACK # load ksp
444 aghi %r15,-SP_SIZE # make room for registers & psw
445 lg %r13,__LC_SVC_NEW_PSW+8
446 lg %r9,__LC_THREAD_INFO
447 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
448 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
449 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
450 brasl %r14,execve_tail
451 j sysc_return
1da177e4
LT		 452
453/*
454 * Program check handler routine
455 */
456
25d83cbf 457 .globl pgm_check_handler
1da177e4
LT		 458pgm_check_handler:
459/*
460 * First we need to check for a special case:
461 * Single stepping an instruction that disables the PER event mask will
462 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
463 * For a single stepped SVC the program check handler gets control after
464 * the SVC new PSW has been loaded. But we want to execute the SVC first and
465 * then handle the PER event. Therefore we update the SVC old PSW to point
466 * to the pgm_check_handler and branch to the SVC handler after we checked
467 * if we have to load the kernel stack register.
468 * For every other possible cause for PER event without the PER mask set
469 * we just ignore the PER event (FIXME: is there anything we have to do
470 * for LPSW?).
471 */
472 STORE_TIMER __LC_SYNC_ENTER_TIMER
473 SAVE_ALL_BASE __LC_SAVE_AREA
25d83cbf
HC		 474 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
475 jnz pgm_per # got per exception -> special case
63b12246 476 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
77fa2245 477 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 478#ifdef CONFIG_VIRT_CPU_ACCOUNTING
479 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
480 jz pgm_no_vtime
481 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
482 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
483 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
484pgm_no_vtime:
485#endif
486 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
9e74a6b8 487 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
411788ea 488 TRACE_IRQS_OFF
25d83cbf 489 lgf %r3,__LC_PGM_ILC # load program interruption code
1da177e4
LT		 490 lghi %r8,0x7f
491 ngr %r8,%r3
492pgm_do_call:
25d83cbf
HC		 493 sll %r8,3
494 larl %r1,pgm_check_table
495 lg %r1,0(%r8,%r1) # load address of handler routine
496 la %r2,SP_PTREGS(%r15) # address of register-save area
1da177e4 497 larl %r14,sysc_return
25d83cbf 498 br %r1 # branch to interrupt-handler
1da177e4
LT		 499
500#
501# handle per exception
502#
503pgm_per:
25d83cbf
HC		 504 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
505 jnz pgm_per_std # ok, normal per event from user space
1da177e4 506# ok its one of the special cases, now we need to find out which one
25d83cbf
HC		 507 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
508 je pgm_svcper
1da177e4
LT		 509# no interesting special case, ignore PER event
510 lmg %r12,%r15,__LC_SAVE_AREA
25d83cbf 511 lpswe __LC_PGM_OLD_PSW
1da177e4
LT		 512
513#
514# Normal per exception
515#
516pgm_per_std:
63b12246 517 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
77fa2245 518 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 519#ifdef CONFIG_VIRT_CPU_ACCOUNTING
520 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
521 jz pgm_no_vtime2
522 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
523 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
524 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
525pgm_no_vtime2:
526#endif
527 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
411788ea 528 TRACE_IRQS_OFF
1da177e4 529 lg %r1,__TI_task(%r9)
4ba069b8
MG		 530 tm SP_PSW+1(%r15),0x01 # kernel per event ?
531 jz kernel_per
1da177e4
LT		 532 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
533 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
534 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
535 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
25d83cbf 536 lgf %r3,__LC_PGM_ILC # load program interruption code
1da177e4 537 lghi %r8,0x7f
25d83cbf 538 ngr %r8,%r3 # clear per-event-bit and ilc
1da177e4
LT		 539 je sysc_return
540 j pgm_do_call
541
542#
543# it was a single stepped SVC that is causing all the trouble
544#
545pgm_svcper:
63b12246 546 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 547 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4 548#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1da177e4
LT		 549 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
550 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
551 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1da177e4 552#endif
25d83cbf 553 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
1da177e4
LT		 554 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
555 lg %r1,__TI_task(%r9)
556 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
557 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
558 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
559 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
1f194a4c 560 TRACE_IRQS_ON
1da177e4
LT		 561 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
562 j sysc_do_svc
563
4ba069b8
MG		 564#
565# per was called from kernel, must be kprobes
566#
567kernel_per:
59da2139 568 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
4ba069b8 569 la %r2,SP_PTREGS(%r15) # address of register-save area
411788ea 570 larl %r14,sysc_restore # load adr. of system ret, no work
4ba069b8
MG		 571 jg do_single_step # branch to do_single_step
572
1da177e4
LT		 573/*
574 * IO interrupt handler routine
575 */
25d83cbf 576 .globl io_int_handler
1da177e4
LT		 577io_int_handler:
578 STORE_TIMER __LC_ASYNC_ENTER_TIMER
579 stck __LC_INT_CLOCK
580 SAVE_ALL_BASE __LC_SAVE_AREA+32
63b12246 581 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
77fa2245 582 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 583#ifdef CONFIG_VIRT_CPU_ACCOUNTING
584 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
585 jz io_no_vtime
586 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
587 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
588 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
589io_no_vtime:
590#endif
591 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
1f194a4c 592 TRACE_IRQS_OFF
25d83cbf
HC		 593 la %r2,SP_PTREGS(%r15) # address of register-save area
594 brasl %r14,do_IRQ # call standard irq handler
1da177e4 595io_return:
1da177e4 596 tm __TI_flags+7(%r9),_TIF_WORK_INT
25d83cbf 597 jnz io_work # there is work to do (signals etc.)
411788ea
HC		 598io_restore:
599#ifdef CONFIG_TRACE_IRQFLAGS
600 larl %r1,io_restore_trace_psw
601 lpswe 0(%r1)
602io_restore_trace:
603 TRACE_IRQS_CHECK
523b44cf 604 LOCKDEP_SYS_EXIT
411788ea 605#endif
1da177e4 606io_leave:
25d83cbf 607 RESTORE_ALL __LC_RETURN_PSW,0
ae6aa2ea 608io_done:
1da177e4 609
411788ea
HC		 610#ifdef CONFIG_TRACE_IRQFLAGS
611 .align 8
612 .globl io_restore_trace_psw
613io_restore_trace_psw:
614 .quad 0, io_restore_trace
615#endif
616
2688905e 617#
0eaeafa1
CB		 618# There is work todo, we need to check if we return to userspace, then
619# check, if we are in SIE, if yes leave it
2688905e
MS		 620#
621io_work:
622 tm SP_PSW+1(%r15),0x01 # returning to user ?
623#ifndef CONFIG_PREEMPT
0eaeafa1
CB		 624#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
625 jnz io_work_user # yes -> no need to check for SIE
626 la %r1, BASED(sie_opcode) # we return to kernel here
627 lg %r2, SP_PSW+8(%r15)
628 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
629 jne io_restore # no-> return to kernel
630 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
631 aghi %r1, 4
632 stg %r1, SP_PSW+8(%r15)
633 j io_restore # return to kernel
634#else
2688905e 635 jno io_restore # no-> skip resched & signal
0eaeafa1 636#endif
2688905e
MS		 637#else
638 jnz io_work_user # yes -> do resched & signal
0eaeafa1
CB		 639#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
640 la %r1, BASED(sie_opcode)
641 lg %r2, SP_PSW+8(%r15)
642 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
643 jne 0f # no -> leave PSW alone
644 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
645 aghi %r1, 4
646 stg %r1, SP_PSW+8(%r15)
6470:
648#endif
2688905e 649 # check for preemptive scheduling
25d83cbf 650 icm %r0,15,__TI_precount(%r9)
2688905e 651 jnz io_restore # preemption is disabled
1da177e4
LT		 652 # switch to kernel stack
653 lg %r1,SP_R15(%r15)
654 aghi %r1,-SP_SIZE
655 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
25d83cbf 656 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
1da177e4
LT		 657 lgr %r15,%r1
658io_resume_loop:
659 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
411788ea 660 jno io_restore
b8e7a54c
HC		 661 larl %r14,io_resume_loop
662 jg preempt_schedule_irq
1da177e4
LT		 663#endif
664
2688905e 665io_work_user:
1da177e4
LT		 666 lg %r1,__LC_KERNEL_STACK
667 aghi %r1,-SP_SIZE
668 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
25d83cbf 669 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
1da177e4
LT		 670 lgr %r15,%r1
671#
672# One of the work bits is on. Find out which one.
54dfe5dd
HC		 673# Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
674# and _TIF_MCCK_PENDING
1da177e4
LT		 675#
676io_work_loop:
77fa2245
HC		 677 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
678 jo io_mcck_pending
1da177e4
LT		 679 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
680 jo io_reschedule
02a029b3 681 tm __TI_flags+7(%r9),_TIF_SIGPENDING
54dfe5dd 682 jnz io_sigpending
753c4dd6
MS		 683 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
684 jnz io_notify_resume
411788ea
HC		 685 j io_restore
686io_work_done:
1da177e4 687
0eaeafa1
CB		 688#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
689sie_opcode:
690 .long 0xb2140000
691#endif
692
77fa2245
HC		 693#
694# _TIF_MCCK_PENDING is set, call handler
695#
696io_mcck_pending:
b771aeac 697 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
b771aeac 698 j io_work_loop
77fa2245 699
1da177e4
LT		 700#
701# _TIF_NEED_RESCHED is set, call schedule
25d83cbf
HC		 702#
703io_reschedule:
411788ea 704 TRACE_IRQS_ON
25d83cbf
HC		 705 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
706 brasl %r14,schedule # call scheduler
707 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
411788ea 708 TRACE_IRQS_OFF
1da177e4 709 tm __TI_flags+7(%r9),_TIF_WORK_INT
411788ea 710 jz io_restore # there is no work to do
1da177e4
LT		 711 j io_work_loop
712
713#
02a029b3 714# _TIF_SIGPENDING or is set, call do_signal
1da177e4 715#
25d83cbf 716io_sigpending:
411788ea 717 TRACE_IRQS_ON
25d83cbf
HC		 718 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
719 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4 720 brasl %r14,do_signal # call do_signal
25d83cbf 721 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
411788ea 722 TRACE_IRQS_OFF
e1c3ad96 723 j io_work_loop
1da177e4 724
753c4dd6
MS		 725#
726# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
727#
728io_notify_resume:
729 TRACE_IRQS_ON
730 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
731 la %r2,SP_PTREGS(%r15) # load pt_regs
732 brasl %r14,do_notify_resume # call do_notify_resume
733 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
734 TRACE_IRQS_OFF
735 j io_work_loop
736
1da177e4
LT		 737/*
738 * External interrupt handler routine
739 */
25d83cbf 740 .globl ext_int_handler
1da177e4
LT		 741ext_int_handler:
742 STORE_TIMER __LC_ASYNC_ENTER_TIMER
743 stck __LC_INT_CLOCK
744 SAVE_ALL_BASE __LC_SAVE_AREA+32
63b12246 745 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
77fa2245 746 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 747#ifdef CONFIG_VIRT_CPU_ACCOUNTING
748 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
749 jz ext_no_vtime
750 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
751 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
752 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
753ext_no_vtime:
754#endif
755 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
1f194a4c 756 TRACE_IRQS_OFF
25d83cbf
HC		 757 la %r2,SP_PTREGS(%r15) # address of register-save area
758 llgh %r3,__LC_EXT_INT_CODE # get interruption code
759 brasl %r14,do_extint
1da177e4
LT		 760 j io_return
761
ae6aa2ea
MS		 762__critical_end:
763
1da177e4
LT		 764/*
765 * Machine check handler routines
766 */
25d83cbf 767 .globl mcck_int_handler
1da177e4 768mcck_int_handler:
77fa2245
HC		 769 la %r1,4095 # revalidate r1
770 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
25d83cbf 771 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
1da177e4 772 SAVE_ALL_BASE __LC_SAVE_AREA+64
77fa2245 773 la %r12,__LC_MCK_OLD_PSW
25d83cbf 774 tm __LC_MCCK_CODE,0x80 # system damage?
77fa2245 775 jo mcck_int_main # yes -> rest of mcck code invalid
1da177e4 776#ifdef CONFIG_VIRT_CPU_ACCOUNTING
63b12246
MS		 777 la %r14,4095
778 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
779 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
780 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
781 jo 1f
782 la %r14,__LC_SYNC_ENTER_TIMER
783 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
784 jl 0f
785 la %r14,__LC_ASYNC_ENTER_TIMER
7860: clc 0(8,%r14),__LC_EXIT_TIMER
787 jl 0f
788 la %r14,__LC_EXIT_TIMER
7890: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
790 jl 0f
791 la %r14,__LC_LAST_UPDATE_TIMER
7920: spt 0(%r14)
793 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
7941:
1da177e4 795#endif
63b12246 796 tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
77fa2245 797 jno mcck_int_main # no -> skip cleanup critical
25d83cbf 798 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
77fa2245
HC		 799 jnz mcck_int_main # from user -> load kernel stack
800 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
801 jhe mcck_int_main
25d83cbf 802 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
77fa2245 803 jl mcck_int_main
25d83cbf 804 brasl %r14,cleanup_critical
77fa2245 805mcck_int_main:
25d83cbf 806 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
77fa2245
HC		 807 slgr %r14,%r15
808 srag %r14,%r14,PAGE_SHIFT
809 jz 0f
25d83cbf 810 lg %r15,__LC_PANIC_STACK # load panic stack
77fa2245 8110: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
ae6aa2ea
MS		 812#ifdef CONFIG_VIRT_CPU_ACCOUNTING
813 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
814 jno mcck_no_vtime # no -> no timer update
63b12246 815 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
ae6aa2ea
MS		 816 jz mcck_no_vtime
817 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
818 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
819 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
820mcck_no_vtime:
821#endif
77fa2245
HC		 822 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
823 la %r2,SP_PTREGS(%r15) # load pt_regs
824 brasl %r14,s390_do_machine_check
25d83cbf 825 tm SP_PSW+1(%r15),0x01 # returning to user ?
77fa2245
HC		 826 jno mcck_return
827 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
828 aghi %r1,-SP_SIZE
829 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
830 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
831 lgr %r15,%r1
832 stosm __SF_EMPTY(%r15),0x04 # turn dat on
833 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
834 jno mcck_return
1f194a4c 835 TRACE_IRQS_OFF
77fa2245 836 brasl %r14,s390_handle_mcck
1f194a4c 837 TRACE_IRQS_ON
1da177e4 838mcck_return:
63b12246
MS		 839 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
840 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
841 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
842#ifdef CONFIG_VIRT_CPU_ACCOUNTING
843 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
844 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
845 jno 0f
846 stpt __LC_EXIT_TIMER
8470:
848#endif
849 lpswe __LC_RETURN_MCCK_PSW # back to caller
1da177e4 850
1da177e4
LT		 851/*
852 * Restart interruption handler, kick starter for additional CPUs
853 */
84b36a8e 854#ifdef CONFIG_SMP
2bc89b5e 855 __CPUINIT
25d83cbf 856 .globl restart_int_handler
1da177e4 857restart_int_handler:
25d83cbf
HC		 858 lg %r15,__LC_SAVE_AREA+120 # load ksp
859 lghi %r10,__LC_CREGS_SAVE_AREA
860 lctlg %c0,%c15,0(%r10) # get new ctl regs
861 lghi %r10,__LC_AREGS_SAVE_AREA
862 lam %a0,%a15,0(%r10)
863 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
864 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
865 jg start_secondary
84b36a8e 866 .previous
1da177e4
LT		 867#else
868/*
869 * If we do not run with SMP enabled, let the new CPU crash ...
870 */
25d83cbf 871 .globl restart_int_handler
1da177e4 872restart_int_handler:
25d83cbf 873 basr %r1,0
1da177e4 874restart_base:
25d83cbf
HC		 875 lpswe restart_crash-restart_base(%r1)
876 .align 8
1da177e4 877restart_crash:
25d83cbf 878 .long 0x000a0000,0x00000000,0x00000000,0x00000000
1da177e4
LT		 879restart_go:
880#endif
881
882#ifdef CONFIG_CHECK_STACK
883/*
884 * The synchronous or the asynchronous stack overflowed. We are dead.
885 * No need to properly save the registers, we are going to panic anyway.
886 * Setup a pt_regs so that show_trace can provide a good call trace.
887 */
888stack_overflow:
889 lg %r15,__LC_PANIC_STACK # change to panic stack
9514e231 890 aghi %r15,-SP_SIZE
1da177e4
LT		 891 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
892 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
893 la %r1,__LC_SAVE_AREA
894 chi %r12,__LC_SVC_OLD_PSW
895 je 0f
896 chi %r12,__LC_PGM_OLD_PSW
897 je 0f
9514e231 898 la %r1,__LC_SAVE_AREA+32
25d83cbf 8990: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
9e74a6b8 900 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
25d83cbf
HC		 901 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
902 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT		 903 jg kernel_stack_overflow
904#endif
905
906cleanup_table_system_call:
907 .quad system_call, sysc_do_svc
908cleanup_table_sysc_return:
909 .quad sysc_return, sysc_leave
910cleanup_table_sysc_leave:
411788ea 911 .quad sysc_leave, sysc_done
1da177e4 912cleanup_table_sysc_work_loop:
411788ea 913 .quad sysc_work_loop, sysc_work_done
63b12246
MS		 914cleanup_table_io_return:
915 .quad io_return, io_leave
ae6aa2ea
MS		 916cleanup_table_io_leave:
917 .quad io_leave, io_done
918cleanup_table_io_work_loop:
411788ea 919 .quad io_work_loop, io_work_done
1da177e4
LT		 920
921cleanup_critical:
922 clc 8(8,%r12),BASED(cleanup_table_system_call)
923 jl 0f
924 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
925 jl cleanup_system_call
9260:
927 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
928 jl 0f
929 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
930 jl cleanup_sysc_return
9310:
932 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
933 jl 0f
934 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
935 jl cleanup_sysc_leave
9360:
937 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
938 jl 0f
939 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
77fa2245 940 jl cleanup_sysc_return
63b12246
MS		 9410:
942 clc 8(8,%r12),BASED(cleanup_table_io_return)
943 jl 0f
944 clc 8(8,%r12),BASED(cleanup_table_io_return+8)
945 jl cleanup_io_return
ae6aa2ea
MS		 9460:
947 clc 8(8,%r12),BASED(cleanup_table_io_leave)
948 jl 0f
949 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
950 jl cleanup_io_leave
9510:
952 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
953 jl 0f
954 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
955 jl cleanup_io_return
1da177e4
LT		 9560:
957 br %r14
958
959cleanup_system_call:
960 mvc __LC_RETURN_PSW(16),0(%r12)
ae6aa2ea
MS		 961 cghi %r12,__LC_MCK_OLD_PSW
962 je 0f
963 la %r12,__LC_SAVE_AREA+32
964 j 1f
9650: la %r12,__LC_SAVE_AREA+64
9661:
1da177e4
LT		 967#ifdef CONFIG_VIRT_CPU_ACCOUNTING
968 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
969 jh 0f
970 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9710: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
972 jhe cleanup_vtime
973#endif
974 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
975 jh 0f
ae6aa2ea
MS		 976 mvc __LC_SAVE_AREA(32),0(%r12)
9770: stg %r13,8(%r12)
978 stg %r12,__LC_SAVE_AREA+96 # argh
63b12246 979 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 980 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
ae6aa2ea
MS		 981 lg %r12,__LC_SAVE_AREA+96 # argh
982 stg %r15,24(%r12)
1da177e4
LT		 983 llgh %r7,__LC_SVC_INT_CODE
984#ifdef CONFIG_VIRT_CPU_ACCOUNTING
985cleanup_vtime:
986 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
987 jhe cleanup_stime
1da177e4
LT		 988 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
989cleanup_stime:
990 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
991 jh cleanup_update
992 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
993cleanup_update:
994 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1da177e4
LT		 995#endif
996 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
997 la %r12,__LC_RETURN_PSW
998 br %r14
999cleanup_system_call_insn:
1000 .quad sysc_saveall
1001#ifdef CONFIG_VIRT_CPU_ACCOUNTING
25d83cbf
HC		 1002 .quad system_call
1003 .quad sysc_vtime
1004 .quad sysc_stime
1005 .quad sysc_update
1da177e4
LT		 1006#endif
1007
1008cleanup_sysc_return:
1009 mvc __LC_RETURN_PSW(8),0(%r12)
1010 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
1011 la %r12,__LC_RETURN_PSW
1012 br %r14
1013
1014cleanup_sysc_leave:
1015 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
ae6aa2ea 1016 je 2f
1da177e4
LT		 1017#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1018 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1019 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
ae6aa2ea 1020 je 2f
1da177e4
LT		 1021#endif
1022 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
ae6aa2ea
MS		 1023 cghi %r12,__LC_MCK_OLD_PSW
1024 jne 0f
1025 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1026 j 1f
10270: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
10281: lmg %r0,%r11,SP_R0(%r15)
1da177e4 1029 lg %r15,SP_R15(%r15)
ae6aa2ea 10302: la %r12,__LC_RETURN_PSW
1da177e4
LT		 1031 br %r14
1032cleanup_sysc_leave_insn:
411788ea 1033 .quad sysc_done - 4
1da177e4 1034#ifdef CONFIG_VIRT_CPU_ACCOUNTING
411788ea 1035 .quad sysc_done - 8
1da177e4 1036#endif
1da177e4 1037
ae6aa2ea
MS		 1038cleanup_io_return:
1039 mvc __LC_RETURN_PSW(8),0(%r12)
1040 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
1041 la %r12,__LC_RETURN_PSW
1042 br %r14
1043
1044cleanup_io_leave:
1045 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
1046 je 2f
1047#ifdef CONFIG_VIRT_CPU_ACCOUNTING
1048 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1049 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
1050 je 2f
1051#endif
1052 mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1053 cghi %r12,__LC_MCK_OLD_PSW
1054 jne 0f
1055 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
1056 j 1f
10570: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
10581: lmg %r0,%r11,SP_R0(%r15)
1059 lg %r15,SP_R15(%r15)
10602: la %r12,__LC_RETURN_PSW
1061 br %r14
1062cleanup_io_leave_insn:
411788ea 1063 .quad io_done - 4
ae6aa2ea 1064#ifdef CONFIG_VIRT_CPU_ACCOUNTING
411788ea 1065 .quad io_done - 8
ae6aa2ea 1066#endif
ae6aa2ea 1067
1da177e4
LT		 1068/*
1069 * Integer constants
1070 */
25d83cbf 1071 .align 4
1da177e4 1072.Lconst:
25d83cbf
HC		 1073.Lnr_syscalls: .long NR_syscalls
1074.L0x0130: .short 0x130
1075.L0x0140: .short 0x140
1076.L0x0150: .short 0x150
1077.L0x0160: .short 0x160
1078.L0x0170: .short 0x170
1da177e4 1079.Lcritical_start:
25d83cbf 1080 .quad __critical_start
1da177e4 1081.Lcritical_end:
25d83cbf 1082 .quad __critical_end
1da177e4 1083
25d83cbf 1084 .section .rodata, "a"
1da177e4 1085#define SYSCALL(esa,esame,emu) .long esame
1da177e4
LT		 1086sys_call_table:
1087#include "syscalls.S"
1088#undef SYSCALL
1089
347a8dc3 1090#ifdef CONFIG_COMPAT
1da177e4
LT		 1091
1092#define SYSCALL(esa,esame,emu) .long emu
1da177e4
LT		 1093sys_call_table_emu:
1094#include "syscalls.S"
1095#undef SYSCALL
1096#endif
Linux 6.x block layer and io_uring tree(s)