projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 1da177e4 | 2 | /* |
| a53c8fab | 3 | * Copyright IBM Corp. 1999, 2012 |
| cbb870c8 HC |
4 | * Author(s): Hartmut Penner <hp@de.ibm.com>, |
| 5 | * Martin Schwidefsky <schwidefsky@de.ibm.com>, | |
| 6 | * Denis Joseph Barrow, | |
| 1da177e4 LT |
7 | */ |
| 8 | ||
| 9 | #ifndef _ASM_S390_LOWCORE_H | |
| 10 | #define _ASM_S390_LOWCORE_H | |
| 11 | ||
| 1da177e4 | 12 | #include <linux/types.h> |
| cbb870c8 HC |
13 | #include <asm/ptrace.h> |
| 14 | #include <asm/cpu.h> | |
| a62bc073 | 15 | #include <asm/types.h> |
| 1da177e4 | 16 | |
| cbb870c8 HC |
17 | #define LC_ORDER 1 |
| 18 | #define LC_PAGES 2 | |
| 19 | ||
| c667aeac | 20 | struct lowcore { |
| cbb870c8 HC |
21 | __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */ |
| 22 | __u32 ipl_parmblock_ptr; /* 0x0014 */ | |
| 866ba284 MS |
23 | __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ |
| 24 | __u32 ext_params; /* 0x0080 */ | |
| 7e180bd8 | 25 | __u16 ext_cpu_addr; /* 0x0084 */ |
| 866ba284 MS |
26 | __u16 ext_int_code; /* 0x0086 */ |
| 27 | __u16 svc_ilc; /* 0x0088 */ | |
| 28 | __u16 svc_code; /* 0x008a */ | |
| 29 | __u16 pgm_ilc; /* 0x008c */ | |
| 30 | __u16 pgm_code; /* 0x008e */ | |
| 31 | __u32 data_exc_code; /* 0x0090 */ | |
| 32 | __u16 mon_class_num; /* 0x0094 */ | |
| 21ee7ffd JF |
33 | __u8 per_code; /* 0x0096 */ |
| 34 | __u8 per_atmid; /* 0x0097 */ | |
| 94038a99 | 35 | __u64 per_address; /* 0x0098 */ |
| 866ba284 MS |
36 | __u8 exc_access_id; /* 0x00a0 */ |
| 37 | __u8 per_access_id; /* 0x00a1 */ | |
| 38 | __u8 op_access_id; /* 0x00a2 */ | |
| 3d53b46c | 39 | __u8 ar_mode_id; /* 0x00a3 */ |
| 866ba284 | 40 | __u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */ |
| 94038a99 MS |
41 | __u64 trans_exc_code; /* 0x00a8 */ |
| 42 | __u64 monitor_code; /* 0x00b0 */ | |
| 866ba284 MS |
43 | __u16 subchannel_id; /* 0x00b8 */ |
| 44 | __u16 subchannel_nr; /* 0x00ba */ | |
| 45 | __u32 io_int_parm; /* 0x00bc */ | |
| 46 | __u32 io_int_word; /* 0x00c0 */ | |
| 47 | __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */ | |
| 48 | __u32 stfl_fac_list; /* 0x00c8 */ | |
| 49 | __u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */ | |
| 004f0bba | 50 | __u64 mcck_interruption_code; /* 0x00e8 */ |
| 866ba284 MS |
51 | __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */ |
| 52 | __u32 external_damage_code; /* 0x00f4 */ | |
| 94038a99 | 53 | __u64 failing_storage_address; /* 0x00f8 */ |
| cbb870c8 HC |
54 | __u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */ |
| 55 | __u64 breaking_event_addr; /* 0x0110 */ | |
| 56 | __u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */ | |
| 866ba284 MS |
57 | psw_t restart_old_psw; /* 0x0120 */ |
| 58 | psw_t external_old_psw; /* 0x0130 */ | |
| 59 | psw_t svc_old_psw; /* 0x0140 */ | |
| 60 | psw_t program_old_psw; /* 0x0150 */ | |
| 61 | psw_t mcck_old_psw; /* 0x0160 */ | |
| 62 | psw_t io_old_psw; /* 0x0170 */ | |
| 63 | __u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */ | |
| 64 | psw_t restart_psw; /* 0x01a0 */ | |
| 65 | psw_t external_new_psw; /* 0x01b0 */ | |
| 66 | psw_t svc_new_psw; /* 0x01c0 */ | |
| 67 | psw_t program_new_psw; /* 0x01d0 */ | |
| 68 | psw_t mcck_new_psw; /* 0x01e0 */ | |
| 69 | psw_t io_new_psw; /* 0x01f0 */ | |
| 70 | ||
| c5328901 MS |
71 | /* Save areas. */ |
| 72 | __u64 save_area_sync[8]; /* 0x0200 */ | |
| 73 | __u64 save_area_async[8]; /* 0x0240 */ | |
| 74 | __u64 save_area_restart[1]; /* 0x0280 */ | |
| d3a73acb MS |
75 | |
| 76 | /* CPU flags. */ | |
| 77 | __u64 cpu_flags; /* 0x0288 */ | |
| c5328901 MS |
78 | |
| 79 | /* Return psws. */ | |
| 80 | psw_t return_psw; /* 0x0290 */ | |
| 81 | psw_t return_mcck_psw; /* 0x02a0 */ | |
| 866ba284 MS |
82 | |
| 83 | /* CPU accounting and timing values. */ | |
| c5328901 MS |
84 | __u64 sync_enter_timer; /* 0x02b0 */ |
| 85 | __u64 async_enter_timer; /* 0x02b8 */ | |
| 86 | __u64 mcck_enter_timer; /* 0x02c0 */ | |
| 87 | __u64 exit_timer; /* 0x02c8 */ | |
| 88 | __u64 user_timer; /* 0x02d0 */ | |
| b7394a5f MS |
89 | __u64 guest_timer; /* 0x02d8 */ |
| 90 | __u64 system_timer; /* 0x02e0 */ | |
| 91 | __u64 hardirq_timer; /* 0x02e8 */ | |
| 92 | __u64 softirq_timer; /* 0x02f0 */ | |
| 93 | __u64 steal_timer; /* 0x02f8 */ | |
| 94 | __u64 last_update_timer; /* 0x0300 */ | |
| 95 | __u64 last_update_clock; /* 0x0308 */ | |
| 96 | __u64 int_clock; /* 0x0310 */ | |
| 97 | __u64 mcck_clock; /* 0x0318 */ | |
| 98 | __u64 clock_comparator; /* 0x0320 */ | |
| 6e2ef5e4 | 99 | __u64 boot_clock[2]; /* 0x0328 */ |
| 866ba284 MS |
100 | |
| 101 | /* Current process. */ | |
| 6e2ef5e4 MS |
102 | __u64 current_task; /* 0x0338 */ |
| 103 | __u64 kernel_stack; /* 0x0340 */ | |
| 8b646bd7 MS |
104 | |
| 105 | /* Interrupt, panic and restart stack. */ | |
| 6e2ef5e4 MS |
106 | __u64 async_stack; /* 0x0348 */ |
| 107 | __u64 panic_stack; /* 0x0350 */ | |
| 108 | __u64 restart_stack; /* 0x0358 */ | |
| 866ba284 | 109 | |
| 8b646bd7 | 110 | /* Restart function and parameter. */ |
| 6e2ef5e4 MS |
111 | __u64 restart_fn; /* 0x0360 */ |
| 112 | __u64 restart_data; /* 0x0368 */ | |
| 113 | __u64 restart_source; /* 0x0370 */ | |
| 866ba284 MS |
114 | |
| 115 | /* Address space pointer. */ | |
| 6e2ef5e4 MS |
116 | __u64 kernel_asce; /* 0x0378 */ |
| 117 | __u64 user_asce; /* 0x0380 */ | |
| e22cf8ca CB |
118 | |
| 119 | /* | |
| 120 | * The lpp and current_pid fields form a | |
| 121 | * 64-bit value that is set as program | |
| 122 | * parameter with the LPP instruction. | |
| 123 | */ | |
| 6e2ef5e4 MS |
124 | __u32 lpp; /* 0x0388 */ |
| 125 | __u32 current_pid; /* 0x038c */ | |
| 866ba284 MS |
126 | |
| 127 | /* SMP info area */ | |
| 6e2ef5e4 MS |
128 | __u32 cpu_nr; /* 0x0390 */ |
| 129 | __u32 softirq_pending; /* 0x0394 */ | |
| 130 | __u64 percpu_offset; /* 0x0398 */ | |
| 131 | __u64 vdso_per_cpu_data; /* 0x03a0 */ | |
| 132 | __u64 machine_flags; /* 0x03a8 */ | |
| 133 | __u32 preempt_count; /* 0x03b0 */ | |
| 134 | __u8 pad_0x03b4[0x03b8-0x03b4]; /* 0x03b4 */ | |
| 135 | __u64 gmap; /* 0x03b8 */ | |
| 136 | __u32 spinlock_lockval; /* 0x03c0 */ | |
| 137 | __u32 fpu_flags; /* 0x03c4 */ | |
| 138 | __u8 pad_0x03c8[0x0400-0x03c8]; /* 0x03c8 */ | |
| 866ba284 | 139 | |
| c742b31c | 140 | /* Per cpu primary space access list */ |
| 63aef00b | 141 | __u32 paste[16]; /* 0x0400 */ |
| 866ba284 | 142 | |
| 63aef00b | 143 | __u8 pad_0x04c0[0x0e00-0x0440]; /* 0x0440 */ |
| 866ba284 MS |
144 | |
| 145 | /* | |
| 146 | * 0xe00 contains the address of the IPL Parameter Information | |
| 147 | * block. Dump tools need IPIB for IPL after dump. | |
| 148 | * Note: do not change the position of any fields in 0x0e00-0x0f00 | |
| 149 | */ | |
| 150 | __u64 ipib; /* 0x0e00 */ | |
| 151 | __u32 ipib_checksum; /* 0x0e08 */ | |
| fbe76568 | 152 | __u64 vmcore_info; /* 0x0e0c */ |
| 4857d4bb MH |
153 | __u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */ |
| 154 | __u64 os_info; /* 0x0e18 */ | |
| 155 | __u8 pad_0x0e20[0x0f00-0x0e20]; /* 0x0e20 */ | |
| 14375bc4 MS |
156 | |
| 157 | /* Extended facility list */ | |
| 158 | __u64 stfle_fac_list[32]; /* 0x0f00 */ | |
| 80703617 MS |
159 | __u8 pad_0x1000[0x11b0-0x1000]; /* 0x1000 */ |
| 160 | ||
| 916cda1a MS |
161 | /* Pointer to the machine check extended save area */ |
| 162 | __u64 mcesad; /* 0x11b0 */ | |
| 866ba284 MS |
163 | |
| 164 | /* 64 bit extparam used for pfault/diag 250: defined by architecture */ | |
| 165 | __u64 ext_params2; /* 0x11B8 */ | |
| 166 | __u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */ | |
| 167 | ||
| 168 | /* CPU register save area: defined by architecture */ | |
| 169 | __u64 floating_pt_save_area[16]; /* 0x1200 */ | |
| 170 | __u64 gpregs_save_area[16]; /* 0x1280 */ | |
| cbb870c8 | 171 | psw_t psw_save_area; /* 0x1300 */ |
| 866ba284 MS |
172 | __u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */ |
| 173 | __u32 prefixreg_save_area; /* 0x1318 */ | |
| 174 | __u32 fpt_creg_save_area; /* 0x131c */ | |
| 175 | __u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */ | |
| 176 | __u32 tod_progreg_save_area; /* 0x1324 */ | |
| 177 | __u32 cpu_timer_save_area[2]; /* 0x1328 */ | |
| 178 | __u32 clock_comp_save_area[2]; /* 0x1330 */ | |
| 179 | __u8 pad_0x1338[0x1340-0x1338]; /* 0x1338 */ | |
| 180 | __u32 access_regs_save_area[16]; /* 0x1340 */ | |
| 181 | __u64 cregs_save_area[16]; /* 0x1380 */ | |
| d35339a4 MS |
182 | __u8 pad_0x1400[0x1800-0x1400]; /* 0x1400 */ |
| 183 | ||
| 184 | /* Transaction abort diagnostic block */ | |
| 185 | __u8 pgm_tdb[256]; /* 0x1800 */ | |
| 916cda1a | 186 | __u8 pad_0x1900[0x2000-0x1900]; /* 0x1900 */ |
| cbb870c8 HC |
187 | } __packed; |
| 188 | ||
| c667aeac | 189 | #define S390_lowcore (*((struct lowcore *) 0)) |
| cbb870c8 | 190 | |
| c667aeac | 191 | extern struct lowcore *lowcore_ptr[]; |
| 1da177e4 | 192 | |
| 4448aaf0 | 193 | static inline void set_prefix(__u32 address) |
| 1da177e4 | 194 | { |
| 94c12cc7 | 195 | asm volatile("spx %0" : : "m" (address) : "memory"); |
| 1da177e4 LT |
196 | } |
| 197 | ||
| 15e9b586 HC |
198 | static inline __u32 store_prefix(void) |
| 199 | { | |
| 200 | __u32 address; | |
| 201 | ||
| 202 | asm volatile("stpx %0" : "=m" (address)); | |
| 203 | return address; | |
| 204 | } | |
| 205 | ||
| cbb870c8 | 206 | #endif /* _ASM_S390_LOWCORE_H */ |