Merge tag 'char-misc-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh...
[linux-2.6-block.git] / arch / powerpc / mm / pgtable.c
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1/*
2 * This file contains common routines for dealing with free of page tables
8d30c14c 3 * Along with common page table handling code
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4 *
5 * Derived from arch/powerpc/mm/tlb_64.c:
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 *
8 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
9 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
10 * Copyright (C) 1996 Paul Mackerras
11 *
12 * Derived from "arch/i386/mm/init.c"
13 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
14 *
15 * Dave Engebretsen <engebret@us.ibm.com>
16 * Rework for PPC64 port.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License
20 * as published by the Free Software Foundation; either version
21 * 2 of the License, or (at your option) any later version.
22 */
23
24#include <linux/kernel.h>
5a0e3ad6 25#include <linux/gfp.h>
0186f47e 26#include <linux/mm.h>
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27#include <linux/percpu.h>
28#include <linux/hardirq.h>
41151e77 29#include <linux/hugetlb.h>
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30#include <asm/pgalloc.h>
31#include <asm/tlbflush.h>
32#include <asm/tlb.h>
33
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34static inline int is_exec_fault(void)
35{
36 return current->thread.regs && TRAP(current->thread.regs) == 0x400;
37}
38
39/* We only try to do i/d cache coherency on stuff that looks like
40 * reasonably "normal" PTEs. We currently require a PTE to be present
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41 * and we avoid _PAGE_SPECIAL and _PAGE_NO_CACHE. We also only do that
42 * on userspace PTEs
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43 */
44static inline int pte_looks_normal(pte_t pte)
45{
46 return (pte_val(pte) &
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47 (_PAGE_PRESENT | _PAGE_SPECIAL | _PAGE_NO_CACHE | _PAGE_USER)) ==
48 (_PAGE_PRESENT | _PAGE_USER);
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49}
50
e51df2c1 51static struct page *maybe_pte_to_page(pte_t pte)
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52{
53 unsigned long pfn = pte_pfn(pte);
54 struct page *page;
55
56 if (unlikely(!pfn_valid(pfn)))
57 return NULL;
58 page = pfn_to_page(pfn);
59 if (PageReserved(page))
60 return NULL;
61 return page;
62}
63
64#if defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0
65
8d30c14c 66/* Server-style MMU handles coherency when hashing if HW exec permission
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67 * is supposed per page (currently 64-bit only). If not, then, we always
68 * flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec
69 * support falls into the same category.
8d30c14c 70 */
ea3cc330 71
79df1b37 72static pte_t set_pte_filter(pte_t pte)
8d30c14c 73{
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74 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
75 if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) ||
76 cpu_has_feature(CPU_FTR_NOEXECUTE))) {
77 struct page *pg = maybe_pte_to_page(pte);
78 if (!pg)
79 return pte;
80 if (!test_bit(PG_arch_1, &pg->flags)) {
81 flush_dcache_icache_page(pg);
82 set_bit(PG_arch_1, &pg->flags);
83 }
84 }
85 return pte;
8d30c14c 86}
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87
88static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
89 int dirty)
8d30c14c 90{
ea3cc330 91 return pte;
8d30c14c 92}
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93
94#else /* defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0 */
95
96/* Embedded type MMU with HW exec support. This is a bit more complicated
97 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so
98 * instead we "filter out" the exec permission for non clean pages.
8d30c14c 99 */
79df1b37 100static pte_t set_pte_filter(pte_t pte)
8d30c14c 101{
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102 struct page *pg;
103
104 /* No exec permission in the first place, move on */
105 if (!(pte_val(pte) & _PAGE_EXEC) || !pte_looks_normal(pte))
106 return pte;
107
108 /* If you set _PAGE_EXEC on weird pages you're on your own */
109 pg = maybe_pte_to_page(pte);
110 if (unlikely(!pg))
111 return pte;
112
113 /* If the page clean, we move on */
114 if (test_bit(PG_arch_1, &pg->flags))
115 return pte;
116
117 /* If it's an exec fault, we flush the cache and make it clean */
118 if (is_exec_fault()) {
119 flush_dcache_icache_page(pg);
120 set_bit(PG_arch_1, &pg->flags);
121 return pte;
122 }
123
124 /* Else, we filter out _PAGE_EXEC */
125 return __pte(pte_val(pte) & ~_PAGE_EXEC);
8d30c14c 126}
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127
128static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma,
129 int dirty)
130{
131 struct page *pg;
132
133 /* So here, we only care about exec faults, as we use them
134 * to recover lost _PAGE_EXEC and perform I$/D$ coherency
135 * if necessary. Also if _PAGE_EXEC is already set, same deal,
136 * we just bail out
137 */
138 if (dirty || (pte_val(pte) & _PAGE_EXEC) || !is_exec_fault())
139 return pte;
140
141#ifdef CONFIG_DEBUG_VM
142 /* So this is an exec fault, _PAGE_EXEC is not set. If it was
143 * an error we would have bailed out earlier in do_page_fault()
144 * but let's make sure of it
145 */
146 if (WARN_ON(!(vma->vm_flags & VM_EXEC)))
147 return pte;
148#endif /* CONFIG_DEBUG_VM */
149
150 /* If you set _PAGE_EXEC on weird pages you're on your own */
151 pg = maybe_pte_to_page(pte);
152 if (unlikely(!pg))
153 goto bail;
154
155 /* If the page is already clean, we move on */
156 if (test_bit(PG_arch_1, &pg->flags))
157 goto bail;
158
159 /* Clean the page and set PG_arch_1 */
160 flush_dcache_icache_page(pg);
161 set_bit(PG_arch_1, &pg->flags);
162
163 bail:
164 return __pte(pte_val(pte) | _PAGE_EXEC);
165}
166
167#endif /* !(defined(CONFIG_PPC_STD_MMU) || _PAGE_EXEC == 0) */
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168
169/*
170 * set_pte stores a linux PTE into the linux page table.
171 */
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172void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
173 pte_t pte)
8d30c14c 174{
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175 /*
176 * When handling numa faults, we already have the pte marked
177 * _PAGE_PRESENT, but we can be sure that it is not in hpte.
178 * Hence we can use set_pte_at for them.
179 */
180 VM_WARN_ON((pte_val(*ptep) & (_PAGE_PRESENT | _PAGE_USER)) ==
181 (_PAGE_PRESENT | _PAGE_USER));
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182 /*
183 * Add the pte bit when tryint set a pte
184 */
185 pte = __pte(pte_val(pte) | _PAGE_PTE);
8a0516ed 186
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187 /* Note: mm->context.id might not yet have been assigned as
188 * this context might not have been activated yet when this
189 * is called.
190 */
79df1b37 191 pte = set_pte_filter(pte);
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192
193 /* Perform the setting of the PTE */
194 __set_pte_at(mm, addr, ptep, pte, 0);
195}
196
197/*
198 * This is called when relaxing access to a PTE. It's also called in the page
199 * fault path when we don't hit any of the major fault cases, ie, a minor
200 * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have
201 * handled those two for us, we additionally deal with missing execute
202 * permission here on some processors
203 */
204int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address,
205 pte_t *ptep, pte_t entry, int dirty)
206{
207 int changed;
ea3cc330 208 entry = set_access_flags_filter(entry, vma, dirty);
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209 changed = !pte_same(*(ptep), entry);
210 if (changed) {
41151e77 211 if (!is_vm_hugetlb_page(vma))
af3e4aca 212 assert_pte_locked(vma->vm_mm, address);
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213 __ptep_set_access_flags(ptep, entry);
214 flush_tlb_page_nohash(vma, address);
215 }
216 return changed;
217}
218
219#ifdef CONFIG_DEBUG_VM
220void assert_pte_locked(struct mm_struct *mm, unsigned long addr)
221{
222 pgd_t *pgd;
223 pud_t *pud;
224 pmd_t *pmd;
225
226 if (mm == &init_mm)
227 return;
228 pgd = mm->pgd + pgd_index(addr);
229 BUG_ON(pgd_none(*pgd));
230 pud = pud_offset(pgd, addr);
231 BUG_ON(pud_none(*pud));
232 pmd = pmd_offset(pud, addr);
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233 /*
234 * khugepaged to collapse normal pages to hugepage, first set
235 * pmd to none to force page fault/gup to take mmap_sem. After
236 * pmd is set to none, we do a pte_clear which does this assertion
237 * so if we find pmd none, return.
238 */
239 if (pmd_none(*pmd))
240 return;
8d30c14c 241 BUG_ON(!pmd_present(*pmd));
797a747a 242 assert_spin_locked(pte_lockptr(mm, pmd));
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243}
244#endif /* CONFIG_DEBUG_VM */
245
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246unsigned long vmalloc_to_phys(void *va)
247{
248 unsigned long pfn = vmalloc_to_pfn(va);
249
250 BUG_ON(!pfn);
251 return __pa(pfn_to_kaddr(pfn)) + offset_in_page(va);
252}
253EXPORT_SYMBOL_GPL(vmalloc_to_phys);