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KVM: PPC: Book3S HV: Context switch AMR on Power9
[linux-2.6-block.git] / arch / powerpc / kvm / book3s.c
CommitLineData
2f4cf5e4
AG		 1/*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 *
8 * Description:
9 * This file is derived from arch/powerpc/kvm/44x.c,
10 * by Hollis Blanchard <hollisb@us.ibm.com>.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License, version 2, as
14 * published by the Free Software Foundation.
15 */
16
17#include <linux/kvm_host.h>
18#include <linux/err.h>
66b15db6 19#include <linux/export.h>
329d20ba 20#include <linux/slab.h>
398a76c6
AG		 21#include <linux/module.h>
22#include <linux/miscdevice.h>
d3989143
BH		 23#include <linux/gfp.h>
24#include <linux/sched.h>
25#include <linux/vmalloc.h>
26#include <linux/highmem.h>
2f4cf5e4
AG		 27
28#include <asm/reg.h>
29#include <asm/cputable.h>
30#include <asm/cacheflush.h>
7c0f6ba6 31#include <linux/uaccess.h>
2f4cf5e4
AG		 32#include <asm/io.h>
33#include <asm/kvm_ppc.h>
34#include <asm/kvm_book3s.h>
35#include <asm/mmu_context.h>
149dbdb1 36#include <asm/page.h>
5af50993 37#include <asm/xive.h>
2f4cf5e4 38
cbbc58d4 39#include "book3s.h"
c4befc58
PM		 40#include "trace.h"
41
2f4cf5e4
AG		 42#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
43
44/* #define EXIT_DEBUG */
07b0907d 45
2f4cf5e4
AG		 46struct kvm_stats_debugfs_item debugfs_entries[] = {
47 { "exits", VCPU_STAT(sum_exits) },
48 { "mmio", VCPU_STAT(mmio_exits) },
49 { "sig", VCPU_STAT(signal_exits) },
50 { "sysc", VCPU_STAT(syscall_exits) },
51 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
52 { "dec", VCPU_STAT(dec_exits) },
53 { "ext_intr", VCPU_STAT(ext_intr_exits) },
54 { "queue_intr", VCPU_STAT(queue_intr) },
2a27f514
SJS		 55 { "halt_poll_success_ns", VCPU_STAT(halt_poll_success_ns) },
56 { "halt_poll_fail_ns", VCPU_STAT(halt_poll_fail_ns) },
57 { "halt_wait_ns", VCPU_STAT(halt_wait_ns) },
f7819512 58 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
62bea5bf 59 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
2a27f514 60 { "halt_successful_wait", VCPU_STAT(halt_successful_wait) },
3491caf2 61 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
2f4cf5e4
AG		 62 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
63 { "pf_storage", VCPU_STAT(pf_storage) },
64 { "sp_storage", VCPU_STAT(sp_storage) },
65 { "pf_instruc", VCPU_STAT(pf_instruc) },
66 { "sp_instruc", VCPU_STAT(sp_instruc) },
67 { "ld", VCPU_STAT(ld) },
68 { "ld_slow", VCPU_STAT(ld_slow) },
69 { "st", VCPU_STAT(st) },
70 { "st_slow", VCPU_STAT(st_slow) },
65e7026a
SW		 71 { "pthru_all", VCPU_STAT(pthru_all) },
72 { "pthru_host", VCPU_STAT(pthru_host) },
73 { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) },
2f4cf5e4
AG		 74 { NULL }
75};
76
c01e3f66
AG		 77void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
78{
79 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
80 ulong pc = kvmppc_get_pc(vcpu);
1006284c 81 ulong lr = kvmppc_get_lr(vcpu);
c01e3f66
AG		 82 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
83 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
1006284c
CK		 84 if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
85 kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK);
c01e3f66
AG		 86 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
87 }
88}
89EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real);
90
699cc876
AK		 91static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
92{
a78b55d1 93 if (!is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 94 return to_book3s(vcpu)->hior;
95 return 0;
96}
97
98static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
99 unsigned long pending_now, unsigned long old_pending)
100{
a78b55d1 101 if (is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 102 return;
103 if (pending_now)
5deb8e7a 104 kvmppc_set_int_pending(vcpu, 1);
699cc876 105 else if (old_pending)
5deb8e7a 106 kvmppc_set_int_pending(vcpu, 0);
699cc876
AK		 107}
108
109static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
110{
111 ulong crit_raw;
112 ulong crit_r1;
113 bool crit;
114
a78b55d1 115 if (is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 116 return false;
117
5deb8e7a 118 crit_raw = kvmppc_get_critical(vcpu);
699cc876
AK		 119 crit_r1 = kvmppc_get_gpr(vcpu, 1);
120
121 /* Truncate crit indicators in 32 bit mode */
5deb8e7a 122 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
699cc876
AK		 123 crit_raw &= 0xffffffff;
124 crit_r1 &= 0xffffffff;
125 }
126
127 /* Critical section when crit == r1 */
128 crit = (crit_raw == crit_r1);
129 /* ... and we're in supervisor mode */
5deb8e7a 130 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
699cc876
AK		 131
132 return crit;
133}
134
2f4cf5e4
AG		 135void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
136{
c01e3f66 137 kvmppc_unfixup_split_real(vcpu);
5deb8e7a 138 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
916ccadc 139 kvmppc_set_srr1(vcpu, (kvmppc_get_msr(vcpu) & ~0x783f0000ul) | flags);
f05ed4d5 140 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
2f4cf5e4
AG		 141 vcpu->arch.mmu.reset_msr(vcpu);
142}
143
583617b7 144static int kvmppc_book3s_vec2irqprio(unsigned int vec)
2f4cf5e4
AG		 145{
146 unsigned int prio;
147
2f4cf5e4
AG		 148 switch (vec) {
149 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
150 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
151 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
152 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
153 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
154 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
155 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
156 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
157 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
158 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
159 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
160 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
161 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
162 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
163 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
616dff86 164 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
2f4cf5e4
AG		 165 default: prio = BOOK3S_IRQPRIO_MAX; break;
166 }
167
583617b7
AG		 168 return prio;
169}
170
bc5ad3f3 171void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
7706664d
AG		 172 unsigned int vec)
173{
f05ed4d5
PM		 174 unsigned long old_pending = vcpu->arch.pending_exceptions;
175
7706664d
AG		 176 clear_bit(kvmppc_book3s_vec2irqprio(vec),
177 &vcpu->arch.pending_exceptions);
9ee18b1e 178
f05ed4d5
PM		 179 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
180 old_pending);
7706664d
AG		 181}
182
583617b7
AG		 183void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
184{
185 vcpu->stat.queue_intr++;
186
187 set_bit(kvmppc_book3s_vec2irqprio(vec),
188 &vcpu->arch.pending_exceptions);
2f4cf5e4
AG		 189#ifdef EXIT_DEBUG
190 printk(KERN_INFO "Queueing interrupt %x\n", vec);
191#endif
192}
2ba9f0d8 193EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
2f4cf5e4 194
25a8a02d 195void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
2f4cf5e4 196{
3cf658b6
PM		 197 /* might as well deliver this straight away */
198 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
2f4cf5e4 199}
2ba9f0d8 200EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
2f4cf5e4 201
307d9279
PM		 202void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
203{
204 /* might as well deliver this straight away */
205 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
206}
207
208void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
209{
210 /* might as well deliver this straight away */
211 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
212}
213
214void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
215{
216 /* might as well deliver this straight away */
217 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
218}
219
2f4cf5e4
AG		 220void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
221{
222 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
223}
2ba9f0d8 224EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
2f4cf5e4
AG		 225
226int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
227{
44075d95 228 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
2f4cf5e4 229}
2ba9f0d8 230EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
2f4cf5e4 231
7706664d
AG		 232void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
233{
234 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
235}
2ba9f0d8 236EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
7706664d 237
2f4cf5e4
AG		 238void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
239 struct kvm_interrupt *irq)
240{
d24ea8a7
PM		 241 /*
242 * This case (KVM_INTERRUPT_SET) should never actually arise for
243 * a pseries guest (because pseries guests expect their interrupt
244 * controllers to continue asserting an external interrupt request
245 * until it is acknowledged at the interrupt controller), but is
246 * included to avoid ABI breakage and potentially for other
247 * sorts of guest.
248 *
249 * There is a subtlety here: HV KVM does not test the
250 * external_oneshot flag in the code that synthesizes
251 * external interrupts for the guest just before entering
252 * the guest. That is OK even if userspace did do a
253 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the
254 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick()
255 * which ends up doing a smp_send_reschedule(), which will
256 * pull the guest all the way out to the host, meaning that
257 * we will call kvmppc_core_prepare_to_enter() before entering
258 * the guest again, and that will handle the external_oneshot
259 * flag correctly.
260 */
261 if (irq->irq == KVM_INTERRUPT_SET)
262 vcpu->arch.external_oneshot = 1;
263
264 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
2f4cf5e4
AG		 265}
266
4fe27d2a 267void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
18978768
AG		 268{
269 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
270}
271
8de12015
AG		 272void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
273 ulong flags)
274{
275 kvmppc_set_dar(vcpu, dar);
276 kvmppc_set_dsisr(vcpu, flags);
916ccadc 277 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
8de12015 278}
916ccadc 279EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
8de12015
AG		 280
281void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
282{
916ccadc 283 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
8de12015 284}
916ccadc 285EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
8de12015 286
5358a963
TH		 287static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
288 unsigned int priority)
2f4cf5e4
AG		 289{
290 int deliver = 1;
291 int vec = 0;
f05ed4d5 292 bool crit = kvmppc_critical_section(vcpu);
2f4cf5e4
AG		 293
294 switch (priority) {
295 case BOOK3S_IRQPRIO_DECREMENTER:
5deb8e7a 296 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
2f4cf5e4
AG		 297 vec = BOOK3S_INTERRUPT_DECREMENTER;
298 break;
299 case BOOK3S_IRQPRIO_EXTERNAL:
5deb8e7a 300 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
2f4cf5e4
AG		 301 vec = BOOK3S_INTERRUPT_EXTERNAL;
302 break;
303 case BOOK3S_IRQPRIO_SYSTEM_RESET:
304 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
305 break;
306 case BOOK3S_IRQPRIO_MACHINE_CHECK:
307 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
308 break;
309 case BOOK3S_IRQPRIO_DATA_STORAGE:
310 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
311 break;
312 case BOOK3S_IRQPRIO_INST_STORAGE:
313 vec = BOOK3S_INTERRUPT_INST_STORAGE;
314 break;
315 case BOOK3S_IRQPRIO_DATA_SEGMENT:
316 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
317 break;
318 case BOOK3S_IRQPRIO_INST_SEGMENT:
319 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
320 break;
321 case BOOK3S_IRQPRIO_ALIGNMENT:
322 vec = BOOK3S_INTERRUPT_ALIGNMENT;
323 break;
324 case BOOK3S_IRQPRIO_PROGRAM:
325 vec = BOOK3S_INTERRUPT_PROGRAM;
326 break;
327 case BOOK3S_IRQPRIO_VSX:
328 vec = BOOK3S_INTERRUPT_VSX;
329 break;
330 case BOOK3S_IRQPRIO_ALTIVEC:
331 vec = BOOK3S_INTERRUPT_ALTIVEC;
332 break;
333 case BOOK3S_IRQPRIO_FP_UNAVAIL:
334 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
335 break;
336 case BOOK3S_IRQPRIO_SYSCALL:
337 vec = BOOK3S_INTERRUPT_SYSCALL;
338 break;
339 case BOOK3S_IRQPRIO_DEBUG:
340 vec = BOOK3S_INTERRUPT_TRACE;
341 break;
342 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
343 vec = BOOK3S_INTERRUPT_PERFMON;
344 break;
616dff86
AG		 345 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
346 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
347 break;
2f4cf5e4
AG		 348 default:
349 deliver = 0;
350 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
351 break;
352 }
353
354#if 0
355 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
356#endif
357
358 if (deliver)
3cf658b6 359 kvmppc_inject_interrupt(vcpu, vec, 0);
2f4cf5e4
AG		 360
361 return deliver;
362}
363
17bd1580
AG		 364/*
365 * This function determines if an irqprio should be cleared once issued.
366 */
367static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
368{
369 switch (priority) {
370 case BOOK3S_IRQPRIO_DECREMENTER:
371 /* DEC interrupts get cleared by mtdec */
372 return false;
d24ea8a7
PM		 373 case BOOK3S_IRQPRIO_EXTERNAL:
374 /*
375 * External interrupts get cleared by userspace
376 * except when set by the KVM_INTERRUPT ioctl with
377 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL).
378 */
379 if (vcpu->arch.external_oneshot) {
380 vcpu->arch.external_oneshot = 0;
381 return true;
382 }
17bd1580
AG		 383 return false;
384 }
385
386 return true;
387}
388
a8e4ef84 389int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
2f4cf5e4
AG		 390{
391 unsigned long *pending = &vcpu->arch.pending_exceptions;
90bba358 392 unsigned long old_pending = vcpu->arch.pending_exceptions;
2f4cf5e4
AG		 393 unsigned int priority;
394
2f4cf5e4
AG		 395#ifdef EXIT_DEBUG
396 if (vcpu->arch.pending_exceptions)
397 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
398#endif
399 priority = __ffs(*pending);
ada7ba17 400 while (priority < BOOK3S_IRQPRIO_MAX) {
7706664d 401 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
17bd1580 402 clear_irqprio(vcpu, priority)) {
2f4cf5e4
AG		 403 clear_bit(priority, &vcpu->arch.pending_exceptions);
404 break;
405 }
406
407 priority = find_next_bit(pending,
408 BITS_PER_BYTE * sizeof(*pending),
409 priority + 1);
410 }
90bba358
AG		 411
412 /* Tell the guest about our interrupt status */
f05ed4d5 413 kvmppc_update_int_pending(vcpu, *pending, old_pending);
a8e4ef84
AG		 414
415 return 0;
2f4cf5e4 416}
2ba9f0d8 417EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
2f4cf5e4 418
ba049e93 419kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
93b159b4 420 bool *writable)
e8508940 421{
89b68c96
AG		 422 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
423 gfn_t gfn = gpa >> PAGE_SHIFT;
e8508940 424
5deb8e7a 425 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
bbcc9c06
BH		 426 mp_pa = (uint32_t)mp_pa;
427
e8508940 428 /* Magic page override */
89b68c96
AG		 429 gpa &= ~0xFFFULL;
430 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
e8508940 431 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
ba049e93 432 kvm_pfn_t pfn;
e8508940 433
ba049e93 434 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
e8508940 435 get_page(pfn_to_page(pfn));
93b159b4
PM		 436 if (writable)
437 *writable = true;
e8508940
AG		 438 return pfn;
439 }
440
93b159b4 441 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
e8508940 442}
89b68c96 443EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
e8508940 444
7d15c06f
AG		 445int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
446 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
2f4cf5e4 447{
7d15c06f
AG		 448 bool data = (xlid == XLATE_DATA);
449 bool iswrite = (xlrw == XLATE_WRITE);
5deb8e7a 450 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
2f4cf5e4
AG		 451 int r;
452
453 if (relocated) {
93b159b4 454 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
2f4cf5e4
AG		 455 } else {
456 pte->eaddr = eaddr;
28e83b4f 457 pte->raddr = eaddr & KVM_PAM;
3eeafd7d 458 pte->vpage = VSID_REAL | eaddr >> 12;
2f4cf5e4
AG		 459 pte->may_read = true;
460 pte->may_write = true;
461 pte->may_execute = true;
462 r = 0;
c01e3f66
AG		 463
464 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
465 !data) {
466 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
467 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
468 pte->raddr &= ~SPLIT_HACK_MASK;
469 }
2f4cf5e4
AG		 470 }
471
472 return r;
473}
474
70923603
SG		 475int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
476 enum instruction_fetch_type type, u32 *inst)
51f04726
MC		 477{
478 ulong pc = kvmppc_get_pc(vcpu);
479 int r;
480
481 if (type == INST_SC)
482 pc -= 4;
483
484 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
485 if (r == EMULATE_DONE)
486 return r;
487 else
488 return EMULATE_AGAIN;
489}
490EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
491
2f4cf5e4
AG		 492int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
493{
494 return 0;
495}
496
f61c94bb
BB		 497int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
498{
499 return 0;
500}
501
502void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
503{
504}
505
3a167bea
AK		 506int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
507 struct kvm_sregs *sregs)
508{
bcdec41c
CD		 509 int ret;
510
511 vcpu_load(vcpu);
512 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
513 vcpu_put(vcpu);
514
515 return ret;
3a167bea
AK		 516}
517
518int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
519 struct kvm_sregs *sregs)
520{
b4ef9d4e
CD		 521 int ret;
522
523 vcpu_load(vcpu);
524 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
525 vcpu_put(vcpu);
526
527 return ret;
3a167bea
AK		 528}
529
2f4cf5e4
AG		 530int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
531{
532 int i;
533
c7f38f46 534 regs->pc = kvmppc_get_pc(vcpu);
992b5b29 535 regs->cr = kvmppc_get_cr(vcpu);
c7f38f46
AG		 536 regs->ctr = kvmppc_get_ctr(vcpu);
537 regs->lr = kvmppc_get_lr(vcpu);
992b5b29 538 regs->xer = kvmppc_get_xer(vcpu);
5deb8e7a
AG		 539 regs->msr = kvmppc_get_msr(vcpu);
540 regs->srr0 = kvmppc_get_srr0(vcpu);
541 regs->srr1 = kvmppc_get_srr1(vcpu);
2f4cf5e4 542 regs->pid = vcpu->arch.pid;
5deb8e7a
AG		 543 regs->sprg0 = kvmppc_get_sprg0(vcpu);
544 regs->sprg1 = kvmppc_get_sprg1(vcpu);
545 regs->sprg2 = kvmppc_get_sprg2(vcpu);
546 regs->sprg3 = kvmppc_get_sprg3(vcpu);
547 regs->sprg4 = kvmppc_get_sprg4(vcpu);
548 regs->sprg5 = kvmppc_get_sprg5(vcpu);
549 regs->sprg6 = kvmppc_get_sprg6(vcpu);
550 regs->sprg7 = kvmppc_get_sprg7(vcpu);
2f4cf5e4
AG		 551
552 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 553 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
2f4cf5e4
AG		 554
555 return 0;
556}
557
558int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
559{
560 int i;
561
c7f38f46 562 kvmppc_set_pc(vcpu, regs->pc);
992b5b29 563 kvmppc_set_cr(vcpu, regs->cr);
c7f38f46
AG		 564 kvmppc_set_ctr(vcpu, regs->ctr);
565 kvmppc_set_lr(vcpu, regs->lr);
992b5b29 566 kvmppc_set_xer(vcpu, regs->xer);
2f4cf5e4 567 kvmppc_set_msr(vcpu, regs->msr);
5deb8e7a
AG		 568 kvmppc_set_srr0(vcpu, regs->srr0);
569 kvmppc_set_srr1(vcpu, regs->srr1);
570 kvmppc_set_sprg0(vcpu, regs->sprg0);
571 kvmppc_set_sprg1(vcpu, regs->sprg1);
572 kvmppc_set_sprg2(vcpu, regs->sprg2);
573 kvmppc_set_sprg3(vcpu, regs->sprg3);
574 kvmppc_set_sprg4(vcpu, regs->sprg4);
575 kvmppc_set_sprg5(vcpu, regs->sprg5);
576 kvmppc_set_sprg6(vcpu, regs->sprg6);
577 kvmppc_set_sprg7(vcpu, regs->sprg7);
2f4cf5e4 578
8e5b26b5
AG		 579 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
580 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
2f4cf5e4
AG		 581
582 return 0;
583}
584
2f4cf5e4
AG		 585int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
586{
587 return -ENOTSUPP;
588}
589
590int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
591{
592 return -ENOTSUPP;
593}
594
8a41ea53
MC		 595int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
596 union kvmppc_one_reg *val)
a136a8bd 597{
8a41ea53 598 int r = 0;
a8bd19ef 599 long int i;
a136a8bd 600
8a41ea53 601 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
a136a8bd
PM		 602 if (r == -EINVAL) {
603 r = 0;
8a41ea53 604 switch (id) {
a136a8bd 605 case KVM_REG_PPC_DAR:
8a41ea53 606 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
a136a8bd
PM		 607 break;
608 case KVM_REG_PPC_DSISR:
8a41ea53 609 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
a136a8bd 610 break;
a8bd19ef 611 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
8a41ea53
MC		 612 i = id - KVM_REG_PPC_FPR0;
613 *val = get_reg_val(id, VCPU_FPR(vcpu, i));
a8bd19ef
PM		 614 break;
615 case KVM_REG_PPC_FPSCR:
8a41ea53 616 *val = get_reg_val(id, vcpu->arch.fp.fpscr);
a8bd19ef 617 break;
efff1912
PM		 618#ifdef CONFIG_VSX
619 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
620 if (cpu_has_feature(CPU_FTR_VSX)) {
8a41ea53
MC		 621 i = id - KVM_REG_PPC_VSR0;
622 val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
623 val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
efff1912
PM		 624 } else {
625 r = -ENXIO;
626 }
627 break;
628#endif /* CONFIG_VSX */
8a41ea53
MC		 629 case KVM_REG_PPC_DEBUG_INST:
630 *val = get_reg_val(id, INS_TW);
8c32a2ea 631 break;
8b78645c
PM		 632#ifdef CONFIG_KVM_XICS
633 case KVM_REG_PPC_ICP_STATE:
5af50993 634 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
8b78645c
PM		 635 r = -ENXIO;
636 break;
637 }
5af50993
BH		 638 if (xive_enabled())
639 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
640 else
641 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
8b78645c
PM		 642 break;
643#endif /* CONFIG_KVM_XICS */
616dff86 644 case KVM_REG_PPC_FSCR:
8a41ea53 645 *val = get_reg_val(id, vcpu->arch.fscr);
616dff86 646 break;
e14e7a1e 647 case KVM_REG_PPC_TAR:
8a41ea53 648 *val = get_reg_val(id, vcpu->arch.tar);
e14e7a1e 649 break;
2e23f544 650 case KVM_REG_PPC_EBBHR:
8a41ea53 651 *val = get_reg_val(id, vcpu->arch.ebbhr);
2e23f544
AG		 652 break;
653 case KVM_REG_PPC_EBBRR:
8a41ea53 654 *val = get_reg_val(id, vcpu->arch.ebbrr);
2e23f544
AG		 655 break;
656 case KVM_REG_PPC_BESCR:
8a41ea53 657 *val = get_reg_val(id, vcpu->arch.bescr);
2e23f544 658 break;
06da28e7 659 case KVM_REG_PPC_IC:
8a41ea53 660 *val = get_reg_val(id, vcpu->arch.ic);
06da28e7 661 break;
a136a8bd
PM		 662 default:
663 r = -EINVAL;
664 break;
665 }
666 }
a136a8bd
PM		 667
668 return r;
669}
670
8a41ea53
MC		 671int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
672 union kvmppc_one_reg *val)
a136a8bd 673{
8a41ea53 674 int r = 0;
a8bd19ef 675 long int i;
a136a8bd 676
8a41ea53 677 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
a136a8bd
PM		 678 if (r == -EINVAL) {
679 r = 0;
8a41ea53 680 switch (id) {
a136a8bd 681 case KVM_REG_PPC_DAR:
8a41ea53 682 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
a136a8bd
PM		 683 break;
684 case KVM_REG_PPC_DSISR:
8a41ea53 685 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
a136a8bd 686 break;
a8bd19ef 687 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
8a41ea53
MC		 688 i = id - KVM_REG_PPC_FPR0;
689 VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
a8bd19ef
PM		 690 break;
691 case KVM_REG_PPC_FPSCR:
8a41ea53 692 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
a8bd19ef 693 break;
efff1912
PM		 694#ifdef CONFIG_VSX
695 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
696 if (cpu_has_feature(CPU_FTR_VSX)) {
8a41ea53
MC		 697 i = id - KVM_REG_PPC_VSR0;
698 vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
699 vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
efff1912
PM		 700 } else {
701 r = -ENXIO;
702 }
703 break;
704#endif /* CONFIG_VSX */
8b78645c
PM		 705#ifdef CONFIG_KVM_XICS
706 case KVM_REG_PPC_ICP_STATE:
5af50993 707 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
8b78645c
PM		 708 r = -ENXIO;
709 break;
710 }
5af50993
BH		 711 if (xive_enabled())
712 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
713 else
714 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
8b78645c
PM		 715 break;
716#endif /* CONFIG_KVM_XICS */
616dff86 717 case KVM_REG_PPC_FSCR:
8a41ea53 718 vcpu->arch.fscr = set_reg_val(id, *val);
616dff86 719 break;
e14e7a1e 720 case KVM_REG_PPC_TAR:
8a41ea53 721 vcpu->arch.tar = set_reg_val(id, *val);
e14e7a1e 722 break;
2e23f544 723 case KVM_REG_PPC_EBBHR:
8a41ea53 724 vcpu->arch.ebbhr = set_reg_val(id, *val);
2e23f544
AG		 725 break;
726 case KVM_REG_PPC_EBBRR:
8a41ea53 727 vcpu->arch.ebbrr = set_reg_val(id, *val);
2e23f544
AG		 728 break;
729 case KVM_REG_PPC_BESCR:
8a41ea53 730 vcpu->arch.bescr = set_reg_val(id, *val);
2e23f544 731 break;
06da28e7 732 case KVM_REG_PPC_IC:
8a41ea53 733 vcpu->arch.ic = set_reg_val(id, *val);
06da28e7 734 break;
a136a8bd
PM		 735 default:
736 r = -EINVAL;
737 break;
738 }
739 }
740
741 return r;
742}
743
3a167bea
AK		 744void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
745{
cbbc58d4 746 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
3a167bea
AK		 747}
748
749void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
750{
cbbc58d4 751 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
3a167bea
AK		 752}
753
754void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
755{
cbbc58d4 756 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
3a167bea 757}
2ba9f0d8 758EXPORT_SYMBOL_GPL(kvmppc_set_msr);
3a167bea
AK		 759
760int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
761{
cbbc58d4 762 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
3a167bea
AK		 763}
764
2f4cf5e4
AG		 765int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
766 struct kvm_translation *tr)
767{
768 return 0;
769}
770
092d62ee
BB		 771int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
772 struct kvm_guest_debug *dbg)
773{
66b56562 774 vcpu_load(vcpu);
a59c1d9e 775 vcpu->guest_debug = dbg->control;
66b56562 776 vcpu_put(vcpu);
a59c1d9e 777 return 0;
092d62ee
BB		 778}
779
d02d4d15 780void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
dfd4d47e 781{
dfd4d47e
SW		 782 kvmppc_core_queue_dec(vcpu);
783 kvm_vcpu_kick(vcpu);
784}
3a167bea
AK		 785
786struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
787{
cbbc58d4 788 return kvm->arch.kvm_ops->vcpu_create(kvm, id);
3a167bea
AK		 789}
790
791void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
792{
cbbc58d4 793 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
3a167bea
AK		 794}
795
796int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
797{
cbbc58d4 798 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
3a167bea
AK		 799}
800
801int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
802{
cbbc58d4 803 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
3a167bea
AK		 804}
805
5587027c 806void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
3a167bea
AK		 807 struct kvm_memory_slot *dont)
808{
cbbc58d4 809 kvm->arch.kvm_ops->free_memslot(free, dont);
3a167bea
AK		 810}
811
5587027c 812int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
3a167bea
AK		 813 unsigned long npages)
814{
cbbc58d4 815 return kvm->arch.kvm_ops->create_memslot(slot, npages);
3a167bea
AK		 816}
817
818void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
819{
cbbc58d4 820 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
3a167bea
AK		 821}
822
823int kvmppc_core_prepare_memory_region(struct kvm *kvm,
824 struct kvm_memory_slot *memslot,
09170a49 825 const struct kvm_userspace_memory_region *mem)
3a167bea 826{
cbbc58d4 827 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
3a167bea
AK		 828}
829
830void kvmppc_core_commit_memory_region(struct kvm *kvm,
09170a49 831 const struct kvm_userspace_memory_region *mem,
f36f3f28 832 const struct kvm_memory_slot *old,
f032b734
BR		 833 const struct kvm_memory_slot *new,
834 enum kvm_mr_change change)
3a167bea 835{
f032b734 836 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change);
3a167bea
AK		 837}
838
3a167bea
AK		 839int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
840{
cbbc58d4 841 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
3a167bea
AK		 842}
843
57128468 844int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
3a167bea 845{
57128468 846 return kvm->arch.kvm_ops->age_hva(kvm, start, end);
3a167bea
AK		 847}
848
849int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
850{
cbbc58d4 851 return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
3a167bea
AK		 852}
853
748c0e31 854int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
3a167bea 855{
cbbc58d4 856 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
748c0e31 857 return 0;
3a167bea
AK		 858}
859
860void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
861{
cbbc58d4 862 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
3a167bea
AK		 863}
864
865int kvmppc_core_init_vm(struct kvm *kvm)
866{
867
868#ifdef CONFIG_PPC64
366baf28 869 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
3a167bea
AK		 870 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
871#endif
872
cbbc58d4 873 return kvm->arch.kvm_ops->init_vm(kvm);
3a167bea
AK		 874}
875
876void kvmppc_core_destroy_vm(struct kvm *kvm)
877{
cbbc58d4 878 kvm->arch.kvm_ops->destroy_vm(kvm);
3a167bea
AK		 879
880#ifdef CONFIG_PPC64
881 kvmppc_rtas_tokens_free(kvm);
882 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
883#endif
884}
885
99342cf8
DG		 886int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
887{
888 unsigned long size = kvmppc_get_gpr(vcpu, 4);
889 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
890 u64 buf;
3eb4ee68 891 int srcu_idx;
99342cf8
DG		 892 int ret;
893
894 if (!is_power_of_2(size) || (size > sizeof(buf)))
895 return H_TOO_HARD;
896
3eb4ee68 897 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
99342cf8 898 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
3eb4ee68 899 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
99342cf8
DG		 900 if (ret != 0)
901 return H_TOO_HARD;
902
903 switch (size) {
904 case 1:
905 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
906 break;
907
908 case 2:
909 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
910 break;
911
912 case 4:
913 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
914 break;
915
916 case 8:
917 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
918 break;
919
920 default:
921 BUG();
922 }
923
924 return H_SUCCESS;
925}
926EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
927
928int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
929{
930 unsigned long size = kvmppc_get_gpr(vcpu, 4);
931 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
932 unsigned long val = kvmppc_get_gpr(vcpu, 6);
933 u64 buf;
3eb4ee68 934 int srcu_idx;
99342cf8
DG		 935 int ret;
936
937 switch (size) {
938 case 1:
939 *(u8 *)&buf = val;
940 break;
941
942 case 2:
943 *(__be16 *)&buf = cpu_to_be16(val);
944 break;
945
946 case 4:
947 *(__be32 *)&buf = cpu_to_be32(val);
948 break;
949
950 case 8:
951 *(__be64 *)&buf = cpu_to_be64(val);
952 break;
953
954 default:
955 return H_TOO_HARD;
956 }
957
3eb4ee68 958 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
99342cf8 959 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
3eb4ee68 960 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
99342cf8
DG		 961 if (ret != 0)
962 return H_TOO_HARD;
963
964 return H_SUCCESS;
965}
966EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
967
3a167bea
AK		 968int kvmppc_core_check_processor_compat(void)
969{
cbbc58d4
AK		 970 /*
971 * We always return 0 for book3s. We check
60acc4eb 972 * for compatibility while loading the HV
cbbc58d4
AK		 973 * or PR module
974 */
975 return 0;
976}
977
ae2113a4
PM		 978int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
979{
980 return kvm->arch.kvm_ops->hcall_implemented(hcall);
981}
982
5af50993
BH		 983#ifdef CONFIG_KVM_XICS
984int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
985 bool line_status)
986{
987 if (xive_enabled())
988 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
989 line_status);
990 else
991 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
992 line_status);
993}
994
995int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
996 struct kvm *kvm, int irq_source_id,
997 int level, bool line_status)
998{
999 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
1000 level, line_status);
1001}
1002static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
1003 struct kvm *kvm, int irq_source_id, int level,
1004 bool line_status)
1005{
1006 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
1007}
1008
1009int kvm_irq_map_gsi(struct kvm *kvm,
1010 struct kvm_kernel_irq_routing_entry *entries, int gsi)
1011{
1012 entries->gsi = gsi;
1013 entries->type = KVM_IRQ_ROUTING_IRQCHIP;
1014 entries->set = kvmppc_book3s_set_irq;
1015 entries->irqchip.irqchip = 0;
1016 entries->irqchip.pin = gsi;
1017 return 1;
1018}
1019
1020int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
1021{
1022 return pin;
1023}
1024
1025#endif /* CONFIG_KVM_XICS */
1026
cbbc58d4
AK		 1027static int kvmppc_book3s_init(void)
1028{
1029 int r;
1030
1031 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1032 if (r)
1033 return r;
ab78475c 1034#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
cbbc58d4
AK		 1035 r = kvmppc_book3s_init_pr();
1036#endif
cbbc58d4 1037
5af50993
BH		 1038#ifdef CONFIG_KVM_XICS
1039#ifdef CONFIG_KVM_XIVE
1040 if (xive_enabled()) {
1041 kvmppc_xive_init_module();
1042 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
1043 } else
1044#endif
1045 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1046#endif
1047 return r;
cbbc58d4
AK		 1048}
1049
1050static void kvmppc_book3s_exit(void)
1051{
5af50993
BH		 1052#ifdef CONFIG_KVM_XICS
1053 if (xive_enabled())
1054 kvmppc_xive_exit_module();
1055#endif
ab78475c 1056#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
cbbc58d4
AK		 1057 kvmppc_book3s_exit_pr();
1058#endif
1059 kvm_exit();
3a167bea 1060}
cbbc58d4
AK		 1061
1062module_init(kvmppc_book3s_init);
1063module_exit(kvmppc_book3s_exit);
398a76c6
AG		 1064
1065/* On 32bit this is our one and only kernel module */
ab78475c 1066#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
398a76c6
AG		 1067MODULE_ALIAS_MISCDEV(KVM_MINOR);
1068MODULE_ALIAS("devname:kvm");
1069#endif
Linux 6.x block layer and io_uring tree(s)