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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 499
[linux-2.6-block.git] / arch / powerpc / kvm / book3s.c
CommitLineData
2f4cf5e4
AG		 1/*
2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
3 *
4 * Authors:
5 * Alexander Graf <agraf@suse.de>
6 * Kevin Wolf <mail@kevin-wolf.de>
7 *
8 * Description:
9 * This file is derived from arch/powerpc/kvm/44x.c,
10 * by Hollis Blanchard <hollisb@us.ibm.com>.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License, version 2, as
14 * published by the Free Software Foundation.
15 */
16
17#include <linux/kvm_host.h>
18#include <linux/err.h>
66b15db6 19#include <linux/export.h>
329d20ba 20#include <linux/slab.h>
398a76c6
AG		 21#include <linux/module.h>
22#include <linux/miscdevice.h>
d3989143
BH		 23#include <linux/gfp.h>
24#include <linux/sched.h>
25#include <linux/vmalloc.h>
26#include <linux/highmem.h>
2f4cf5e4
AG		 27
28#include <asm/reg.h>
29#include <asm/cputable.h>
30#include <asm/cacheflush.h>
7c0f6ba6 31#include <linux/uaccess.h>
2f4cf5e4
AG		 32#include <asm/io.h>
33#include <asm/kvm_ppc.h>
34#include <asm/kvm_book3s.h>
35#include <asm/mmu_context.h>
149dbdb1 36#include <asm/page.h>
5af50993 37#include <asm/xive.h>
2f4cf5e4 38
cbbc58d4 39#include "book3s.h"
c4befc58
PM		 40#include "trace.h"
41
8f1f7b9b 42#define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
2f4cf5e4
AG		 43#define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
44
45/* #define EXIT_DEBUG */
07b0907d 46
2f4cf5e4
AG		 47struct kvm_stats_debugfs_item debugfs_entries[] = {
48 { "exits", VCPU_STAT(sum_exits) },
49 { "mmio", VCPU_STAT(mmio_exits) },
50 { "sig", VCPU_STAT(signal_exits) },
51 { "sysc", VCPU_STAT(syscall_exits) },
52 { "inst_emu", VCPU_STAT(emulated_inst_exits) },
53 { "dec", VCPU_STAT(dec_exits) },
54 { "ext_intr", VCPU_STAT(ext_intr_exits) },
55 { "queue_intr", VCPU_STAT(queue_intr) },
2a27f514
SJS		 56 { "halt_poll_success_ns", VCPU_STAT(halt_poll_success_ns) },
57 { "halt_poll_fail_ns", VCPU_STAT(halt_poll_fail_ns) },
58 { "halt_wait_ns", VCPU_STAT(halt_wait_ns) },
f7819512 59 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), },
62bea5bf 60 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), },
2a27f514 61 { "halt_successful_wait", VCPU_STAT(halt_successful_wait) },
3491caf2 62 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
2f4cf5e4
AG		 63 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
64 { "pf_storage", VCPU_STAT(pf_storage) },
65 { "sp_storage", VCPU_STAT(sp_storage) },
66 { "pf_instruc", VCPU_STAT(pf_instruc) },
67 { "sp_instruc", VCPU_STAT(sp_instruc) },
68 { "ld", VCPU_STAT(ld) },
69 { "ld_slow", VCPU_STAT(ld_slow) },
70 { "st", VCPU_STAT(st) },
71 { "st_slow", VCPU_STAT(st_slow) },
65e7026a
SW		 72 { "pthru_all", VCPU_STAT(pthru_all) },
73 { "pthru_host", VCPU_STAT(pthru_host) },
74 { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) },
8f1f7b9b
SJS		 75 { "largepages_2M", VM_STAT(num_2M_pages) },
76 { "largepages_1G", VM_STAT(num_1G_pages) },
2f4cf5e4
AG		 77 { NULL }
78};
79
c01e3f66
AG		 80void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
81{
82 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
83 ulong pc = kvmppc_get_pc(vcpu);
1006284c 84 ulong lr = kvmppc_get_lr(vcpu);
c01e3f66
AG		 85 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
86 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK);
1006284c
CK		 87 if ((lr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)
88 kvmppc_set_lr(vcpu, lr & ~SPLIT_HACK_MASK);
c01e3f66
AG		 89 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK;
90 }
91}
92EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real);
93
699cc876
AK		 94static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
95{
a78b55d1 96 if (!is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 97 return to_book3s(vcpu)->hior;
98 return 0;
99}
100
101static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
102 unsigned long pending_now, unsigned long old_pending)
103{
a78b55d1 104 if (is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 105 return;
106 if (pending_now)
5deb8e7a 107 kvmppc_set_int_pending(vcpu, 1);
699cc876 108 else if (old_pending)
5deb8e7a 109 kvmppc_set_int_pending(vcpu, 0);
699cc876
AK		 110}
111
112static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
113{
114 ulong crit_raw;
115 ulong crit_r1;
116 bool crit;
117
a78b55d1 118 if (is_kvmppc_hv_enabled(vcpu->kvm))
699cc876
AK		 119 return false;
120
5deb8e7a 121 crit_raw = kvmppc_get_critical(vcpu);
699cc876
AK		 122 crit_r1 = kvmppc_get_gpr(vcpu, 1);
123
124 /* Truncate crit indicators in 32 bit mode */
5deb8e7a 125 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) {
699cc876
AK		 126 crit_raw &= 0xffffffff;
127 crit_r1 &= 0xffffffff;
128 }
129
130 /* Critical section when crit == r1 */
131 crit = (crit_raw == crit_r1);
132 /* ... and we're in supervisor mode */
5deb8e7a 133 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR);
699cc876
AK		 134
135 return crit;
136}
137
2f4cf5e4
AG		 138void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
139{
c01e3f66 140 kvmppc_unfixup_split_real(vcpu);
5deb8e7a 141 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu));
916ccadc 142 kvmppc_set_srr1(vcpu, (kvmppc_get_msr(vcpu) & ~0x783f0000ul) | flags);
f05ed4d5 143 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec);
2f4cf5e4
AG		 144 vcpu->arch.mmu.reset_msr(vcpu);
145}
146
583617b7 147static int kvmppc_book3s_vec2irqprio(unsigned int vec)
2f4cf5e4
AG		 148{
149 unsigned int prio;
150
2f4cf5e4
AG		 151 switch (vec) {
152 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break;
153 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break;
154 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break;
155 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break;
156 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break;
157 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break;
158 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break;
159 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break;
160 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break;
161 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break;
162 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break;
163 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break;
164 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break;
165 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break;
166 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break;
616dff86 167 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break;
2f4cf5e4
AG		 168 default: prio = BOOK3S_IRQPRIO_MAX; break;
169 }
170
583617b7
AG		 171 return prio;
172}
173
bc5ad3f3 174void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
7706664d
AG		 175 unsigned int vec)
176{
f05ed4d5
PM		 177 unsigned long old_pending = vcpu->arch.pending_exceptions;
178
7706664d
AG		 179 clear_bit(kvmppc_book3s_vec2irqprio(vec),
180 &vcpu->arch.pending_exceptions);
9ee18b1e 181
f05ed4d5
PM		 182 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions,
183 old_pending);
7706664d
AG		 184}
185
583617b7
AG		 186void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
187{
188 vcpu->stat.queue_intr++;
189
190 set_bit(kvmppc_book3s_vec2irqprio(vec),
191 &vcpu->arch.pending_exceptions);
2f4cf5e4
AG		 192#ifdef EXIT_DEBUG
193 printk(KERN_INFO "Queueing interrupt %x\n", vec);
194#endif
195}
2ba9f0d8 196EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio);
2f4cf5e4 197
884dfb72
PM		 198void kvmppc_core_queue_machine_check(struct kvm_vcpu *vcpu, ulong flags)
199{
200 /* might as well deliver this straight away */
201 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_MACHINE_CHECK, flags);
202}
203EXPORT_SYMBOL_GPL(kvmppc_core_queue_machine_check);
204
25a8a02d 205void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags)
2f4cf5e4 206{
3cf658b6
PM		 207 /* might as well deliver this straight away */
208 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags);
2f4cf5e4 209}
2ba9f0d8 210EXPORT_SYMBOL_GPL(kvmppc_core_queue_program);
2f4cf5e4 211
307d9279
PM		 212void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu)
213{
214 /* might as well deliver this straight away */
215 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0);
216}
217
218void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu)
219{
220 /* might as well deliver this straight away */
221 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0);
222}
223
224void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu)
225{
226 /* might as well deliver this straight away */
227 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0);
228}
229
2f4cf5e4
AG		 230void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
231{
232 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
233}
2ba9f0d8 234EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec);
2f4cf5e4
AG		 235
236int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
237{
44075d95 238 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
2f4cf5e4 239}
2ba9f0d8 240EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec);
2f4cf5e4 241
7706664d
AG		 242void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
243{
244 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER);
245}
2ba9f0d8 246EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec);
7706664d 247
2f4cf5e4
AG		 248void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
249 struct kvm_interrupt *irq)
250{
d24ea8a7
PM		 251 /*
252 * This case (KVM_INTERRUPT_SET) should never actually arise for
253 * a pseries guest (because pseries guests expect their interrupt
254 * controllers to continue asserting an external interrupt request
255 * until it is acknowledged at the interrupt controller), but is
256 * included to avoid ABI breakage and potentially for other
257 * sorts of guest.
258 *
259 * There is a subtlety here: HV KVM does not test the
260 * external_oneshot flag in the code that synthesizes
261 * external interrupts for the guest just before entering
262 * the guest. That is OK even if userspace did do a
263 * KVM_INTERRUPT_SET on a pseries guest vcpu, because the
264 * caller (kvm_vcpu_ioctl_interrupt) does a kvm_vcpu_kick()
265 * which ends up doing a smp_send_reschedule(), which will
266 * pull the guest all the way out to the host, meaning that
267 * we will call kvmppc_core_prepare_to_enter() before entering
268 * the guest again, and that will handle the external_oneshot
269 * flag correctly.
270 */
271 if (irq->irq == KVM_INTERRUPT_SET)
272 vcpu->arch.external_oneshot = 1;
273
274 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
2f4cf5e4
AG		 275}
276
4fe27d2a 277void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
18978768
AG		 278{
279 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
280}
281
8de12015
AG		 282void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar,
283 ulong flags)
284{
285 kvmppc_set_dar(vcpu, dar);
286 kvmppc_set_dsisr(vcpu, flags);
916ccadc 287 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE, 0);
8de12015 288}
916ccadc 289EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage);
8de12015
AG		 290
291void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags)
292{
916ccadc 293 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_INST_STORAGE, flags);
8de12015 294}
916ccadc 295EXPORT_SYMBOL_GPL(kvmppc_core_queue_inst_storage);
8de12015 296
5358a963
TH		 297static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu,
298 unsigned int priority)
2f4cf5e4
AG		 299{
300 int deliver = 1;
301 int vec = 0;
f05ed4d5 302 bool crit = kvmppc_critical_section(vcpu);
2f4cf5e4
AG		 303
304 switch (priority) {
305 case BOOK3S_IRQPRIO_DECREMENTER:
5deb8e7a 306 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
2f4cf5e4
AG		 307 vec = BOOK3S_INTERRUPT_DECREMENTER;
308 break;
309 case BOOK3S_IRQPRIO_EXTERNAL:
5deb8e7a 310 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit;
2f4cf5e4
AG		 311 vec = BOOK3S_INTERRUPT_EXTERNAL;
312 break;
313 case BOOK3S_IRQPRIO_SYSTEM_RESET:
314 vec = BOOK3S_INTERRUPT_SYSTEM_RESET;
315 break;
316 case BOOK3S_IRQPRIO_MACHINE_CHECK:
317 vec = BOOK3S_INTERRUPT_MACHINE_CHECK;
318 break;
319 case BOOK3S_IRQPRIO_DATA_STORAGE:
320 vec = BOOK3S_INTERRUPT_DATA_STORAGE;
321 break;
322 case BOOK3S_IRQPRIO_INST_STORAGE:
323 vec = BOOK3S_INTERRUPT_INST_STORAGE;
324 break;
325 case BOOK3S_IRQPRIO_DATA_SEGMENT:
326 vec = BOOK3S_INTERRUPT_DATA_SEGMENT;
327 break;
328 case BOOK3S_IRQPRIO_INST_SEGMENT:
329 vec = BOOK3S_INTERRUPT_INST_SEGMENT;
330 break;
331 case BOOK3S_IRQPRIO_ALIGNMENT:
332 vec = BOOK3S_INTERRUPT_ALIGNMENT;
333 break;
334 case BOOK3S_IRQPRIO_PROGRAM:
335 vec = BOOK3S_INTERRUPT_PROGRAM;
336 break;
337 case BOOK3S_IRQPRIO_VSX:
338 vec = BOOK3S_INTERRUPT_VSX;
339 break;
340 case BOOK3S_IRQPRIO_ALTIVEC:
341 vec = BOOK3S_INTERRUPT_ALTIVEC;
342 break;
343 case BOOK3S_IRQPRIO_FP_UNAVAIL:
344 vec = BOOK3S_INTERRUPT_FP_UNAVAIL;
345 break;
346 case BOOK3S_IRQPRIO_SYSCALL:
347 vec = BOOK3S_INTERRUPT_SYSCALL;
348 break;
349 case BOOK3S_IRQPRIO_DEBUG:
350 vec = BOOK3S_INTERRUPT_TRACE;
351 break;
352 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR:
353 vec = BOOK3S_INTERRUPT_PERFMON;
354 break;
616dff86
AG		 355 case BOOK3S_IRQPRIO_FAC_UNAVAIL:
356 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL;
357 break;
2f4cf5e4
AG		 358 default:
359 deliver = 0;
360 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority);
361 break;
362 }
363
364#if 0
365 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver);
366#endif
367
368 if (deliver)
3cf658b6 369 kvmppc_inject_interrupt(vcpu, vec, 0);
2f4cf5e4
AG		 370
371 return deliver;
372}
373
17bd1580
AG		 374/*
375 * This function determines if an irqprio should be cleared once issued.
376 */
377static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
378{
379 switch (priority) {
380 case BOOK3S_IRQPRIO_DECREMENTER:
381 /* DEC interrupts get cleared by mtdec */
382 return false;
d24ea8a7
PM		 383 case BOOK3S_IRQPRIO_EXTERNAL:
384 /*
385 * External interrupts get cleared by userspace
386 * except when set by the KVM_INTERRUPT ioctl with
387 * KVM_INTERRUPT_SET (not KVM_INTERRUPT_SET_LEVEL).
388 */
389 if (vcpu->arch.external_oneshot) {
390 vcpu->arch.external_oneshot = 0;
391 return true;
392 }
17bd1580
AG		 393 return false;
394 }
395
396 return true;
397}
398
a8e4ef84 399int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
2f4cf5e4
AG		 400{
401 unsigned long *pending = &vcpu->arch.pending_exceptions;
90bba358 402 unsigned long old_pending = vcpu->arch.pending_exceptions;
2f4cf5e4
AG		 403 unsigned int priority;
404
2f4cf5e4
AG		 405#ifdef EXIT_DEBUG
406 if (vcpu->arch.pending_exceptions)
407 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions);
408#endif
409 priority = __ffs(*pending);
ada7ba17 410 while (priority < BOOK3S_IRQPRIO_MAX) {
7706664d 411 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
17bd1580 412 clear_irqprio(vcpu, priority)) {
2f4cf5e4
AG		 413 clear_bit(priority, &vcpu->arch.pending_exceptions);
414 break;
415 }
416
417 priority = find_next_bit(pending,
418 BITS_PER_BYTE * sizeof(*pending),
419 priority + 1);
420 }
90bba358
AG		 421
422 /* Tell the guest about our interrupt status */
f05ed4d5 423 kvmppc_update_int_pending(vcpu, *pending, old_pending);
a8e4ef84
AG		 424
425 return 0;
2f4cf5e4 426}
2ba9f0d8 427EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter);
2f4cf5e4 428
ba049e93 429kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing,
93b159b4 430 bool *writable)
e8508940 431{
89b68c96
AG		 432 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM;
433 gfn_t gfn = gpa >> PAGE_SHIFT;
e8508940 434
5deb8e7a 435 if (!(kvmppc_get_msr(vcpu) & MSR_SF))
bbcc9c06
BH		 436 mp_pa = (uint32_t)mp_pa;
437
e8508940 438 /* Magic page override */
89b68c96
AG		 439 gpa &= ~0xFFFULL;
440 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) {
e8508940 441 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
ba049e93 442 kvm_pfn_t pfn;
e8508940 443
ba049e93 444 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
e8508940 445 get_page(pfn_to_page(pfn));
93b159b4
PM		 446 if (writable)
447 *writable = true;
e8508940
AG		 448 return pfn;
449 }
450
93b159b4 451 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable);
e8508940 452}
89b68c96 453EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn);
e8508940 454
7d15c06f
AG		 455int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
456 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
2f4cf5e4 457{
7d15c06f
AG		 458 bool data = (xlid == XLATE_DATA);
459 bool iswrite = (xlrw == XLATE_WRITE);
5deb8e7a 460 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR));
2f4cf5e4
AG		 461 int r;
462
463 if (relocated) {
93b159b4 464 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite);
2f4cf5e4
AG		 465 } else {
466 pte->eaddr = eaddr;
28e83b4f 467 pte->raddr = eaddr & KVM_PAM;
3eeafd7d 468 pte->vpage = VSID_REAL | eaddr >> 12;
2f4cf5e4
AG		 469 pte->may_read = true;
470 pte->may_write = true;
471 pte->may_execute = true;
472 r = 0;
c01e3f66
AG		 473
474 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR &&
475 !data) {
476 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) &&
477 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS))
478 pte->raddr &= ~SPLIT_HACK_MASK;
479 }
2f4cf5e4
AG		 480 }
481
482 return r;
483}
484
70923603
SG		 485int kvmppc_load_last_inst(struct kvm_vcpu *vcpu,
486 enum instruction_fetch_type type, u32 *inst)
51f04726
MC		 487{
488 ulong pc = kvmppc_get_pc(vcpu);
489 int r;
490
491 if (type == INST_SC)
492 pc -= 4;
493
494 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false);
495 if (r == EMULATE_DONE)
496 return r;
497 else
498 return EMULATE_AGAIN;
499}
500EXPORT_SYMBOL_GPL(kvmppc_load_last_inst);
501
2f4cf5e4
AG		 502int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
503{
504 return 0;
505}
506
f61c94bb
BB		 507int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
508{
509 return 0;
510}
511
512void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
513{
514}
515
3a167bea
AK		 516int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
517 struct kvm_sregs *sregs)
518{
bcdec41c
CD		 519 int ret;
520
521 vcpu_load(vcpu);
522 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
523 vcpu_put(vcpu);
524
525 return ret;
3a167bea
AK		 526}
527
528int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
529 struct kvm_sregs *sregs)
530{
b4ef9d4e
CD		 531 int ret;
532
533 vcpu_load(vcpu);
534 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
535 vcpu_put(vcpu);
536
537 return ret;
3a167bea
AK		 538}
539
2f4cf5e4
AG		 540int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
541{
542 int i;
543
c7f38f46 544 regs->pc = kvmppc_get_pc(vcpu);
992b5b29 545 regs->cr = kvmppc_get_cr(vcpu);
c7f38f46
AG		 546 regs->ctr = kvmppc_get_ctr(vcpu);
547 regs->lr = kvmppc_get_lr(vcpu);
992b5b29 548 regs->xer = kvmppc_get_xer(vcpu);
5deb8e7a
AG		 549 regs->msr = kvmppc_get_msr(vcpu);
550 regs->srr0 = kvmppc_get_srr0(vcpu);
551 regs->srr1 = kvmppc_get_srr1(vcpu);
2f4cf5e4 552 regs->pid = vcpu->arch.pid;
5deb8e7a
AG		 553 regs->sprg0 = kvmppc_get_sprg0(vcpu);
554 regs->sprg1 = kvmppc_get_sprg1(vcpu);
555 regs->sprg2 = kvmppc_get_sprg2(vcpu);
556 regs->sprg3 = kvmppc_get_sprg3(vcpu);
557 regs->sprg4 = kvmppc_get_sprg4(vcpu);
558 regs->sprg5 = kvmppc_get_sprg5(vcpu);
559 regs->sprg6 = kvmppc_get_sprg6(vcpu);
560 regs->sprg7 = kvmppc_get_sprg7(vcpu);
2f4cf5e4
AG		 561
562 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
8e5b26b5 563 regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
2f4cf5e4
AG		 564
565 return 0;
566}
567
568int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
569{
570 int i;
571
c7f38f46 572 kvmppc_set_pc(vcpu, regs->pc);
992b5b29 573 kvmppc_set_cr(vcpu, regs->cr);
c7f38f46
AG		 574 kvmppc_set_ctr(vcpu, regs->ctr);
575 kvmppc_set_lr(vcpu, regs->lr);
992b5b29 576 kvmppc_set_xer(vcpu, regs->xer);
2f4cf5e4 577 kvmppc_set_msr(vcpu, regs->msr);
5deb8e7a
AG		 578 kvmppc_set_srr0(vcpu, regs->srr0);
579 kvmppc_set_srr1(vcpu, regs->srr1);
580 kvmppc_set_sprg0(vcpu, regs->sprg0);
581 kvmppc_set_sprg1(vcpu, regs->sprg1);
582 kvmppc_set_sprg2(vcpu, regs->sprg2);
583 kvmppc_set_sprg3(vcpu, regs->sprg3);
584 kvmppc_set_sprg4(vcpu, regs->sprg4);
585 kvmppc_set_sprg5(vcpu, regs->sprg5);
586 kvmppc_set_sprg6(vcpu, regs->sprg6);
587 kvmppc_set_sprg7(vcpu, regs->sprg7);
2f4cf5e4 588
8e5b26b5
AG		 589 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
590 kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
2f4cf5e4
AG		 591
592 return 0;
593}
594
2f4cf5e4
AG		 595int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
596{
597 return -ENOTSUPP;
598}
599
600int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
601{
602 return -ENOTSUPP;
603}
604
8a41ea53
MC		 605int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
606 union kvmppc_one_reg *val)
a136a8bd 607{
8a41ea53 608 int r = 0;
a8bd19ef 609 long int i;
a136a8bd 610
8a41ea53 611 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
a136a8bd
PM		 612 if (r == -EINVAL) {
613 r = 0;
8a41ea53 614 switch (id) {
a136a8bd 615 case KVM_REG_PPC_DAR:
8a41ea53 616 *val = get_reg_val(id, kvmppc_get_dar(vcpu));
a136a8bd
PM		 617 break;
618 case KVM_REG_PPC_DSISR:
8a41ea53 619 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu));
a136a8bd 620 break;
a8bd19ef 621 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
8a41ea53
MC		 622 i = id - KVM_REG_PPC_FPR0;
623 *val = get_reg_val(id, VCPU_FPR(vcpu, i));
a8bd19ef
PM		 624 break;
625 case KVM_REG_PPC_FPSCR:
8a41ea53 626 *val = get_reg_val(id, vcpu->arch.fp.fpscr);
a8bd19ef 627 break;
efff1912
PM		 628#ifdef CONFIG_VSX
629 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
630 if (cpu_has_feature(CPU_FTR_VSX)) {
8a41ea53
MC		 631 i = id - KVM_REG_PPC_VSR0;
632 val->vsxval[0] = vcpu->arch.fp.fpr[i][0];
633 val->vsxval[1] = vcpu->arch.fp.fpr[i][1];
efff1912
PM		 634 } else {
635 r = -ENXIO;
636 }
637 break;
638#endif /* CONFIG_VSX */
8a41ea53
MC		 639 case KVM_REG_PPC_DEBUG_INST:
640 *val = get_reg_val(id, INS_TW);
8c32a2ea 641 break;
8b78645c
PM		 642#ifdef CONFIG_KVM_XICS
643 case KVM_REG_PPC_ICP_STATE:
5af50993 644 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
8b78645c
PM		 645 r = -ENXIO;
646 break;
647 }
03f95332 648 if (xics_on_xive())
5af50993
BH		 649 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu));
650 else
651 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu));
8b78645c
PM		 652 break;
653#endif /* CONFIG_KVM_XICS */
e4945b9d
CLG		 654#ifdef CONFIG_KVM_XIVE
655 case KVM_REG_PPC_VP_STATE:
656 if (!vcpu->arch.xive_vcpu) {
657 r = -ENXIO;
658 break;
659 }
660 if (xive_enabled())
661 r = kvmppc_xive_native_get_vp(vcpu, val);
662 else
663 r = -ENXIO;
664 break;
665#endif /* CONFIG_KVM_XIVE */
616dff86 666 case KVM_REG_PPC_FSCR:
8a41ea53 667 *val = get_reg_val(id, vcpu->arch.fscr);
616dff86 668 break;
e14e7a1e 669 case KVM_REG_PPC_TAR:
8a41ea53 670 *val = get_reg_val(id, vcpu->arch.tar);
e14e7a1e 671 break;
2e23f544 672 case KVM_REG_PPC_EBBHR:
8a41ea53 673 *val = get_reg_val(id, vcpu->arch.ebbhr);
2e23f544
AG		 674 break;
675 case KVM_REG_PPC_EBBRR:
8a41ea53 676 *val = get_reg_val(id, vcpu->arch.ebbrr);
2e23f544
AG		 677 break;
678 case KVM_REG_PPC_BESCR:
8a41ea53 679 *val = get_reg_val(id, vcpu->arch.bescr);
2e23f544 680 break;
06da28e7 681 case KVM_REG_PPC_IC:
8a41ea53 682 *val = get_reg_val(id, vcpu->arch.ic);
06da28e7 683 break;
a136a8bd
PM		 684 default:
685 r = -EINVAL;
686 break;
687 }
688 }
a136a8bd
PM		 689
690 return r;
691}
692
8a41ea53
MC		 693int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
694 union kvmppc_one_reg *val)
a136a8bd 695{
8a41ea53 696 int r = 0;
a8bd19ef 697 long int i;
a136a8bd 698
8a41ea53 699 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
a136a8bd
PM		 700 if (r == -EINVAL) {
701 r = 0;
8a41ea53 702 switch (id) {
a136a8bd 703 case KVM_REG_PPC_DAR:
8a41ea53 704 kvmppc_set_dar(vcpu, set_reg_val(id, *val));
a136a8bd
PM		 705 break;
706 case KVM_REG_PPC_DSISR:
8a41ea53 707 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val));
a136a8bd 708 break;
a8bd19ef 709 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
8a41ea53
MC		 710 i = id - KVM_REG_PPC_FPR0;
711 VCPU_FPR(vcpu, i) = set_reg_val(id, *val);
a8bd19ef
PM		 712 break;
713 case KVM_REG_PPC_FPSCR:
8a41ea53 714 vcpu->arch.fp.fpscr = set_reg_val(id, *val);
a8bd19ef 715 break;
efff1912
PM		 716#ifdef CONFIG_VSX
717 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31:
718 if (cpu_has_feature(CPU_FTR_VSX)) {
8a41ea53
MC		 719 i = id - KVM_REG_PPC_VSR0;
720 vcpu->arch.fp.fpr[i][0] = val->vsxval[0];
721 vcpu->arch.fp.fpr[i][1] = val->vsxval[1];
efff1912
PM		 722 } else {
723 r = -ENXIO;
724 }
725 break;
726#endif /* CONFIG_VSX */
8b78645c
PM		 727#ifdef CONFIG_KVM_XICS
728 case KVM_REG_PPC_ICP_STATE:
5af50993 729 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) {
8b78645c
PM		 730 r = -ENXIO;
731 break;
732 }
03f95332 733 if (xics_on_xive())
5af50993
BH		 734 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val));
735 else
736 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val));
8b78645c
PM		 737 break;
738#endif /* CONFIG_KVM_XICS */
e4945b9d
CLG		 739#ifdef CONFIG_KVM_XIVE
740 case KVM_REG_PPC_VP_STATE:
741 if (!vcpu->arch.xive_vcpu) {
742 r = -ENXIO;
743 break;
744 }
745 if (xive_enabled())
746 r = kvmppc_xive_native_set_vp(vcpu, val);
747 else
748 r = -ENXIO;
749 break;
750#endif /* CONFIG_KVM_XIVE */
616dff86 751 case KVM_REG_PPC_FSCR:
8a41ea53 752 vcpu->arch.fscr = set_reg_val(id, *val);
616dff86 753 break;
e14e7a1e 754 case KVM_REG_PPC_TAR:
8a41ea53 755 vcpu->arch.tar = set_reg_val(id, *val);
e14e7a1e 756 break;
2e23f544 757 case KVM_REG_PPC_EBBHR:
8a41ea53 758 vcpu->arch.ebbhr = set_reg_val(id, *val);
2e23f544
AG		 759 break;
760 case KVM_REG_PPC_EBBRR:
8a41ea53 761 vcpu->arch.ebbrr = set_reg_val(id, *val);
2e23f544
AG		 762 break;
763 case KVM_REG_PPC_BESCR:
8a41ea53 764 vcpu->arch.bescr = set_reg_val(id, *val);
2e23f544 765 break;
06da28e7 766 case KVM_REG_PPC_IC:
8a41ea53 767 vcpu->arch.ic = set_reg_val(id, *val);
06da28e7 768 break;
a136a8bd
PM		 769 default:
770 r = -EINVAL;
771 break;
772 }
773 }
774
775 return r;
776}
777
3a167bea
AK		 778void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
779{
cbbc58d4 780 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
3a167bea
AK		 781}
782
783void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
784{
cbbc58d4 785 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
3a167bea
AK		 786}
787
788void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
789{
cbbc58d4 790 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr);
3a167bea 791}
2ba9f0d8 792EXPORT_SYMBOL_GPL(kvmppc_set_msr);
3a167bea
AK		 793
794int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
795{
cbbc58d4 796 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu);
3a167bea
AK		 797}
798
2f4cf5e4
AG		 799int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
800 struct kvm_translation *tr)
801{
802 return 0;
803}
804
092d62ee
BB		 805int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
806 struct kvm_guest_debug *dbg)
807{
66b56562 808 vcpu_load(vcpu);
a59c1d9e 809 vcpu->guest_debug = dbg->control;
66b56562 810 vcpu_put(vcpu);
a59c1d9e 811 return 0;
092d62ee
BB		 812}
813
d02d4d15 814void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
dfd4d47e 815{
dfd4d47e
SW		 816 kvmppc_core_queue_dec(vcpu);
817 kvm_vcpu_kick(vcpu);
818}
3a167bea
AK		 819
820struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
821{
cbbc58d4 822 return kvm->arch.kvm_ops->vcpu_create(kvm, id);
3a167bea
AK		 823}
824
825void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
826{
cbbc58d4 827 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
3a167bea
AK		 828}
829
830int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
831{
cbbc58d4 832 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu);
3a167bea
AK		 833}
834
835int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
836{
cbbc58d4 837 return kvm->arch.kvm_ops->get_dirty_log(kvm, log);
3a167bea
AK		 838}
839
5587027c 840void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
3a167bea
AK		 841 struct kvm_memory_slot *dont)
842{
cbbc58d4 843 kvm->arch.kvm_ops->free_memslot(free, dont);
3a167bea
AK		 844}
845
5587027c 846int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
3a167bea
AK		 847 unsigned long npages)
848{
cbbc58d4 849 return kvm->arch.kvm_ops->create_memslot(slot, npages);
3a167bea
AK		 850}
851
852void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
853{
cbbc58d4 854 kvm->arch.kvm_ops->flush_memslot(kvm, memslot);
3a167bea
AK		 855}
856
857int kvmppc_core_prepare_memory_region(struct kvm *kvm,
858 struct kvm_memory_slot *memslot,
09170a49 859 const struct kvm_userspace_memory_region *mem)
3a167bea 860{
cbbc58d4 861 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem);
3a167bea
AK		 862}
863
864void kvmppc_core_commit_memory_region(struct kvm *kvm,
09170a49 865 const struct kvm_userspace_memory_region *mem,
f36f3f28 866 const struct kvm_memory_slot *old,
f032b734
BR		 867 const struct kvm_memory_slot *new,
868 enum kvm_mr_change change)
3a167bea 869{
f032b734 870 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new, change);
3a167bea
AK		 871}
872
3a167bea
AK		 873int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
874{
cbbc58d4 875 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end);
3a167bea
AK		 876}
877
57128468 878int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
3a167bea 879{
57128468 880 return kvm->arch.kvm_ops->age_hva(kvm, start, end);
3a167bea
AK		 881}
882
883int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
884{
cbbc58d4 885 return kvm->arch.kvm_ops->test_age_hva(kvm, hva);
3a167bea
AK		 886}
887
748c0e31 888int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
3a167bea 889{
cbbc58d4 890 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte);
748c0e31 891 return 0;
3a167bea
AK		 892}
893
894void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
895{
cbbc58d4 896 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
3a167bea
AK		 897}
898
899int kvmppc_core_init_vm(struct kvm *kvm)
900{
901
902#ifdef CONFIG_PPC64
366baf28 903 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables);
3a167bea 904 INIT_LIST_HEAD(&kvm->arch.rtas_tokens);
1659e27d 905 mutex_init(&kvm->arch.rtas_token_lock);
3a167bea
AK		 906#endif
907
cbbc58d4 908 return kvm->arch.kvm_ops->init_vm(kvm);
3a167bea
AK		 909}
910
911void kvmppc_core_destroy_vm(struct kvm *kvm)
912{
cbbc58d4 913 kvm->arch.kvm_ops->destroy_vm(kvm);
3a167bea
AK		 914
915#ifdef CONFIG_PPC64
916 kvmppc_rtas_tokens_free(kvm);
917 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables));
918#endif
5422e951
CLG		 919
920#ifdef CONFIG_KVM_XICS
921 /*
922 * Free the XIVE devices which are not directly freed by the
923 * device 'release' method
924 */
925 kfree(kvm->arch.xive_devices.native);
926 kvm->arch.xive_devices.native = NULL;
927 kfree(kvm->arch.xive_devices.xics_on_xive);
928 kvm->arch.xive_devices.xics_on_xive = NULL;
929#endif /* CONFIG_KVM_XICS */
3a167bea
AK		 930}
931
99342cf8
DG		 932int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu)
933{
934 unsigned long size = kvmppc_get_gpr(vcpu, 4);
935 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
936 u64 buf;
3eb4ee68 937 int srcu_idx;
99342cf8
DG		 938 int ret;
939
940 if (!is_power_of_2(size) || (size > sizeof(buf)))
941 return H_TOO_HARD;
942
3eb4ee68 943 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
99342cf8 944 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf);
3eb4ee68 945 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
99342cf8
DG		 946 if (ret != 0)
947 return H_TOO_HARD;
948
949 switch (size) {
950 case 1:
951 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf);
952 break;
953
954 case 2:
955 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf));
956 break;
957
958 case 4:
959 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf));
960 break;
961
962 case 8:
963 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf));
964 break;
965
966 default:
967 BUG();
968 }
969
970 return H_SUCCESS;
971}
972EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load);
973
974int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu)
975{
976 unsigned long size = kvmppc_get_gpr(vcpu, 4);
977 unsigned long addr = kvmppc_get_gpr(vcpu, 5);
978 unsigned long val = kvmppc_get_gpr(vcpu, 6);
979 u64 buf;
3eb4ee68 980 int srcu_idx;
99342cf8
DG		 981 int ret;
982
983 switch (size) {
984 case 1:
985 *(u8 *)&buf = val;
986 break;
987
988 case 2:
989 *(__be16 *)&buf = cpu_to_be16(val);
990 break;
991
992 case 4:
993 *(__be32 *)&buf = cpu_to_be32(val);
994 break;
995
996 case 8:
997 *(__be64 *)&buf = cpu_to_be64(val);
998 break;
999
1000 default:
1001 return H_TOO_HARD;
1002 }
1003
3eb4ee68 1004 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
99342cf8 1005 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf);
3eb4ee68 1006 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
99342cf8
DG		 1007 if (ret != 0)
1008 return H_TOO_HARD;
1009
1010 return H_SUCCESS;
1011}
1012EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store);
1013
3a167bea
AK		 1014int kvmppc_core_check_processor_compat(void)
1015{
cbbc58d4
AK		 1016 /*
1017 * We always return 0 for book3s. We check
60acc4eb 1018 * for compatibility while loading the HV
cbbc58d4
AK		 1019 * or PR module
1020 */
1021 return 0;
1022}
1023
ae2113a4
PM		 1024int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall)
1025{
1026 return kvm->arch.kvm_ops->hcall_implemented(hcall);
1027}
1028
5af50993
BH		 1029#ifdef CONFIG_KVM_XICS
1030int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level,
1031 bool line_status)
1032{
03f95332 1033 if (xics_on_xive())
5af50993
BH		 1034 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level,
1035 line_status);
1036 else
1037 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level,
1038 line_status);
1039}
1040
1041int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry,
1042 struct kvm *kvm, int irq_source_id,
1043 int level, bool line_status)
1044{
1045 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi,
1046 level, line_status);
1047}
1048static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e,
1049 struct kvm *kvm, int irq_source_id, int level,
1050 bool line_status)
1051{
1052 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status);
1053}
1054
1055int kvm_irq_map_gsi(struct kvm *kvm,
1056 struct kvm_kernel_irq_routing_entry *entries, int gsi)
1057{
1058 entries->gsi = gsi;
1059 entries->type = KVM_IRQ_ROUTING_IRQCHIP;
1060 entries->set = kvmppc_book3s_set_irq;
1061 entries->irqchip.irqchip = 0;
1062 entries->irqchip.pin = gsi;
1063 return 1;
1064}
1065
1066int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin)
1067{
1068 return pin;
1069}
1070
1071#endif /* CONFIG_KVM_XICS */
1072
cbbc58d4
AK		 1073static int kvmppc_book3s_init(void)
1074{
1075 int r;
1076
1077 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
1078 if (r)
1079 return r;
ab78475c 1080#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
cbbc58d4
AK		 1081 r = kvmppc_book3s_init_pr();
1082#endif
cbbc58d4 1083
5af50993
BH		 1084#ifdef CONFIG_KVM_XICS
1085#ifdef CONFIG_KVM_XIVE
03f95332 1086 if (xics_on_xive()) {
5af50993
BH		 1087 kvmppc_xive_init_module();
1088 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS);
90c73795
CLG		 1089 kvmppc_xive_native_init_module();
1090 kvm_register_device_ops(&kvm_xive_native_ops,
1091 KVM_DEV_TYPE_XIVE);
5af50993
BH		 1092 } else
1093#endif
1094 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS);
1095#endif
1096 return r;
cbbc58d4
AK		 1097}
1098
1099static void kvmppc_book3s_exit(void)
1100{
5af50993 1101#ifdef CONFIG_KVM_XICS
90c73795 1102 if (xics_on_xive()) {
5af50993 1103 kvmppc_xive_exit_module();
90c73795
CLG		 1104 kvmppc_xive_native_exit_module();
1105 }
5af50993 1106#endif
ab78475c 1107#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
cbbc58d4
AK		 1108 kvmppc_book3s_exit_pr();
1109#endif
1110 kvm_exit();
3a167bea 1111}
cbbc58d4
AK		 1112
1113module_init(kvmppc_book3s_init);
1114module_exit(kvmppc_book3s_exit);
398a76c6
AG		 1115
1116/* On 32bit this is our one and only kernel module */
ab78475c 1117#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
398a76c6
AG		 1118MODULE_ALIAS_MISCDEV(KVM_MINOR);
1119MODULE_ALIAS("devname:kvm");
1120#endif
Linux 6.x block layer and io_uring tree(s)