[POWERPC] U4 DART improvements
[linux-2.6-block.git] / arch / powerpc / kernel / setup_64.c
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1/*
2 *
3 * Common boot and setup code.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#undef DEBUG
14
15#include <linux/config.h>
16#include <linux/module.h>
17#include <linux/string.h>
18#include <linux/sched.h>
19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <linux/reboot.h>
22#include <linux/delay.h>
23#include <linux/initrd.h>
24#include <linux/ide.h>
25#include <linux/seq_file.h>
26#include <linux/ioport.h>
27#include <linux/console.h>
28#include <linux/utsname.h>
29#include <linux/tty.h>
30#include <linux/root_dev.h>
31#include <linux/notifier.h>
32#include <linux/cpu.h>
33#include <linux/unistd.h>
34#include <linux/serial.h>
35#include <linux/serial_8250.h>
7a0268fa 36#include <linux/bootmem.h>
40ef8cbc 37#include <asm/io.h>
0cc4746c 38#include <asm/kdump.h>
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39#include <asm/prom.h>
40#include <asm/processor.h>
41#include <asm/pgtable.h>
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42#include <asm/smp.h>
43#include <asm/elf.h>
44#include <asm/machdep.h>
45#include <asm/paca.h>
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46#include <asm/time.h>
47#include <asm/cputable.h>
48#include <asm/sections.h>
49#include <asm/btext.h>
50#include <asm/nvram.h>
51#include <asm/setup.h>
52#include <asm/system.h>
53#include <asm/rtas.h>
54#include <asm/iommu.h>
55#include <asm/serial.h>
56#include <asm/cache.h>
57#include <asm/page.h>
58#include <asm/mmu.h>
59#include <asm/lmb.h>
f218aab5 60#include <asm/iseries/it_lp_naca.h>
40ef8cbc 61#include <asm/firmware.h>
f78541dc 62#include <asm/xmon.h>
dcad47fc 63#include <asm/udbg.h>
593e537b 64#include <asm/kexec.h>
40ef8cbc 65
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66#include "setup.h"
67
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68#ifdef DEBUG
69#define DBG(fmt...) udbg_printf(fmt)
70#else
71#define DBG(fmt...)
72#endif
73
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74int have_of = 1;
75int boot_cpuid = 0;
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76dev_t boot_dev;
77u64 ppc64_pft_size;
78
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79/* Pick defaults since we might want to patch instructions
80 * before we've read this from the device tree.
81 */
82struct ppc64_caches ppc64_caches = {
83 .dline_size = 0x80,
84 .log_dline_size = 7,
85 .iline_size = 0x80,
86 .log_iline_size = 7
87};
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88EXPORT_SYMBOL_GPL(ppc64_caches);
89
90/*
91 * These are used in binfmt_elf.c to put aux entries on the stack
92 * for each elf executable being started.
93 */
94int dcache_bsize;
95int icache_bsize;
96int ucache_bsize;
97
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98#ifdef CONFIG_MAGIC_SYSRQ
99unsigned long SYSRQ_KEY;
100#endif /* CONFIG_MAGIC_SYSRQ */
101
102
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103#ifdef CONFIG_SMP
104
105static int smt_enabled_cmdline;
106
107/* Look for ibm,smt-enabled OF option */
108static void check_smt_enabled(void)
109{
110 struct device_node *dn;
111 char *smt_option;
112
113 /* Allow the command line to overrule the OF option */
114 if (smt_enabled_cmdline)
115 return;
116
117 dn = of_find_node_by_path("/options");
118
119 if (dn) {
120 smt_option = (char *)get_property(dn, "ibm,smt-enabled", NULL);
121
122 if (smt_option) {
123 if (!strcmp(smt_option, "on"))
124 smt_enabled_at_boot = 1;
125 else if (!strcmp(smt_option, "off"))
126 smt_enabled_at_boot = 0;
127 }
128 }
129}
130
131/* Look for smt-enabled= cmdline option */
132static int __init early_smt_enabled(char *p)
133{
134 smt_enabled_cmdline = 1;
135
136 if (!p)
137 return 0;
138
139 if (!strcmp(p, "on") || !strcmp(p, "1"))
140 smt_enabled_at_boot = 1;
141 else if (!strcmp(p, "off") || !strcmp(p, "0"))
142 smt_enabled_at_boot = 0;
143
144 return 0;
145}
146early_param("smt-enabled", early_smt_enabled);
147
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148#else
149#define check_smt_enabled()
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150#endif /* CONFIG_SMP */
151
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152/* Put the paca pointer into r13 and SPRG3 */
153void __init setup_paca(int cpu)
154{
155 local_paca = &paca[cpu];
156 mtspr(SPRN_SPRG3, local_paca);
157}
158
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159/*
160 * Early initialization entry point. This is called by head.S
161 * with MMU translation disabled. We rely on the "feature" of
162 * the CPU that ignores the top 2 bits of the address in real
163 * mode so we can access kernel globals normally provided we
164 * only toy with things in the RMO region. From here, we do
165 * some early parsing of the device-tree to setup out LMB
166 * data structures, and allocate & initialize the hash table
167 * and segment tables so we can start running with translation
168 * enabled.
169 *
170 * It is this function which will call the probe() callback of
171 * the various platform types and copy the matching one to the
172 * global ppc_md structure. Your platform can eventually do
173 * some very early initializations from the probe() routine, but
174 * this is not recommended, be very careful as, for example, the
175 * device-tree is not accessible via normal means at this point.
176 */
177
178void __init early_setup(unsigned long dt_ptr)
179{
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180 /* Enable early debugging if any specified (see udbg.h) */
181 udbg_early_init();
40ef8cbc 182
e8222502 183 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
40ef8cbc 184
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185 /*
186 * Do early initializations using the flattened device
187 * tree, like retreiving the physical memory map or
188 * calculating/retreiving the hash table size
189 */
190 early_init_devtree(__va(dt_ptr));
191
4df20460 192 /* Now we know the logical id of our boot cpu, setup the paca. */
4ba99b97 193 setup_paca(boot_cpuid);
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194
195 /* Fix up paca fields required for the boot cpu */
196 get_paca()->cpu_start = 1;
197 get_paca()->stab_real = __pa((u64)&initial_stab);
198 get_paca()->stab_addr = (u64)&initial_stab;
199
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200 /* Probe the machine type */
201 probe_machine();
40ef8cbc 202
47310413 203 setup_kdump_trampoline();
0cc4746c 204
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205 DBG("Found, Initializing memory management...\n");
206
207 /*
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208 * Initialize the MMU Hash table and create the linear mapping
209 * of memory. Has to be done before stab/slb initialization as
210 * this is currently where the page size encoding is obtained
40ef8cbc 211 */
3c726f8d 212 htab_initialize();
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213
214 /*
3c726f8d 215 * Initialize stab / SLB management except on iSeries
40ef8cbc 216 */
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217 if (cpu_has_feature(CPU_FTR_SLB))
218 slb_initialize();
219 else if (!firmware_has_feature(FW_FEATURE_ISERIES))
220 stab_initialize(get_paca()->stab_real);
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221
222 DBG(" <- early_setup()\n");
223}
224
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225#ifdef CONFIG_SMP
226void early_setup_secondary(void)
227{
228 struct paca_struct *lpaca = get_paca();
229
230 /* Mark enabled in PACA */
231 lpaca->proc_enabled = 0;
232
233 /* Initialize hash table for that CPU */
234 htab_initialize_secondary();
235
236 /* Initialize STAB/SLB. We use a virtual address as it works
237 * in real mode on pSeries and we want a virutal address on
238 * iSeries anyway
239 */
240 if (cpu_has_feature(CPU_FTR_SLB))
241 slb_initialize();
242 else
243 stab_initialize(lpaca->stab_addr);
244}
245
246#endif /* CONFIG_SMP */
40ef8cbc 247
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248#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
249void smp_release_cpus(void)
250{
251 extern unsigned long __secondary_hold_spinloop;
758438a7 252 unsigned long *ptr;
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253
254 DBG(" -> smp_release_cpus()\n");
255
256 /* All secondary cpus are spinning on a common spinloop, release them
257 * all now so they can start to spin on their individual paca
258 * spinloops. For non SMP kernels, the secondary cpus never get out
259 * of the common spinloop.
260 * This is useless but harmless on iSeries, secondaries are already
261 * waiting on their paca spinloops. */
262
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263 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
264 - PHYSICAL_START);
265 *ptr = 1;
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266 mb();
267
268 DBG(" <- smp_release_cpus()\n");
269}
270#endif /* CONFIG_SMP || CONFIG_KEXEC */
271
40ef8cbc 272/*
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273 * Initialize some remaining members of the ppc64_caches and systemcfg
274 * structures
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275 * (at least until we get rid of them completely). This is mostly some
276 * cache informations about the CPU that will be used by cache flush
277 * routines and/or provided to userland
278 */
279static void __init initialize_cache_info(void)
280{
281 struct device_node *np;
282 unsigned long num_cpus = 0;
283
284 DBG(" -> initialize_cache_info()\n");
285
286 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
287 num_cpus += 1;
288
289 /* We're assuming *all* of the CPUs have the same
290 * d-cache and i-cache sizes... -Peter
291 */
292
293 if ( num_cpus == 1 ) {
294 u32 *sizep, *lsizep;
295 u32 size, lsize;
296 const char *dc, *ic;
297
298 /* Then read cache informations */
e8222502 299 if (machine_is(powermac)) {
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300 dc = "d-cache-block-size";
301 ic = "i-cache-block-size";
302 } else {
303 dc = "d-cache-line-size";
304 ic = "i-cache-line-size";
305 }
306
307 size = 0;
308 lsize = cur_cpu_spec->dcache_bsize;
309 sizep = (u32 *)get_property(np, "d-cache-size", NULL);
310 if (sizep != NULL)
311 size = *sizep;
312 lsizep = (u32 *) get_property(np, dc, NULL);
313 if (lsizep != NULL)
314 lsize = *lsizep;
315 if (sizep == 0 || lsizep == 0)
316 DBG("Argh, can't find dcache properties ! "
317 "sizep: %p, lsizep: %p\n", sizep, lsizep);
318
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319 ppc64_caches.dsize = size;
320 ppc64_caches.dline_size = lsize;
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321 ppc64_caches.log_dline_size = __ilog2(lsize);
322 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
323
324 size = 0;
325 lsize = cur_cpu_spec->icache_bsize;
326 sizep = (u32 *)get_property(np, "i-cache-size", NULL);
327 if (sizep != NULL)
328 size = *sizep;
329 lsizep = (u32 *)get_property(np, ic, NULL);
330 if (lsizep != NULL)
331 lsize = *lsizep;
332 if (sizep == 0 || lsizep == 0)
333 DBG("Argh, can't find icache properties ! "
334 "sizep: %p, lsizep: %p\n", sizep, lsizep);
335
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336 ppc64_caches.isize = size;
337 ppc64_caches.iline_size = lsize;
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338 ppc64_caches.log_iline_size = __ilog2(lsize);
339 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
340 }
341 }
342
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343 DBG(" <- initialize_cache_info()\n");
344}
345
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346
347/*
348 * Do some initial setup of the system. The parameters are those which
349 * were passed in from the bootloader.
350 */
351void __init setup_system(void)
352{
353 DBG(" -> setup_system()\n");
354
355 /*
356 * Unflatten the device-tree passed by prom_init or kexec
357 */
358 unflatten_device_tree();
359
360 /*
361 * Fill the ppc64_caches & systemcfg structures with informations
943ffb58 362 * retrieved from the device-tree. Need to be called before
40ef8cbc 363 * finish_device_tree() since the later requires some of the
7d0daae4 364 * informations filled up here to properly parse the interrupt tree.
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365 */
366 initialize_cache_info();
367
368#ifdef CONFIG_PPC_RTAS
369 /*
370 * Initialize RTAS if available
371 */
372 rtas_initialize();
373#endif /* CONFIG_PPC_RTAS */
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374
375 /*
376 * Check if we have an initrd provided via the device-tree
377 */
378 check_for_initrd();
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379
380 /*
381 * Do some platform specific early initializations, that includes
382 * setting up the hash table pointers. It also sets up some interrupt-mapping
383 * related options that will be used by finish_device_tree()
384 */
385 ppc_md.init_early();
40ef8cbc 386
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387 /*
388 * We can discover serial ports now since the above did setup the
389 * hash table management for us, thus ioremap works. We do that early
390 * so that further code can be debugged
391 */
463ce0e1 392 find_legacy_serial_ports();
463ce0e1 393
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394 /*
395 * "Finish" the device-tree, that is do the actual parsing of
396 * some of the properties like the interrupt map
397 */
398 finish_device_tree();
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399
400 /*
401 * Initialize xmon
402 */
403#ifdef CONFIG_XMON_DEFAULT
404 xmon_init(1);
405#endif
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406 /*
407 * Register early console
408 */
409 register_early_udbg_console();
40ef8cbc 410
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411 if (do_early_xmon)
412 debugger(NULL);
413
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414 check_smt_enabled();
415 smp_setup_cpu_maps();
40ef8cbc 416
f018b36f 417#ifdef CONFIG_SMP
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418 /* Release secondary cpus out of their spinloops at 0x60 now that
419 * we can map physical -> logical CPU ids
420 */
421 smp_release_cpus();
f018b36f 422#endif
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423
424 printk("Starting Linux PPC64 %s\n", system_utsname.version);
425
426 printk("-----------------------------------------------------\n");
427 printk("ppc64_pft_size = 0x%lx\n", ppc64_pft_size);
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428 printk("ppc64_interrupt_controller = 0x%ld\n",
429 ppc64_interrupt_controller);
a7f290da 430 printk("physicalMemorySize = 0x%lx\n", lmb_phys_mem_size());
40ef8cbc 431 printk("ppc64_caches.dcache_line_size = 0x%x\n",
a7f290da 432 ppc64_caches.dline_size);
40ef8cbc 433 printk("ppc64_caches.icache_line_size = 0x%x\n",
a7f290da 434 ppc64_caches.iline_size);
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435 printk("htab_address = 0x%p\n", htab_address);
436 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
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437#if PHYSICAL_START > 0
438 printk("physical_start = 0x%x\n", PHYSICAL_START);
439#endif
40ef8cbc 440 printk("-----------------------------------------------------\n");
40ef8cbc 441
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442 DBG(" <- setup_system()\n");
443}
444
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445#ifdef CONFIG_IRQSTACKS
446static void __init irqstack_early_init(void)
447{
448 unsigned int i;
449
450 /*
451 * interrupt stacks must be under 256MB, we cannot afford to take
452 * SLB misses on them.
453 */
0e551954 454 for_each_possible_cpu(i) {
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455 softirq_ctx[i] = (struct thread_info *)
456 __va(lmb_alloc_base(THREAD_SIZE,
457 THREAD_SIZE, 0x10000000));
458 hardirq_ctx[i] = (struct thread_info *)
459 __va(lmb_alloc_base(THREAD_SIZE,
460 THREAD_SIZE, 0x10000000));
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461 }
462}
463#else
464#define irqstack_early_init()
465#endif
466
467/*
468 * Stack space used when we detect a bad kernel stack pointer, and
469 * early in SMP boots before relocation is enabled.
470 */
471static void __init emergency_stack_init(void)
472{
473 unsigned long limit;
474 unsigned int i;
475
476 /*
477 * Emergency stacks must be under 256MB, we cannot afford to take
478 * SLB misses on them. The ABI also requires them to be 128-byte
479 * aligned.
480 *
481 * Since we use these as temporary stacks during secondary CPU
482 * bringup, we need to get at them in real mode. This means they
483 * must also be within the RMO region.
484 */
485 limit = min(0x10000000UL, lmb.rmo_size);
486
0e551954 487 for_each_possible_cpu(i)
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488 paca[i].emergency_sp =
489 __va(lmb_alloc_base(HW_PAGE_SIZE, 128, limit)) + HW_PAGE_SIZE;
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490}
491
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492/*
493 * Called into from start_kernel, after lock_kernel has been called.
494 * Initializes bootmem, which is unsed to manage page allocation until
495 * mem_init is called.
496 */
497void __init setup_arch(char **cmdline_p)
498{
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499 ppc64_boot_msg(0x12, "Setup Arch");
500
501 *cmdline_p = cmd_line;
502
503 /*
504 * Set cache line size based on type of cpu as a default.
505 * Systems with OF can look in the properties on the cpu node(s)
506 * for a possibly more accurate value.
507 */
508 dcache_bsize = ppc64_caches.dline_size;
509 icache_bsize = ppc64_caches.iline_size;
510
511 /* reboot on panic */
512 panic_timeout = 180;
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513
514 if (ppc_md.panic)
7e990266 515 setup_panic();
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516
517 init_mm.start_code = PAGE_OFFSET;
518 init_mm.end_code = (unsigned long) _etext;
519 init_mm.end_data = (unsigned long) _edata;
520 init_mm.brk = klimit;
521
522 irqstack_early_init();
523 emergency_stack_init();
524
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525 stabs_alloc();
526
527 /* set up the bootmem stuff with available memory */
528 do_init_bootmem();
529 sparse_init();
530
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531#ifdef CONFIG_DUMMY_CONSOLE
532 conswitchp = &dummy_con;
533#endif
534
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535 ppc_md.setup_arch();
536
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537 paging_init();
538 ppc64_boot_msg(0x15, "Setup Done");
539}
540
541
542/* ToDo: do something useful if ppc_md is not yet setup. */
543#define PPC64_LINUX_FUNCTION 0x0f000000
544#define PPC64_IPL_MESSAGE 0xc0000000
545#define PPC64_TERM_MESSAGE 0xb0000000
546
547static void ppc64_do_msg(unsigned int src, const char *msg)
548{
549 if (ppc_md.progress) {
550 char buf[128];
551
552 sprintf(buf, "%08X\n", src);
553 ppc_md.progress(buf, 0);
554 snprintf(buf, 128, "%s", msg);
555 ppc_md.progress(buf, 0);
556 }
557}
558
559/* Print a boot progress message. */
560void ppc64_boot_msg(unsigned int src, const char *msg)
561{
562 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
563 printk("[boot]%04x %s\n", src, msg);
564}
565
566/* Print a termination message (print only -- does not stop the kernel) */
567void ppc64_terminate_msg(unsigned int src, const char *msg)
568{
569 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_TERM_MESSAGE|src, msg);
570 printk("[terminate]%04x %s\n", src, msg);
571}
572
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573void cpu_die(void)
574{
575 if (ppc_md.cpu_die)
576 ppc_md.cpu_die();
577}
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578
579#ifdef CONFIG_SMP
580void __init setup_per_cpu_areas(void)
581{
582 int i;
583 unsigned long size;
584 char *ptr;
585
586 /* Copy section for each CPU (we discard the original) */
587 size = ALIGN(__per_cpu_end - __per_cpu_start, SMP_CACHE_BYTES);
588#ifdef CONFIG_MODULES
589 if (size < PERCPU_ENOUGH_ROOM)
590 size = PERCPU_ENOUGH_ROOM;
591#endif
592
0e551954 593 for_each_possible_cpu(i) {
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594 ptr = alloc_bootmem_node(NODE_DATA(cpu_to_node(i)), size);
595 if (!ptr)
596 panic("Cannot allocate cpu data for CPU %d\n", i);
597
598 paca[i].data_offset = ptr - __per_cpu_start;
599 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
600 }
601}
602#endif