sparc64: use embedding percpu first chunk allocator
[linux-2.6-block.git] / arch / powerpc / kernel / setup_64.c
CommitLineData
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1/*
2 *
3 * Common boot and setup code.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#undef DEBUG
14
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15#include <linux/module.h>
16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
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23#include <linux/seq_file.h>
24#include <linux/ioport.h>
25#include <linux/console.h>
26#include <linux/utsname.h>
27#include <linux/tty.h>
28#include <linux/root_dev.h>
29#include <linux/notifier.h>
30#include <linux/cpu.h>
31#include <linux/unistd.h>
32#include <linux/serial.h>
33#include <linux/serial_8250.h>
7a0268fa 34#include <linux/bootmem.h>
12d04eef 35#include <linux/pci.h>
945feb17 36#include <linux/lockdep.h>
d9b2b2a2 37#include <linux/lmb.h>
40ef8cbc 38#include <asm/io.h>
0cc4746c 39#include <asm/kdump.h>
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40#include <asm/prom.h>
41#include <asm/processor.h>
42#include <asm/pgtable.h>
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43#include <asm/smp.h>
44#include <asm/elf.h>
45#include <asm/machdep.h>
46#include <asm/paca.h>
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47#include <asm/time.h>
48#include <asm/cputable.h>
49#include <asm/sections.h>
50#include <asm/btext.h>
51#include <asm/nvram.h>
52#include <asm/setup.h>
53#include <asm/system.h>
54#include <asm/rtas.h>
55#include <asm/iommu.h>
56#include <asm/serial.h>
57#include <asm/cache.h>
58#include <asm/page.h>
59#include <asm/mmu.h>
40ef8cbc 60#include <asm/firmware.h>
f78541dc 61#include <asm/xmon.h>
dcad47fc 62#include <asm/udbg.h>
593e537b 63#include <asm/kexec.h>
ec3cf2ec 64#include <asm/swiotlb.h>
40ef8cbc 65
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66#include "setup.h"
67
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68#ifdef DEBUG
69#define DBG(fmt...) udbg_printf(fmt)
70#else
71#define DBG(fmt...)
72#endif
73
40ef8cbc 74int boot_cpuid = 0;
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75u64 ppc64_pft_size;
76
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77/* Pick defaults since we might want to patch instructions
78 * before we've read this from the device tree.
79 */
80struct ppc64_caches ppc64_caches = {
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81 .dline_size = 0x40,
82 .log_dline_size = 6,
83 .iline_size = 0x40,
84 .log_iline_size = 6
dabcafd3 85};
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86EXPORT_SYMBOL_GPL(ppc64_caches);
87
88/*
89 * These are used in binfmt_elf.c to put aux entries on the stack
90 * for each elf executable being started.
91 */
92int dcache_bsize;
93int icache_bsize;
94int ucache_bsize;
95
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96#ifdef CONFIG_SMP
97
98static int smt_enabled_cmdline;
99
100/* Look for ibm,smt-enabled OF option */
101static void check_smt_enabled(void)
102{
103 struct device_node *dn;
a7f67bdf 104 const char *smt_option;
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105
106 /* Allow the command line to overrule the OF option */
107 if (smt_enabled_cmdline)
108 return;
109
110 dn = of_find_node_by_path("/options");
111
112 if (dn) {
e2eb6392 113 smt_option = of_get_property(dn, "ibm,smt-enabled", NULL);
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114
115 if (smt_option) {
116 if (!strcmp(smt_option, "on"))
117 smt_enabled_at_boot = 1;
118 else if (!strcmp(smt_option, "off"))
119 smt_enabled_at_boot = 0;
120 }
121 }
122}
123
124/* Look for smt-enabled= cmdline option */
125static int __init early_smt_enabled(char *p)
126{
127 smt_enabled_cmdline = 1;
128
129 if (!p)
130 return 0;
131
132 if (!strcmp(p, "on") || !strcmp(p, "1"))
133 smt_enabled_at_boot = 1;
134 else if (!strcmp(p, "off") || !strcmp(p, "0"))
135 smt_enabled_at_boot = 0;
136
137 return 0;
138}
139early_param("smt-enabled", early_smt_enabled);
140
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141#else
142#define check_smt_enabled()
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143#endif /* CONFIG_SMP */
144
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145/* Put the paca pointer into r13 and SPRG3 */
146void __init setup_paca(int cpu)
147{
148 local_paca = &paca[cpu];
149 mtspr(SPRN_SPRG3, local_paca);
150}
151
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152/*
153 * Early initialization entry point. This is called by head.S
154 * with MMU translation disabled. We rely on the "feature" of
155 * the CPU that ignores the top 2 bits of the address in real
156 * mode so we can access kernel globals normally provided we
157 * only toy with things in the RMO region. From here, we do
158 * some early parsing of the device-tree to setup out LMB
159 * data structures, and allocate & initialize the hash table
160 * and segment tables so we can start running with translation
161 * enabled.
162 *
163 * It is this function which will call the probe() callback of
164 * the various platform types and copy the matching one to the
165 * global ppc_md structure. Your platform can eventually do
166 * some very early initializations from the probe() routine, but
167 * this is not recommended, be very careful as, for example, the
168 * device-tree is not accessible via normal means at this point.
169 */
170
171void __init early_setup(unsigned long dt_ptr)
172{
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173 /* -------- printk is _NOT_ safe to use here ! ------- */
174
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175 /* Fill in any unititialised pacas */
176 initialise_pacas();
177
42c4aaad 178 /* Identify CPU type */
974a76f5 179 identify_cpu(0, mfspr(SPRN_PVR));
42c4aaad 180
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181 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
182 setup_paca(0);
183
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184 /* Initialize lockdep early or else spinlocks will blow */
185 lockdep_init();
186
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187 /* -------- printk is now safe to use ------- */
188
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189 /* Enable early debugging if any specified (see udbg.h) */
190 udbg_early_init();
191
e8222502 192 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
40ef8cbc 193
40ef8cbc 194 /*
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195 * Do early initialization using the flattened device
196 * tree, such as retrieving the physical memory map or
197 * calculating/retrieving the hash table size.
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198 */
199 early_init_devtree(__va(dt_ptr));
200
4df20460 201 /* Now we know the logical id of our boot cpu, setup the paca. */
4ba99b97 202 setup_paca(boot_cpuid);
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203
204 /* Fix up paca fields required for the boot cpu */
205 get_paca()->cpu_start = 1;
4df20460 206
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207 /* Probe the machine type */
208 probe_machine();
40ef8cbc 209
47310413 210 setup_kdump_trampoline();
0cc4746c 211
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212 DBG("Found, Initializing memory management...\n");
213
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214 /* Initialize the hash table or TLB handling */
215 early_init_mmu();
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216
217 DBG(" <- early_setup()\n");
218}
219
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220#ifdef CONFIG_SMP
221void early_setup_secondary(void)
222{
d04c56f7 223 /* Mark interrupts enabled in PACA */
757c74d2 224 get_paca()->soft_enabled = 0;
799d6046 225
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226 /* Initialize the hash table or TLB handling */
227 early_init_mmu_secondary();
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228}
229
230#endif /* CONFIG_SMP */
40ef8cbc 231
b8f51021 232#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
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233extern unsigned long __secondary_hold_spinloop;
234extern void generic_secondary_smp_init(void);
235
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236void smp_release_cpus(void)
237{
758438a7 238 unsigned long *ptr;
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239
240 DBG(" -> smp_release_cpus()\n");
241
242 /* All secondary cpus are spinning on a common spinloop, release them
243 * all now so they can start to spin on their individual paca
244 * spinloops. For non SMP kernels, the secondary cpus never get out
245 * of the common spinloop.
1f6a93e4 246 */
b8f51021 247
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248 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
249 - PHYSICAL_START);
1f6a93e4 250 *ptr = __pa(generic_secondary_smp_init);
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251 mb();
252
253 DBG(" <- smp_release_cpus()\n");
254}
255#endif /* CONFIG_SMP || CONFIG_KEXEC */
256
40ef8cbc 257/*
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258 * Initialize some remaining members of the ppc64_caches and systemcfg
259 * structures
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260 * (at least until we get rid of them completely). This is mostly some
261 * cache informations about the CPU that will be used by cache flush
262 * routines and/or provided to userland
263 */
264static void __init initialize_cache_info(void)
265{
266 struct device_node *np;
267 unsigned long num_cpus = 0;
268
269 DBG(" -> initialize_cache_info()\n");
270
271 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) {
272 num_cpus += 1;
273
274 /* We're assuming *all* of the CPUs have the same
275 * d-cache and i-cache sizes... -Peter
276 */
277
278 if ( num_cpus == 1 ) {
a7f67bdf 279 const u32 *sizep, *lsizep;
40ef8cbc 280 u32 size, lsize;
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281
282 size = 0;
283 lsize = cur_cpu_spec->dcache_bsize;
e2eb6392 284 sizep = of_get_property(np, "d-cache-size", NULL);
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285 if (sizep != NULL)
286 size = *sizep;
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287 lsizep = of_get_property(np, "d-cache-block-size", NULL);
288 /* fallback if block size missing */
289 if (lsizep == NULL)
290 lsizep = of_get_property(np, "d-cache-line-size", NULL);
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291 if (lsizep != NULL)
292 lsize = *lsizep;
293 if (sizep == 0 || lsizep == 0)
294 DBG("Argh, can't find dcache properties ! "
295 "sizep: %p, lsizep: %p\n", sizep, lsizep);
296
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297 ppc64_caches.dsize = size;
298 ppc64_caches.dline_size = lsize;
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299 ppc64_caches.log_dline_size = __ilog2(lsize);
300 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
301
302 size = 0;
303 lsize = cur_cpu_spec->icache_bsize;
e2eb6392 304 sizep = of_get_property(np, "i-cache-size", NULL);
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305 if (sizep != NULL)
306 size = *sizep;
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307 lsizep = of_get_property(np, "i-cache-block-size", NULL);
308 if (lsizep == NULL)
309 lsizep = of_get_property(np, "i-cache-line-size", NULL);
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310 if (lsizep != NULL)
311 lsize = *lsizep;
312 if (sizep == 0 || lsizep == 0)
313 DBG("Argh, can't find icache properties ! "
314 "sizep: %p, lsizep: %p\n", sizep, lsizep);
315
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316 ppc64_caches.isize = size;
317 ppc64_caches.iline_size = lsize;
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318 ppc64_caches.log_iline_size = __ilog2(lsize);
319 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
320 }
321 }
322
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323 DBG(" <- initialize_cache_info()\n");
324}
325
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326
327/*
328 * Do some initial setup of the system. The parameters are those which
329 * were passed in from the bootloader.
330 */
331void __init setup_system(void)
332{
333 DBG(" -> setup_system()\n");
334
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335 /* Apply the CPUs-specific and firmware specific fixups to kernel
336 * text (nop out sections not relevant to this CPU or this firmware)
42c4aaad 337 */
0909c8c2 338 do_feature_fixups(cur_cpu_spec->cpu_features,
42c4aaad 339 &__start___ftr_fixup, &__stop___ftr_fixup);
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340 do_feature_fixups(cur_cpu_spec->mmu_features,
341 &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
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342 do_feature_fixups(powerpc_firmware_features,
343 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
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344 do_lwsync_fixups(cur_cpu_spec->cpu_features,
345 &__start___lwsync_fixup, &__stop___lwsync_fixup);
42c4aaad 346
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347 /*
348 * Unflatten the device-tree passed by prom_init or kexec
349 */
350 unflatten_device_tree();
351
352 /*
353 * Fill the ppc64_caches & systemcfg structures with informations
0ebfff14 354 * retrieved from the device-tree.
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355 */
356 initialize_cache_info();
357
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358 /*
359 * Initialize irq remapping subsystem
360 */
361 irq_early_init();
362
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363#ifdef CONFIG_PPC_RTAS
364 /*
365 * Initialize RTAS if available
366 */
367 rtas_initialize();
368#endif /* CONFIG_PPC_RTAS */
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369
370 /*
371 * Check if we have an initrd provided via the device-tree
372 */
373 check_for_initrd();
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374
375 /*
376 * Do some platform specific early initializations, that includes
377 * setting up the hash table pointers. It also sets up some interrupt-mapping
378 * related options that will be used by finish_device_tree()
379 */
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380 if (ppc_md.init_early)
381 ppc_md.init_early();
40ef8cbc 382
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383 /*
384 * We can discover serial ports now since the above did setup the
385 * hash table management for us, thus ioremap works. We do that early
386 * so that further code can be debugged
387 */
463ce0e1 388 find_legacy_serial_ports();
463ce0e1 389
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390 /*
391 * Register early console
392 */
393 register_early_udbg_console();
40ef8cbc 394
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395 /*
396 * Initialize xmon
397 */
398 xmon_setup();
480f6f35 399
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400 check_smt_enabled();
401 smp_setup_cpu_maps();
40ef8cbc 402
f018b36f 403#ifdef CONFIG_SMP
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404 /* Release secondary cpus out of their spinloops at 0x60 now that
405 * we can map physical -> logical CPU ids
406 */
407 smp_release_cpus();
f018b36f 408#endif
40ef8cbc 409
96b644bd 410 printk("Starting Linux PPC64 %s\n", init_utsname()->version);
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411
412 printk("-----------------------------------------------------\n");
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413 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
414 printk("physicalMemorySize = 0x%llx\n", lmb_phys_mem_size());
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415 if (ppc64_caches.dline_size != 0x80)
416 printk("ppc64_caches.dcache_line_size = 0x%x\n",
417 ppc64_caches.dline_size);
418 if (ppc64_caches.iline_size != 0x80)
419 printk("ppc64_caches.icache_line_size = 0x%x\n",
420 ppc64_caches.iline_size);
94491685 421#ifdef CONFIG_PPC_STD_MMU_64
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422 if (htab_address)
423 printk("htab_address = 0x%p\n", htab_address);
40ef8cbc 424 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
94491685 425#endif /* CONFIG_PPC_STD_MMU_64 */
b160544c 426 if (PHYSICAL_START > 0)
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427 printk("physical_start = 0x%llx\n",
428 (unsigned long long)PHYSICAL_START);
40ef8cbc 429 printk("-----------------------------------------------------\n");
40ef8cbc 430
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431 DBG(" <- setup_system()\n");
432}
433
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434#ifdef CONFIG_IRQSTACKS
435static void __init irqstack_early_init(void)
436{
437 unsigned int i;
438
439 /*
440 * interrupt stacks must be under 256MB, we cannot afford to take
441 * SLB misses on them.
442 */
0e551954 443 for_each_possible_cpu(i) {
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444 softirq_ctx[i] = (struct thread_info *)
445 __va(lmb_alloc_base(THREAD_SIZE,
446 THREAD_SIZE, 0x10000000));
447 hardirq_ctx[i] = (struct thread_info *)
448 __va(lmb_alloc_base(THREAD_SIZE,
449 THREAD_SIZE, 0x10000000));
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450 }
451}
452#else
453#define irqstack_early_init()
454#endif
455
456/*
457 * Stack space used when we detect a bad kernel stack pointer, and
458 * early in SMP boots before relocation is enabled.
459 */
460static void __init emergency_stack_init(void)
461{
462 unsigned long limit;
463 unsigned int i;
464
465 /*
466 * Emergency stacks must be under 256MB, we cannot afford to take
467 * SLB misses on them. The ABI also requires them to be 128-byte
468 * aligned.
469 *
470 * Since we use these as temporary stacks during secondary CPU
471 * bringup, we need to get at them in real mode. This means they
472 * must also be within the RMO region.
473 */
fe333321 474 limit = min(0x10000000ULL, lmb.rmo_size);
40ef8cbc 475
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476 for_each_possible_cpu(i) {
477 unsigned long sp;
478 sp = lmb_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
479 sp += THREAD_SIZE;
480 paca[i].emergency_sp = __va(sp);
481 }
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482}
483
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484/*
485 * Called into from start_kernel, after lock_kernel has been called.
486 * Initializes bootmem, which is unsed to manage page allocation until
487 * mem_init is called.
488 */
489void __init setup_arch(char **cmdline_p)
490{
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491 ppc64_boot_msg(0x12, "Setup Arch");
492
493 *cmdline_p = cmd_line;
494
495 /*
496 * Set cache line size based on type of cpu as a default.
497 * Systems with OF can look in the properties on the cpu node(s)
498 * for a possibly more accurate value.
499 */
500 dcache_bsize = ppc64_caches.dline_size;
501 icache_bsize = ppc64_caches.iline_size;
502
503 /* reboot on panic */
504 panic_timeout = 180;
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505
506 if (ppc_md.panic)
7e990266 507 setup_panic();
40ef8cbc 508
4846c5de 509 init_mm.start_code = (unsigned long)_stext;
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510 init_mm.end_code = (unsigned long) _etext;
511 init_mm.end_data = (unsigned long) _edata;
512 init_mm.brk = klimit;
513
514 irqstack_early_init();
515 emergency_stack_init();
516
94491685 517#ifdef CONFIG_PPC_STD_MMU_64
40ef8cbc 518 stabs_alloc();
94491685 519#endif
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520 /* set up the bootmem stuff with available memory */
521 do_init_bootmem();
522 sparse_init();
523
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524#ifdef CONFIG_DUMMY_CONSOLE
525 conswitchp = &dummy_con;
526#endif
527
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528 if (ppc_md.setup_arch)
529 ppc_md.setup_arch();
40ef8cbc 530
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531#ifdef CONFIG_SWIOTLB
532 if (ppc_swiotlb_enable)
533 swiotlb_init();
534#endif
535
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536 paging_init();
537 ppc64_boot_msg(0x15, "Setup Done");
538}
539
540
541/* ToDo: do something useful if ppc_md is not yet setup. */
542#define PPC64_LINUX_FUNCTION 0x0f000000
543#define PPC64_IPL_MESSAGE 0xc0000000
544#define PPC64_TERM_MESSAGE 0xb0000000
545
546static void ppc64_do_msg(unsigned int src, const char *msg)
547{
548 if (ppc_md.progress) {
549 char buf[128];
550
551 sprintf(buf, "%08X\n", src);
552 ppc_md.progress(buf, 0);
553 snprintf(buf, 128, "%s", msg);
554 ppc_md.progress(buf, 0);
555 }
556}
557
558/* Print a boot progress message. */
559void ppc64_boot_msg(unsigned int src, const char *msg)
560{
561 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
562 printk("[boot]%04x %s\n", src, msg);
563}
564
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565void cpu_die(void)
566{
567 if (ppc_md.cpu_die)
568 ppc_md.cpu_die();
569}
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570
571#ifdef CONFIG_SMP
572void __init setup_per_cpu_areas(void)
573{
574 int i;
575 unsigned long size;
576 char *ptr;
577
578 /* Copy section for each CPU (we discard the original) */
b6e3590f 579 size = ALIGN(__per_cpu_end - __per_cpu_start, PAGE_SIZE);
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580#ifdef CONFIG_MODULES
581 if (size < PERCPU_ENOUGH_ROOM)
582 size = PERCPU_ENOUGH_ROOM;
583#endif
584
0e551954 585 for_each_possible_cpu(i) {
b6e3590f 586 ptr = alloc_bootmem_pages_node(NODE_DATA(cpu_to_node(i)), size);
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587
588 paca[i].data_offset = ptr - __per_cpu_start;
589 memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start);
590 }
591}
592#endif
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593
594
595#ifdef CONFIG_PPC_INDIRECT_IO
596struct ppc_pci_io ppc_pci_io;
597EXPORT_SYMBOL(ppc_pci_io);
598#endif /* CONFIG_PPC_INDIRECT_IO */
599