powerpc/pci: Remove duplicate check in pcibios_fixup_bus()
[linux-2.6-block.git] / arch / powerpc / kernel / setup_64.c
CommitLineData
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1/*
2 *
3 * Common boot and setup code.
4 *
5 * Copyright (C) 2001 PPC64 Team, IBM Corp
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#undef DEBUG
14
4b16f8e2 15#include <linux/export.h>
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16#include <linux/string.h>
17#include <linux/sched.h>
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <linux/reboot.h>
21#include <linux/delay.h>
22#include <linux/initrd.h>
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23#include <linux/seq_file.h>
24#include <linux/ioport.h>
25#include <linux/console.h>
26#include <linux/utsname.h>
27#include <linux/tty.h>
28#include <linux/root_dev.h>
29#include <linux/notifier.h>
30#include <linux/cpu.h>
31#include <linux/unistd.h>
32#include <linux/serial.h>
33#include <linux/serial_8250.h>
7a0268fa 34#include <linux/bootmem.h>
12d04eef 35#include <linux/pci.h>
945feb17 36#include <linux/lockdep.h>
95f72d1e 37#include <linux/memblock.h>
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38#include <linux/hugetlb.h>
39
40ef8cbc 40#include <asm/io.h>
0cc4746c 41#include <asm/kdump.h>
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42#include <asm/prom.h>
43#include <asm/processor.h>
44#include <asm/pgtable.h>
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45#include <asm/smp.h>
46#include <asm/elf.h>
47#include <asm/machdep.h>
48#include <asm/paca.h>
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49#include <asm/time.h>
50#include <asm/cputable.h>
51#include <asm/sections.h>
52#include <asm/btext.h>
53#include <asm/nvram.h>
54#include <asm/setup.h>
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55#include <asm/rtas.h>
56#include <asm/iommu.h>
57#include <asm/serial.h>
58#include <asm/cache.h>
59#include <asm/page.h>
60#include <asm/mmu.h>
40ef8cbc 61#include <asm/firmware.h>
f78541dc 62#include <asm/xmon.h>
dcad47fc 63#include <asm/udbg.h>
593e537b 64#include <asm/kexec.h>
25d21ad6 65#include <asm/mmu_context.h>
d36b4c4f 66#include <asm/code-patching.h>
aa04b4cc 67#include <asm/kvm_ppc.h>
a6146888 68#include <asm/hugetlb.h>
4e21b94c 69#include <asm/epapr_hcalls.h>
40ef8cbc 70
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71#include "setup.h"
72
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73#ifdef DEBUG
74#define DBG(fmt...) udbg_printf(fmt)
75#else
76#define DBG(fmt...)
77#endif
78
40ef8cbc 79int boot_cpuid = 0;
8246aca7 80int spinning_secondaries;
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81u64 ppc64_pft_size;
82
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83/* Pick defaults since we might want to patch instructions
84 * before we've read this from the device tree.
85 */
86struct ppc64_caches ppc64_caches = {
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87 .dline_size = 0x40,
88 .log_dline_size = 6,
89 .iline_size = 0x40,
90 .log_iline_size = 6
dabcafd3 91};
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92EXPORT_SYMBOL_GPL(ppc64_caches);
93
94/*
95 * These are used in binfmt_elf.c to put aux entries on the stack
96 * for each elf executable being started.
97 */
98int dcache_bsize;
99int icache_bsize;
100int ucache_bsize;
101
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102#ifdef CONFIG_SMP
103
954e6da5 104static char *smt_enabled_cmdline;
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105
106/* Look for ibm,smt-enabled OF option */
107static void check_smt_enabled(void)
108{
109 struct device_node *dn;
a7f67bdf 110 const char *smt_option;
40ef8cbc 111
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112 /* Default to enabling all threads */
113 smt_enabled_at_boot = threads_per_core;
40ef8cbc 114
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115 /* Allow the command line to overrule the OF option */
116 if (smt_enabled_cmdline) {
117 if (!strcmp(smt_enabled_cmdline, "on"))
118 smt_enabled_at_boot = threads_per_core;
119 else if (!strcmp(smt_enabled_cmdline, "off"))
120 smt_enabled_at_boot = 0;
121 else {
122 long smt;
123 int rc;
124
125 rc = strict_strtol(smt_enabled_cmdline, 10, &smt);
126 if (!rc)
127 smt_enabled_at_boot =
128 min(threads_per_core, (int)smt);
129 }
130 } else {
131 dn = of_find_node_by_path("/options");
132 if (dn) {
133 smt_option = of_get_property(dn, "ibm,smt-enabled",
134 NULL);
135
136 if (smt_option) {
137 if (!strcmp(smt_option, "on"))
138 smt_enabled_at_boot = threads_per_core;
139 else if (!strcmp(smt_option, "off"))
140 smt_enabled_at_boot = 0;
141 }
142
143 of_node_put(dn);
144 }
145 }
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146}
147
148/* Look for smt-enabled= cmdline option */
149static int __init early_smt_enabled(char *p)
150{
954e6da5 151 smt_enabled_cmdline = p;
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152 return 0;
153}
154early_param("smt-enabled", early_smt_enabled);
155
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156#else
157#define check_smt_enabled()
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158#endif /* CONFIG_SMP */
159
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160/** Fix up paca fields required for the boot cpu */
161static void fixup_boot_paca(void)
162{
163 /* The boot cpu is started */
164 get_paca()->cpu_start = 1;
165 /* Allow percpu accesses to work until we setup percpu data */
166 get_paca()->data_offset = 0;
167}
168
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169/*
170 * Early initialization entry point. This is called by head.S
171 * with MMU translation disabled. We rely on the "feature" of
172 * the CPU that ignores the top 2 bits of the address in real
173 * mode so we can access kernel globals normally provided we
174 * only toy with things in the RMO region. From here, we do
95f72d1e 175 * some early parsing of the device-tree to setup out MEMBLOCK
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176 * data structures, and allocate & initialize the hash table
177 * and segment tables so we can start running with translation
178 * enabled.
179 *
180 * It is this function which will call the probe() callback of
181 * the various platform types and copy the matching one to the
182 * global ppc_md structure. Your platform can eventually do
183 * some very early initializations from the probe() routine, but
184 * this is not recommended, be very careful as, for example, the
185 * device-tree is not accessible via normal means at this point.
186 */
187
188void __init early_setup(unsigned long dt_ptr)
189{
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190 static __initdata struct paca_struct boot_paca;
191
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192 /* -------- printk is _NOT_ safe to use here ! ------- */
193
42c4aaad 194 /* Identify CPU type */
974a76f5 195 identify_cpu(0, mfspr(SPRN_PVR));
42c4aaad 196
33dbcf72 197 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */
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198 initialise_paca(&boot_paca, 0);
199 setup_paca(&boot_paca);
25e13814 200 fixup_boot_paca();
33dbcf72 201
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202 /* Initialize lockdep early or else spinlocks will blow */
203 lockdep_init();
204
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205 /* -------- printk is now safe to use ------- */
206
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207 /* Enable early debugging if any specified (see udbg.h) */
208 udbg_early_init();
209
e8222502 210 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr);
40ef8cbc 211
40ef8cbc 212 /*
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213 * Do early initialization using the flattened device
214 * tree, such as retrieving the physical memory map or
215 * calculating/retrieving the hash table size.
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216 */
217 early_init_devtree(__va(dt_ptr));
218
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219 epapr_paravirt_early_init();
220
4df20460 221 /* Now we know the logical id of our boot cpu, setup the paca. */
1426d5a3 222 setup_paca(&paca[boot_cpuid]);
25e13814 223 fixup_boot_paca();
4df20460 224
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225 /* Probe the machine type */
226 probe_machine();
40ef8cbc 227
47310413 228 setup_kdump_trampoline();
0cc4746c 229
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230 DBG("Found, Initializing memory management...\n");
231
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232 /* Initialize the hash table or TLB handling */
233 early_init_mmu();
40ef8cbc 234
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235 /*
236 * Reserve any gigantic pages requested on the command line.
237 * memblock needs to have been initialized by the time this is
238 * called since this will reserve memory.
239 */
240 reserve_hugetlb_gpages();
241
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242 DBG(" <- early_setup()\n");
243}
244
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245#ifdef CONFIG_SMP
246void early_setup_secondary(void)
247{
d04c56f7 248 /* Mark interrupts enabled in PACA */
757c74d2 249 get_paca()->soft_enabled = 0;
799d6046 250
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251 /* Initialize the hash table or TLB handling */
252 early_init_mmu_secondary();
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253}
254
255#endif /* CONFIG_SMP */
40ef8cbc 256
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257#if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
258void smp_release_cpus(void)
259{
758438a7 260 unsigned long *ptr;
9d07bc84 261 int i;
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262
263 DBG(" -> smp_release_cpus()\n");
264
265 /* All secondary cpus are spinning on a common spinloop, release them
266 * all now so they can start to spin on their individual paca
267 * spinloops. For non SMP kernels, the secondary cpus never get out
268 * of the common spinloop.
1f6a93e4 269 */
b8f51021 270
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271 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
272 - PHYSICAL_START);
1f6a93e4 273 *ptr = __pa(generic_secondary_smp_init);
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274
275 /* And wait a bit for them to catch up */
276 for (i = 0; i < 100000; i++) {
277 mb();
278 HMT_low();
7ac87abb 279 if (spinning_secondaries == 0)
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280 break;
281 udelay(1);
282 }
7ac87abb 283 DBG("spinning_secondaries = %d\n", spinning_secondaries);
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284
285 DBG(" <- smp_release_cpus()\n");
286}
287#endif /* CONFIG_SMP || CONFIG_KEXEC */
288
40ef8cbc 289/*
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290 * Initialize some remaining members of the ppc64_caches and systemcfg
291 * structures
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292 * (at least until we get rid of them completely). This is mostly some
293 * cache informations about the CPU that will be used by cache flush
294 * routines and/or provided to userland
295 */
296static void __init initialize_cache_info(void)
297{
298 struct device_node *np;
299 unsigned long num_cpus = 0;
300
301 DBG(" -> initialize_cache_info()\n");
302
94db7c5e 303 for_each_node_by_type(np, "cpu") {
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304 num_cpus += 1;
305
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306 /*
307 * We're assuming *all* of the CPUs have the same
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308 * d-cache and i-cache sizes... -Peter
309 */
dfbe93a2 310 if (num_cpus == 1) {
a7f67bdf 311 const u32 *sizep, *lsizep;
40ef8cbc 312 u32 size, lsize;
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313
314 size = 0;
315 lsize = cur_cpu_spec->dcache_bsize;
e2eb6392 316 sizep = of_get_property(np, "d-cache-size", NULL);
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317 if (sizep != NULL)
318 size = *sizep;
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319 lsizep = of_get_property(np, "d-cache-block-size",
320 NULL);
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321 /* fallback if block size missing */
322 if (lsizep == NULL)
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323 lsizep = of_get_property(np,
324 "d-cache-line-size",
325 NULL);
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326 if (lsizep != NULL)
327 lsize = *lsizep;
b0d436c7 328 if (sizep == NULL || lsizep == NULL)
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329 DBG("Argh, can't find dcache properties ! "
330 "sizep: %p, lsizep: %p\n", sizep, lsizep);
331
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332 ppc64_caches.dsize = size;
333 ppc64_caches.dline_size = lsize;
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334 ppc64_caches.log_dline_size = __ilog2(lsize);
335 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize;
336
337 size = 0;
338 lsize = cur_cpu_spec->icache_bsize;
e2eb6392 339 sizep = of_get_property(np, "i-cache-size", NULL);
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340 if (sizep != NULL)
341 size = *sizep;
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342 lsizep = of_get_property(np, "i-cache-block-size",
343 NULL);
20474abd 344 if (lsizep == NULL)
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345 lsizep = of_get_property(np,
346 "i-cache-line-size",
347 NULL);
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348 if (lsizep != NULL)
349 lsize = *lsizep;
b0d436c7 350 if (sizep == NULL || lsizep == NULL)
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351 DBG("Argh, can't find icache properties ! "
352 "sizep: %p, lsizep: %p\n", sizep, lsizep);
353
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354 ppc64_caches.isize = size;
355 ppc64_caches.iline_size = lsize;
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356 ppc64_caches.log_iline_size = __ilog2(lsize);
357 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize;
358 }
359 }
360
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361 DBG(" <- initialize_cache_info()\n");
362}
363
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364
365/*
366 * Do some initial setup of the system. The parameters are those which
367 * were passed in from the bootloader.
368 */
369void __init setup_system(void)
370{
371 DBG(" -> setup_system()\n");
372
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373 /* Apply the CPUs-specific and firmware specific fixups to kernel
374 * text (nop out sections not relevant to this CPU or this firmware)
42c4aaad 375 */
0909c8c2 376 do_feature_fixups(cur_cpu_spec->cpu_features,
42c4aaad 377 &__start___ftr_fixup, &__stop___ftr_fixup);
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378 do_feature_fixups(cur_cpu_spec->mmu_features,
379 &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup);
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380 do_feature_fixups(powerpc_firmware_features,
381 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
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382 do_lwsync_fixups(cur_cpu_spec->cpu_features,
383 &__start___lwsync_fixup, &__stop___lwsync_fixup);
d715e433 384 do_final_fixups();
42c4aaad 385
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386 /*
387 * Unflatten the device-tree passed by prom_init or kexec
388 */
389 unflatten_device_tree();
390
391 /*
392 * Fill the ppc64_caches & systemcfg structures with informations
0ebfff14 393 * retrieved from the device-tree.
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394 */
395 initialize_cache_info();
396
397#ifdef CONFIG_PPC_RTAS
398 /*
399 * Initialize RTAS if available
400 */
401 rtas_initialize();
402#endif /* CONFIG_PPC_RTAS */
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403
404 /*
405 * Check if we have an initrd provided via the device-tree
406 */
407 check_for_initrd();
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408
409 /*
410 * Do some platform specific early initializations, that includes
411 * setting up the hash table pointers. It also sets up some interrupt-mapping
412 * related options that will be used by finish_device_tree()
413 */
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414 if (ppc_md.init_early)
415 ppc_md.init_early();
40ef8cbc 416
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417 /*
418 * We can discover serial ports now since the above did setup the
419 * hash table management for us, thus ioremap works. We do that early
420 * so that further code can be debugged
421 */
463ce0e1 422 find_legacy_serial_ports();
463ce0e1 423
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424 /*
425 * Register early console
426 */
427 register_early_udbg_console();
40ef8cbc 428
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429 /*
430 * Initialize xmon
431 */
432 xmon_setup();
480f6f35 433
5ad57078 434 smp_setup_cpu_maps();
954e6da5 435 check_smt_enabled();
40ef8cbc 436
f018b36f 437#ifdef CONFIG_SMP
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438 /* Release secondary cpus out of their spinloops at 0x60 now that
439 * we can map physical -> logical CPU ids
440 */
441 smp_release_cpus();
f018b36f 442#endif
40ef8cbc 443
96b644bd 444 printk("Starting Linux PPC64 %s\n", init_utsname()->version);
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445
446 printk("-----------------------------------------------------\n");
fe333321 447 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size);
95f72d1e 448 printk("physicalMemorySize = 0x%llx\n", memblock_phys_mem_size());
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AB
449 if (ppc64_caches.dline_size != 0x80)
450 printk("ppc64_caches.dcache_line_size = 0x%x\n",
451 ppc64_caches.dline_size);
452 if (ppc64_caches.iline_size != 0x80)
453 printk("ppc64_caches.icache_line_size = 0x%x\n",
454 ppc64_caches.iline_size);
94491685 455#ifdef CONFIG_PPC_STD_MMU_64
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456 if (htab_address)
457 printk("htab_address = 0x%p\n", htab_address);
40ef8cbc 458 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
94491685 459#endif /* CONFIG_PPC_STD_MMU_64 */
b160544c 460 if (PHYSICAL_START > 0)
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461 printk("physical_start = 0x%llx\n",
462 (unsigned long long)PHYSICAL_START);
40ef8cbc 463 printk("-----------------------------------------------------\n");
40ef8cbc 464
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465 DBG(" <- setup_system()\n");
466}
467
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468/* This returns the limit below which memory accesses to the linear
469 * mapping are guarnateed not to cause a TLB or SLB miss. This is
470 * used to allocate interrupt or emergency stacks for which our
471 * exception entry path doesn't deal with being interrupted.
472 */
473static u64 safe_stack_limit(void)
095c7965 474{
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475#ifdef CONFIG_PPC_BOOK3E
476 /* Freescale BookE bolts the entire linear mapping */
477 if (mmu_has_feature(MMU_FTR_TYPE_FSL_E))
478 return linear_map_top;
479 /* Other BookE, we assume the first GB is bolted */
480 return 1ul << 30;
481#else
482 /* BookS, the first segment is bolted */
483 if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
095c7965 484 return 1UL << SID_SHIFT_1T;
095c7965 485 return 1UL << SID_SHIFT;
40bd587a 486#endif
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487}
488
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489static void __init irqstack_early_init(void)
490{
40bd587a 491 u64 limit = safe_stack_limit();
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492 unsigned int i;
493
494 /*
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495 * Interrupt stacks must be in the first segment since we
496 * cannot afford to take SLB misses on them.
40ef8cbc 497 */
0e551954 498 for_each_possible_cpu(i) {
3c726f8d 499 softirq_ctx[i] = (struct thread_info *)
95f72d1e 500 __va(memblock_alloc_base(THREAD_SIZE,
095c7965 501 THREAD_SIZE, limit));
3c726f8d 502 hardirq_ctx[i] = (struct thread_info *)
95f72d1e 503 __va(memblock_alloc_base(THREAD_SIZE,
095c7965 504 THREAD_SIZE, limit));
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505 }
506}
40ef8cbc 507
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508#ifdef CONFIG_PPC_BOOK3E
509static void __init exc_lvl_early_init(void)
510{
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511 extern unsigned int interrupt_base_book3e;
512 extern unsigned int exc_debug_debug_book3e;
513
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514 unsigned int i;
515
516 for_each_possible_cpu(i) {
517 critirq_ctx[i] = (struct thread_info *)
95f72d1e 518 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
2d27cfd3 519 dbgirq_ctx[i] = (struct thread_info *)
95f72d1e 520 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
2d27cfd3 521 mcheckirq_ctx[i] = (struct thread_info *)
95f72d1e 522 __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
2d27cfd3 523 }
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524
525 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
526 patch_branch(&interrupt_base_book3e + (0x040 / 4) + 1,
527 (unsigned long)&exc_debug_debug_book3e, 0);
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528}
529#else
530#define exc_lvl_early_init()
531#endif
532
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533/*
534 * Stack space used when we detect a bad kernel stack pointer, and
535 * early in SMP boots before relocation is enabled.
536 */
537static void __init emergency_stack_init(void)
538{
095c7965 539 u64 limit;
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540 unsigned int i;
541
542 /*
543 * Emergency stacks must be under 256MB, we cannot afford to take
544 * SLB misses on them. The ABI also requires them to be 128-byte
545 * aligned.
546 *
547 * Since we use these as temporary stacks during secondary CPU
548 * bringup, we need to get at them in real mode. This means they
549 * must also be within the RMO region.
550 */
40bd587a 551 limit = min(safe_stack_limit(), ppc64_rma_size);
40ef8cbc 552
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553 for_each_possible_cpu(i) {
554 unsigned long sp;
95f72d1e 555 sp = memblock_alloc_base(THREAD_SIZE, THREAD_SIZE, limit);
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556 sp += THREAD_SIZE;
557 paca[i].emergency_sp = __va(sp);
558 }
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559}
560
40ef8cbc 561/*
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562 * Called into from start_kernel this initializes bootmem, which is used
563 * to manage page allocation until mem_init is called.
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564 */
565void __init setup_arch(char **cmdline_p)
566{
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567 ppc64_boot_msg(0x12, "Setup Arch");
568
569 *cmdline_p = cmd_line;
570
571 /*
572 * Set cache line size based on type of cpu as a default.
573 * Systems with OF can look in the properties on the cpu node(s)
574 * for a possibly more accurate value.
575 */
576 dcache_bsize = ppc64_caches.dline_size;
577 icache_bsize = ppc64_caches.iline_size;
578
579 /* reboot on panic */
580 panic_timeout = 180;
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581
582 if (ppc_md.panic)
7e990266 583 setup_panic();
40ef8cbc 584
4846c5de 585 init_mm.start_code = (unsigned long)_stext;
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586 init_mm.end_code = (unsigned long) _etext;
587 init_mm.end_data = (unsigned long) _edata;
588 init_mm.brk = klimit;
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589#ifdef CONFIG_PPC_64K_PAGES
590 init_mm.context.pte_frag = NULL;
591#endif
40ef8cbc 592 irqstack_early_init();
2d27cfd3 593 exc_lvl_early_init();
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594 emergency_stack_init();
595
94491685 596#ifdef CONFIG_PPC_STD_MMU_64
40ef8cbc 597 stabs_alloc();
94491685 598#endif
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599 /* set up the bootmem stuff with available memory */
600 do_init_bootmem();
601 sparse_init();
602
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603#ifdef CONFIG_DUMMY_CONSOLE
604 conswitchp = &dummy_con;
605#endif
606
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607 if (ppc_md.setup_arch)
608 ppc_md.setup_arch();
40ef8cbc 609
40ef8cbc 610 paging_init();
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611
612 /* Initialize the MMU context management stuff */
613 mmu_context_init();
614
b4e70611 615 kvm_linear_init();
aa04b4cc 616
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617 /* Interrupt code needs to be 64K-aligned */
618 if ((unsigned long)_stext & 0xffff)
619 panic("Kernelbase not 64K-aligned (0x%lx)!\n",
620 (unsigned long)_stext);
621
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622 ppc64_boot_msg(0x15, "Setup Done");
623}
624
625
626/* ToDo: do something useful if ppc_md is not yet setup. */
627#define PPC64_LINUX_FUNCTION 0x0f000000
628#define PPC64_IPL_MESSAGE 0xc0000000
629#define PPC64_TERM_MESSAGE 0xb0000000
630
631static void ppc64_do_msg(unsigned int src, const char *msg)
632{
633 if (ppc_md.progress) {
634 char buf[128];
635
636 sprintf(buf, "%08X\n", src);
637 ppc_md.progress(buf, 0);
638 snprintf(buf, 128, "%s", msg);
639 ppc_md.progress(buf, 0);
640 }
641}
642
643/* Print a boot progress message. */
644void ppc64_boot_msg(unsigned int src, const char *msg)
645{
646 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg);
647 printk("[boot]%04x %s\n", src, msg);
648}
649
7a0268fa 650#ifdef CONFIG_SMP
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651#define PCPU_DYN_SIZE ()
652
653static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align)
7a0268fa 654{
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655 return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align,
656 __pa(MAX_DMA_ADDRESS));
657}
7a0268fa 658
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659static void __init pcpu_fc_free(void *ptr, size_t size)
660{
661 free_bootmem(__pa(ptr), size);
662}
7a0268fa 663
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664static int pcpu_cpu_distance(unsigned int from, unsigned int to)
665{
666 if (cpu_to_node(from) == cpu_to_node(to))
667 return LOCAL_DISTANCE;
668 else
669 return REMOTE_DISTANCE;
670}
671
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672unsigned long __per_cpu_offset[NR_CPUS] __read_mostly;
673EXPORT_SYMBOL(__per_cpu_offset);
674
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675void __init setup_per_cpu_areas(void)
676{
677 const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE;
678 size_t atom_size;
679 unsigned long delta;
680 unsigned int cpu;
681 int rc;
682
683 /*
684 * Linear mapping is one of 4K, 1M and 16M. For 4K, no need
685 * to group units. For larger mappings, use 1M atom which
686 * should be large enough to contain a number of units.
687 */
688 if (mmu_linear_psize == MMU_PAGE_4K)
689 atom_size = PAGE_SIZE;
690 else
691 atom_size = 1 << 20;
692
693 rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance,
694 pcpu_fc_alloc, pcpu_fc_free);
695 if (rc < 0)
696 panic("cannot initialize percpu area (err=%d)", rc);
697
698 delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
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699 for_each_possible_cpu(cpu) {
700 __per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
701 paca[cpu].data_offset = __per_cpu_offset[cpu];
702 }
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703}
704#endif
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705
706
707#ifdef CONFIG_PPC_INDIRECT_IO
708struct ppc_pci_io ppc_pci_io;
709EXPORT_SYMBOL(ppc_pci_io);
710#endif /* CONFIG_PPC_INDIRECT_IO */
711