[linux-2.6-block.git] / arch / powerpc / include / asm / book3s / 64 / hash-4k.h

#ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H
#define _ASM_POWERPC_BOOK3S_64_HASH_4K_H
/*
 * Entries per page directory level.  The PTE level must use a 64b record
 * for each page table entry.  The PMD and PGD level use a 32b record for
 * each entry by assuming that each entry is page aligned.
 */
#define PTE_INDEX_SIZE  9
#define PMD_INDEX_SIZE  7
#define PUD_INDEX_SIZE  9
#define PGD_INDEX_SIZE  9

#ifndef __ASSEMBLY__
#define PTE_TABLE_SIZE	(sizeof(pte_t) << PTE_INDEX_SIZE)
#define PMD_TABLE_SIZE	(sizeof(pmd_t) << PMD_INDEX_SIZE)
#define PUD_TABLE_SIZE	(sizeof(pud_t) << PUD_INDEX_SIZE)
#define PGD_TABLE_SIZE	(sizeof(pgd_t) << PGD_INDEX_SIZE)
#endif	/* __ASSEMBLY__ */

#define PTRS_PER_PTE	(1 << PTE_INDEX_SIZE)
#define PTRS_PER_PMD	(1 << PMD_INDEX_SIZE)
#define PTRS_PER_PUD	(1 << PUD_INDEX_SIZE)
#define PTRS_PER_PGD	(1 << PGD_INDEX_SIZE)

/* PMD_SHIFT determines what a second-level page table entry can map */
#define PMD_SHIFT	(PAGE_SHIFT + PTE_INDEX_SIZE)
#define PMD_SIZE	(1UL << PMD_SHIFT)
#define PMD_MASK	(~(PMD_SIZE-1))

/* With 4k base page size, hugepage PTEs go at the PMD level */
#define MIN_HUGEPTE_SHIFT	PMD_SHIFT

/* PUD_SHIFT determines what a third-level page table entry can map */
#define PUD_SHIFT	(PMD_SHIFT + PMD_INDEX_SIZE)
#define PUD_SIZE	(1UL << PUD_SHIFT)
#define PUD_MASK	(~(PUD_SIZE-1))

/* PGDIR_SHIFT determines what a fourth-level page table entry can map */
#define PGDIR_SHIFT	(PUD_SHIFT + PUD_INDEX_SIZE)
#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
#define PGDIR_MASK	(~(PGDIR_SIZE-1))

/* Bits to mask out from a PMD to get to the PTE page */
#define PMD_MASKED_BITS		0
/* Bits to mask out from a PUD to get to the PMD page */
#define PUD_MASKED_BITS		0
/* Bits to mask out from a PGD to get to the PUD page */
#define PGD_MASKED_BITS		0

/* PTE flags to conserve for HPTE identification */
#define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | \
			 H_PAGE_F_SECOND | H_PAGE_F_GIX)
/*
 * Not supported by 4k linux page size
 */
#define H_PAGE_4K_PFN	0x0
#define H_PAGE_THP_HUGE 0x0
#define H_PAGE_COMBO	0x0
#ifndef __ASSEMBLY__
/*
 * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
 */
#define remap_4k_pfn(vma, addr, pfn, prot)	\
	remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))

#ifdef CONFIG_HUGETLB_PAGE
/*
 * For 4k page size, we support explicit hugepage via hugepd
 */
static inline int pmd_huge(pmd_t pmd)
{
	return 0;
}

static inline int pud_huge(pud_t pud)
{
	return 0;
}

static inline int pgd_huge(pgd_t pgd)
{
	return 0;
}
#define pgd_huge pgd_huge

static inline int hugepd_ok(hugepd_t hpd)
{
	/*
	 * if it is not a pte and have hugepd shift mask
	 * set, then it is a hugepd directory pointer
	 */
	if (!(hpd.pd & _PAGE_PTE) &&
	    ((hpd.pd & HUGEPD_SHIFT_MASK) != 0))
		return true;
	return false;
}
#define is_hugepd(hpd)		(hugepd_ok(hpd))
#endif

#endif /* !__ASSEMBLY__ */

#endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */
Commit	Line	Data
ab537dca AK	1	#ifndef _ASM_POWERPC_BOOK3S_64_HASH_4K_H
	2	#define _ASM_POWERPC_BOOK3S_64_HASH_4K_H
	3	/*
	4	* Entries per page directory level. The PTE level must use a 64b record
	5	* for each page table entry. The PMD and PGD level use a 32b record for
	6	* each entry by assuming that each entry is page aligned.
	7	*/
	8	#define PTE_INDEX_SIZE 9
	9	#define PMD_INDEX_SIZE 7
	10	#define PUD_INDEX_SIZE 9
	11	#define PGD_INDEX_SIZE 9
	12
	13	#ifndef __ASSEMBLY__
	14	#define PTE_TABLE_SIZE (sizeof(pte_t) << PTE_INDEX_SIZE)
	15	#define PMD_TABLE_SIZE (sizeof(pmd_t) << PMD_INDEX_SIZE)
	16	#define PUD_TABLE_SIZE (sizeof(pud_t) << PUD_INDEX_SIZE)
	17	#define PGD_TABLE_SIZE (sizeof(pgd_t) << PGD_INDEX_SIZE)
	18	#endif /* __ASSEMBLY__ */
	19
	20	#define PTRS_PER_PTE (1 << PTE_INDEX_SIZE)
	21	#define PTRS_PER_PMD (1 << PMD_INDEX_SIZE)
	22	#define PTRS_PER_PUD (1 << PUD_INDEX_SIZE)
	23	#define PTRS_PER_PGD (1 << PGD_INDEX_SIZE)
	24
	25	/* PMD_SHIFT determines what a second-level page table entry can map */
	26	#define PMD_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE)
	27	#define PMD_SIZE (1UL << PMD_SHIFT)
	28	#define PMD_MASK (~(PMD_SIZE-1))
	29
	30	/* With 4k base page size, hugepage PTEs go at the PMD level */
	31	#define MIN_HUGEPTE_SHIFT PMD_SHIFT
	32
	33	/* PUD_SHIFT determines what a third-level page table entry can map */
	34	#define PUD_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE)
	35	#define PUD_SIZE (1UL << PUD_SHIFT)
	36	#define PUD_MASK (~(PUD_SIZE-1))
	37
	38	/* PGDIR_SHIFT determines what a fourth-level page table entry can map */
	39	#define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE)
	40	#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
	41	#define PGDIR_MASK (~(PGDIR_SIZE-1))
	42
	43	/* Bits to mask out from a PMD to get to the PTE page */
	44	#define PMD_MASKED_BITS 0
	45	/* Bits to mask out from a PUD to get to the PMD page */
	46	#define PUD_MASKED_BITS 0
	47	/* Bits to mask out from a PGD to get to the PUD page */
	48	#define PGD_MASKED_BITS 0
c605782b	49
c605782b	50	/* PTE flags to conserve for HPTE identification */
945537df AK	51	#define _PAGE_HPTEFLAGS (H_PAGE_BUSY \| H_PAGE_HASHPTE \| \
	52	H_PAGE_F_SECOND \| H_PAGE_F_GIX)
	53	/*
	54	* Not supported by 4k linux page size
	55	*/
	56	#define H_PAGE_4K_PFN 0x0
	57	#define H_PAGE_THP_HUGE 0x0
	58	#define H_PAGE_COMBO 0x0
ab537dca AK	59	#ifndef __ASSEMBLY__
ab537dca AK	60	/*
368ced78	61	* On all 4K setups, remap_4k_pfn() equates to remap_pfn_range()
ab537dca	62	*/
ab537dca AK	63	#define remap_4k_pfn(vma, addr, pfn, prot) \
	64	remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
	65
26a344ae AK	66	#ifdef CONFIG_HUGETLB_PAGE
	67	/*
	68	* For 4k page size, we support explicit hugepage via hugepd
	69	*/
	70	static inline int pmd_huge(pmd_t pmd)
	71	{
	72	return 0;
	73	}
	74
	75	static inline int pud_huge(pud_t pud)
	76	{
	77	return 0;
	78	}
	79
	80	static inline int pgd_huge(pgd_t pgd)
	81	{
	82	return 0;
	83	}
	84	#define pgd_huge pgd_huge
	85
	86	static inline int hugepd_ok(hugepd_t hpd)
	87	{
	88	/*
6a119eae AK	89	* if it is not a pte and have hugepd shift mask
6a119eae AK	90	* set, then it is a hugepd directory pointer
26a344ae	91	*/
6a119eae AK	92	if (!(hpd.pd & _PAGE_PTE) &&
	93	((hpd.pd & HUGEPD_SHIFT_MASK) != 0))
	94	return true;
	95	return false;
26a344ae AK	96	}
	97	#define is_hugepd(hpd) (hugepd_ok(hpd))
	98	#endif
	99
ab537dca AK	100	#endif /* !__ASSEMBLY__ */
	101
	102	#endif /* _ASM_POWERPC_BOOK3S_64_HASH_4K_H */