[linux-2.6-block.git] / arch / parisc / kernel / smp.c

/*
** SMP Support
**
** Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
** Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
** Copyright (C) 2001,2004 Grant Grundler <grundler@parisc-linux.org>
** 
** Lots of stuff stolen from arch/alpha/kernel/smp.c
** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^)
**
** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work.
** -grant (1/12/2001)
**
**	This program is free software; you can redistribute it and/or modify
**	it under the terms of the GNU General Public License as published by
**      the Free Software Foundation; either version 2 of the License, or
**      (at your option) any later version.
*/
#include <linux/types.h>
#include <linux/spinlock.h>
#include <linux/slab.h>

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/smp.h>
#include <linux/kernel_stat.h>
#include <linux/mm.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <linux/ftrace.h>

#include <asm/system.h>
#include <asm/atomic.h>
#include <asm/current.h>
#include <asm/delay.h>
#include <asm/tlbflush.h>

#include <asm/io.h>
#include <asm/irq.h>		/* for CPU_IRQ_REGION and friends */
#include <asm/mmu_context.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/processor.h>
#include <asm/ptrace.h>
#include <asm/unistd.h>
#include <asm/cacheflush.h>

#undef DEBUG_SMP
#ifdef DEBUG_SMP
static int smp_debug_lvl = 0;
#define smp_debug(lvl, printargs...)		\
		if (lvl >= smp_debug_lvl)	\
			printk(printargs);
#else
#define smp_debug(lvl, ...)	do { } while(0)
#endif /* DEBUG_SMP */

DEFINE_SPINLOCK(smp_lock);

volatile struct task_struct *smp_init_current_idle_task;

/* track which CPU is booting */
static volatile int cpu_now_booting __cpuinitdata;

static int parisc_max_cpus __cpuinitdata = 1;

DEFINE_PER_CPU(spinlock_t, ipi_lock) = SPIN_LOCK_UNLOCKED;

enum ipi_message_type {
	IPI_NOP=0,
	IPI_RESCHEDULE=1,
	IPI_CALL_FUNC,
	IPI_CALL_FUNC_SINGLE,
	IPI_CPU_START,
	IPI_CPU_STOP,
	IPI_CPU_TEST
};


/********** SMP inter processor interrupt and communication routines */

#undef PER_CPU_IRQ_REGION
#ifdef PER_CPU_IRQ_REGION
/* XXX REVISIT Ignore for now.
**    *May* need this "hook" to register IPI handler
**    once we have perCPU ExtIntr switch tables.
*/
static void
ipi_init(int cpuid)
{
#error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region

	if(cpu_online(cpuid) )
	{
		switch_to_idle_task(current);
	}

	return;
}
#endif


/*
** Yoink this CPU from the runnable list... 
**
*/
static void
halt_processor(void) 
{
	/* REVISIT : redirect I/O Interrupts to another CPU? */
	/* REVISIT : does PM *know* this CPU isn't available? */
	set_cpu_online(smp_processor_id(), false);
	local_irq_disable();
	for (;;)
		;
}


irqreturn_t __irq_entry
ipi_interrupt(int irq, void *dev_id) 
{
	int this_cpu = smp_processor_id();
	struct cpuinfo_parisc *p = &per_cpu(cpu_data, this_cpu);
	unsigned long ops;
	unsigned long flags;

	/* Count this now; we may make a call that never returns. */
	p->ipi_count++;

	mb();	/* Order interrupt and bit testing. */

	for (;;) {
		spinlock_t *lock = &per_cpu(ipi_lock, this_cpu);
		spin_lock_irqsave(lock, flags);
		ops = p->pending_ipi;
		p->pending_ipi = 0;
		spin_unlock_irqrestore(lock, flags);

		mb(); /* Order bit clearing and data access. */

		if (!ops)
		    break;

		while (ops) {
			unsigned long which = ffz(~ops);

			ops &= ~(1 << which);

			switch (which) {
			case IPI_NOP:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu);
				break;
				
			case IPI_RESCHEDULE:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu);
				/*
				 * Reschedule callback.  Everything to be
				 * done is done by the interrupt return path.
				 */
				break;

			case IPI_CALL_FUNC:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu);
				generic_smp_call_function_interrupt();
				break;

			case IPI_CALL_FUNC_SINGLE:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC_SINGLE\n", this_cpu);
				generic_smp_call_function_single_interrupt();
				break;

			case IPI_CPU_START:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu);
				break;

			case IPI_CPU_STOP:
				smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu);
				halt_processor();
				break;

			case IPI_CPU_TEST:
				smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu);
				break;

			default:
				printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n",
					this_cpu, which);
				return IRQ_NONE;
			} /* Switch */
		/* let in any pending interrupts */
		local_irq_enable();
		local_irq_disable();
		} /* while (ops) */
	}
	return IRQ_HANDLED;
}


static inline void
ipi_send(int cpu, enum ipi_message_type op)
{
	struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpu);
	spinlock_t *lock = &per_cpu(ipi_lock, cpu);
	unsigned long flags;

	spin_lock_irqsave(lock, flags);
	p->pending_ipi |= 1 << op;
	gsc_writel(IPI_IRQ - CPU_IRQ_BASE, p->hpa);
	spin_unlock_irqrestore(lock, flags);
}

static void
send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op)
{
	int cpu;

	for_each_cpu(cpu, mask)
		ipi_send(cpu, op);
}

static inline void
send_IPI_single(int dest_cpu, enum ipi_message_type op)
{
	BUG_ON(dest_cpu == NO_PROC_ID);

	ipi_send(dest_cpu, op);
}

static inline void
send_IPI_allbutself(enum ipi_message_type op)
{
	int i;
	
	for_each_online_cpu(i) {
		if (i != smp_processor_id())
			send_IPI_single(i, op);
	}
}


inline void 
smp_send_stop(void)	{ send_IPI_allbutself(IPI_CPU_STOP); }

static inline void
smp_send_start(void)	{ send_IPI_allbutself(IPI_CPU_START); }

void 
smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); }

void
smp_send_all_nop(void)
{
	send_IPI_allbutself(IPI_NOP);
}

void arch_send_call_function_ipi_mask(const struct cpumask *mask)
{
	send_IPI_mask(mask, IPI_CALL_FUNC);
}

void arch_send_call_function_single_ipi(int cpu)
{
	send_IPI_single(cpu, IPI_CALL_FUNC_SINGLE);
}

/*
 * Flush all other CPU's tlb and then mine.  Do this with on_each_cpu()
 * as we want to ensure all TLB's flushed before proceeding.
 */

void
smp_flush_tlb_all(void)
{
	on_each_cpu(flush_tlb_all_local, NULL, 1);
}

/*
 * Called by secondaries to update state and initialize CPU registers.
 */
static void __init
smp_cpu_init(int cpunum)
{
	extern int init_per_cpu(int);  /* arch/parisc/kernel/processor.c */
	extern void init_IRQ(void);    /* arch/parisc/kernel/irq.c */
	extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */

	/* Set modes and Enable floating point coprocessor */
	(void) init_per_cpu(cpunum);

	disable_sr_hashing();

	mb();

	/* Well, support 2.4 linux scheme as well. */
	if (cpu_isset(cpunum, cpu_online_map))
	{
		extern void machine_halt(void); /* arch/parisc.../process.c */

		printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
		machine_halt();
	}  
	set_cpu_online(cpunum, true);

	/* Initialise the idle task for this CPU */
	atomic_inc(&init_mm.mm_count);
	current->active_mm = &init_mm;
	BUG_ON(current->mm);
	enter_lazy_tlb(&init_mm, current);

	init_IRQ();   /* make sure no IRQs are enabled or pending */
	start_cpu_itimer();
}


/*
 * Slaves start using C here. Indirectly called from smp_slave_stext.
 * Do what start_kernel() and main() do for boot strap processor (aka monarch)
 */
void __init smp_callin(void)
{
	int slave_id = cpu_now_booting;

	smp_cpu_init(slave_id);
	preempt_disable();

	flush_cache_all_local(); /* start with known state */
	flush_tlb_all_local(NULL);

	local_irq_enable();  /* Interrupts have been off until now */

	cpu_idle();      /* Wait for timer to schedule some work */

	/* NOTREACHED */
	panic("smp_callin() AAAAaaaaahhhh....\n");
}

/*
 * Bring one cpu online.
 */
int __cpuinit smp_boot_one_cpu(int cpuid)
{
	const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid);
	struct task_struct *idle;
	long timeout;

	/* 
	 * Create an idle task for this CPU.  Note the address wed* give 
	 * to kernel_thread is irrelevant -- it's going to start
	 * where OS_BOOT_RENDEVZ vector in SAL says to start.  But
	 * this gets all the other task-y sort of data structures set
	 * up like we wish.   We need to pull the just created idle task 
	 * off the run queue and stuff it into the init_tasks[] array.  
	 * Sheesh . . .
	 */

	idle = fork_idle(cpuid);
	if (IS_ERR(idle))
		panic("SMP: fork failed for CPU:%d", cpuid);

	task_thread_info(idle)->cpu = cpuid;

	/* Let _start know what logical CPU we're booting
	** (offset into init_tasks[],cpu_data[])
	*/
	cpu_now_booting = cpuid;

	/* 
	** boot strap code needs to know the task address since
	** it also contains the process stack.
	*/
	smp_init_current_idle_task = idle ;
	mb();

	printk(KERN_INFO "Releasing cpu %d now, hpa=%lx\n", cpuid, p->hpa);

	/*
	** This gets PDC to release the CPU from a very tight loop.
	**
	** From the PA-RISC 2.0 Firmware Architecture Reference Specification:
	** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which 
	** is executed after receiving the rendezvous signal (an interrupt to 
	** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the 
	** contents of memory are valid."
	*/
	gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa);
	mb();

	/* 
	 * OK, wait a bit for that CPU to finish staggering about. 
	 * Slave will set a bit when it reaches smp_cpu_init().
	 * Once the "monarch CPU" sees the bit change, it can move on.
	 */
	for (timeout = 0; timeout < 10000; timeout++) {
		if(cpu_online(cpuid)) {
			/* Which implies Slave has started up */
			cpu_now_booting = 0;
			smp_init_current_idle_task = NULL;
			goto alive ;
		}
		udelay(100);
		barrier();
	}

	put_task_struct(idle);
	idle = NULL;

	printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
	return -1;

alive:
	/* Remember the Slave data */
	smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n",
		cpuid, timeout * 100);
	return 0;
}

void __init smp_prepare_boot_cpu(void)
{
	int bootstrap_processor = per_cpu(cpu_data, 0).cpuid;

	/* Setup BSP mappings */
	printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor);

	set_cpu_online(bootstrap_processor, true);
	set_cpu_present(bootstrap_processor, true);
}


/*
** inventory.c:do_inventory() hasn't yet been run and thus we
** don't 'discover' the additional CPUs until later.
*/
void __init smp_prepare_cpus(unsigned int max_cpus)
{
	init_cpu_present(cpumask_of(0));

	parisc_max_cpus = max_cpus;
	if (!max_cpus)
		printk(KERN_INFO "SMP mode deactivated.\n");
}


void smp_cpus_done(unsigned int cpu_max)
{
	return;
}


int __cpuinit __cpu_up(unsigned int cpu)
{
	if (cpu != 0 && cpu < parisc_max_cpus)
		smp_boot_one_cpu(cpu);

	return cpu_online(cpu) ? 0 : -ENOSYS;
}

#ifdef CONFIG_PROC_FS
int __init
setup_profiling_timer(unsigned int multiplier)
{
	return -EINVAL;
}
#endif
Commit	Line	Data
1da177e4 LT	1	/*
	2	** SMP Support
	3	**
	4	** Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
	5	** Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
	6	** Copyright (C) 2001,2004 Grant Grundler <grundler@parisc-linux.org>
	7	**
	8	** Lots of stuff stolen from arch/alpha/kernel/smp.c
	9	** ...and then parisc stole from arch/ia64/kernel/smp.c. Thanks David! :^)
	10	**
7022672e	11	** Thanks to John Curry and Ullas Ponnadi. I learned a lot from their work.
1da177e4 LT	12	** -grant (1/12/2001)
	13	**
	14	** This program is free software; you can redistribute it and/or modify
	15	** it under the terms of the GNU General Public License as published by
	16	** the Free Software Foundation; either version 2 of the License, or
	17	** (at your option) any later version.
	18	*/
1da177e4 LT	19	#include <linux/types.h>
	20	#include <linux/spinlock.h>
	21	#include <linux/slab.h>
	22
	23	#include <linux/kernel.h>
	24	#include <linux/module.h>
	25	#include <linux/sched.h>
	26	#include <linux/init.h>
	27	#include <linux/interrupt.h>
	28	#include <linux/smp.h>
	29	#include <linux/kernel_stat.h>
	30	#include <linux/mm.h>
4e950f6f	31	#include <linux/err.h>
1da177e4 LT	32	#include <linux/delay.h>
1da177e4 LT	33	#include <linux/bitops.h>
d75f054a	34	#include <linux/ftrace.h>
1da177e4 LT	35
	36	#include <asm/system.h>
	37	#include <asm/atomic.h>
	38	#include <asm/current.h>
	39	#include <asm/delay.h>
1b2425e3	40	#include <asm/tlbflush.h>
1da177e4 LT	41
	42	#include <asm/io.h>
	43	#include <asm/irq.h> /* for CPU_IRQ_REGION and friends */
	44	#include <asm/mmu_context.h>
	45	#include <asm/page.h>
	46	#include <asm/pgtable.h>
	47	#include <asm/pgalloc.h>
	48	#include <asm/processor.h>
	49	#include <asm/ptrace.h>
	50	#include <asm/unistd.h>
	51	#include <asm/cacheflush.h>
	52
5492a0f0 KM	53	#undef DEBUG_SMP
	54	#ifdef DEBUG_SMP
	55	static int smp_debug_lvl = 0;
	56	#define smp_debug(lvl, printargs...) \
	57	if (lvl >= smp_debug_lvl) \
	58	printk(printargs);
	59	#else
ef017beb	60	#define smp_debug(lvl, ...) do { } while(0)
5492a0f0	61	#endif /* DEBUG_SMP */
1da177e4 LT	62
	63	DEFINE_SPINLOCK(smp_lock);
	64
	65	volatile struct task_struct *smp_init_current_idle_task;
	66
ef017beb HD	67	/* track which CPU is booting */
ef017beb HD	68	static volatile int cpu_now_booting __cpuinitdata;
1da177e4	69
ef017beb	70	static int parisc_max_cpus __cpuinitdata = 1;
1da177e4	71
3c97b5e9	72	DEFINE_PER_CPU(spinlock_t, ipi_lock) = SPIN_LOCK_UNLOCKED;
1da177e4	73
1da177e4 LT	74	enum ipi_message_type {
	75	IPI_NOP=0,
	76	IPI_RESCHEDULE=1,
	77	IPI_CALL_FUNC,
dbcf4787	78	IPI_CALL_FUNC_SINGLE,
1da177e4 LT	79	IPI_CPU_START,
	80	IPI_CPU_STOP,
	81	IPI_CPU_TEST
	82	};
	83
	84
	85	/********** SMP inter processor interrupt and communication routines */
	86
	87	#undef PER_CPU_IRQ_REGION
	88	#ifdef PER_CPU_IRQ_REGION
	89	/* XXX REVISIT Ignore for now.
	90	** May need this "hook" to register IPI handler
	91	** once we have perCPU ExtIntr switch tables.
	92	*/
	93	static void
	94	ipi_init(int cpuid)
	95	{
1da177e4 LT	96	#error verify IRQ_OFFSET(IPI_IRQ) is ipi_interrupt() in new IRQ region
	97
	98	if(cpu_online(cpuid) )
	99	{
	100	switch_to_idle_task(current);
	101	}
	102
	103	return;
	104	}
	105	#endif
	106
	107
	108	/*
	109	** Yoink this CPU from the runnable list...
	110	**
	111	*/
	112	static void
	113	halt_processor(void)
	114	{
1da177e4 LT	115	/* REVISIT : redirect I/O Interrupts to another CPU? */
1da177e4 LT	116	/* REVISIT : does PM know this CPU isn't available? */
9bc181d8	117	set_cpu_online(smp_processor_id(), false);
1da177e4 LT	118	local_irq_disable();
	119	for (;;)
	120	;
1da177e4 LT	121	}
	122
	123
d75f054a	124	irqreturn_t __irq_entry
c7753f18	125	ipi_interrupt(int irq, void *dev_id)
1da177e4 LT	126	{
1da177e4 LT	127	int this_cpu = smp_processor_id();
ef017beb	128	struct cpuinfo_parisc *p = &per_cpu(cpu_data, this_cpu);
1da177e4 LT	129	unsigned long ops;
	130	unsigned long flags;
	131
	132	/* Count this now; we may make a call that never returns. */
	133	p->ipi_count++;
	134
	135	mb(); /* Order interrupt and bit testing. */
	136
	137	for (;;) {
3c97b5e9 KM	138	spinlock_t *lock = &per_cpu(ipi_lock, this_cpu);
3c97b5e9 KM	139	spin_lock_irqsave(lock, flags);
1da177e4 LT	140	ops = p->pending_ipi;
1da177e4 LT	141	p->pending_ipi = 0;
3c97b5e9	142	spin_unlock_irqrestore(lock, flags);
1da177e4 LT	143
	144	mb(); /* Order bit clearing and data access. */
	145
	146	if (!ops)
	147	break;
	148
	149	while (ops) {
	150	unsigned long which = ffz(~ops);
	151
d911aed8 JB	152	ops &= ~(1 << which);
d911aed8 JB	153
1da177e4	154	switch (which) {
d911aed8	155	case IPI_NOP:
5492a0f0	156	smp_debug(100, KERN_DEBUG "CPU%d IPI_NOP\n", this_cpu);
d911aed8 JB	157	break;
d911aed8 JB	158
1da177e4	159	case IPI_RESCHEDULE:
5492a0f0	160	smp_debug(100, KERN_DEBUG "CPU%d IPI_RESCHEDULE\n", this_cpu);
1da177e4 LT	161	/*
	162	* Reschedule callback. Everything to be
	163	* done is done by the interrupt return path.
	164	*/
	165	break;
	166
	167	case IPI_CALL_FUNC:
5492a0f0	168	smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC\n", this_cpu);
dbcf4787 JA	169	generic_smp_call_function_interrupt();
	170	break;
	171
	172	case IPI_CALL_FUNC_SINGLE:
	173	smp_debug(100, KERN_DEBUG "CPU%d IPI_CALL_FUNC_SINGLE\n", this_cpu);
	174	generic_smp_call_function_single_interrupt();
1da177e4 LT	175	break;
	176
	177	case IPI_CPU_START:
5492a0f0	178	smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_START\n", this_cpu);
1da177e4 LT	179	break;
	180
	181	case IPI_CPU_STOP:
5492a0f0	182	smp_debug(100, KERN_DEBUG "CPU%d IPI_CPU_STOP\n", this_cpu);
1da177e4	183	halt_processor();
1da177e4 LT	184	break;
	185
	186	case IPI_CPU_TEST:
5492a0f0	187	smp_debug(100, KERN_DEBUG "CPU%d is alive!\n", this_cpu);
1da177e4 LT	188	break;
	189
	190	default:
	191	printk(KERN_CRIT "Unknown IPI num on CPU%d: %lu\n",
	192	this_cpu, which);
1da177e4 LT	193	return IRQ_NONE;
1da177e4 LT	194	} /* Switch */
7085689e JB	195	/* let in any pending interrupts */
	196	local_irq_enable();
	197	local_irq_disable();
1da177e4 LT	198	} /* while (ops) */
	199	}
	200	return IRQ_HANDLED;
	201	}
	202
	203
	204	static inline void
	205	ipi_send(int cpu, enum ipi_message_type op)
	206	{
ef017beb	207	struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpu);
3c97b5e9	208	spinlock_t *lock = &per_cpu(ipi_lock, cpu);
1da177e4 LT	209	unsigned long flags;
1da177e4 LT	210
3c97b5e9	211	spin_lock_irqsave(lock, flags);
1da177e4	212	p->pending_ipi \|= 1 << op;
ef017beb	213	gsc_writel(IPI_IRQ - CPU_IRQ_BASE, p->hpa);
3c97b5e9	214	spin_unlock_irqrestore(lock, flags);
1da177e4 LT	215	}
1da177e4 LT	216
dbcf4787	217	static void
91887a36	218	send_IPI_mask(const struct cpumask *mask, enum ipi_message_type op)
dbcf4787 JA	219	{
	220	int cpu;
	221
91887a36	222	for_each_cpu(cpu, mask)
dbcf4787 JA	223	ipi_send(cpu, op);
dbcf4787 JA	224	}
1da177e4 LT	225
	226	static inline void
	227	send_IPI_single(int dest_cpu, enum ipi_message_type op)
	228	{
7f2347a4	229	BUG_ON(dest_cpu == NO_PROC_ID);
1da177e4 LT	230
	231	ipi_send(dest_cpu, op);
	232	}
	233
	234	static inline void
	235	send_IPI_allbutself(enum ipi_message_type op)
	236	{
	237	int i;
	238
394e3902 AM	239	for_each_online_cpu(i) {
394e3902 AM	240	if (i != smp_processor_id())
1da177e4 LT	241	send_IPI_single(i, op);
	242	}
	243	}
	244
	245
	246	inline void
	247	smp_send_stop(void) { send_IPI_allbutself(IPI_CPU_STOP); }
	248
	249	static inline void
	250	smp_send_start(void) { send_IPI_allbutself(IPI_CPU_START); }
	251
	252	void
	253	smp_send_reschedule(int cpu) { send_IPI_single(cpu, IPI_RESCHEDULE); }
	254
d911aed8 JB	255	void
	256	smp_send_all_nop(void)
	257	{
	258	send_IPI_allbutself(IPI_NOP);
	259	}
	260
91887a36	261	void arch_send_call_function_ipi_mask(const struct cpumask *mask)
1da177e4	262	{
dbcf4787	263	send_IPI_mask(mask, IPI_CALL_FUNC);
1da177e4 LT	264	}
1da177e4 LT	265
dbcf4787 JA	266	void arch_send_call_function_single_ipi(int cpu)
	267	{
	268	send_IPI_single(cpu, IPI_CALL_FUNC_SINGLE);
	269	}
1da177e4 LT	270
	271	/*
	272	* Flush all other CPU's tlb and then mine. Do this with on_each_cpu()
	273	* as we want to ensure all TLB's flushed before proceeding.
	274	*/
	275
1da177e4 LT	276	void
	277	smp_flush_tlb_all(void)
	278	{
15c8b6c1	279	on_each_cpu(flush_tlb_all_local, NULL, 1);
1da177e4 LT	280	}
1da177e4 LT	281
1da177e4 LT	282	/*
	283	* Called by secondaries to update state and initialize CPU registers.
	284	*/
	285	static void __init
	286	smp_cpu_init(int cpunum)
	287	{
56f335c8	288	extern int init_per_cpu(int); /* arch/parisc/kernel/processor.c */
1da177e4	289	extern void init_IRQ(void); /* arch/parisc/kernel/irq.c */
56f335c8	290	extern void start_cpu_itimer(void); /* arch/parisc/kernel/time.c */
1da177e4 LT	291
	292	/* Set modes and Enable floating point coprocessor */
	293	(void) init_per_cpu(cpunum);
	294
	295	disable_sr_hashing();
	296
	297	mb();
	298
	299	/* Well, support 2.4 linux scheme as well. */
9bc181d8	300	if (cpu_isset(cpunum, cpu_online_map))
1da177e4 LT	301	{
	302	extern void machine_halt(void); /* arch/parisc.../process.c */
	303
	304	printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
	305	machine_halt();
	306	}
9bc181d8	307	set_cpu_online(cpunum, true);
1da177e4 LT	308
	309	/* Initialise the idle task for this CPU */
	310	atomic_inc(&init_mm.mm_count);
	311	current->active_mm = &init_mm;
7f2347a4	312	BUG_ON(current->mm);
1da177e4 LT	313	enter_lazy_tlb(&init_mm, current);
1da177e4 LT	314
7022672e	315	init_IRQ(); /* make sure no IRQs are enabled or pending */
56f335c8	316	start_cpu_itimer();
1da177e4 LT	317	}
	318
	319
	320	/*
	321	* Slaves start using C here. Indirectly called from smp_slave_stext.
	322	* Do what start_kernel() and main() do for boot strap processor (aka monarch)
	323	*/
	324	void __init smp_callin(void)
	325	{
	326	int slave_id = cpu_now_booting;
1da177e4 LT	327
1da177e4 LT	328	smp_cpu_init(slave_id);
5bfb5d69	329	preempt_disable();
1da177e4	330
1da177e4	331	flush_cache_all_local(); /* start with known state */
1b2425e3	332	flush_tlb_all_local(NULL);
1da177e4 LT	333
	334	local_irq_enable(); /* Interrupts have been off until now */
	335
	336	cpu_idle(); /* Wait for timer to schedule some work */
	337
	338	/* NOTREACHED */
	339	panic("smp_callin() AAAAaaaaahhhh....\n");
	340	}
	341
	342	/*
	343	* Bring one cpu online.
	344	*/
8dff980f	345	int __cpuinit smp_boot_one_cpu(int cpuid)
1da177e4	346	{
ef017beb	347	const struct cpuinfo_parisc *p = &per_cpu(cpu_data, cpuid);
1da177e4 LT	348	struct task_struct *idle;
	349	long timeout;
	350
	351	/*
	352	* Create an idle task for this CPU. Note the address wed* give
	353	* to kernel_thread is irrelevant -- it's going to start
	354	* where OS_BOOT_RENDEVZ vector in SAL says to start. But
	355	* this gets all the other task-y sort of data structures set
	356	* up like we wish. We need to pull the just created idle task
	357	* off the run queue and stuff it into the init_tasks[] array.
	358	* Sheesh . . .
	359	*/
	360
	361	idle = fork_idle(cpuid);
	362	if (IS_ERR(idle))
	363	panic("SMP: fork failed for CPU:%d", cpuid);
	364
40f1f0de	365	task_thread_info(idle)->cpu = cpuid;
1da177e4 LT	366
	367	/* Let _start know what logical CPU we're booting
	368	** (offset into init_tasks[],cpu_data[])
	369	*/
	370	cpu_now_booting = cpuid;
	371
	372	/*
	373	** boot strap code needs to know the task address since
	374	** it also contains the process stack.
	375	*/
	376	smp_init_current_idle_task = idle ;
	377	mb();
	378
ef017beb	379	printk(KERN_INFO "Releasing cpu %d now, hpa=%lx\n", cpuid, p->hpa);
1da177e4 LT	380
	381	/*
	382	** This gets PDC to release the CPU from a very tight loop.
	383	**
	384	** From the PA-RISC 2.0 Firmware Architecture Reference Specification:
	385	** "The MEM_RENDEZ vector specifies the location of OS_RENDEZ which
	386	** is executed after receiving the rendezvous signal (an interrupt to
	387	** EIR{0}). MEM_RENDEZ is valid only when it is nonzero and the
	388	** contents of memory are valid."
	389	*/
ef017beb	390	gsc_writel(TIMER_IRQ - CPU_IRQ_BASE, p->hpa);
1da177e4 LT	391	mb();
	392
	393	/*
	394	* OK, wait a bit for that CPU to finish staggering about.
	395	* Slave will set a bit when it reaches smp_cpu_init().
	396	* Once the "monarch CPU" sees the bit change, it can move on.
	397	*/
	398	for (timeout = 0; timeout < 10000; timeout++) {
	399	if(cpu_online(cpuid)) {
	400	/* Which implies Slave has started up */
	401	cpu_now_booting = 0;
	402	smp_init_current_idle_task = NULL;
	403	goto alive ;
	404	}
	405	udelay(100);
	406	barrier();
	407	}
	408
	409	put_task_struct(idle);
	410	idle = NULL;
	411
	412	printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
	413	return -1;
	414
	415	alive:
	416	/* Remember the Slave data */
5492a0f0	417	smp_debug(100, KERN_DEBUG "SMP: CPU:%d came alive after %ld _us\n",
1da177e4	418	cpuid, timeout * 100);
1da177e4 LT	419	return 0;
	420	}
	421
ef017beb	422	void __init smp_prepare_boot_cpu(void)
1da177e4	423	{
ef017beb	424	int bootstrap_processor = per_cpu(cpu_data, 0).cpuid;
1da177e4	425
1da177e4	426	/* Setup BSP mappings */
ef017beb	427	printk(KERN_INFO "SMP: bootstrap CPU ID is %d\n", bootstrap_processor);
1da177e4	428
9bc181d8 RR	429	set_cpu_online(bootstrap_processor, true);
9bc181d8 RR	430	set_cpu_present(bootstrap_processor, true);
1da177e4 LT	431	}
	432
	433
	434
	435	/*
	436	** inventory.c:do_inventory() hasn't yet been run and thus we
7022672e	437	** don't 'discover' the additional CPUs until later.
1da177e4 LT	438	*/
	439	void __init smp_prepare_cpus(unsigned int max_cpus)
	440	{
9bc181d8	441	init_cpu_present(cpumask_of(0));
1da177e4 LT	442
	443	parisc_max_cpus = max_cpus;
	444	if (!max_cpus)
	445	printk(KERN_INFO "SMP mode deactivated.\n");
	446	}
	447
	448
	449	void smp_cpus_done(unsigned int cpu_max)
	450	{
	451	return;
	452	}
	453
	454
b282b6f8	455	int __cpuinit __cpu_up(unsigned int cpu)
1da177e4 LT	456	{
	457	if (cpu != 0 && cpu < parisc_max_cpus)
	458	smp_boot_one_cpu(cpu);
	459
	460	return cpu_online(cpu) ? 0 : -ENOSYS;
	461	}
	462
1da177e4 LT	463	#ifdef CONFIG_PROC_FS
	464	int __init
	465	setup_profiling_timer(unsigned int multiplier)
	466	{
	467	return -EINVAL;
	468	}
	469	#endif