Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
dbee90b7 | 2 | #include <asm/asm-offsets.h> |
7b1c0d26 | 3 | #include <asm/thread_info.h> |
485172b3 | 4 | |
bef9ae3d RB |
5 | #define PAGE_SIZE _PAGE_SIZE |
6 | ||
485172b3 DD |
7 | /* |
8 | * Put .bss..swapper_pg_dir as the first thing in .bss. This will | |
9 | * ensure that it has .bss alignment (64K). | |
10 | */ | |
11 | #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir) | |
12 | ||
1da177e4 LT |
13 | #include <asm-generic/vmlinux.lds.h> |
14 | ||
41c594ab | 15 | #undef mips |
1da177e4 LT |
16 | #define mips mips |
17 | OUTPUT_ARCH(mips) | |
18 | ENTRY(kernel_entry) | |
603bb99c RB |
19 | PHDRS { |
20 | text PT_LOAD FLAGS(7); /* RWX */ | |
3bfb7224 | 21 | #ifndef CONFIG_CAVIUM_OCTEON_SOC |
603bb99c | 22 | note PT_NOTE FLAGS(4); /* R__ */ |
3bfb7224 | 23 | #endif /* CAVIUM_OCTEON_SOC */ |
603bb99c | 24 | } |
51b563fc | 25 | |
d71789b6 ML |
26 | #ifdef CONFIG_32BIT |
27 | #ifdef CONFIG_CPU_LITTLE_ENDIAN | |
70342287 | 28 | jiffies = jiffies_64; |
d71789b6 | 29 | #else |
70342287 | 30 | jiffies = jiffies_64 + 4; |
d71789b6 ML |
31 | #endif |
32 | #else | |
70342287 | 33 | jiffies = jiffies_64; |
d71789b6 | 34 | #endif |
0f5c9064 | 35 | |
1da177e4 LT |
36 | SECTIONS |
37 | { | |
38 | #ifdef CONFIG_BOOT_ELF64 | |
0f5c9064 SR |
39 | /* Read-only sections, merged into text segment: */ |
40 | /* . = 0xc000000000000000; */ | |
1da177e4 | 41 | |
0f5c9064 SR |
42 | /* This is the value for an Origin kernel, taken from an IRIX kernel. */ |
43 | /* . = 0xc00000000001c000; */ | |
1da177e4 | 44 | |
0f5c9064 SR |
45 | /* Set the vaddr for the text segment to a value |
46 | * >= 0xa800 0000 0001 9000 if no symmon is going to configured | |
47 | * >= 0xa800 0000 0030 0000 otherwise | |
48 | */ | |
1da177e4 | 49 | |
0f5c9064 SR |
50 | /* . = 0xa800000000300000; */ |
51 | . = 0xffffffff80300000; | |
1da177e4 | 52 | #endif |
51b563fc | 53 | . = VMLINUX_LOAD_ADDRESS; |
0f5c9064 SR |
54 | /* read-only */ |
55 | _text = .; /* Text and read-only data */ | |
56 | .text : { | |
57 | TEXT_TEXT | |
58 | SCHED_TEXT | |
6727ad9e | 59 | CPUIDLE_TEXT |
0f5c9064 | 60 | LOCK_TEXT |
f70fd1b5 | 61 | KPROBES_TEXT |
8f99a162 | 62 | IRQENTRY_TEXT |
be7635e7 | 63 | SOFTIRQENTRY_TEXT |
6b3766a2 | 64 | *(.text.*) |
0f5c9064 SR |
65 | *(.fixup) |
66 | *(.gnu.warning) | |
603bb99c | 67 | } :text = 0 |
0f5c9064 SR |
68 | _etext = .; /* End of text section */ |
69 | ||
6eb10bc9 | 70 | EXCEPTION_TABLE(16) |
0f5c9064 SR |
71 | |
72 | /* Exception table for data bus errors */ | |
73 | __dbe_table : { | |
74 | __start___dbe_table = .; | |
75 | *(__dbe_table) | |
76 | __stop___dbe_table = .; | |
77 | } | |
603bb99c | 78 | |
3bfb7224 DD |
79 | #ifdef CONFIG_CAVIUM_OCTEON_SOC |
80 | #define NOTES_HEADER | |
81 | #else /* CONFIG_CAVIUM_OCTEON_SOC */ | |
82 | #define NOTES_HEADER :note | |
83 | #endif /* CONFIG_CAVIUM_OCTEON_SOC */ | |
84 | NOTES :text NOTES_HEADER | |
603bb99c RB |
85 | .dummy : { *(.dummy) } :text |
86 | ||
a2d063ac | 87 | _sdata = .; /* Start of data section */ |
0f5c9064 SR |
88 | RODATA |
89 | ||
90 | /* writeable */ | |
91 | .data : { /* Data */ | |
16be2435 | 92 | . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */ |
0f5c9064 | 93 | |
7b1c0d26 | 94 | INIT_TASK_DATA(THREAD_SIZE) |
6eb10bc9 NE |
95 | NOSAVE_DATA |
96 | CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) | |
f8bec75a | 97 | READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT) |
16be2435 FBH |
98 | DATA_DATA |
99 | CONSTRUCTORS | |
0f5c9064 | 100 | } |
b5effd38 | 101 | BUG_TABLE |
0f5c9064 SR |
102 | _gp = . + 0x8000; |
103 | .lit8 : { | |
104 | *(.lit8) | |
105 | } | |
106 | .lit4 : { | |
107 | *(.lit4) | |
108 | } | |
109 | /* We want the small data sections together, so single-instruction offsets | |
110 | can access them all, and initialized data all before uninitialized, so | |
111 | we can shorten the on-disk segment size. */ | |
112 | .sdata : { | |
113 | *(.sdata) | |
114 | } | |
0f5c9064 SR |
115 | _edata = .; /* End of data section */ |
116 | ||
117 | /* will be freed after init */ | |
a0b54e25 | 118 | . = ALIGN(PAGE_SIZE); /* Init code and data */ |
0f5c9064 | 119 | __init_begin = .; |
6eb10bc9 NE |
120 | INIT_TEXT_SECTION(PAGE_SIZE) |
121 | INIT_DATA_SECTION(16) | |
0f5c9064 | 122 | |
487d70d0 GJ |
123 | . = ALIGN(4); |
124 | .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) { | |
125 | __mips_machines_start = .; | |
126 | *(.mips.machines.init) | |
127 | __mips_machines_end = .; | |
128 | } | |
129 | ||
0f5c9064 SR |
130 | /* .exit.text is discarded at runtime, not link time, to deal with |
131 | * references from .rodata | |
132 | */ | |
133 | .exit.text : { | |
01ba2bdc | 134 | EXIT_TEXT |
0f5c9064 SR |
135 | } |
136 | .exit.data : { | |
01ba2bdc | 137 | EXIT_DATA |
0f5c9064 | 138 | } |
1da8f179 | 139 | #ifdef CONFIG_SMP |
0415b00d | 140 | PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT) |
1da8f179 | 141 | #endif |
069fd766 MR |
142 | |
143 | #ifdef CONFIG_RELOCATABLE | |
144 | . = ALIGN(4); | |
145 | ||
146 | .data.reloc : { | |
147 | _relocation_start = .; | |
148 | /* | |
149 | * Space for relocation table | |
150 | * This needs to be filled so that the | |
151 | * relocs tool can overwrite the content. | |
152 | * An invalid value is left at the start of the | |
153 | * section to abort relocation if the table | |
154 | * has not been filled in. | |
155 | */ | |
156 | LONG(0xFFFFFFFF); | |
157 | FILL(0); | |
158 | . += CONFIG_RELOCATION_TABLE_SIZE - 4; | |
159 | _relocation_end = .; | |
160 | } | |
161 | #endif | |
162 | ||
1da8f179 JG |
163 | #ifdef CONFIG_MIPS_RAW_APPENDED_DTB |
164 | __appended_dtb = .; | |
165 | /* leave space for appended DTB */ | |
166 | . += 0x100000; | |
87db537d AK |
167 | #elif defined(CONFIG_MIPS_ELF_APPENDED_DTB) |
168 | .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) { | |
169 | *(.appended_dtb) | |
170 | KEEP(*(.appended_dtb)) | |
171 | } | |
1da8f179 | 172 | #endif |
485172b3 DD |
173 | /* |
174 | * Align to 64K in attempt to eliminate holes before the | |
175 | * .bss..swapper_pg_dir section at the start of .bss. This | |
176 | * also satisfies PAGE_SIZE alignment as the largest page size | |
177 | * allowed is 64K. | |
178 | */ | |
179 | . = ALIGN(0x10000); | |
0f5c9064 SR |
180 | __init_end = .; |
181 | /* freed after init ends here */ | |
182 | ||
485172b3 DD |
183 | /* |
184 | * Force .bss to 64K alignment so that .bss..swapper_pg_dir | |
70342287 | 185 | * gets that alignment. .sbss should be empty, so there will be |
485172b3 | 186 | * no holes after __init_end. */ |
3f00f4d8 | 187 | BSS_SECTION(0, 0x10000, 8) |
0f5c9064 SR |
188 | |
189 | _end = . ; | |
190 | ||
0f5c9064 SR |
191 | /* These mark the ABI of the kernel for debuggers. */ |
192 | .mdebug.abi32 : { | |
193 | KEEP(*(.mdebug.abi32)) | |
194 | } | |
195 | .mdebug.abi64 : { | |
196 | KEEP(*(.mdebug.abi64)) | |
197 | } | |
198 | ||
199 | /* This is the MIPS specific mdebug section. */ | |
200 | .mdebug : { | |
201 | *(.mdebug) | |
202 | } | |
203 | ||
204 | STABS_DEBUG | |
205 | DWARF_DEBUG | |
206 | ||
207 | /* These must appear regardless of . */ | |
208 | .gptab.sdata : { | |
209 | *(.gptab.data) | |
210 | *(.gptab.sdata) | |
211 | } | |
212 | .gptab.sbss : { | |
213 | *(.gptab.bss) | |
214 | *(.gptab.sbss) | |
215 | } | |
023bf6f1 TH |
216 | |
217 | /* Sections to be discarded */ | |
218 | DISCARDS | |
219 | /DISCARD/ : { | |
220 | /* ABI crap starts here */ | |
61379878 | 221 | *(.MIPS.abiflags) |
023bf6f1 TH |
222 | *(.MIPS.options) |
223 | *(.options) | |
224 | *(.pdr) | |
225 | *(.reginfo) | |
b8199546 | 226 | *(.eh_frame) |
023bf6f1 | 227 | } |
1da177e4 | 228 | } |