Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/linux...
[linux-2.6-block.git] / arch / mips / include / asm / pgtable.h
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H
10
5bbea36a 11#include <linux/mm_types.h>
970d032f 12#include <linux/mmzone.h>
875d43e7 13#ifdef CONFIG_32BIT
1da177e4
LT
14#include <asm/pgtable-32.h>
15#endif
875d43e7 16#ifdef CONFIG_64BIT
1da177e4
LT
17#include <asm/pgtable-64.h>
18#endif
19
f10fae02 20#include <asm/io.h>
1da177e4
LT
21#include <asm/pgtable-bits.h>
22
8c65b4a6
TS
23struct mm_struct;
24struct vm_area_struct;
25
1da177e4 26#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
05857c64 27#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (cpu_has_rixi ? 0 : _PAGE_READ) | \
35133692 28 _page_cachable_default)
05857c64
SH
29#define PAGE_COPY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \
30 (cpu_has_rixi ? _PAGE_NO_EXEC : 0) | _page_cachable_default)
31#define PAGE_READONLY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \
35133692 32 _page_cachable_default)
1da177e4 33#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
35133692 34 _PAGE_GLOBAL | _page_cachable_default)
e2a9e5ad
PB
35#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
36 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
05857c64 37#define PAGE_USERIO __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \
35133692 38 _page_cachable_default)
1da177e4
LT
39#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
40 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
41
42/*
6dd9344c
DD
43 * If _PAGE_NO_EXEC is not defined, we can't do page protection for
44 * execute, and consider it to be the same as read. Also, write
45 * permissions imply read permissions. This is the closest we can get
46 * by reasonable means..
1da177e4 47 */
1da177e4 48
35133692
CD
49/*
50 * Dummy values to fill the table in mmap.c
51 * The real values will be generated at runtime
52 */
53#define __P000 __pgprot(0)
54#define __P001 __pgprot(0)
55#define __P010 __pgprot(0)
56#define __P011 __pgprot(0)
57#define __P100 __pgprot(0)
58#define __P101 __pgprot(0)
59#define __P110 __pgprot(0)
60#define __P111 __pgprot(0)
61
62#define __S000 __pgprot(0)
63#define __S001 __pgprot(0)
64#define __S010 __pgprot(0)
65#define __S011 __pgprot(0)
66#define __S100 __pgprot(0)
67#define __S101 __pgprot(0)
68#define __S110 __pgprot(0)
69#define __S111 __pgprot(0)
70
71extern unsigned long _page_cachable_default;
1da177e4
LT
72
73/*
74 * ZERO_PAGE is a global shared page that is always zero; used
75 * for zero-mapped memory areas etc..
76 */
77
78extern unsigned long empty_zero_page;
79extern unsigned long zero_page_mask;
80
81#define ZERO_PAGE(vaddr) \
99e3b942 82 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
816422ad 83#define __HAVE_COLOR_ZERO_PAGE
62eede62 84
1da177e4
LT
85extern void paging_init(void);
86
87/*
88 * Conversion functions: convert a page and protection to a page entry,
89 * and a page entry and page directory to the page they refer to.
90 */
c9d06962 91#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
970d032f
RB
92
93#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
94#ifndef CONFIG_TRANSPARENT_HUGEPAGE
95#define pmd_page(pmd) __pmd_page(pmd)
96#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
97
46a82b2d 98#define pmd_page_vaddr(pmd) pmd_val(pmd)
1da177e4 99
f1014d1b
MC
100#define htw_stop() \
101do { \
ed4cbc81
MC
102 unsigned long flags; \
103 \
461d1597 104 if (cpu_has_htw) { \
ed4cbc81
MC
105 local_irq_save(flags); \
106 if(!raw_current_cpu_data.htw_seq++) { \
107 write_c0_pwctl(read_c0_pwctl() & \
108 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
109 back_to_back_c0_hazard(); \
110 } \
111 local_irq_restore(flags); \
461d1597 112 } \
f1014d1b
MC
113} while(0)
114
115#define htw_start() \
116do { \
ed4cbc81
MC
117 unsigned long flags; \
118 \
461d1597 119 if (cpu_has_htw) { \
ed4cbc81
MC
120 local_irq_save(flags); \
121 if (!--raw_current_cpu_data.htw_seq) { \
122 write_c0_pwctl(read_c0_pwctl() | \
123 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
124 back_to_back_c0_hazard(); \
125 } \
126 local_irq_restore(flags); \
461d1597 127 } \
f1014d1b
MC
128} while(0)
129
130
2a4a8b1e
LP
131extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
132 pte_t pteval);
133
34adb28d 134#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
6e953891
SS
135
136#define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
137#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
138
1da177e4
LT
139static inline void set_pte(pte_t *ptep, pte_t pte)
140{
141 ptep->pte_high = pte.pte_high;
142 smp_wmb();
143 ptep->pte_low = pte.pte_low;
1da177e4 144
6e953891 145 if (pte.pte_low & _PAGE_GLOBAL) {
1da177e4
LT
146 pte_t *buddy = ptep_buddy(ptep);
147 /*
148 * Make sure the buddy is global too (if it's !none,
149 * it better already be global)
150 */
6e953891 151 if (pte_none(*buddy)) {
70342287 152 buddy->pte_low |= _PAGE_GLOBAL;
6e953891
SS
153 buddy->pte_high |= _PAGE_GLOBAL;
154 }
1da177e4
LT
155 }
156}
1da177e4
LT
157
158static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
159{
6e953891
SS
160 pte_t null = __pte(0);
161
fde3538a 162 htw_stop();
1da177e4 163 /* Preserve global status for the pair */
6e953891
SS
164 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
165 null.pte_low = null.pte_high = _PAGE_GLOBAL;
166
167 set_pte_at(mm, addr, ptep, null);
fde3538a 168 htw_start();
1da177e4
LT
169}
170#else
6e953891
SS
171
172#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
173#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
174
1da177e4
LT
175/*
176 * Certain architectures need to do special things when pte's
177 * within a page table are directly modified. Thus, the following
178 * hook is made available.
179 */
180static inline void set_pte(pte_t *ptep, pte_t pteval)
181{
182 *ptep = pteval;
183#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
184 if (pte_val(pteval) & _PAGE_GLOBAL) {
185 pte_t *buddy = ptep_buddy(ptep);
186 /*
187 * Make sure the buddy is global too (if it's !none,
188 * it better already be global)
189 */
190 if (pte_none(*buddy))
191 pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
192 }
193#endif
194}
1da177e4
LT
195
196static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
197{
fde3538a 198 htw_stop();
1da177e4
LT
199#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
200 /* Preserve global status for the pair */
201 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
202 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
203 else
204#endif
205 set_pte_at(mm, addr, ptep, __pte(0));
fde3538a 206 htw_start();
1da177e4
LT
207}
208#endif
209
210/*
c6e8b587 211 * (pmds are folded into puds so this doesn't get actually called,
1da177e4
LT
212 * but the define is needed for a generic inline function.)
213 */
214#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
c6e8b587 215
325f8a0a 216#ifndef __PAGETABLE_PMD_FOLDED
c6e8b587
RB
217/*
218 * (puds are folded into pgds so this doesn't get actually called,
219 * but the define is needed for a generic inline function.)
220 */
221#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
222#endif
1da177e4 223
5ff97472
RB
224#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
225#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
226#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
1da177e4 227
9975e77d
RB
228/*
229 * We used to declare this array with size but gcc 3.3 and older are not able
230 * to find that this expression is a constant, so the size is dropped.
231 */
232extern pgd_t swapper_pg_dir[];
1da177e4
LT
233
234/*
235 * The following only work if pte_present() is true.
236 * Undefined behaviour if not..
237 */
34adb28d 238#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
6e953891
SS
239static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
240static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
241static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
242static inline int pte_file(pte_t pte) { return pte.pte_low & _PAGE_FILE; }
243
1da177e4
LT
244static inline pte_t pte_wrprotect(pte_t pte)
245{
6e953891
SS
246 pte.pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
247 pte.pte_high &= ~_PAGE_SILENT_WRITE;
1da177e4
LT
248 return pte;
249}
250
1da177e4
LT
251static inline pte_t pte_mkclean(pte_t pte)
252{
6e953891
SS
253 pte.pte_low &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
254 pte.pte_high &= ~_PAGE_SILENT_WRITE;
1da177e4
LT
255 return pte;
256}
257
258static inline pte_t pte_mkold(pte_t pte)
259{
6e953891
SS
260 pte.pte_low &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
261 pte.pte_high &= ~_PAGE_SILENT_READ;
1da177e4
LT
262 return pte;
263}
264
265static inline pte_t pte_mkwrite(pte_t pte)
266{
6e953891
SS
267 pte.pte_low |= _PAGE_WRITE;
268 if (pte.pte_low & _PAGE_MODIFIED) {
269 pte.pte_low |= _PAGE_SILENT_WRITE;
270 pte.pte_high |= _PAGE_SILENT_WRITE;
1da177e4
LT
271 }
272 return pte;
273}
274
1da177e4
LT
275static inline pte_t pte_mkdirty(pte_t pte)
276{
6e953891
SS
277 pte.pte_low |= _PAGE_MODIFIED;
278 if (pte.pte_low & _PAGE_WRITE) {
279 pte.pte_low |= _PAGE_SILENT_WRITE;
280 pte.pte_high |= _PAGE_SILENT_WRITE;
1da177e4
LT
281 }
282 return pte;
283}
284
285static inline pte_t pte_mkyoung(pte_t pte)
286{
6e953891 287 pte.pte_low |= _PAGE_ACCESSED;
057229f9 288 if (pte.pte_low & _PAGE_READ) {
6e953891
SS
289 pte.pte_low |= _PAGE_SILENT_READ;
290 pte.pte_high |= _PAGE_SILENT_READ;
057229f9 291 }
1da177e4
LT
292 return pte;
293}
294#else
1da177e4
LT
295static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
296static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
297static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
298static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
299
300static inline pte_t pte_wrprotect(pte_t pte)
301{
302 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
303 return pte;
304}
305
1da177e4
LT
306static inline pte_t pte_mkclean(pte_t pte)
307{
77a5c593 308 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
1da177e4
LT
309 return pte;
310}
311
312static inline pte_t pte_mkold(pte_t pte)
313{
77a5c593 314 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
1da177e4
LT
315 return pte;
316}
317
318static inline pte_t pte_mkwrite(pte_t pte)
319{
320 pte_val(pte) |= _PAGE_WRITE;
321 if (pte_val(pte) & _PAGE_MODIFIED)
322 pte_val(pte) |= _PAGE_SILENT_WRITE;
323 return pte;
324}
325
1da177e4
LT
326static inline pte_t pte_mkdirty(pte_t pte)
327{
328 pte_val(pte) |= _PAGE_MODIFIED;
329 if (pte_val(pte) & _PAGE_WRITE)
330 pte_val(pte) |= _PAGE_SILENT_WRITE;
331 return pte;
332}
333
334static inline pte_t pte_mkyoung(pte_t pte)
335{
336 pte_val(pte) |= _PAGE_ACCESSED;
05857c64 337 if (cpu_has_rixi) {
6dd9344c
DD
338 if (!(pte_val(pte) & _PAGE_NO_READ))
339 pte_val(pte) |= _PAGE_SILENT_READ;
340 } else {
341 if (pte_val(pte) & _PAGE_READ)
342 pte_val(pte) |= _PAGE_SILENT_READ;
343 }
1da177e4
LT
344 return pte;
345}
dd794392
DD
346
347#ifdef _PAGE_HUGE
348static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
349
350static inline pte_t pte_mkhuge(pte_t pte)
351{
352 pte_val(pte) |= _PAGE_HUGE;
353 return pte;
354}
355#endif /* _PAGE_HUGE */
1da177e4 356#endif
7e675137
NP
357static inline int pte_special(pte_t pte) { return 0; }
358static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
1da177e4
LT
359
360/*
70342287 361 * Macro to make mark a page protection value as "uncacheable". Note
1da177e4
LT
362 * that "protection" is really a misnomer here as the protection value
363 * contains the memory attribute bits, dirty bits, and various other
364 * bits as well.
365 */
366#define pgprot_noncached pgprot_noncached
367
368static inline pgprot_t pgprot_noncached(pgprot_t _prot)
369{
370 unsigned long prot = pgprot_val(_prot);
371
372 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
373
374 return __pgprot(prot);
375}
376
4b050ba7
MC
377static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
378{
379 unsigned long prot = pgprot_val(_prot);
380
381 /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
382 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
383
384 return __pgprot(prot);
385}
386
1da177e4
LT
387/*
388 * Conversion functions: convert a page and protection to a page entry,
389 * and a page entry and page directory to the page they refer to.
390 */
391#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
392
34adb28d 393#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
1da177e4
LT
394static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
395{
79e0bc37 396 pte.pte_low &= _PAGE_CHG_MASK;
77a5c593 397 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
79e0bc37 398 pte.pte_low |= pgprot_val(newprot);
77a5c593 399 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
1da177e4
LT
400 return pte;
401}
402#else
403static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
404{
405 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
406}
407#endif
408
409
410extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
411 pte_t pte);
1da177e4
LT
412
413static inline void update_mmu_cache(struct vm_area_struct *vma,
4b3073e1 414 unsigned long address, pte_t *ptep)
1da177e4 415{
4b3073e1 416 pte_t pte = *ptep;
1da177e4 417 __update_tlb(vma, address, pte);
1da177e4
LT
418}
419
970d032f
RB
420static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
421 unsigned long address, pmd_t *pmdp)
422{
423 pte_t pte = *(pte_t *)pmdp;
424
425 __update_tlb(vma, address, pte);
426}
427
1da177e4 428#define kern_addr_valid(addr) (1)
1da177e4 429
34adb28d 430#ifdef CONFIG_PHYS_ADDR_T_64BIT
1da177e4
LT
431extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
432
1da177e4
LT
433static inline int io_remap_pfn_range(struct vm_area_struct *vma,
434 unsigned long vaddr,
435 unsigned long pfn,
436 unsigned long size,
437 pgprot_t prot)
438{
15d45cce 439 phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
ac5d8c02 440 return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
1da177e4 441}
40d158e6 442#define io_remap_pfn_range io_remap_pfn_range
1da177e4
LT
443#endif
444
970d032f
RB
445#ifdef CONFIG_TRANSPARENT_HUGEPAGE
446
447extern int has_transparent_hugepage(void);
448
449static inline int pmd_trans_huge(pmd_t pmd)
450{
451 return !!(pmd_val(pmd) & _PAGE_HUGE);
452}
453
454static inline pmd_t pmd_mkhuge(pmd_t pmd)
455{
456 pmd_val(pmd) |= _PAGE_HUGE;
457
458 return pmd;
459}
460
461static inline int pmd_trans_splitting(pmd_t pmd)
462{
463 return !!(pmd_val(pmd) & _PAGE_SPLITTING);
464}
465
466static inline pmd_t pmd_mksplitting(pmd_t pmd)
467{
468 pmd_val(pmd) |= _PAGE_SPLITTING;
469
470 return pmd;
471}
472
473extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
474 pmd_t *pmdp, pmd_t pmd);
475
476#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
477/* Extern to avoid header file madness */
478extern void pmdp_splitting_flush(struct vm_area_struct *vma,
479 unsigned long address,
480 pmd_t *pmdp);
481
482#define __HAVE_ARCH_PMD_WRITE
483static inline int pmd_write(pmd_t pmd)
484{
485 return !!(pmd_val(pmd) & _PAGE_WRITE);
486}
487
488static inline pmd_t pmd_wrprotect(pmd_t pmd)
489{
490 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
491 return pmd;
492}
493
494static inline pmd_t pmd_mkwrite(pmd_t pmd)
495{
496 pmd_val(pmd) |= _PAGE_WRITE;
497 if (pmd_val(pmd) & _PAGE_MODIFIED)
498 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
499
500 return pmd;
501}
502
503static inline int pmd_dirty(pmd_t pmd)
504{
505 return !!(pmd_val(pmd) & _PAGE_MODIFIED);
506}
507
508static inline pmd_t pmd_mkclean(pmd_t pmd)
509{
510 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
511 return pmd;
512}
513
514static inline pmd_t pmd_mkdirty(pmd_t pmd)
515{
516 pmd_val(pmd) |= _PAGE_MODIFIED;
517 if (pmd_val(pmd) & _PAGE_WRITE)
518 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
519
520 return pmd;
521}
522
523static inline int pmd_young(pmd_t pmd)
524{
525 return !!(pmd_val(pmd) & _PAGE_ACCESSED);
526}
527
528static inline pmd_t pmd_mkold(pmd_t pmd)
529{
530 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
531
532 return pmd;
533}
534
535static inline pmd_t pmd_mkyoung(pmd_t pmd)
536{
537 pmd_val(pmd) |= _PAGE_ACCESSED;
538
539 if (cpu_has_rixi) {
540 if (!(pmd_val(pmd) & _PAGE_NO_READ))
541 pmd_val(pmd) |= _PAGE_SILENT_READ;
542 } else {
543 if (pmd_val(pmd) & _PAGE_READ)
544 pmd_val(pmd) |= _PAGE_SILENT_READ;
545 }
546
547 return pmd;
548}
549
550/* Extern to avoid header file madness */
551extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
552
553static inline unsigned long pmd_pfn(pmd_t pmd)
554{
555 return pmd_val(pmd) >> _PFN_SHIFT;
556}
557
558static inline struct page *pmd_page(pmd_t pmd)
559{
560 if (pmd_trans_huge(pmd))
561 return pfn_to_page(pmd_pfn(pmd));
562
563 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
564}
565
566static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
567{
568 pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) | pgprot_val(newprot);
569 return pmd;
570}
571
572static inline pmd_t pmd_mknotpresent(pmd_t pmd)
573{
574 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
575
576 return pmd;
577}
578
579/*
580 * The generic version pmdp_get_and_clear uses a version of pmd_clear() with a
581 * different prototype.
582 */
583#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
584static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
585 unsigned long address, pmd_t *pmdp)
586{
587 pmd_t old = *pmdp;
588
589 pmd_clear(pmdp);
590
591 return old;
592}
593
594#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
595
1da177e4
LT
596#include <asm-generic/pgtable.h>
597
22f1fdfd
WZ
598/*
599 * uncached accelerated TLB map for video memory access
600 */
601#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
602#define __HAVE_PHYS_MEM_ACCESS_PROT
603
604struct file;
605pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
606 unsigned long size, pgprot_t vma_prot);
607int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
608 unsigned long size, pgprot_t *vma_prot);
609#endif
610
1da177e4
LT
611/*
612 * We provide our own get_unmapped area to cope with the virtual aliasing
613 * constraints placed on us by the cache architecture.
614 */
615#define HAVE_ARCH_UNMAPPED_AREA
d0be89f6 616#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
1da177e4
LT
617
618/*
619 * No page table caches to initialise
620 */
621#define pgtable_cache_init() do { } while (0)
622
623#endif /* _ASM_PGTABLE_H */