MIPS: asm: pgtable: Add c0 hazards on HTW start/stop sequences
[linux-2.6-block.git] / arch / mips / include / asm / pgtable.h
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Ralf Baechle
7 */
8#ifndef _ASM_PGTABLE_H
9#define _ASM_PGTABLE_H
10
5bbea36a 11#include <linux/mm_types.h>
970d032f 12#include <linux/mmzone.h>
875d43e7 13#ifdef CONFIG_32BIT
1da177e4
LT
14#include <asm/pgtable-32.h>
15#endif
875d43e7 16#ifdef CONFIG_64BIT
1da177e4
LT
17#include <asm/pgtable-64.h>
18#endif
19
f10fae02 20#include <asm/io.h>
1da177e4
LT
21#include <asm/pgtable-bits.h>
22
8c65b4a6
TS
23struct mm_struct;
24struct vm_area_struct;
25
1da177e4 26#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
05857c64 27#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (cpu_has_rixi ? 0 : _PAGE_READ) | \
35133692 28 _page_cachable_default)
05857c64
SH
29#define PAGE_COPY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \
30 (cpu_has_rixi ? _PAGE_NO_EXEC : 0) | _page_cachable_default)
31#define PAGE_READONLY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \
35133692 32 _page_cachable_default)
1da177e4 33#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
35133692 34 _PAGE_GLOBAL | _page_cachable_default)
e2a9e5ad
PB
35#define PAGE_KERNEL_NC __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
36 _PAGE_GLOBAL | _CACHE_CACHABLE_NONCOHERENT)
05857c64 37#define PAGE_USERIO __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \
35133692 38 _page_cachable_default)
1da177e4
LT
39#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
40 __WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
41
42/*
6dd9344c
DD
43 * If _PAGE_NO_EXEC is not defined, we can't do page protection for
44 * execute, and consider it to be the same as read. Also, write
45 * permissions imply read permissions. This is the closest we can get
46 * by reasonable means..
1da177e4 47 */
1da177e4 48
35133692
CD
49/*
50 * Dummy values to fill the table in mmap.c
51 * The real values will be generated at runtime
52 */
53#define __P000 __pgprot(0)
54#define __P001 __pgprot(0)
55#define __P010 __pgprot(0)
56#define __P011 __pgprot(0)
57#define __P100 __pgprot(0)
58#define __P101 __pgprot(0)
59#define __P110 __pgprot(0)
60#define __P111 __pgprot(0)
61
62#define __S000 __pgprot(0)
63#define __S001 __pgprot(0)
64#define __S010 __pgprot(0)
65#define __S011 __pgprot(0)
66#define __S100 __pgprot(0)
67#define __S101 __pgprot(0)
68#define __S110 __pgprot(0)
69#define __S111 __pgprot(0)
70
71extern unsigned long _page_cachable_default;
1da177e4
LT
72
73/*
74 * ZERO_PAGE is a global shared page that is always zero; used
75 * for zero-mapped memory areas etc..
76 */
77
78extern unsigned long empty_zero_page;
79extern unsigned long zero_page_mask;
80
81#define ZERO_PAGE(vaddr) \
99e3b942 82 (virt_to_page((void *)(empty_zero_page + (((unsigned long)(vaddr)) & zero_page_mask))))
816422ad 83#define __HAVE_COLOR_ZERO_PAGE
62eede62 84
1da177e4
LT
85extern void paging_init(void);
86
87/*
88 * Conversion functions: convert a page and protection to a page entry,
89 * and a page entry and page directory to the page they refer to.
90 */
c9d06962 91#define pmd_phys(pmd) virt_to_phys((void *)pmd_val(pmd))
970d032f
RB
92
93#define __pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
94#ifndef CONFIG_TRANSPARENT_HUGEPAGE
95#define pmd_page(pmd) __pmd_page(pmd)
96#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
97
46a82b2d 98#define pmd_page_vaddr(pmd) pmd_val(pmd)
1da177e4 99
f1014d1b
MC
100#define htw_stop() \
101do { \
461d1597 102 if (cpu_has_htw) { \
f1014d1b
MC
103 write_c0_pwctl(read_c0_pwctl() & \
104 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
461d1597
MC
105 back_to_back_c0_hazard(); \
106 } \
f1014d1b
MC
107} while(0)
108
109#define htw_start() \
110do { \
461d1597 111 if (cpu_has_htw) { \
f1014d1b
MC
112 write_c0_pwctl(read_c0_pwctl() | \
113 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
461d1597
MC
114 back_to_back_c0_hazard(); \
115 } \
f1014d1b
MC
116} while(0)
117
118
119#define htw_reset() \
120do { \
121 if (cpu_has_htw) { \
122 htw_stop(); \
f1014d1b 123 htw_start(); \
f1014d1b
MC
124 } \
125} while(0)
126
2a4a8b1e
LP
127extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
128 pte_t pteval);
129
34adb28d 130#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
6e953891
SS
131
132#define pte_none(pte) (!(((pte).pte_low | (pte).pte_high) & ~_PAGE_GLOBAL))
133#define pte_present(pte) ((pte).pte_low & _PAGE_PRESENT)
134
1da177e4
LT
135static inline void set_pte(pte_t *ptep, pte_t pte)
136{
137 ptep->pte_high = pte.pte_high;
138 smp_wmb();
139 ptep->pte_low = pte.pte_low;
1da177e4 140
6e953891 141 if (pte.pte_low & _PAGE_GLOBAL) {
1da177e4
LT
142 pte_t *buddy = ptep_buddy(ptep);
143 /*
144 * Make sure the buddy is global too (if it's !none,
145 * it better already be global)
146 */
6e953891 147 if (pte_none(*buddy)) {
70342287 148 buddy->pte_low |= _PAGE_GLOBAL;
6e953891
SS
149 buddy->pte_high |= _PAGE_GLOBAL;
150 }
1da177e4
LT
151 }
152}
1da177e4
LT
153
154static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
155{
6e953891
SS
156 pte_t null = __pte(0);
157
1da177e4 158 /* Preserve global status for the pair */
6e953891
SS
159 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
160 null.pte_low = null.pte_high = _PAGE_GLOBAL;
161
162 set_pte_at(mm, addr, ptep, null);
f1014d1b 163 htw_reset();
1da177e4
LT
164}
165#else
6e953891
SS
166
167#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
168#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
169
1da177e4
LT
170/*
171 * Certain architectures need to do special things when pte's
172 * within a page table are directly modified. Thus, the following
173 * hook is made available.
174 */
175static inline void set_pte(pte_t *ptep, pte_t pteval)
176{
177 *ptep = pteval;
178#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
179 if (pte_val(pteval) & _PAGE_GLOBAL) {
180 pte_t *buddy = ptep_buddy(ptep);
181 /*
182 * Make sure the buddy is global too (if it's !none,
183 * it better already be global)
184 */
185 if (pte_none(*buddy))
186 pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
187 }
188#endif
189}
1da177e4
LT
190
191static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
192{
193#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
194 /* Preserve global status for the pair */
195 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
196 set_pte_at(mm, addr, ptep, __pte(_PAGE_GLOBAL));
197 else
198#endif
199 set_pte_at(mm, addr, ptep, __pte(0));
f1014d1b 200 htw_reset();
1da177e4
LT
201}
202#endif
203
204/*
c6e8b587 205 * (pmds are folded into puds so this doesn't get actually called,
1da177e4
LT
206 * but the define is needed for a generic inline function.)
207 */
208#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while(0)
c6e8b587 209
325f8a0a 210#ifndef __PAGETABLE_PMD_FOLDED
c6e8b587
RB
211/*
212 * (puds are folded into pgds so this doesn't get actually called,
213 * but the define is needed for a generic inline function.)
214 */
215#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
216#endif
1da177e4 217
5ff97472
RB
218#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
219#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
220#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
1da177e4 221
9975e77d
RB
222/*
223 * We used to declare this array with size but gcc 3.3 and older are not able
224 * to find that this expression is a constant, so the size is dropped.
225 */
226extern pgd_t swapper_pg_dir[];
1da177e4
LT
227
228/*
229 * The following only work if pte_present() is true.
230 * Undefined behaviour if not..
231 */
34adb28d 232#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
6e953891
SS
233static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
234static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
235static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
236static inline int pte_file(pte_t pte) { return pte.pte_low & _PAGE_FILE; }
237
1da177e4
LT
238static inline pte_t pte_wrprotect(pte_t pte)
239{
6e953891
SS
240 pte.pte_low &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
241 pte.pte_high &= ~_PAGE_SILENT_WRITE;
1da177e4
LT
242 return pte;
243}
244
1da177e4
LT
245static inline pte_t pte_mkclean(pte_t pte)
246{
6e953891
SS
247 pte.pte_low &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
248 pte.pte_high &= ~_PAGE_SILENT_WRITE;
1da177e4
LT
249 return pte;
250}
251
252static inline pte_t pte_mkold(pte_t pte)
253{
6e953891
SS
254 pte.pte_low &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
255 pte.pte_high &= ~_PAGE_SILENT_READ;
1da177e4
LT
256 return pte;
257}
258
259static inline pte_t pte_mkwrite(pte_t pte)
260{
6e953891
SS
261 pte.pte_low |= _PAGE_WRITE;
262 if (pte.pte_low & _PAGE_MODIFIED) {
263 pte.pte_low |= _PAGE_SILENT_WRITE;
264 pte.pte_high |= _PAGE_SILENT_WRITE;
1da177e4
LT
265 }
266 return pte;
267}
268
1da177e4
LT
269static inline pte_t pte_mkdirty(pte_t pte)
270{
6e953891
SS
271 pte.pte_low |= _PAGE_MODIFIED;
272 if (pte.pte_low & _PAGE_WRITE) {
273 pte.pte_low |= _PAGE_SILENT_WRITE;
274 pte.pte_high |= _PAGE_SILENT_WRITE;
1da177e4
LT
275 }
276 return pte;
277}
278
279static inline pte_t pte_mkyoung(pte_t pte)
280{
6e953891 281 pte.pte_low |= _PAGE_ACCESSED;
057229f9 282 if (pte.pte_low & _PAGE_READ) {
6e953891
SS
283 pte.pte_low |= _PAGE_SILENT_READ;
284 pte.pte_high |= _PAGE_SILENT_READ;
057229f9 285 }
1da177e4
LT
286 return pte;
287}
288#else
1da177e4
LT
289static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
290static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
291static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
292static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
293
294static inline pte_t pte_wrprotect(pte_t pte)
295{
296 pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
297 return pte;
298}
299
1da177e4
LT
300static inline pte_t pte_mkclean(pte_t pte)
301{
77a5c593 302 pte_val(pte) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
1da177e4
LT
303 return pte;
304}
305
306static inline pte_t pte_mkold(pte_t pte)
307{
77a5c593 308 pte_val(pte) &= ~(_PAGE_ACCESSED | _PAGE_SILENT_READ);
1da177e4
LT
309 return pte;
310}
311
312static inline pte_t pte_mkwrite(pte_t pte)
313{
314 pte_val(pte) |= _PAGE_WRITE;
315 if (pte_val(pte) & _PAGE_MODIFIED)
316 pte_val(pte) |= _PAGE_SILENT_WRITE;
317 return pte;
318}
319
1da177e4
LT
320static inline pte_t pte_mkdirty(pte_t pte)
321{
322 pte_val(pte) |= _PAGE_MODIFIED;
323 if (pte_val(pte) & _PAGE_WRITE)
324 pte_val(pte) |= _PAGE_SILENT_WRITE;
325 return pte;
326}
327
328static inline pte_t pte_mkyoung(pte_t pte)
329{
330 pte_val(pte) |= _PAGE_ACCESSED;
05857c64 331 if (cpu_has_rixi) {
6dd9344c
DD
332 if (!(pte_val(pte) & _PAGE_NO_READ))
333 pte_val(pte) |= _PAGE_SILENT_READ;
334 } else {
335 if (pte_val(pte) & _PAGE_READ)
336 pte_val(pte) |= _PAGE_SILENT_READ;
337 }
1da177e4
LT
338 return pte;
339}
dd794392
DD
340
341#ifdef _PAGE_HUGE
342static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
343
344static inline pte_t pte_mkhuge(pte_t pte)
345{
346 pte_val(pte) |= _PAGE_HUGE;
347 return pte;
348}
349#endif /* _PAGE_HUGE */
1da177e4 350#endif
7e675137
NP
351static inline int pte_special(pte_t pte) { return 0; }
352static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
1da177e4
LT
353
354/*
70342287 355 * Macro to make mark a page protection value as "uncacheable". Note
1da177e4
LT
356 * that "protection" is really a misnomer here as the protection value
357 * contains the memory attribute bits, dirty bits, and various other
358 * bits as well.
359 */
360#define pgprot_noncached pgprot_noncached
361
362static inline pgprot_t pgprot_noncached(pgprot_t _prot)
363{
364 unsigned long prot = pgprot_val(_prot);
365
366 prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
367
368 return __pgprot(prot);
369}
370
4b050ba7
MC
371static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
372{
373 unsigned long prot = pgprot_val(_prot);
374
375 /* cpu_data[0].writecombine is already shifted by _CACHE_SHIFT */
376 prot = (prot & ~_CACHE_MASK) | cpu_data[0].writecombine;
377
378 return __pgprot(prot);
379}
380
1da177e4
LT
381/*
382 * Conversion functions: convert a page and protection to a page entry,
383 * and a page entry and page directory to the page they refer to.
384 */
385#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
386
34adb28d 387#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
1da177e4
LT
388static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
389{
79e0bc37 390 pte.pte_low &= _PAGE_CHG_MASK;
77a5c593 391 pte.pte_high &= (_PFN_MASK | _CACHE_MASK);
79e0bc37 392 pte.pte_low |= pgprot_val(newprot);
77a5c593 393 pte.pte_high |= pgprot_val(newprot) & ~(_PFN_MASK | _CACHE_MASK);
1da177e4
LT
394 return pte;
395}
396#else
397static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
398{
399 return __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot));
400}
401#endif
402
403
404extern void __update_tlb(struct vm_area_struct *vma, unsigned long address,
405 pte_t pte);
1da177e4
LT
406
407static inline void update_mmu_cache(struct vm_area_struct *vma,
4b3073e1 408 unsigned long address, pte_t *ptep)
1da177e4 409{
4b3073e1 410 pte_t pte = *ptep;
1da177e4 411 __update_tlb(vma, address, pte);
1da177e4
LT
412}
413
970d032f
RB
414static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
415 unsigned long address, pmd_t *pmdp)
416{
417 pte_t pte = *(pte_t *)pmdp;
418
419 __update_tlb(vma, address, pte);
420}
421
1da177e4 422#define kern_addr_valid(addr) (1)
1da177e4 423
34adb28d 424#ifdef CONFIG_PHYS_ADDR_T_64BIT
1da177e4
LT
425extern int remap_pfn_range(struct vm_area_struct *vma, unsigned long from, unsigned long pfn, unsigned long size, pgprot_t prot);
426
1da177e4
LT
427static inline int io_remap_pfn_range(struct vm_area_struct *vma,
428 unsigned long vaddr,
429 unsigned long pfn,
430 unsigned long size,
431 pgprot_t prot)
432{
15d45cce 433 phys_addr_t phys_addr_high = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
ac5d8c02 434 return remap_pfn_range(vma, vaddr, phys_addr_high >> PAGE_SHIFT, size, prot);
1da177e4 435}
40d158e6 436#define io_remap_pfn_range io_remap_pfn_range
1da177e4
LT
437#endif
438
970d032f
RB
439#ifdef CONFIG_TRANSPARENT_HUGEPAGE
440
441extern int has_transparent_hugepage(void);
442
443static inline int pmd_trans_huge(pmd_t pmd)
444{
445 return !!(pmd_val(pmd) & _PAGE_HUGE);
446}
447
448static inline pmd_t pmd_mkhuge(pmd_t pmd)
449{
450 pmd_val(pmd) |= _PAGE_HUGE;
451
452 return pmd;
453}
454
455static inline int pmd_trans_splitting(pmd_t pmd)
456{
457 return !!(pmd_val(pmd) & _PAGE_SPLITTING);
458}
459
460static inline pmd_t pmd_mksplitting(pmd_t pmd)
461{
462 pmd_val(pmd) |= _PAGE_SPLITTING;
463
464 return pmd;
465}
466
467extern void set_pmd_at(struct mm_struct *mm, unsigned long addr,
468 pmd_t *pmdp, pmd_t pmd);
469
470#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
471/* Extern to avoid header file madness */
472extern void pmdp_splitting_flush(struct vm_area_struct *vma,
473 unsigned long address,
474 pmd_t *pmdp);
475
476#define __HAVE_ARCH_PMD_WRITE
477static inline int pmd_write(pmd_t pmd)
478{
479 return !!(pmd_val(pmd) & _PAGE_WRITE);
480}
481
482static inline pmd_t pmd_wrprotect(pmd_t pmd)
483{
484 pmd_val(pmd) &= ~(_PAGE_WRITE | _PAGE_SILENT_WRITE);
485 return pmd;
486}
487
488static inline pmd_t pmd_mkwrite(pmd_t pmd)
489{
490 pmd_val(pmd) |= _PAGE_WRITE;
491 if (pmd_val(pmd) & _PAGE_MODIFIED)
492 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
493
494 return pmd;
495}
496
497static inline int pmd_dirty(pmd_t pmd)
498{
499 return !!(pmd_val(pmd) & _PAGE_MODIFIED);
500}
501
502static inline pmd_t pmd_mkclean(pmd_t pmd)
503{
504 pmd_val(pmd) &= ~(_PAGE_MODIFIED | _PAGE_SILENT_WRITE);
505 return pmd;
506}
507
508static inline pmd_t pmd_mkdirty(pmd_t pmd)
509{
510 pmd_val(pmd) |= _PAGE_MODIFIED;
511 if (pmd_val(pmd) & _PAGE_WRITE)
512 pmd_val(pmd) |= _PAGE_SILENT_WRITE;
513
514 return pmd;
515}
516
517static inline int pmd_young(pmd_t pmd)
518{
519 return !!(pmd_val(pmd) & _PAGE_ACCESSED);
520}
521
522static inline pmd_t pmd_mkold(pmd_t pmd)
523{
524 pmd_val(pmd) &= ~(_PAGE_ACCESSED|_PAGE_SILENT_READ);
525
526 return pmd;
527}
528
529static inline pmd_t pmd_mkyoung(pmd_t pmd)
530{
531 pmd_val(pmd) |= _PAGE_ACCESSED;
532
533 if (cpu_has_rixi) {
534 if (!(pmd_val(pmd) & _PAGE_NO_READ))
535 pmd_val(pmd) |= _PAGE_SILENT_READ;
536 } else {
537 if (pmd_val(pmd) & _PAGE_READ)
538 pmd_val(pmd) |= _PAGE_SILENT_READ;
539 }
540
541 return pmd;
542}
543
544/* Extern to avoid header file madness */
545extern pmd_t mk_pmd(struct page *page, pgprot_t prot);
546
547static inline unsigned long pmd_pfn(pmd_t pmd)
548{
549 return pmd_val(pmd) >> _PFN_SHIFT;
550}
551
552static inline struct page *pmd_page(pmd_t pmd)
553{
554 if (pmd_trans_huge(pmd))
555 return pfn_to_page(pmd_pfn(pmd));
556
557 return pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT);
558}
559
560static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
561{
562 pmd_val(pmd) = (pmd_val(pmd) & _PAGE_CHG_MASK) | pgprot_val(newprot);
563 return pmd;
564}
565
566static inline pmd_t pmd_mknotpresent(pmd_t pmd)
567{
568 pmd_val(pmd) &= ~(_PAGE_PRESENT | _PAGE_VALID | _PAGE_DIRTY);
569
570 return pmd;
571}
572
573/*
574 * The generic version pmdp_get_and_clear uses a version of pmd_clear() with a
575 * different prototype.
576 */
577#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
578static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
579 unsigned long address, pmd_t *pmdp)
580{
581 pmd_t old = *pmdp;
582
583 pmd_clear(pmdp);
584
585 return old;
586}
587
588#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
589
1da177e4
LT
590#include <asm-generic/pgtable.h>
591
22f1fdfd
WZ
592/*
593 * uncached accelerated TLB map for video memory access
594 */
595#ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED
596#define __HAVE_PHYS_MEM_ACCESS_PROT
597
598struct file;
599pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
600 unsigned long size, pgprot_t vma_prot);
601int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn,
602 unsigned long size, pgprot_t *vma_prot);
603#endif
604
1da177e4
LT
605/*
606 * We provide our own get_unmapped area to cope with the virtual aliasing
607 * constraints placed on us by the cache architecture.
608 */
609#define HAVE_ARCH_UNMAPPED_AREA
d0be89f6 610#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
1da177e4
LT
611
612/*
613 * No page table caches to initialise
614 */
615#define pgtable_cache_init() do { } while (0)
616
617#endif /* _ASM_PGTABLE_H */