[linux-2.6-block.git] / arch / mips / include / asm / fpu_emulator.h

/*
 *  This program is free software; you can distribute it and/or modify it
 *  under the terms of the GNU General Public License (Version 2) as
 *  published by the Free Software Foundation.
 *
 *  This program is distributed in the hope it will be useful, but WITHOUT
 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 *  for more details.
 *
 *  You should have received a copy of the GNU General Public License along
 *  with this program; if not, write to the Free Software Foundation, Inc.,
 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 *
 * Further private data for which no space exists in mips_fpu_struct.
 * This should be subsumed into the mips_fpu_struct structure as
 * defined in processor.h as soon as the absurd wired absolute assembler
 * offsets become dynamic at compile time.
 *
 * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
 * Copyright (C) 2000 MIPS Technologies, Inc.  All rights reserved.
 */
#ifndef _ASM_FPU_EMULATOR_H
#define _ASM_FPU_EMULATOR_H

#include <linux/sched.h>
#include <asm/break.h>
#include <asm/thread_info.h>
#include <asm/inst.h>
#include <asm/local.h>
#include <asm/processor.h>

#ifdef CONFIG_DEBUG_FS

struct mips_fpu_emulator_stats {
	unsigned long emulated;
	unsigned long loads;
	unsigned long stores;
	unsigned long cp1ops;
	unsigned long cp1xops;
	unsigned long errors;
	unsigned long ieee754_inexact;
	unsigned long ieee754_underflow;
	unsigned long ieee754_overflow;
	unsigned long ieee754_zerodiv;
	unsigned long ieee754_invalidop;
	unsigned long ds_emul;
};

DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);

#define MIPS_FPU_EMU_INC_STATS(M)					\
do {									\
	preempt_disable();						\
	__this_cpu_inc(fpuemustats.M);					\
	preempt_enable();						\
} while (0)

#else
#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)
#endif /* CONFIG_DEBUG_FS */

extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
	unsigned long cpc);
extern int do_dsemulret(struct pt_regs *xcp);
extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
				    struct mips_fpu_struct *ctx, int has_fpu,
				    void *__user *fault_addr);
int process_fpemu_return(int sig, void __user *fault_addr,
			 unsigned long fcr31);
int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
		     unsigned long *contpc);

/*
 * Instruction inserted following the badinst to further tag the sequence
 */
#define BD_COOKIE 0x0000bd36	/* tne $0, $0 with baggage */

/*
 * Break instruction with special math emu break code set
 */
#define BREAK_MATH(micromips) (((micromips) ? 0x7 : 0xd) | (BRK_MEMU << 16))

#define SIGNALLING_NAN 0x7ff800007ff80000LL

static inline void fpu_emulator_init_fpu(void)
{
	struct task_struct *t = current;
	int i;

	for (i = 0; i < 32; i++)
		set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN);
}

#endif /* _ASM_FPU_EMULATOR_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* This program is free software; you can distribute it and/or modify it
	3	* under the terms of the GNU General Public License (Version 2) as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope it will be useful, but WITHOUT
	7	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	8	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
	9	* for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License along
	12	* with this program; if not, write to the Free Software Foundation, Inc.,
	13	* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
	14	*
eae89076 AN	15	* Further private data for which no space exists in mips_fpu_struct.
eae89076 AN	16	* This should be subsumed into the mips_fpu_struct structure as
1da177e4 LT	17	* defined in processor.h as soon as the absurd wired absolute assembler
	18	* offsets become dynamic at compile time.
	19	*
	20	* Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
	21	* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
	22	*/
	23	#ifndef _ASM_FPU_EMULATOR_H
	24	#define _ASM_FPU_EMULATOR_H
	25
e0cc3a42	26	#include <linux/sched.h>
ba3049ed	27	#include <asm/break.h>
e0cc3a42	28	#include <asm/thread_info.h>
ba3049ed	29	#include <asm/inst.h>
b6ee75ed	30	#include <asm/local.h>
e0cc3a42	31	#include <asm/processor.h>
b6ee75ed DD	32
b6ee75ed DD	33	#ifdef CONFIG_DEBUG_FS
ba3049ed	34
4a99d1e2	35	struct mips_fpu_emulator_stats {
d1cd39ad CL	36	unsigned long emulated;
	37	unsigned long loads;
	38	unsigned long stores;
	39	unsigned long cp1ops;
	40	unsigned long cp1xops;
	41	unsigned long errors;
	42	unsigned long ieee754_inexact;
	43	unsigned long ieee754_underflow;
	44	unsigned long ieee754_overflow;
	45	unsigned long ieee754_zerodiv;
	46	unsigned long ieee754_invalidop;
2707cd29	47	unsigned long ds_emul;
1da177e4 LT	48	};
1da177e4 LT	49
b6ee75ed DD	50	DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats);
	51
	52	#define MIPS_FPU_EMU_INC_STATS(M) \
c948aca4 RB	53	do { \
c948aca4 RB	54	preempt_disable(); \
d1cd39ad	55	__this_cpu_inc(fpuemustats.M); \
c948aca4 RB	56	preempt_enable(); \
c948aca4 RB	57	} while (0)
b6ee75ed DD	58
	59	#else
	60	#define MIPS_FPU_EMU_INC_STATS(M) do { } while (0)
	61	#endif /* CONFIG_DEBUG_FS */
0bd5d2e9	62
ba3049ed RB	63	extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir,
	64	unsigned long cpc);
	65	extern int do_dsemulret(struct pt_regs *xcp);
102cedc3 LY	66	extern int fpu_emulator_cop1Handler(struct pt_regs *xcp,
	67	struct mips_fpu_struct *ctx, int has_fpu,
	68	void __user fault_addr);
304acb71 MR	69	int process_fpemu_return(int sig, void __user *fault_addr,
304acb71 MR	70	unsigned long fcr31);
102cedc3 LY	71	int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
102cedc3 LY	72	unsigned long *contpc);
ba3049ed RB	73
	74	/*
	75	* Instruction inserted following the badinst to further tag the sequence
	76	*/
	77	#define BD_COOKIE 0x0000bd36 /* tne $0, $0 with baggage */
	78
	79	/*
	80	* Break instruction with special math emu break code set
	81	*/
733b8bc1	82	#define BREAK_MATH(micromips) (((micromips) ? 0x7 : 0xd) \| (BRK_MEMU << 16))
ba3049ed	83
e0cc3a42 RB	84	#define SIGNALLING_NAN 0x7ff800007ff80000LL
	85
	86	static inline void fpu_emulator_init_fpu(void)
	87	{
	88	struct task_struct *t = current;
	89	int i;
	90
e0cc3a42 RB	91	for (i = 0; i < 32; i++)
	92	set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN);
	93	}
	94
1da177e4	95	#endif /* _ASM_FPU_EMULATOR_H */